| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 96.84 | 98.06 | 95.93 | 97.44 | 91.53 | 98.25 | 98.21 | 98.46 |
| T3769 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.122796833 | Oct 09 09:08:41 PM UTC 24 | Oct 09 09:08:46 PM UTC 24 | 164080085 ps | ||
| T3770 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.3861600225 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:46 PM UTC 24 | 35931618 ps | ||
| T242 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1179169399 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:46 PM UTC 24 | 104089925 ps | ||
| T3771 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2204408214 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:46 PM UTC 24 | 90772040 ps | ||
| T3772 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.2478509465 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:46 PM UTC 24 | 97594196 ps | ||
| T3773 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3472053001 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:46 PM UTC 24 | 44185341 ps | ||
| T3774 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.2367134035 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:46 PM UTC 24 | 63645681 ps | ||
| T278 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.1134082118 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:46 PM UTC 24 | 56038115 ps | ||
| T3775 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.1713374566 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:46 PM UTC 24 | 137425508 ps | ||
| T3776 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.741847566 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:46 PM UTC 24 | 116498675 ps | ||
| T243 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.971164306 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 143586874 ps | ||
| T245 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.838827115 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 144130251 ps | ||
| T3777 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1275909598 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 221922767 ps | ||
| T244 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.3849232259 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 235772641 ps | ||
| T247 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.1580922686 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 236434695 ps | ||
| T280 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.3179958832 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 316927518 ps | ||
| T3778 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.24946561 | Oct 09 09:08:42 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 199557308 ps | ||
| T547 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.49651955 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 426317518 ps | ||
| T3779 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.1365877308 | Oct 09 09:08:45 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 70465184 ps | ||
| T248 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.1491806546 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 148260897 ps | ||
| T3780 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.2179270379 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 161069324 ps | ||
| T3781 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2865782540 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 171798748 ps | ||
| T3782 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.443553898 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:47 PM UTC 24 | 191862023 ps | ||
| T3783 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.2575991506 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:48 PM UTC 24 | 413879685 ps | ||
| T3784 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.736610289 | Oct 09 09:08:46 PM UTC 24 | Oct 09 09:08:48 PM UTC 24 | 83127773 ps | ||
| T3785 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.3876569701 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:48 PM UTC 24 | 138659159 ps | ||
| T3786 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.1806402809 | Oct 09 09:08:46 PM UTC 24 | Oct 09 09:08:48 PM UTC 24 | 91567908 ps | ||
| T246 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.2722695409 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:48 PM UTC 24 | 133096056 ps | ||
| T3787 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2331390102 | Oct 09 09:08:45 PM UTC 24 | Oct 09 09:08:48 PM UTC 24 | 98308323 ps | ||
| T3788 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2719510668 | Oct 09 09:08:45 PM UTC 24 | Oct 09 09:08:48 PM UTC 24 | 165135224 ps | ||
| T3789 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.1992756607 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:48 PM UTC 24 | 271759931 ps | ||
| T544 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.2844313427 | Oct 09 09:08:42 PM UTC 24 | Oct 09 09:08:48 PM UTC 24 | 1409025522 ps | ||
| T3790 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.2816645103 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:49 PM UTC 24 | 816030227 ps | ||
| T541 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.785436578 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:49 PM UTC 24 | 1059475305 ps | ||
| T545 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.394525492 | Oct 09 09:08:45 PM UTC 24 | Oct 09 09:08:49 PM UTC 24 | 271515298 ps | ||
| T3791 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.595421520 | Oct 09 09:08:41 PM UTC 24 | Oct 09 09:08:49 PM UTC 24 | 1017240552 ps | ||
| T542 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.3426346557 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:49 PM UTC 24 | 481639818 ps | ||
| T3792 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.1334958902 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:49 PM UTC 24 | 634596496 ps | ||
| T3793 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.1738001984 | Oct 09 09:08:46 PM UTC 24 | Oct 09 09:08:49 PM UTC 24 | 502789485 ps | ||
| T543 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3043850528 | Oct 09 09:08:44 PM UTC 24 | Oct 09 09:08:49 PM UTC 24 | 593007558 ps | ||
| T3794 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1512570595 | Oct 09 09:08:43 PM UTC 24 | Oct 09 09:08:50 PM UTC 24 | 1310645470 ps | ||
| T3795 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1783143670 | Oct 09 09:08:45 PM UTC 24 | Oct 09 09:08:50 PM UTC 24 | 294377497 ps | ||
| T286 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.2524383604 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 53881436 ps | ||
| T3796 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.261769016 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:50 PM UTC 24 | 70748602 ps | ||
| T3797 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.1258383068 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:50 PM UTC 24 | 38245424 ps | ||
| T3798 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.1246839731 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:50 PM UTC 24 | 81156289 ps | ||
| T3799 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2348213122 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:50 PM UTC 24 | 217823994 ps | ||
| T3800 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3667068568 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 51333033 ps | ||
| T287 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.1704728723 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:50 PM UTC 24 | 44825302 ps | ||
| T3801 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.227850697 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 96482173 ps | ||
| T3802 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2584183756 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 81292970 ps | ||
| T3803 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.3577757977 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 76676277 ps | ||
| T3804 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.3030394776 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 267765721 ps | ||
| T3805 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.1727683553 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 40605034 ps | ||
| T3806 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.2602196362 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 56130658 ps | ||
| T3807 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.4117054516 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 123116416 ps | ||
| T3808 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.2510875295 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 97020908 ps | ||
| T3809 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.4173798652 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 41944144 ps | ||
| T3810 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1800333751 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 92151744 ps | ||
| T3811 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.2881928888 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 117952199 ps | ||
| T3812 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.1236753732 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 62016850 ps | ||
| T3813 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.2841806999 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 101705285 ps | ||
| T3814 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.1814960194 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 100375386 ps | ||
| T3815 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.184382992 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 66362648 ps | ||
| T3816 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2574964992 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 125903960 ps | ||
| T3817 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.4077179300 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 201210584 ps | ||
| T3818 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.3210523343 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:51 PM UTC 24 | 134007608 ps | ||
| T3819 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.822101264 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:52 PM UTC 24 | 336893544 ps | ||
| T3820 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.457136420 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:52 PM UTC 24 | 361701121 ps | ||
| T3821 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.3153393491 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:52 PM UTC 24 | 117311284 ps | ||
| T3822 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3543511594 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:52 PM UTC 24 | 93944496 ps | ||
| T3823 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2620784574 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:52 PM UTC 24 | 188268041 ps | ||
| T3824 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.2884672687 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:52 PM UTC 24 | 201515237 ps | ||
| T3825 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.1651448841 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:52 PM UTC 24 | 87819357 ps | ||
| T3826 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.12561797 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:53 PM UTC 24 | 410267649 ps | ||
| T3827 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.60061801 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:53 PM UTC 24 | 111601297 ps | ||
| T3828 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.535084661 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 1570904807 ps | ||
| T3829 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.1194825844 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:53 PM UTC 24 | 822922219 ps | ||
| T3830 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.1844464034 | Oct 09 09:08:51 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 56043470 ps | ||
| T3831 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.1991882876 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 42163356 ps | ||
| T3832 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.3278775205 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 41138386 ps | ||
| T3833 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3871731365 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 41795203 ps | ||
| T3834 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.1600520640 | Oct 09 09:08:51 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 59857689 ps | ||
| T3835 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.2170224914 | Oct 09 09:08:51 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 49204987 ps | ||
| T3836 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.296743510 | Oct 09 09:08:51 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 163812148 ps | ||
| T3837 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.3051431236 | Oct 09 09:08:51 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 66552558 ps | ||
| T3838 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.3469971586 | Oct 09 09:08:51 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 193848020 ps | ||
| T3839 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.2162183923 | Oct 09 09:08:48 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 829406780 ps | ||
| T3840 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.3770745430 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 47697800 ps | ||
| T3841 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.2419380880 | Oct 09 09:08:51 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 120027282 ps | ||
| T3842 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.199806780 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 72639975 ps | ||
| T3843 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.229185554 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 40018542 ps | ||
| T3844 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.2797074415 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 63317320 ps | ||
| T3845 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.125781529 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 110596309 ps | ||
| T3846 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.4109259046 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 36715328 ps | ||
| T3847 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.709666500 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 38998329 ps | ||
| T3848 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.705627488 | Oct 09 09:08:51 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 84038464 ps | ||
| T3849 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.1907427265 | Oct 09 09:08:51 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 152302981 ps | ||
| T3850 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.115624631 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:54 PM UTC 24 | 45806861 ps | ||
| T3851 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.75388628 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 44474296 ps | ||
| T3852 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.945220897 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 43849721 ps | ||
| T3853 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.469263107 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 31617718 ps | ||
| T3854 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.2694297655 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 70096461 ps | ||
| T3855 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.526854318 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 61420143 ps | ||
| T3856 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.1941838632 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 52843570 ps | ||
| T3857 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.329174397 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 62862143 ps | ||
| T3858 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.1377499064 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 49512069 ps | ||
| T3859 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.594538394 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 39820641 ps | ||
| T3860 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3740106610 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 50987585 ps | ||
| T546 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.3735856645 | Oct 09 09:08:49 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 1381675520 ps | ||
| T3861 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.4233806367 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 51905032 ps | ||
| T3862 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.475608679 | Oct 09 09:08:52 PM UTC 24 | Oct 09 09:08:55 PM UTC 24 | 38699707 ps | ||
| T3863 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.1001218065 | Oct 09 09:08:53 PM UTC 24 | Oct 09 09:08:56 PM UTC 24 | 96243086 ps | ||
| T3864 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.1729583228 | Oct 09 09:08:53 PM UTC 24 | Oct 09 09:08:56 PM UTC 24 | 59061568 ps | ||
| T3865 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.3561369243 | Oct 09 09:08:51 PM UTC 24 | Oct 09 09:08:57 PM UTC 24 | 537124801 ps | ||
| T3866 | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.1376367575 | Oct 09 09:08:55 PM UTC 24 | Oct 09 09:08:57 PM UTC 24 | 37272806 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.947932667 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 494372403 ps |
| CPU time | 1.74 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=947932667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_data_toggle_clear.947932667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.319907655 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 5769603301 ps |
| CPU time | 21.37 seconds |
| Started | Oct 09 09:08:59 PM UTC 24 |
| Finished | Oct 09 09:09:22 PM UTC 24 |
| Peak memory | 234716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=319907655 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.319907655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.112962672 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 854560991 ps |
| CPU time | 2.34 seconds |
| Started | Oct 09 09:09:32 PM UTC 24 |
| Finished | Oct 09 09:09:42 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=112962672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.112962672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.1949776770 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 40860909 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:36 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1949776770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.1949776770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.558522020 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 9107708610 ps |
| CPU time | 12.55 seconds |
| Started | Oct 09 09:10:02 PM UTC 24 |
| Finished | Oct 09 09:10:16 PM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=558522020 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.558522020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.2907678518 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 594308129 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:59 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907678518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_disable_endpoint.2907678518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.1020998186 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 4184541880 ps |
| CPU time | 28.99 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:09:34 PM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020998186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.1020998186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.2295748676 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 325403252 ps |
| CPU time | 2.11 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295748676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.2295748676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.3474864271 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 8177402637 ps |
| CPU time | 17.56 seconds |
| Started | Oct 09 09:12:34 PM UTC 24 |
| Finished | Oct 09 09:12:53 PM UTC 24 |
| Peak memory | 228256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3474864271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.3474864271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.1715894247 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 37485699119 ps |
| CPU time | 78.19 seconds |
| Started | Oct 09 09:09:30 PM UTC 24 |
| Finished | Oct 09 09:10:50 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715894247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.1715894247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.2377475110 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 1205333265 ps |
| CPU time | 3.17 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:09:00 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2377475110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.2377475110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.1346039759 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 28359141908 ps |
| CPU time | 33 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:09:30 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346039759 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.1346039759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.3254452353 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 988231832 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:10:02 PM UTC 24 |
| Finished | Oct 09 09:10:05 PM UTC 24 |
| Peak memory | 250652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254452353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.3254452353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.4260879799 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 472718529 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4260879799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_t x_rx_disruption.4260879799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.1578535876 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 51795378 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:11:36 PM UTC 24 |
| Finished | Oct 09 09:11:38 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1578535876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.1578535876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.1354349688 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 1071224314 ps |
| CPU time | 4.75 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:41 PM UTC 24 |
| Peak memory | 217936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1354349688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.1354349688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.1775302558 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 58655755 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:36 PM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775302558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.1775302558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.1135340454 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 19214722186 ps |
| CPU time | 29.19 seconds |
| Started | Oct 09 09:11:02 PM UTC 24 |
| Finished | Oct 09 09:11:33 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135340454 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.1135340454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.2394506278 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 7955098556 ps |
| CPU time | 34.53 seconds |
| Started | Oct 09 09:09:58 PM UTC 24 |
| Finished | Oct 09 09:10:37 PM UTC 24 |
| Peak memory | 230384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394506278 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.2394506278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.2703933870 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 578479360 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2703933870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.2703933870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.152404836 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 629107841 ps |
| CPU time | 1.78 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=152404836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_tx _rx_disruption.152404836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.1966632173 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 5476394313 ps |
| CPU time | 8.01 seconds |
| Started | Oct 09 09:14:36 PM UTC 24 |
| Finished | Oct 09 09:14:45 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966632173 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.1966632173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.628271593 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 281859251 ps |
| CPU time | 2.6 seconds |
| Started | Oct 09 09:08:42 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 227912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=628271593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.628271593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.1063266682 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 327750722 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:09:00 PM UTC 24 |
| Finished | Oct 09 09:09:06 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1063266682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_rx_full.1063266682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.3040575482 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 81750751 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:36 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3040575482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.3040575482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.2590007351 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 541118560 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:09:58 PM UTC 24 |
| Finished | Oct 09 09:10:04 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2590007351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.2590007351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.2245785886 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 766147534 ps |
| CPU time | 3.55 seconds |
| Started | Oct 09 09:10:33 PM UTC 24 |
| Finished | Oct 09 09:10:37 PM UTC 24 |
| Peak memory | 217644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245785886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.2245785886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.878123038 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 703967864 ps |
| CPU time | 1.87 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=878123038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.878123038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.1856975305 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 38362497922 ps |
| CPU time | 80.07 seconds |
| Started | Oct 09 09:13:24 PM UTC 24 |
| Finished | Oct 09 09:14:46 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856975305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.1856975305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.3892942279 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 541326884 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:16:44 PM UTC 24 |
| Finished | Oct 09 09:16:46 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892942279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.3892942279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.2445985505 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 144137267 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:58 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2445985505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.2445985505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.1253774422 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 138312685 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253774422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_disconnected.1253774422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.724023488 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 203466798 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:09:00 PM UTC 24 |
| Finished | Oct 09 09:09:05 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=724023488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_rx_crc_err.724023488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.755013156 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 985209197 ps |
| CPU time | 3.04 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:10:09 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=755013156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.755013156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.1714075605 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 253391442 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:10:33 PM UTC 24 |
| Finished | Oct 09 09:10:35 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1714075605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_fifo_levels.1714075605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.953855856 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 550634754 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:09:32 PM UTC 24 |
| Finished | Oct 09 09:09:42 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=953855856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.953855856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.1622162641 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 518380330 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622162641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.1622162641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.2999198818 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 554294192 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999198818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.2999198818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.2437081243 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 548309159 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437081243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.2437081243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.1971382805 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 25967565079 ps |
| CPU time | 40.09 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:21:32 PM UTC 24 |
| Peak memory | 217860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1971382805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.1971382805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.3969079225 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 57349860 ps |
| CPU time | 0.71 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:36 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3969079225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.3969079225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.387356628 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 730413853 ps |
| CPU time | 1.75 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=387356628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.387356628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.1599073431 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 492641525 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599073431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.1599073431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.1272856637 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 720668043 ps |
| CPU time | 1.64 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1272856637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.1272856637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.2640809976 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 44502822226 ps |
| CPU time | 75.08 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:10:13 PM UTC 24 |
| Peak memory | 218360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640809976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.2640809976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.797486784 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 390000553 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=797486784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.797486784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.450416926 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 10482570480 ps |
| CPU time | 167.77 seconds |
| Started | Oct 09 09:09:43 PM UTC 24 |
| Finished | Oct 09 09:12:34 PM UTC 24 |
| Peak memory | 230088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=450416926 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.450416926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.138162121 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 31119570753 ps |
| CPU time | 65.84 seconds |
| Started | Oct 09 09:10:26 PM UTC 24 |
| Finished | Oct 09 09:11:40 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=138162121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_device_address.138162121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3043850528 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 593007558 ps |
| CPU time | 3.95 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:49 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3043850528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.3043850528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.1087959349 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 543577225 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1087959349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.1087959349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.3979382676 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 540630160 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979382676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.3979382676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.3488733972 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 824911558 ps |
| CPU time | 1.73 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488733972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.3488733972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.625498108 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 348207894 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:55 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=625498108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.625498108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.4227448424 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 187835949 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:14:27 PM UTC 24 |
| Finished | Oct 09 09:14:30 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4227448424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_nak_trans.4227448424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.4146523073 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 107846820 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:09:22 PM UTC 24 |
| Finished | Oct 09 09:09:31 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146523073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.4146523073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.3177512268 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 6647015862 ps |
| CPU time | 63.16 seconds |
| Started | Oct 09 09:11:40 PM UTC 24 |
| Finished | Oct 09 09:12:44 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177512268 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.3177512268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.1427363284 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 458148819 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:09:01 PM UTC 24 |
| Finished | Oct 09 09:09:34 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427363284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.1427363284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.2916791681 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 763228514 ps |
| CPU time | 1.76 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2916791681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.2916791681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.1395745536 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 174255195 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:08:59 PM UTC 24 |
| Finished | Oct 09 09:09:01 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395745536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.1395745536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.1494712018 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 100969783533 ps |
| CPU time | 183.93 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:12:41 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1494712018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_loclk_max.1494712018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.4101451085 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 440840594 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101451085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.4101451085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.1665709210 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 832298826 ps |
| CPU time | 2.45 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:09 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1665709210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.1665709210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.3019297813 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 697118923 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:28:00 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3019297813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.3019297813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.375220911 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 375899965 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:41:25 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=375220911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.375220911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.2628754267 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 603661126 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:42:28 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628754267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.2628754267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.66721110 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 507754768 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:12:56 PM UTC 24 |
| Finished | Oct 09 09:12:58 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=66721110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.66721110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1783143670 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 294377497 ps |
| CPU time | 2.88 seconds |
| Started | Oct 09 09:08:45 PM UTC 24 |
| Finished | Oct 09 09:08:50 PM UTC 24 |
| Peak memory | 231940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783143670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.1783143670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.2059957734 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 137769278 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:57 PM UTC 24 |
| Peak memory | 216008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059957734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.2059957734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.1435117337 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 245527446 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:08:56 PM UTC 24 |
| Finished | Oct 09 09:09:02 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435117337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_fifo_levels.1435117337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.1177247021 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 614551920 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1177247021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.1177247021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.3339422930 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 413104079 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339422930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.3339422930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.1582960955 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 443138766 ps |
| CPU time | 1.21 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1582960955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.1582960955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.2837971679 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 296782373 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2837971679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.2837971679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.1199086994 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 531833829 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199086994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.1199086994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.969642136 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 873383732 ps |
| CPU time | 3.33 seconds |
| Started | Oct 09 09:13:53 PM UTC 24 |
| Finished | Oct 09 09:13:58 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=969642136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.969642136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.2008287437 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 287124397 ps |
| CPU time | 2.04 seconds |
| Started | Oct 09 09:14:59 PM UTC 24 |
| Finished | Oct 09 09:15:02 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008287437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_fifo_levels.2008287437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.18530415 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 46279617979 ps |
| CPU time | 86.65 seconds |
| Started | Oct 09 09:14:39 PM UTC 24 |
| Finished | Oct 09 09:16:07 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=18530415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_device_address.18530415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.1287684013 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 237555134 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:35 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287684013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_nak_trans.1287684013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.982770746 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 142013204 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:12:11 PM UTC 24 |
| Finished | Oct 09 09:12:14 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=982770746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.982770746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.1704728723 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 44825302 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:50 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704728723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.1704728723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.3735856645 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 1381675520 ps |
| CPU time | 4.61 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735856645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.3735856645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.49651955 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 426317518 ps |
| CPU time | 2.16 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=49651955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SE Q=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/covera ge/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.49651955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2181894003 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 5120569701 ps |
| CPU time | 129.05 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:11:07 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181894003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.2181894003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.3639198239 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 164891639 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:09:32 PM UTC 24 |
| Finished | Oct 09 09:09:41 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3639198239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_fifo_levels.3639198239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.2648947593 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 148791747 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:09:52 PM UTC 24 |
| Finished | Oct 09 09:10:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648947593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.2648947593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.3698587718 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 217093509 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:09:54 PM UTC 24 |
| Finished | Oct 09 09:09:57 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3698587718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.3698587718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.3707251621 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 163289635 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:55 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707251621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 100.usbdev_fifo_levels.3707251621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.3572059700 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 567786640 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572059700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.3572059700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.3761026686 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 239956199 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3761026686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 101.usbdev_fifo_levels.3761026686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.2874618371 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 277392687 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2874618371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 102.usbdev_fifo_levels.2874618371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.3593268474 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 164207230 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:55 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593268474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 103.usbdev_fifo_levels.3593268474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.2586407475 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 288931743 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2586407475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 104.usbdev_fifo_levels.2586407475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.336093062 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 256092691 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=336093062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 105.usbdev_fifo_levels.336093062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.2596628991 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 149318888 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:14:43 PM UTC 24 |
| Finished | Oct 09 09:14:45 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596628991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_fifo_levels.2596628991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.2166970815 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 436949133 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166970815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.2166970815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.2933394227 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 505800878 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933394227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.2933394227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.204894679 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 195958039 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=204894679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 112.usbdev_fifo_levels.204894679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.1821050062 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 283265033 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1821050062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 113.usbdev_fifo_levels.1821050062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.1704490027 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 573055907 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704490027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.1704490027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.2081070505 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 272401822 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081070505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 115.usbdev_fifo_levels.2081070505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/115.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.3549392575 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 174896052 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549392575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 117.usbdev_fifo_levels.3549392575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.2391887202 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 258111440 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:14:59 PM UTC 24 |
| Finished | Oct 09 09:15:02 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391887202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.2391887202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.1597994535 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 303147155 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597994535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 123.usbdev_fifo_levels.1597994535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.3315669685 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 274284903 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315669685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 125.usbdev_fifo_levels.3315669685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.996305300 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 151245366 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=996305300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 126.usbdev_fifo_levels.996305300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.3217834746 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 258674303 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217834746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 128.usbdev_fifo_levels.3217834746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.1509285513 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 267306461 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509285513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.1509285513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.1617593282 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 642732558 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1617593282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.1617593282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.3117171466 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 260750609 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 217940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3117171466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.3117171466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.1928524287 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 300425622 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928524287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 134.usbdev_fifo_levels.1928524287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.1060456262 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 275648174 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1060456262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.1060456262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.1692407344 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 283302273 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:15:37 PM UTC 24 |
| Finished | Oct 09 09:15:40 PM UTC 24 |
| Peak memory | 215224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692407344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_fifo_levels.1692407344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.3954398169 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 302583576 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:24 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3954398169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 143.usbdev_fifo_levels.3954398169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/143.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/144.usbdev_fifo_levels.94941474 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 290470731 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=94941474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 144.usbdev_fifo_levels.94941474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/144.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.1605302752 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 291344781 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605302752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 147.usbdev_fifo_levels.1605302752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.3349316183 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 430088323 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349316183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.3349316183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.4062704519 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 284145664 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:05 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4062704519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_fifo_levels.4062704519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/150.usbdev_fifo_levels.1275873375 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 354454723 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1275873375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 150.usbdev_fifo_levels.1275873375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/150.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.3424709755 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 492282833 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3424709755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.3424709755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.2826564921 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 307603085 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826564921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 156.usbdev_fifo_levels.2826564921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/156.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.3202726776 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 269846294 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202726776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 158.usbdev_fifo_levels.3202726776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/158.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.1467970978 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 202306484 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467970978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.1467970978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.3853457837 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 394011806 ps |
| CPU time | 1.28 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3853457837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.3853457837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.48417667 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 469417061 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:39 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=48417667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.48417667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.1829851947 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 278961145 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1829851947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_fifo_levels.1829851947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.562646432 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 307991534 ps |
| CPU time | 1.99 seconds |
| Started | Oct 09 09:11:15 PM UTC 24 |
| Finished | Oct 09 09:11:18 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=562646432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_fifo_levels.562646432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.37777202 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 92183993427 ps |
| CPU time | 193.29 seconds |
| Started | Oct 09 09:11:15 PM UTC 24 |
| Finished | Oct 09 09:14:32 PM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=37777202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_n ame 4.usbdev_freq_hiclk_max.37777202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.1619798270 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 253507082 ps |
| CPU time | 1.81 seconds |
| Started | Oct 09 09:12:00 PM UTC 24 |
| Finished | Oct 09 09:12:03 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619798270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_fifo_levels.1619798270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2284566977 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 337020705 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:42:28 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284566977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.2284566977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.3542287448 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 278437494 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 216372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542287448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 62.usbdev_fifo_levels.3542287448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.2085733665 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 251720380 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085733665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.2085733665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.1633793198 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 189073280 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:13:26 PM UTC 24 |
| Finished | Oct 09 09:13:29 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633793198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_fifo_levels.1633793198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.3825870863 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 159876328 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825870863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 93.usbdev_fifo_levels.3825870863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/93.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.2539370387 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 299571540 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539370387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 96.usbdev_fifo_levels.2539370387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.2625858216 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 147004689 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:09:27 PM UTC 24 |
| Finished | Oct 09 09:09:33 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625858216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.2625858216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.2516986899 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 47052479 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:15:08 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2516986899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.2516986899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.2615361123 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 5378325491 ps |
| CPU time | 140.91 seconds |
| Started | Oct 09 09:10:59 PM UTC 24 |
| Finished | Oct 09 09:13:22 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2615361123 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.2615361123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.3416528943 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 188931619 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:58 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416528943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_empty.3416528943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.4276271735 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 4168917000 ps |
| CPU time | 9.39 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:09:11 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276271735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.4276271735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.3998120730 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 449152883 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:09:12 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998120730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.3998120730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.255743384 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 188165423 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:09:01 PM UTC 24 |
| Finished | Oct 09 09:09:37 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=255743384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_rx_pid_err.255743384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.1168075493 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 183315592 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:10:22 PM UTC 24 |
| Finished | Oct 09 09:10:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168075493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.1168075493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.3720380326 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 156287513 ps |
| CPU time | 2.53 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 234144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3720380326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.3720380326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.1662783581 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 699788150 ps |
| CPU time | 3.53 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:39 PM UTC 24 |
| Peak memory | 217596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662783581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.1662783581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.3750135222 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 175504150 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:09:37 PM UTC 24 |
| Finished | Oct 09 09:09:56 PM UTC 24 |
| Peak memory | 215544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3750135222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.3750135222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.1784559412 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 13248122697 ps |
| CPU time | 96.78 seconds |
| Started | Oct 09 09:14:23 PM UTC 24 |
| Finished | Oct 09 09:16:02 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1784559412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.1784559412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.2730252281 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 601922548 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2730252281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_ tx_rx_disruption.2730252281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.623332402 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 201827898 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:14:49 PM UTC 24 |
| Finished | Oct 09 09:14:52 PM UTC 24 |
| Peak memory | 215532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=623332402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_nak_trans.623332402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.1440014810 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 192745793 ps |
| CPU time | 1.22 seconds |
| Started | Oct 09 09:16:03 PM UTC 24 |
| Finished | Oct 09 09:16:07 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1440014810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_nak_trans.1440014810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.3291069513 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 190340754 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291069513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.3291069513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.1099218840 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 182325132 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099218840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.1099218840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.2841263294 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 170610938 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:56 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841263294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_nak_trans.2841263294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.1528253707 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 245601472 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528253707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.1528253707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.1525336446 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 197906794 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525336446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.1525336446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.723445625 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 250994073 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=723445625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_nak_trans.723445625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.187756898 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 6467752590 ps |
| CPU time | 39.89 seconds |
| Started | Oct 09 09:12:21 PM UTC 24 |
| Finished | Oct 09 09:13:02 PM UTC 24 |
| Peak memory | 235164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=187756898 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_0 8/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.187756898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.1447214069 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 355305866 ps |
| CPU time | 3.21 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:39 PM UTC 24 |
| Peak memory | 217856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447214069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.1447214069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.925181376 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 878891665 ps |
| CPU time | 4.21 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:40 PM UTC 24 |
| Peak memory | 217852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=925181376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.925181376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.232219193 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 93001292 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:36 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=232219193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.232219193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.974888783 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 59951114 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 229032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=974888783 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.974888783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.1908963906 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 74763726 ps |
| CPU time | 2 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908963906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.1908963906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.3497298625 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 502530590 ps |
| CPU time | 3.85 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:39 PM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3497298625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.3497298625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.1864301255 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 96436566 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864301255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.1864301255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.2384781534 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 201130892 ps |
| CPU time | 1.89 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:38 PM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2384781534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.2384781534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.1527814625 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 1105557139 ps |
| CPU time | 5.06 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:41 PM UTC 24 |
| Peak memory | 217492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527814625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.1527814625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.1374189434 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 83258141 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 217136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1374189434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.1374189434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1590424236 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 65807166 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 226848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590424236 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.1590424236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.4031636757 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 65227445 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:36 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031636757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.4031636757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.801872701 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 84544814 ps |
| CPU time | 1.97 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:38 PM UTC 24 |
| Peak memory | 227108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=801872701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.801872701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.69553778 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 291444724 ps |
| CPU time | 2.33 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:38 PM UTC 24 |
| Peak memory | 217200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=69553778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/ cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.69553778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.2952436138 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 252694900 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952436138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.2952436138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2652591166 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 237458812 ps |
| CPU time | 2.3 seconds |
| Started | Oct 09 09:08:33 PM UTC 24 |
| Finished | Oct 09 09:08:38 PM UTC 24 |
| Peak memory | 217600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652591166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.2652591166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.2179270379 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 161069324 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 228988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179270379 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.2179270379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.1134082118 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 56038115 ps |
| CPU time | 0.75 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1134082118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.1134082118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.277878410 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 57039490 ps |
| CPU time | 0.75 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=277878410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.277878410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1275909598 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 221922767 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 217068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1275909598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.1275909598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.1491806546 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 148260897 ps |
| CPU time | 1.8 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491806546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.1491806546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2331390102 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 98308323 ps |
| CPU time | 1.29 seconds |
| Started | Oct 09 09:08:45 PM UTC 24 |
| Finished | Oct 09 09:08:48 PM UTC 24 |
| Peak memory | 226212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331390102 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.2331390102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.1365877308 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 70465184 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:08:45 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365877308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.1365877308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.3565960924 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 46142013 ps |
| CPU time | 0.75 seconds |
| Started | Oct 09 09:08:45 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3565960924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.3565960924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2719510668 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 165135224 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:08:45 PM UTC 24 |
| Finished | Oct 09 09:08:48 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719510668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.2719510668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.2722695409 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 133096056 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:48 PM UTC 24 |
| Peak memory | 234808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722695409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.2722695409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.394525492 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 271515298 ps |
| CPU time | 2.22 seconds |
| Started | Oct 09 09:08:45 PM UTC 24 |
| Finished | Oct 09 09:08:49 PM UTC 24 |
| Peak memory | 217664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=394525492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.394525492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2574964992 |
| Short name | T3816 |
| Test name | |
| Test status | |
| Simulation time | 125903960 ps |
| CPU time | 2.19 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 227908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574964992 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.2574964992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.1806402809 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 91567908 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:08:46 PM UTC 24 |
| Finished | Oct 09 09:08:48 PM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806402809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.1806402809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.736610289 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 83127773 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:08:46 PM UTC 24 |
| Finished | Oct 09 09:08:48 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=736610289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.736610289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2348213122 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 217823994 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:50 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348213122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.2348213122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.1738001984 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 502789485 ps |
| CPU time | 2.58 seconds |
| Started | Oct 09 09:08:46 PM UTC 24 |
| Finished | Oct 09 09:08:49 PM UTC 24 |
| Peak memory | 217584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738001984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.1738001984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.3210523343 |
| Short name | T3818 |
| Test name | |
| Test status | |
| Simulation time | 134007608 ps |
| CPU time | 1.9 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 227008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210523343 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.3210523343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.1246839731 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 81156289 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:50 PM UTC 24 |
| Peak memory | 217068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1246839731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.1246839731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.261769016 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 70748602 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:50 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=261769016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.261769016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.3030394776 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 267765721 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3030394776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.3030394776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2620784574 |
| Short name | T3823 |
| Test name | |
| Test status | |
| Simulation time | 188268041 ps |
| CPU time | 2.87 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:52 PM UTC 24 |
| Peak memory | 227904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620784574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.2620784574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.535084661 |
| Short name | T3828 |
| Test name | |
| Test status | |
| Simulation time | 1570904807 ps |
| CPU time | 5 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 217664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=535084661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.535084661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.3577757977 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 76676277 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 227056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577757977 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.3577757977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2584183756 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 81292970 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 217068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2584183756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.2584183756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.1258383068 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 38245424 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:50 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258383068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.1258383068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.2602196362 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 56130658 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2602196362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.2602196362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3543511594 |
| Short name | T3822 |
| Test name | |
| Test status | |
| Simulation time | 93944496 ps |
| CPU time | 2.28 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:52 PM UTC 24 |
| Peak memory | 228076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543511594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.3543511594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.457136420 |
| Short name | T3820 |
| Test name | |
| Test status | |
| Simulation time | 361701121 ps |
| CPU time | 2.23 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:52 PM UTC 24 |
| Peak memory | 217500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=457136420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.457136420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.2510875295 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 97020908 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 226948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2510875295 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.2510875295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.227850697 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 96482173 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 217132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=227850697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.227850697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1800333751 |
| Short name | T3810 |
| Test name | |
| Test status | |
| Simulation time | 92151744 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800333751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.1800333751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.4077179300 |
| Short name | T3817 |
| Test name | |
| Test status | |
| Simulation time | 201210584 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4077179300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.4077179300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.2162183923 |
| Short name | T3839 |
| Test name | |
| Test status | |
| Simulation time | 829406780 ps |
| CPU time | 4.07 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162183923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.2162183923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.2841806999 |
| Short name | T3813 |
| Test name | |
| Test status | |
| Simulation time | 101705285 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 227008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841806999 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.2841806999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.4117054516 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 123116416 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117054516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.4117054516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.1727683553 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 40605034 ps |
| CPU time | 0.67 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1727683553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.1727683553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.2881928888 |
| Short name | T3811 |
| Test name | |
| Test status | |
| Simulation time | 117952199 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 217076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881928888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.2881928888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.2884672687 |
| Short name | T3824 |
| Test name | |
| Test status | |
| Simulation time | 201515237 ps |
| CPU time | 2.22 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:52 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884672687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.2884672687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.1194825844 |
| Short name | T3829 |
| Test name | |
| Test status | |
| Simulation time | 822922219 ps |
| CPU time | 2.91 seconds |
| Started | Oct 09 09:08:48 PM UTC 24 |
| Finished | Oct 09 09:08:53 PM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194825844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.1194825844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.3153393491 |
| Short name | T3821 |
| Test name | |
| Test status | |
| Simulation time | 117311284 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:52 PM UTC 24 |
| Peak memory | 230436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153393491 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.3153393491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.1814960194 |
| Short name | T3814 |
| Test name | |
| Test status | |
| Simulation time | 100375386 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814960194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.1814960194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.4173798652 |
| Short name | T3809 |
| Test name | |
| Test status | |
| Simulation time | 41944144 ps |
| CPU time | 0.67 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4173798652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.4173798652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.822101264 |
| Short name | T3819 |
| Test name | |
| Test status | |
| Simulation time | 336893544 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:52 PM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=822101264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.822101264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.60061801 |
| Short name | T3827 |
| Test name | |
| Test status | |
| Simulation time | 111601297 ps |
| CPU time | 2.71 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:53 PM UTC 24 |
| Peak memory | 227780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=60061801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.60061801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.12561797 |
| Short name | T3826 |
| Test name | |
| Test status | |
| Simulation time | 410267649 ps |
| CPU time | 2.51 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:53 PM UTC 24 |
| Peak memory | 217596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=12561797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SE Q=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/covera ge/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.12561797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.1907427265 |
| Short name | T3849 |
| Test name | |
| Test status | |
| Simulation time | 152302981 ps |
| CPU time | 1.81 seconds |
| Started | Oct 09 09:08:51 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 227056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907427265 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.1907427265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.184382992 |
| Short name | T3815 |
| Test name | |
| Test status | |
| Simulation time | 66362648 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=184382992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.184382992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.1236753732 |
| Short name | T3812 |
| Test name | |
| Test status | |
| Simulation time | 62016850 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:51 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1236753732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.1236753732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.3469971586 |
| Short name | T3838 |
| Test name | |
| Test status | |
| Simulation time | 193848020 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:08:51 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469971586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.3469971586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.1651448841 |
| Short name | T3825 |
| Test name | |
| Test status | |
| Simulation time | 87819357 ps |
| CPU time | 2.12 seconds |
| Started | Oct 09 09:08:49 PM UTC 24 |
| Finished | Oct 09 09:08:52 PM UTC 24 |
| Peak memory | 234272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651448841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.1651448841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.705627488 |
| Short name | T3848 |
| Test name | |
| Test status | |
| Simulation time | 84038464 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:08:51 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 226996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=705627488 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.705627488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.3051431236 |
| Short name | T3837 |
| Test name | |
| Test status | |
| Simulation time | 66552558 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:08:51 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051431236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.3051431236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.1844464034 |
| Short name | T3830 |
| Test name | |
| Test status | |
| Simulation time | 56043470 ps |
| CPU time | 0.67 seconds |
| Started | Oct 09 09:08:51 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1844464034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.1844464034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.2419380880 |
| Short name | T3841 |
| Test name | |
| Test status | |
| Simulation time | 120027282 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:08:51 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419380880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.2419380880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.296743510 |
| Short name | T3836 |
| Test name | |
| Test status | |
| Simulation time | 163812148 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:08:51 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=296743510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.296743510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.3561369243 |
| Short name | T3865 |
| Test name | |
| Test status | |
| Simulation time | 537124801 ps |
| CPU time | 3.69 seconds |
| Started | Oct 09 09:08:51 PM UTC 24 |
| Finished | Oct 09 09:08:57 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561369243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.3561369243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.2008461969 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 340742013 ps |
| CPU time | 2.94 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:39 PM UTC 24 |
| Peak memory | 217536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008461969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.2008461969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.4186568758 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 384667900 ps |
| CPU time | 3.95 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:40 PM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186568758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.4186568758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.957914972 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 80135587 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=957914972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.957914972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.3703020088 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 82656908 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:38 PM UTC 24 |
| Peak memory | 227092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703020088 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.3703020088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.2822086447 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 76906069 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822086447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.2822086447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.1066898837 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 121129415 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 227064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066898837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.1066898837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.2756505375 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 426122716 ps |
| CPU time | 2.54 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:38 PM UTC 24 |
| Peak memory | 217840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756505375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.2756505375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.527150890 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 320665998 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:38 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=527150890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.527150890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.3469184837 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 150176678 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 216576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469184837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.3469184837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.1532715875 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 402042018 ps |
| CPU time | 2.3 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:38 PM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532715875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.1532715875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.1600520640 |
| Short name | T3834 |
| Test name | |
| Test status | |
| Simulation time | 59857689 ps |
| CPU time | 0.71 seconds |
| Started | Oct 09 09:08:51 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600520640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.1600520640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.2170224914 |
| Short name | T3835 |
| Test name | |
| Test status | |
| Simulation time | 49204987 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:08:51 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2170224914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.2170224914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.1991882876 |
| Short name | T3831 |
| Test name | |
| Test status | |
| Simulation time | 42163356 ps |
| CPU time | 0.64 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991882876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.1991882876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.199806780 |
| Short name | T3842 |
| Test name | |
| Test status | |
| Simulation time | 72639975 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=199806780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.199806780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.3770745430 |
| Short name | T3840 |
| Test name | |
| Test status | |
| Simulation time | 47697800 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770745430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.3770745430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.125781529 |
| Short name | T3845 |
| Test name | |
| Test status | |
| Simulation time | 110596309 ps |
| CPU time | 0.73 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=125781529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.125781529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.2797074415 |
| Short name | T3844 |
| Test name | |
| Test status | |
| Simulation time | 63317320 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797074415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.2797074415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.229185554 |
| Short name | T3843 |
| Test name | |
| Test status | |
| Simulation time | 40018542 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=229185554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.229185554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.709666500 |
| Short name | T3847 |
| Test name | |
| Test status | |
| Simulation time | 38998329 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=709666500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.709666500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.4109259046 |
| Short name | T3846 |
| Test name | |
| Test status | |
| Simulation time | 36715328 ps |
| CPU time | 0.67 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109259046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.4109259046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.1121223079 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 124949679 ps |
| CPU time | 2.78 seconds |
| Started | Oct 09 09:08:42 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121223079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.1121223079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.595421520 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 1017240552 ps |
| CPU time | 6.45 seconds |
| Started | Oct 09 09:08:41 PM UTC 24 |
| Finished | Oct 09 09:08:49 PM UTC 24 |
| Peak memory | 217596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=595421520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.595421520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.1124190605 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 65799455 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:08:41 PM UTC 24 |
| Finished | Oct 09 09:08:43 PM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124190605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.1124190605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.2843668721 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 103666489 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:08:42 PM UTC 24 |
| Finished | Oct 09 09:08:45 PM UTC 24 |
| Peak memory | 226992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843668721 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.2843668721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.3775996201 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 77838110 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:08:41 PM UTC 24 |
| Finished | Oct 09 09:08:43 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3775996201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.3775996201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.4239692646 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 99204486 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:37 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239692646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.4239692646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.199090279 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 81740416 ps |
| CPU time | 1.28 seconds |
| Started | Oct 09 09:08:41 PM UTC 24 |
| Finished | Oct 09 09:08:43 PM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=199090279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.199090279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.122796833 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 164080085 ps |
| CPU time | 3.67 seconds |
| Started | Oct 09 09:08:41 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=122796833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.122796833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.4158385319 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 387346224 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:08:42 PM UTC 24 |
| Finished | Oct 09 09:08:45 PM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158385319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.4158385319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.1627672271 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 254227875 ps |
| CPU time | 2.47 seconds |
| Started | Oct 09 09:08:34 PM UTC 24 |
| Finished | Oct 09 09:08:39 PM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1627672271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.1627672271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.115624631 |
| Short name | T3850 |
| Test name | |
| Test status | |
| Simulation time | 45806861 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=115624631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.115624631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.3278775205 |
| Short name | T3832 |
| Test name | |
| Test status | |
| Simulation time | 41138386 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278775205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.3278775205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3667068568 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 51333033 ps |
| CPU time | 0.71 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:54 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3667068568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.3667068568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.2524383604 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 53881436 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524383604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.2524383604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.945220897 |
| Short name | T3852 |
| Test name | |
| Test status | |
| Simulation time | 43849721 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=945220897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.945220897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3871731365 |
| Short name | T3833 |
| Test name | |
| Test status | |
| Simulation time | 41795203 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871731365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.3871731365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.2694297655 |
| Short name | T3854 |
| Test name | |
| Test status | |
| Simulation time | 70096461 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2694297655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.2694297655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.75388628 |
| Short name | T3851 |
| Test name | |
| Test status | |
| Simulation time | 44474296 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75388628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.75388628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.526854318 |
| Short name | T3855 |
| Test name | |
| Test status | |
| Simulation time | 61420143 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=526854318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.526854318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.1941838632 |
| Short name | T3856 |
| Test name | |
| Test status | |
| Simulation time | 52843570 ps |
| CPU time | 0.73 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941838632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.1941838632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.2575991506 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 413879685 ps |
| CPU time | 3.33 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:48 PM UTC 24 |
| Peak memory | 216492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575991506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.2575991506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.2816645103 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 816030227 ps |
| CPU time | 4.31 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:49 PM UTC 24 |
| Peak memory | 216448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816645103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.2816645103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.1884717467 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 80370488 ps |
| CPU time | 0.75 seconds |
| Started | Oct 09 09:08:42 PM UTC 24 |
| Finished | Oct 09 09:08:45 PM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884717467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.1884717467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.1268306252 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 98104836 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:45 PM UTC 24 |
| Peak memory | 226992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268306252 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.1268306252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.1510233179 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 94661312 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:45 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1510233179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.1510233179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.1358221184 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 31340320 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:08:42 PM UTC 24 |
| Finished | Oct 09 09:08:44 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358221184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.1358221184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3352746546 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 139581122 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:08:42 PM UTC 24 |
| Finished | Oct 09 09:08:45 PM UTC 24 |
| Peak memory | 227024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3352746546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.3352746546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.24946561 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 199557308 ps |
| CPU time | 3.59 seconds |
| Started | Oct 09 09:08:42 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=24946561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/ cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.24946561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.2742054640 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 184004084 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:45 PM UTC 24 |
| Peak memory | 217132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742054640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.2742054640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.2844313427 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 1409025522 ps |
| CPU time | 4.65 seconds |
| Started | Oct 09 09:08:42 PM UTC 24 |
| Finished | Oct 09 09:08:48 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844313427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.2844313427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.329174397 |
| Short name | T3857 |
| Test name | |
| Test status | |
| Simulation time | 62862143 ps |
| CPU time | 0.73 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=329174397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.329174397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3740106610 |
| Short name | T3860 |
| Test name | |
| Test status | |
| Simulation time | 50987585 ps |
| CPU time | 0.71 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740106610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.3740106610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.1377499064 |
| Short name | T3858 |
| Test name | |
| Test status | |
| Simulation time | 49512069 ps |
| CPU time | 0.72 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377499064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.1377499064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.594538394 |
| Short name | T3859 |
| Test name | |
| Test status | |
| Simulation time | 39820641 ps |
| CPU time | 0.72 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=594538394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.594538394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.469263107 |
| Short name | T3853 |
| Test name | |
| Test status | |
| Simulation time | 31617718 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=469263107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.469263107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.475608679 |
| Short name | T3862 |
| Test name | |
| Test status | |
| Simulation time | 38699707 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 216960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=475608679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.475608679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.4233806367 |
| Short name | T3861 |
| Test name | |
| Test status | |
| Simulation time | 51905032 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:08:52 PM UTC 24 |
| Finished | Oct 09 09:08:55 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233806367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.4233806367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.1729583228 |
| Short name | T3864 |
| Test name | |
| Test status | |
| Simulation time | 59061568 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:08:53 PM UTC 24 |
| Finished | Oct 09 09:08:56 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729583228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.1729583228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.1001218065 |
| Short name | T3863 |
| Test name | |
| Test status | |
| Simulation time | 96243086 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:08:53 PM UTC 24 |
| Finished | Oct 09 09:08:56 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1001218065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.1001218065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.1376367575 |
| Short name | T3866 |
| Test name | |
| Test status | |
| Simulation time | 37272806 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:57 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376367575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.1376367575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1179169399 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 104089925 ps |
| CPU time | 1.21 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 226944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179169399 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.1179169399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.1353953115 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 64996447 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:45 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353953115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.1353953115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.2080709838 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 49937400 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:45 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080709838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.2080709838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.66819060 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 132955741 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=66819060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.66819060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.3849232259 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 235772641 ps |
| CPU time | 2.69 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 234708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849232259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.3849232259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.785436578 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 1059475305 ps |
| CPU time | 4.42 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:49 PM UTC 24 |
| Peak memory | 217728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=785436578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.785436578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.838827115 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 144130251 ps |
| CPU time | 1.82 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 226940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=838827115 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.838827115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.2766947354 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 69814151 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766947354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.2766947354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3482905070 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 95124505 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:45 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482905070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.3482905070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.1364235725 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 171251424 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1364235725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.1364235725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.1580922686 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 236434695 ps |
| CPU time | 2.42 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 217508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1580922686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.1580922686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1512570595 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 1310645470 ps |
| CPU time | 4.83 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:50 PM UTC 24 |
| Peak memory | 217468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1512570595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.1512570595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.1713374566 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 137425508 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713374566 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.1713374566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.2478509465 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 97594196 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2478509465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.2478509465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.2465332663 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 45285792 ps |
| CPU time | 0.71 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465332663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.2465332663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2204408214 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 90772040 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204408214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.2204408214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.3876569701 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 138659159 ps |
| CPU time | 2.82 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:48 PM UTC 24 |
| Peak memory | 227840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876569701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.3876569701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.443553898 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 191862023 ps |
| CPU time | 2.1 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 227904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=443553898 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.443553898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3472053001 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 44185341 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472053001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.3472053001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.3861600225 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 35931618 ps |
| CPU time | 0.67 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861600225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.3861600225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.3179958832 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 316927518 ps |
| CPU time | 1.88 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3179958832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.3179958832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.971164306 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 143586874 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=971164306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.971164306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.3426346557 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 481639818 ps |
| CPU time | 3.69 seconds |
| Started | Oct 09 09:08:43 PM UTC 24 |
| Finished | Oct 09 09:08:49 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3426346557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.3426346557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2865782540 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 171798748 ps |
| CPU time | 1.9 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:47 PM UTC 24 |
| Peak memory | 227008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865782540 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.2865782540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.2290671901 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 80074403 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290671901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.2290671901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.2367134035 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 63645681 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367134035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.2367134035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.741847566 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 116498675 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:46 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=741847566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.741847566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.1992756607 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 271759931 ps |
| CPU time | 2.73 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:48 PM UTC 24 |
| Peak memory | 234580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992756607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.1992756607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.1334958902 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 634596496 ps |
| CPU time | 3.77 seconds |
| Started | Oct 09 09:08:44 PM UTC 24 |
| Finished | Oct 09 09:08:49 PM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334958902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.1334958902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.3561935396 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 5834442442 ps |
| CPU time | 8.21 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:09:05 PM UTC 24 |
| Peak memory | 228184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561935396 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.3561935396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.1872677501 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 14455657245 ps |
| CPU time | 17.12 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:09:14 PM UTC 24 |
| Peak memory | 228308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872677501 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.1872677501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.3884804692 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 158703552 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:58 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884804692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.3884804692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.4128834919 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 169155178 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:58 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128834919 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.4128834919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_enable.2444153343 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 86011247 ps |
| CPU time | 0.72 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:58 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2444153343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.2444153343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.2470260156 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 868984734 ps |
| CPU time | 2.24 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:59 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470260156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.2470260156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.538286843 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 488323918 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:08:58 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=538286843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.538286843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.3275516356 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 301896364 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:08:56 PM UTC 24 |
| Finished | Oct 09 09:09:03 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275516356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.3275516356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.1748775252 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 100194888122 ps |
| CPU time | 177.1 seconds |
| Started | Oct 09 09:08:56 PM UTC 24 |
| Finished | Oct 09 09:12:00 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748775252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.1748775252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.636959930 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 91220622863 ps |
| CPU time | 149.3 seconds |
| Started | Oct 09 09:08:56 PM UTC 24 |
| Finished | Oct 09 09:11:32 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=636959930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 0.usbdev_freq_hiclk_max.636959930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.28324276 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 105100286695 ps |
| CPU time | 193.96 seconds |
| Started | Oct 09 09:08:56 PM UTC 24 |
| Finished | Oct 09 09:12:17 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=28324276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.28324276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.3325302265 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 83947074178 ps |
| CPU time | 139.22 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:11:22 PM UTC 24 |
| Peak memory | 218360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3325302265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_loclk_max.3325302265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.2683963941 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 102141325366 ps |
| CPU time | 176.13 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:11:59 PM UTC 24 |
| Peak memory | 218412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2683963941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.2683963941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.717261457 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 4011759690 ps |
| CPU time | 32.83 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:09:38 PM UTC 24 |
| Peak memory | 228708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=717261457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.717261457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.1397274522 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 238105291 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:09:06 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1397274522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.1397274522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.104810047 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 224019830 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:09:06 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=104810047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.104810047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.715336867 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 2568309813 ps |
| CPU time | 64.13 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:10:30 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=715336867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.715336867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.4105057456 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 1678483584 ps |
| CPU time | 14.53 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:09:40 PM UTC 24 |
| Peak memory | 228212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105057456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.4105057456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.3134501798 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 185648640 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:09:27 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134501798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.3134501798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.658649875 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 204521144 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:09:27 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=658649875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.658649875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.3378562460 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 604777061 ps |
| CPU time | 1.75 seconds |
| Started | Oct 09 09:08:57 PM UTC 24 |
| Finished | Oct 09 09:09:27 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3378562460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.3378562460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.3037511197 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 18090228502 ps |
| CPU time | 43.9 seconds |
| Started | Oct 09 09:08:59 PM UTC 24 |
| Finished | Oct 09 09:09:45 PM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037511197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_pkt_buffer.3037511197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.1472808584 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 198777023 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:08:59 PM UTC 24 |
| Finished | Oct 09 09:09:01 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1472808584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_sent.1472808584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.2540015937 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 4425432059 ps |
| CPU time | 32.26 seconds |
| Started | Oct 09 09:08:59 PM UTC 24 |
| Finished | Oct 09 09:09:33 PM UTC 24 |
| Peak memory | 234748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2540015937 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.2540015937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.610012294 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 6416416994 ps |
| CPU time | 69.54 seconds |
| Started | Oct 09 09:08:59 PM UTC 24 |
| Finished | Oct 09 09:10:11 PM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=610012294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.610012294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.3675444246 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 242908890 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:08:59 PM UTC 24 |
| Finished | Oct 09 09:09:01 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675444246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_random_length_in_transaction.3675444246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.3871318773 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 167678887 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:08:59 PM UTC 24 |
| Finished | Oct 09 09:09:01 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871318773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.3871318773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.2999808173 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 20171021605 ps |
| CPU time | 24.26 seconds |
| Started | Oct 09 09:09:00 PM UTC 24 |
| Finished | Oct 09 09:09:29 PM UTC 24 |
| Peak memory | 217820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999808173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_resume_link_active.2999808173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.1198506324 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 2256516055 ps |
| CPU time | 54.82 seconds |
| Started | Oct 09 09:09:03 PM UTC 24 |
| Finished | Oct 09 09:10:19 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198506324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.1198506324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.2258914231 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 173980678 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:09:06 PM UTC 24 |
| Finished | Oct 09 09:09:31 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258914231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.2258914231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.1351635515 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 1271546945 ps |
| CPU time | 2.86 seconds |
| Started | Oct 09 09:09:07 PM UTC 24 |
| Finished | Oct 09 09:09:28 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1351635515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.1351635515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.2651617999 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 2687820792 ps |
| CPU time | 18.43 seconds |
| Started | Oct 09 09:09:06 PM UTC 24 |
| Finished | Oct 09 09:10:09 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2651617999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.2651617999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.3196151446 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 5330812967 ps |
| CPU time | 127.25 seconds |
| Started | Oct 09 09:09:07 PM UTC 24 |
| Finished | Oct 09 09:11:34 PM UTC 24 |
| Peak memory | 234988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3196151446 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.3196151446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.942896748 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 288069241 ps |
| CPU time | 3.91 seconds |
| Started | Oct 09 09:08:55 PM UTC 24 |
| Finished | Oct 09 09:09:01 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=942896748 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.942896748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.2010055899 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 671329849 ps |
| CPU time | 1.78 seconds |
| Started | Oct 09 09:09:11 PM UTC 24 |
| Finished | Oct 09 09:09:27 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2010055899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.2010055899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.3138009384 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 50713896 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:10:02 PM UTC 24 |
| Finished | Oct 09 09:10:04 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138009384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.3138009384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.3226440512 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 3869756204 ps |
| CPU time | 5.74 seconds |
| Started | Oct 09 09:09:23 PM UTC 24 |
| Finished | Oct 09 09:09:31 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226440512 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.3226440512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.2826732221 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 15168855472 ps |
| CPU time | 22.08 seconds |
| Started | Oct 09 09:09:25 PM UTC 24 |
| Finished | Oct 09 09:10:26 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826732221 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.2826732221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.602377551 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 31554032252 ps |
| CPU time | 36.92 seconds |
| Started | Oct 09 09:09:26 PM UTC 24 |
| Finished | Oct 09 09:10:08 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=602377551 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.602377551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.3971528043 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 156966023 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:09:26 PM UTC 24 |
| Finished | Oct 09 09:09:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971528043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_av_buffer.3971528043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.4009708515 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 164479450 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:09:27 PM UTC 24 |
| Finished | Oct 09 09:09:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4009708515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.4009708515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.782215175 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 161149472 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:09:28 PM UTC 24 |
| Finished | Oct 09 09:09:32 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=782215175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_bitstuff_err.782215175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.3523590828 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 295761934 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:09:28 PM UTC 24 |
| Finished | Oct 09 09:09:32 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523590828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.3523590828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.2504351563 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 923206165 ps |
| CPU time | 2.32 seconds |
| Started | Oct 09 09:09:29 PM UTC 24 |
| Finished | Oct 09 09:09:33 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504351563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.2504351563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.1101239566 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 903378287 ps |
| CPU time | 4.68 seconds |
| Started | Oct 09 09:09:31 PM UTC 24 |
| Finished | Oct 09 09:09:37 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101239566 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.1101239566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.240522089 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 1054183766 ps |
| CPU time | 2.2 seconds |
| Started | Oct 09 09:09:32 PM UTC 24 |
| Finished | Oct 09 09:09:42 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=240522089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_disable_endpoint.240522089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.3944744632 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 140395859 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:09:32 PM UTC 24 |
| Finished | Oct 09 09:09:41 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3944744632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.3944744632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_enable.2497680965 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 83037502 ps |
| CPU time | 0.72 seconds |
| Started | Oct 09 09:09:32 PM UTC 24 |
| Finished | Oct 09 09:09:41 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2497680965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.2497680965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.913040458 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 460013185 ps |
| CPU time | 2.49 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:09:38 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=913040458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_fifo_rst.913040458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.908831490 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 112197587974 ps |
| CPU time | 197.99 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:12:55 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=908831490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.908831490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.2119316994 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 89217547355 ps |
| CPU time | 147.13 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:12:04 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2119316994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.2119316994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.3255433023 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 88148640231 ps |
| CPU time | 140.83 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:11:58 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255433023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.3255433023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.2250634087 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 111164057937 ps |
| CPU time | 231.21 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:13:29 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250634087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.2250634087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.737221077 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 165803289 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:09:36 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=737221077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.737221077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.1319357401 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 158289661 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:09:36 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1319357401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_stall.1319357401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.2331879583 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 265525569 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:09:37 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331879583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_trans.2331879583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.3382000631 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 4248155421 ps |
| CPU time | 37.38 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:10:13 PM UTC 24 |
| Peak memory | 234992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3382000631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.3382000631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.3358559114 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 6143813532 ps |
| CPU time | 68.7 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:10:45 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3358559114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.3358559114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.994073292 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 160190018 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:09:37 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=994073292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_link_in_err.994073292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.1267953200 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 32275694559 ps |
| CPU time | 48.63 seconds |
| Started | Oct 09 09:09:33 PM UTC 24 |
| Finished | Oct 09 09:10:25 PM UTC 24 |
| Peak memory | 217872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267953200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.1267953200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.3566286794 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 3516193427 ps |
| CPU time | 26.05 seconds |
| Started | Oct 09 09:09:34 PM UTC 24 |
| Finished | Oct 09 09:10:02 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566286794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.3566286794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.1054522648 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 3952605614 ps |
| CPU time | 100.96 seconds |
| Started | Oct 09 09:09:34 PM UTC 24 |
| Finished | Oct 09 09:11:18 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054522648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1054522648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.3254295287 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 182857194 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:09:37 PM UTC 24 |
| Finished | Oct 09 09:09:52 PM UTC 24 |
| Peak memory | 215432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254295287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.3254295287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.1684894861 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 218396941 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:09:37 PM UTC 24 |
| Finished | Oct 09 09:09:56 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684894861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.1684894861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.1836687460 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 181500244 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:09:37 PM UTC 24 |
| Finished | Oct 09 09:09:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836687460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_out_trans_nak.1836687460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.65782339 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 179732533 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:09:38 PM UTC 24 |
| Finished | Oct 09 09:09:41 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=65782339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pending_in_trans.65782339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.2534178136 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 192155567 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:09:38 PM UTC 24 |
| Finished | Oct 09 09:09:41 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534178136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.2534178136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.480745010 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 197996516 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:09:38 PM UTC 24 |
| Finished | Oct 09 09:09:41 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=480745010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.480745010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.318224965 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 152837174 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:09:38 PM UTC 24 |
| Finished | Oct 09 09:09:41 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=318224965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.318224965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.2642287351 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 42671710 ps |
| CPU time | 0.67 seconds |
| Started | Oct 09 09:09:41 PM UTC 24 |
| Finished | Oct 09 09:10:00 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642287351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.2642287351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.3080625118 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 11419425707 ps |
| CPU time | 32.65 seconds |
| Started | Oct 09 09:09:42 PM UTC 24 |
| Finished | Oct 09 09:10:29 PM UTC 24 |
| Peak memory | 228444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080625118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_buffer.3080625118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.922125842 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 154008202 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:09:42 PM UTC 24 |
| Finished | Oct 09 09:09:57 PM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=922125842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_pkt_received.922125842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.889901325 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 247698258 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:09:42 PM UTC 24 |
| Finished | Oct 09 09:09:57 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889901325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_pkt_sent.889901325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.2146647881 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 6348479938 ps |
| CPU time | 21.2 seconds |
| Started | Oct 09 09:09:43 PM UTC 24 |
| Finished | Oct 09 09:10:12 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2146647881 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.2146647881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.1919030964 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 9966381867 ps |
| CPU time | 158.09 seconds |
| Started | Oct 09 09:09:43 PM UTC 24 |
| Finished | Oct 09 09:12:25 PM UTC 24 |
| Peak memory | 230504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1919030964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.1919030964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.1476339822 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 192686345 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:09:43 PM UTC 24 |
| Finished | Oct 09 09:09:52 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1476339822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_random_length_in_transaction.1476339822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.1347056222 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 208169473 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:09:43 PM UTC 24 |
| Finished | Oct 09 09:09:52 PM UTC 24 |
| Peak memory | 215300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347056222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.1347056222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.1092656325 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 20172136313 ps |
| CPU time | 28.18 seconds |
| Started | Oct 09 09:09:43 PM UTC 24 |
| Finished | Oct 09 09:10:24 PM UTC 24 |
| Peak memory | 217820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092656325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.1092656325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.591252131 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 143804793 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:09:43 PM UTC 24 |
| Finished | Oct 09 09:09:46 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=591252131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_rx_crc_err.591252131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.3807086367 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 387126766 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:09:43 PM UTC 24 |
| Finished | Oct 09 09:09:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3807086367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.3807086367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.2744352517 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 183276854 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:09:45 PM UTC 24 |
| Finished | Oct 09 09:10:05 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744352517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.2744352517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.294592448 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 416700396 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:09:46 PM UTC 24 |
| Finished | Oct 09 09:09:52 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=294592448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_setup_priority.294592448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.1282692984 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 258509767 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:09:47 PM UTC 24 |
| Finished | Oct 09 09:09:53 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282692984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.1282692984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.4144435295 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 177690681 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:09:52 PM UTC 24 |
| Finished | Oct 09 09:10:01 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144435295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_setup_stage.4144435295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.1065335895 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 204823361 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:09:52 PM UTC 24 |
| Finished | Oct 09 09:10:02 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065335895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.1065335895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.1196805822 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 3291858916 ps |
| CPU time | 91.04 seconds |
| Started | Oct 09 09:09:53 PM UTC 24 |
| Finished | Oct 09 09:11:33 PM UTC 24 |
| Peak memory | 235076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196805822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.1196805822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.1870830578 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 196236847 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:09:57 PM UTC 24 |
| Finished | Oct 09 09:10:02 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870830578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.1870830578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.2137693614 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 947095124 ps |
| CPU time | 2.44 seconds |
| Started | Oct 09 09:09:58 PM UTC 24 |
| Finished | Oct 09 09:10:05 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137693614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.2137693614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.3488696281 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 1728902951 ps |
| CPU time | 11.61 seconds |
| Started | Oct 09 09:09:58 PM UTC 24 |
| Finished | Oct 09 09:10:14 PM UTC 24 |
| Peak memory | 234672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488696281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_streaming_out.3488696281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.2108368325 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 1539944948 ps |
| CPU time | 8.62 seconds |
| Started | Oct 09 09:09:32 PM UTC 24 |
| Finished | Oct 09 09:09:42 PM UTC 24 |
| Peak memory | 217860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108368325 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.2108368325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.551167753 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 46902134 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:14:36 PM UTC 24 |
| Finished | Oct 09 09:14:38 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=551167753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.551167753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.1045498818 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 4931319485 ps |
| CPU time | 10.45 seconds |
| Started | Oct 09 09:14:13 PM UTC 24 |
| Finished | Oct 09 09:14:25 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1045498818 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.1045498818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.3421668475 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 18941425250 ps |
| CPU time | 27.44 seconds |
| Started | Oct 09 09:14:15 PM UTC 24 |
| Finished | Oct 09 09:14:44 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421668475 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.3421668475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.1627371563 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 24432484949 ps |
| CPU time | 37.39 seconds |
| Started | Oct 09 09:14:15 PM UTC 24 |
| Finished | Oct 09 09:14:54 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1627371563 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.1627371563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.2210853942 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 169106411 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:14:15 PM UTC 24 |
| Finished | Oct 09 09:14:18 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2210853942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.2210853942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.2504780982 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 147955156 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:14:15 PM UTC 24 |
| Finished | Oct 09 09:14:18 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504780982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.2504780982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.3205282770 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 196972008 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:14:15 PM UTC 24 |
| Finished | Oct 09 09:14:18 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205282770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_data_toggle_clear.3205282770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.3145958498 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 882132182 ps |
| CPU time | 3.15 seconds |
| Started | Oct 09 09:14:16 PM UTC 24 |
| Finished | Oct 09 09:14:20 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3145958498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.3145958498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.767264992 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 22141201679 ps |
| CPU time | 43.78 seconds |
| Started | Oct 09 09:14:16 PM UTC 24 |
| Finished | Oct 09 09:15:01 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767264992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_device_address.767264992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.1004188714 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 829674790 ps |
| CPU time | 5.8 seconds |
| Started | Oct 09 09:14:18 PM UTC 24 |
| Finished | Oct 09 09:14:25 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004188714 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.1004188714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.61051928 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 676390846 ps |
| CPU time | 3.22 seconds |
| Started | Oct 09 09:14:18 PM UTC 24 |
| Finished | Oct 09 09:14:23 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=61051928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_disable_endpoint.61051928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.4227032763 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 193376247 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:14:18 PM UTC 24 |
| Finished | Oct 09 09:14:21 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4227032763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.4227032763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_enable.1799796293 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 62811963 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:14:18 PM UTC 24 |
| Finished | Oct 09 09:14:21 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799796293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.1799796293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.1256692720 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 899698489 ps |
| CPU time | 3.94 seconds |
| Started | Oct 09 09:14:20 PM UTC 24 |
| Finished | Oct 09 09:14:26 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1256692720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.1256692720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.1106741279 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 210948972 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:14:20 PM UTC 24 |
| Finished | Oct 09 09:14:23 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106741279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.1106741279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.3890824847 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 243560029 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:14:20 PM UTC 24 |
| Finished | Oct 09 09:14:23 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890824847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_fifo_levels.3890824847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.705556770 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 321984144 ps |
| CPU time | 3.61 seconds |
| Started | Oct 09 09:14:20 PM UTC 24 |
| Finished | Oct 09 09:14:25 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=705556770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_fifo_rst.705556770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.2787956701 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 256640293 ps |
| CPU time | 2.07 seconds |
| Started | Oct 09 09:14:23 PM UTC 24 |
| Finished | Oct 09 09:14:26 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2787956701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.2787956701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.3106999534 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 139818701 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:14:23 PM UTC 24 |
| Finished | Oct 09 09:14:25 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106999534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.3106999534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.292836389 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 189033130 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:14:23 PM UTC 24 |
| Finished | Oct 09 09:14:25 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=292836389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_in_trans.292836389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.2421970131 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 3509770447 ps |
| CPU time | 32.48 seconds |
| Started | Oct 09 09:14:20 PM UTC 24 |
| Finished | Oct 09 09:14:55 PM UTC 24 |
| Peak memory | 234920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421970131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.2421970131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.2883587894 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 172463721 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:14:23 PM UTC 24 |
| Finished | Oct 09 09:14:25 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883587894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.2883587894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.2627309467 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 14557141094 ps |
| CPU time | 22.93 seconds |
| Started | Oct 09 09:14:23 PM UTC 24 |
| Finished | Oct 09 09:14:47 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2627309467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.2627309467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.1687086574 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 3413093132 ps |
| CPU time | 7.64 seconds |
| Started | Oct 09 09:14:25 PM UTC 24 |
| Finished | Oct 09 09:14:34 PM UTC 24 |
| Peak memory | 227428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687086574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_link_suspend.1687086574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.3361777876 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 5337101141 ps |
| CPU time | 51.29 seconds |
| Started | Oct 09 09:14:25 PM UTC 24 |
| Finished | Oct 09 09:15:18 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361777876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.3361777876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.1625351770 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 2222274075 ps |
| CPU time | 22.84 seconds |
| Started | Oct 09 09:14:25 PM UTC 24 |
| Finished | Oct 09 09:14:50 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625351770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.1625351770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.787067622 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 284433032 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:14:25 PM UTC 24 |
| Finished | Oct 09 09:14:28 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=787067622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.787067622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.2434199749 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 203591882 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:14:25 PM UTC 24 |
| Finished | Oct 09 09:14:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434199749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.2434199749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.2152855524 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 2943476537 ps |
| CPU time | 22.49 seconds |
| Started | Oct 09 09:14:27 PM UTC 24 |
| Finished | Oct 09 09:14:51 PM UTC 24 |
| Peak memory | 230308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152855524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.2152855524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.1399070224 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 2405721244 ps |
| CPU time | 24.53 seconds |
| Started | Oct 09 09:14:27 PM UTC 24 |
| Finished | Oct 09 09:14:53 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399070224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.1399070224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.2281767403 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 2819285763 ps |
| CPU time | 73.16 seconds |
| Started | Oct 09 09:14:27 PM UTC 24 |
| Finished | Oct 09 09:15:43 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2281767403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.2281767403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.3686918746 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 155163935 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:14:27 PM UTC 24 |
| Finished | Oct 09 09:14:30 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3686918746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.3686918746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.2922933328 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 139277449 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:14:27 PM UTC 24 |
| Finished | Oct 09 09:14:30 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2922933328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.2922933328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.1725458610 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 153709715 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:14:28 PM UTC 24 |
| Finished | Oct 09 09:14:30 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1725458610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.1725458610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.2765791960 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 190284745 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:14:28 PM UTC 24 |
| Finished | Oct 09 09:14:30 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765791960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_out_stall.2765791960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.1385359784 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 176321505 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:14:29 PM UTC 24 |
| Finished | Oct 09 09:14:32 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385359784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_out_trans_nak.1385359784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.774095902 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 165207956 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:14:29 PM UTC 24 |
| Finished | Oct 09 09:14:32 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=774095902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pending_in_trans.774095902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.2485094696 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 221303178 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:14:29 PM UTC 24 |
| Finished | Oct 09 09:14:32 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485094696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.2485094696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.505637225 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 206301904 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:14:30 PM UTC 24 |
| Finished | Oct 09 09:14:32 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=505637225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.505637225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.383677896 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 41147605 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:14:31 PM UTC 24 |
| Finished | Oct 09 09:14:33 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383677896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_phy_pins_sense.383677896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.333654472 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 12748526881 ps |
| CPU time | 40.06 seconds |
| Started | Oct 09 09:14:31 PM UTC 24 |
| Finished | Oct 09 09:15:13 PM UTC 24 |
| Peak memory | 228632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=333654472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_pkt_buffer.333654472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.1978535878 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 199338738 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:14:31 PM UTC 24 |
| Finished | Oct 09 09:14:33 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1978535878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_pkt_received.1978535878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.1777719665 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 226422428 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:14:31 PM UTC 24 |
| Finished | Oct 09 09:14:34 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1777719665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_pkt_sent.1777719665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.1477667016 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 266080129 ps |
| CPU time | 1.85 seconds |
| Started | Oct 09 09:14:31 PM UTC 24 |
| Finished | Oct 09 09:14:34 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477667016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.1477667016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.1114677996 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 182835801 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:14:31 PM UTC 24 |
| Finished | Oct 09 09:14:34 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114677996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.1114677996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.167807344 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 20174341459 ps |
| CPU time | 35.15 seconds |
| Started | Oct 09 09:14:34 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=167807344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_resume_link_active.167807344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.1510449021 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 216535980 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:14:34 PM UTC 24 |
| Finished | Oct 09 09:14:36 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1510449021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_rx_crc_err.1510449021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.709115899 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 342689552 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:14:34 PM UTC 24 |
| Finished | Oct 09 09:14:36 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709115899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_rx_full.709115899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.1741503057 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 152926897 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:14:34 PM UTC 24 |
| Finished | Oct 09 09:14:36 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741503057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_setup_stage.1741503057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.484921162 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 143209965 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:14:34 PM UTC 24 |
| Finished | Oct 09 09:14:36 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=484921162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 10.usbdev_setup_trans_ignored.484921162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.1939087080 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 279030744 ps |
| CPU time | 1.95 seconds |
| Started | Oct 09 09:14:34 PM UTC 24 |
| Finished | Oct 09 09:14:37 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939087080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.1939087080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.1781073334 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 1950401484 ps |
| CPU time | 48.15 seconds |
| Started | Oct 09 09:14:34 PM UTC 24 |
| Finished | Oct 09 09:15:24 PM UTC 24 |
| Peak memory | 234720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1781073334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.1781073334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.3174057365 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 168220933 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:14:34 PM UTC 24 |
| Finished | Oct 09 09:14:37 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174057365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.3174057365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.2748494259 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 152883655 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:14:34 PM UTC 24 |
| Finished | Oct 09 09:14:37 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2748494259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_stall_trans.2748494259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.3970452443 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 456256801 ps |
| CPU time | 2.61 seconds |
| Started | Oct 09 09:14:36 PM UTC 24 |
| Finished | Oct 09 09:14:40 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970452443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.3970452443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.2694542309 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 2860061868 ps |
| CPU time | 75.49 seconds |
| Started | Oct 09 09:14:36 PM UTC 24 |
| Finished | Oct 09 09:15:54 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2694542309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.2694542309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.1977938200 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 7706892502 ps |
| CPU time | 52.7 seconds |
| Started | Oct 09 09:14:18 PM UTC 24 |
| Finished | Oct 09 09:15:13 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977938200 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.1977938200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.3335424074 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 530424658 ps |
| CPU time | 1.78 seconds |
| Started | Oct 09 09:14:36 PM UTC 24 |
| Finished | Oct 09 09:14:39 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3335424074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.3335424074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.1399924676 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 525788349 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1399924676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.1399924676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.2896943377 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 505315423 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2896943377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.2896943377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.1171235875 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 384844324 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171235875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.1171235875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.3003389273 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 621636509 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3003389273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_ tx_rx_disruption.3003389273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.878840367 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 243559732 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=878840367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.878840367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.102003617 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 545452699 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=102003617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_t x_rx_disruption.102003617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.4121875407 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 747684949 ps |
| CPU time | 1.81 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121875407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.4121875407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.3987931698 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 590093834 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3987931698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.3987931698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.2473254388 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 529535085 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2473254388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_ tx_rx_disruption.2473254388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.3175059977 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 196561772 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3175059977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.3175059977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.3176047926 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 153614099 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3176047926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 106.usbdev_fifo_levels.3176047926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.1149056961 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 230602791 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149056961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 107.usbdev_fifo_levels.1149056961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3578575513 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 463502064 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3578575513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.3578575513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.2779900543 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 232983112 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779900543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.2779900543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.3322029831 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 289477840 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3322029831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 108.usbdev_fifo_levels.3322029831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.2739651239 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 605531219 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2739651239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_ tx_rx_disruption.2739651239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.845321602 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 315379778 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=845321602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.845321602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.2935899864 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 149135691 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935899864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 109.usbdev_fifo_levels.2935899864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.3390941335 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 575394879 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3390941335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.3390941335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.3781782266 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 61555072 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:14:59 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781782266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.3781782266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.1463931084 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 19983533198 ps |
| CPU time | 32.75 seconds |
| Started | Oct 09 09:14:36 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463931084 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.1463931084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.724154208 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 30849533547 ps |
| CPU time | 45.57 seconds |
| Started | Oct 09 09:14:38 PM UTC 24 |
| Finished | Oct 09 09:15:26 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=724154208 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.724154208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.3001746798 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 188291879 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:14:38 PM UTC 24 |
| Finished | Oct 09 09:14:41 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001746798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.3001746798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.598011156 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 145373547 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:14:38 PM UTC 24 |
| Finished | Oct 09 09:14:41 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598011156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_bitstuff_err.598011156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.1226385590 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 468965489 ps |
| CPU time | 1.89 seconds |
| Started | Oct 09 09:14:39 PM UTC 24 |
| Finished | Oct 09 09:14:42 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226385590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_data_toggle_clear.1226385590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.1569270881 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 459996925 ps |
| CPU time | 2.7 seconds |
| Started | Oct 09 09:14:39 PM UTC 24 |
| Finished | Oct 09 09:14:42 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569270881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.1569270881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.1013865907 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 861751726 ps |
| CPU time | 5.55 seconds |
| Started | Oct 09 09:14:39 PM UTC 24 |
| Finished | Oct 09 09:14:45 PM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013865907 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.1013865907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.3919582535 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 602716313 ps |
| CPU time | 2.08 seconds |
| Started | Oct 09 09:14:41 PM UTC 24 |
| Finished | Oct 09 09:14:44 PM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3919582535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.3919582535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.2358717333 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 148138127 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:14:41 PM UTC 24 |
| Finished | Oct 09 09:14:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2358717333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.2358717333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_enable.3498245641 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 87411501 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:14:41 PM UTC 24 |
| Finished | Oct 09 09:14:43 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3498245641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.3498245641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.3171305090 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 915255846 ps |
| CPU time | 3.42 seconds |
| Started | Oct 09 09:14:41 PM UTC 24 |
| Finished | Oct 09 09:14:45 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171305090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.3171305090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.119847426 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 263845914 ps |
| CPU time | 1.8 seconds |
| Started | Oct 09 09:14:43 PM UTC 24 |
| Finished | Oct 09 09:14:45 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=119847426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.119847426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.535485074 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 204056889 ps |
| CPU time | 2.98 seconds |
| Started | Oct 09 09:14:43 PM UTC 24 |
| Finished | Oct 09 09:14:47 PM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=535485074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_fifo_rst.535485074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.4115609307 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 215280037 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:14:43 PM UTC 24 |
| Finished | Oct 09 09:14:45 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4115609307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.4115609307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.472344566 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 140528948 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:14:43 PM UTC 24 |
| Finished | Oct 09 09:14:45 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=472344566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_in_stall.472344566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.2547916444 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 189857887 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:14:43 PM UTC 24 |
| Finished | Oct 09 09:14:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547916444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.2547916444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.954027007 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 3863018736 ps |
| CPU time | 26.85 seconds |
| Started | Oct 09 09:14:43 PM UTC 24 |
| Finished | Oct 09 09:15:11 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=954027007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.954027007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.2126018331 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 4577123924 ps |
| CPU time | 49.68 seconds |
| Started | Oct 09 09:14:46 PM UTC 24 |
| Finished | Oct 09 09:15:38 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126018331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.2126018331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.4248477713 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 194462561 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:14:46 PM UTC 24 |
| Finished | Oct 09 09:14:48 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248477713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.4248477713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.4162212192 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 26194974721 ps |
| CPU time | 35.78 seconds |
| Started | Oct 09 09:14:46 PM UTC 24 |
| Finished | Oct 09 09:15:24 PM UTC 24 |
| Peak memory | 218388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162212192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_resume.4162212192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.2067771144 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 6407520266 ps |
| CPU time | 10.34 seconds |
| Started | Oct 09 09:14:46 PM UTC 24 |
| Finished | Oct 09 09:14:58 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2067771144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.2067771144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.3341533694 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 2726913748 ps |
| CPU time | 20.9 seconds |
| Started | Oct 09 09:14:46 PM UTC 24 |
| Finished | Oct 09 09:15:09 PM UTC 24 |
| Peak memory | 234824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3341533694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.3341533694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.1760496102 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 3333350138 ps |
| CPU time | 85.94 seconds |
| Started | Oct 09 09:14:46 PM UTC 24 |
| Finished | Oct 09 09:16:14 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760496102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.1760496102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.919325096 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 240209262 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:14:47 PM UTC 24 |
| Finished | Oct 09 09:14:49 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=919325096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.919325096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.3131959423 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 209857956 ps |
| CPU time | 1.75 seconds |
| Started | Oct 09 09:14:47 PM UTC 24 |
| Finished | Oct 09 09:14:50 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131959423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.3131959423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.4171178851 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 2061476031 ps |
| CPU time | 16.24 seconds |
| Started | Oct 09 09:14:47 PM UTC 24 |
| Finished | Oct 09 09:15:04 PM UTC 24 |
| Peak memory | 230504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4171178851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.4171178851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.1192134338 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 1733405348 ps |
| CPU time | 15.99 seconds |
| Started | Oct 09 09:14:47 PM UTC 24 |
| Finished | Oct 09 09:15:04 PM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192134338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.1192134338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.1041079050 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 4108672636 ps |
| CPU time | 108.72 seconds |
| Started | Oct 09 09:14:47 PM UTC 24 |
| Finished | Oct 09 09:16:38 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1041079050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.1041079050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.2234831719 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 220916418 ps |
| CPU time | 1.28 seconds |
| Started | Oct 09 09:14:47 PM UTC 24 |
| Finished | Oct 09 09:14:49 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234831719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.2234831719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.4259036284 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 144891902 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:14:47 PM UTC 24 |
| Finished | Oct 09 09:14:49 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259036284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.4259036284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.386925687 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 224240411 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:14:49 PM UTC 24 |
| Finished | Oct 09 09:14:52 PM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=386925687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_out_iso.386925687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.3202715984 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 220759553 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:14:49 PM UTC 24 |
| Finished | Oct 09 09:14:52 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202715984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.3202715984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.1190878590 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 172788308 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:14:49 PM UTC 24 |
| Finished | Oct 09 09:14:52 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190878590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.1190878590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.166795140 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 207136409 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:14:49 PM UTC 24 |
| Finished | Oct 09 09:14:52 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=166795140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pending_in_trans.166795140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.3135001770 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 236847234 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:14:49 PM UTC 24 |
| Finished | Oct 09 09:14:52 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135001770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.3135001770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.2134498356 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 141960744 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:14:49 PM UTC 24 |
| Finished | Oct 09 09:14:52 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134498356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.2134498356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.1165518991 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 42185841 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:14:49 PM UTC 24 |
| Finished | Oct 09 09:14:52 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165518991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.1165518991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.3690043318 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 11555332516 ps |
| CPU time | 31.43 seconds |
| Started | Oct 09 09:14:50 PM UTC 24 |
| Finished | Oct 09 09:15:22 PM UTC 24 |
| Peak memory | 228368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690043318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.3690043318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.3414433642 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 194338619 ps |
| CPU time | 1.16 seconds |
| Started | Oct 09 09:14:50 PM UTC 24 |
| Finished | Oct 09 09:14:52 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3414433642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_pkt_received.3414433642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.4248922664 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 226959586 ps |
| CPU time | 1.79 seconds |
| Started | Oct 09 09:14:51 PM UTC 24 |
| Finished | Oct 09 09:14:54 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248922664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.4248922664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.3700774366 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 171552244 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:14:51 PM UTC 24 |
| Finished | Oct 09 09:14:54 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700774366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.3700774366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.2553926624 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 158751777 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:14:51 PM UTC 24 |
| Finished | Oct 09 09:14:54 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553926624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.2553926624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.3775194289 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 20177405254 ps |
| CPU time | 30.23 seconds |
| Started | Oct 09 09:14:51 PM UTC 24 |
| Finished | Oct 09 09:15:23 PM UTC 24 |
| Peak memory | 217884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3775194289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_resume_link_active.3775194289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.2862720701 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 179381987 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:14:52 PM UTC 24 |
| Finished | Oct 09 09:14:54 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2862720701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.2862720701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.1892861192 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 377795623 ps |
| CPU time | 1.93 seconds |
| Started | Oct 09 09:14:53 PM UTC 24 |
| Finished | Oct 09 09:14:56 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1892861192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.1892861192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.2856787072 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 159023262 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:14:53 PM UTC 24 |
| Finished | Oct 09 09:14:56 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856787072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.2856787072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.3313298252 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 145417151 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:14:53 PM UTC 24 |
| Finished | Oct 09 09:14:56 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313298252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.3313298252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.315093964 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 234017344 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:14:53 PM UTC 24 |
| Finished | Oct 09 09:14:56 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=315093964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.315093964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.1030799119 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 2345946665 ps |
| CPU time | 58.69 seconds |
| Started | Oct 09 09:14:54 PM UTC 24 |
| Finished | Oct 09 09:15:54 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030799119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.1030799119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.2575244673 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 189368968 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:14:54 PM UTC 24 |
| Finished | Oct 09 09:14:56 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575244673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.2575244673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.511381390 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 182626892 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:14:54 PM UTC 24 |
| Finished | Oct 09 09:14:56 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=511381390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_stall_trans.511381390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.329346573 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 845900800 ps |
| CPU time | 3.29 seconds |
| Started | Oct 09 09:14:54 PM UTC 24 |
| Finished | Oct 09 09:14:58 PM UTC 24 |
| Peak memory | 217920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=329346573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_stream_len_max.329346573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.1347369243 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 1894135926 ps |
| CPU time | 14.56 seconds |
| Started | Oct 09 09:14:54 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347369243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.1347369243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.547912124 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 849687344 ps |
| CPU time | 5.89 seconds |
| Started | Oct 09 09:14:40 PM UTC 24 |
| Finished | Oct 09 09:14:48 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=547912124 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.547912124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.3440450557 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 632914158 ps |
| CPU time | 1.94 seconds |
| Started | Oct 09 09:14:54 PM UTC 24 |
| Finished | Oct 09 09:14:57 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3440450557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_t x_rx_disruption.3440450557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.1167304129 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 243033212 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167304129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 110.usbdev_fifo_levels.1167304129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/110.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.3638300335 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 502800303 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3638300335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.3638300335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3483343728 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 240502538 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483343728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 111.usbdev_fifo_levels.3483343728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/111.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.3749185804 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 523380821 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3749185804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_ tx_rx_disruption.3749185804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.3180694220 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 166602667 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180694220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.3180694220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.3279805049 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 571990254 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3279805049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.3279805049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.4143940038 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 456978039 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4143940038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.4143940038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.2541199095 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 520187335 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2541199095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_ tx_rx_disruption.2541199095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.1385022360 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 183022020 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385022360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 114.usbdev_fifo_levels.1385022360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.3273449078 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 644698862 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3273449078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_ tx_rx_disruption.3273449078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.1759003329 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 620961011 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:44:54 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1759003329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_ tx_rx_disruption.1759003329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.4175229183 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 218855662 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175229183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.4175229183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.3233483703 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 152551297 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3233483703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 116.usbdev_fifo_levels.3233483703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.1403526536 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 448035380 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1403526536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.1403526536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.1993492147 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 477382494 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1993492147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.1993492147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.279919466 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 660618663 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=279919466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_t x_rx_disruption.279919466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.4024198783 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 261254235 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024198783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.4024198783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.126086465 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 293746184 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=126086465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 118.usbdev_fifo_levels.126086465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.1300642811 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 631944974 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1300642811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.1300642811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.3269589315 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 402651263 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269589315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.3269589315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.1018220317 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 283324486 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018220317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 119.usbdev_fifo_levels.1018220317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.1999203533 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 511715949 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:44:55 PM UTC 24 |
| Finished | Oct 09 09:44:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1999203533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_ tx_rx_disruption.1999203533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.2056028562 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 40646554 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:15:17 PM UTC 24 |
| Finished | Oct 09 09:15:19 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056028562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.2056028562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.3227270533 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 10917252583 ps |
| CPU time | 18.57 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:15:17 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3227270533 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.3227270533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.3583496833 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 14891189901 ps |
| CPU time | 18.94 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:15:17 PM UTC 24 |
| Peak memory | 228524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3583496833 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.3583496833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.1456786332 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 30370380341 ps |
| CPU time | 39.51 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:15:38 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1456786332 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.1456786332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.3985884061 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 182310620 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:15:00 PM UTC 24 |
| Peak memory | 217332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985884061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_av_buffer.3985884061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.777320824 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 142047982 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:14:59 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=777320824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_bitstuff_err.777320824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.743632375 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 164403279 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:14:59 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743632375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_data_toggle_clear.743632375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.1775673659 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 1378416708 ps |
| CPU time | 6.36 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:15:05 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775673659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.1775673659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.3383624565 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 25808362964 ps |
| CPU time | 47.76 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:15:47 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383624565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.3383624565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.3246457172 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 6404619493 ps |
| CPU time | 38.84 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:15:38 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246457172 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.3246457172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.3251043087 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 1091505681 ps |
| CPU time | 3.69 seconds |
| Started | Oct 09 09:14:59 PM UTC 24 |
| Finished | Oct 09 09:15:04 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251043087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_disable_endpoint.3251043087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.3827561569 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 150837937 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:14:59 PM UTC 24 |
| Finished | Oct 09 09:15:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827561569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.3827561569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_enable.3188222468 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 69621434 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:14:59 PM UTC 24 |
| Finished | Oct 09 09:15:01 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188222468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_enable.3188222468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.2422758612 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 898341403 ps |
| CPU time | 3.85 seconds |
| Started | Oct 09 09:14:59 PM UTC 24 |
| Finished | Oct 09 09:15:04 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422758612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.2422758612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.706130669 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 410217094 ps |
| CPU time | 2.81 seconds |
| Started | Oct 09 09:14:59 PM UTC 24 |
| Finished | Oct 09 09:15:03 PM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=706130669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_fifo_rst.706130669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.1790134103 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 187328099 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:15:03 PM UTC 24 |
| Finished | Oct 09 09:15:05 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790134103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.1790134103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.799868608 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 206418741 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:15:03 PM UTC 24 |
| Finished | Oct 09 09:15:06 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799868608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_stall.799868608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.3705840022 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 218343367 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:15:03 PM UTC 24 |
| Finished | Oct 09 09:15:06 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705840022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.3705840022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.2759101802 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 2675812976 ps |
| CPU time | 66.35 seconds |
| Started | Oct 09 09:15:03 PM UTC 24 |
| Finished | Oct 09 09:16:11 PM UTC 24 |
| Peak memory | 230300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2759101802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.2759101802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.2770392817 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 4462431358 ps |
| CPU time | 28.31 seconds |
| Started | Oct 09 09:15:03 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770392817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.2770392817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.3833028374 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 246061225 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:15:03 PM UTC 24 |
| Finished | Oct 09 09:15:06 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833028374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_in_err.3833028374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.1925771664 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 29807255910 ps |
| CPU time | 52.05 seconds |
| Started | Oct 09 09:15:03 PM UTC 24 |
| Finished | Oct 09 09:15:57 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1925771664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.1925771664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.1801316165 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 9402463982 ps |
| CPU time | 15.19 seconds |
| Started | Oct 09 09:15:03 PM UTC 24 |
| Finished | Oct 09 09:15:20 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801316165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_link_suspend.1801316165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.3494597185 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 3080239569 ps |
| CPU time | 76.96 seconds |
| Started | Oct 09 09:15:03 PM UTC 24 |
| Finished | Oct 09 09:16:23 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494597185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.3494597185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.3246988703 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 4152236340 ps |
| CPU time | 106.84 seconds |
| Started | Oct 09 09:15:04 PM UTC 24 |
| Finished | Oct 09 09:16:53 PM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246988703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.3246988703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.2607500100 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 258416150 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:15:04 PM UTC 24 |
| Finished | Oct 09 09:15:06 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607500100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.2607500100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.4075554622 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 203810639 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:15:04 PM UTC 24 |
| Finished | Oct 09 09:15:06 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075554622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.4075554622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.2346305404 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 2159525936 ps |
| CPU time | 18.83 seconds |
| Started | Oct 09 09:15:04 PM UTC 24 |
| Finished | Oct 09 09:15:24 PM UTC 24 |
| Peak memory | 228440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346305404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.2346305404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.524989701 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 2650847002 ps |
| CPU time | 72.02 seconds |
| Started | Oct 09 09:15:07 PM UTC 24 |
| Finished | Oct 09 09:16:21 PM UTC 24 |
| Peak memory | 234904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=524989701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.524989701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.458486363 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 1983747061 ps |
| CPU time | 15.46 seconds |
| Started | Oct 09 09:15:07 PM UTC 24 |
| Finished | Oct 09 09:15:24 PM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=458486363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.458486363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.2179412639 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 150756890 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:15:07 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179412639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.2179412639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.1693756203 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 197234240 ps |
| CPU time | 1.29 seconds |
| Started | Oct 09 09:15:07 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693756203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.1693756203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.1666086780 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 237195428 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:15:07 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666086780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_nak_trans.1666086780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.1294611119 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 235392793 ps |
| CPU time | 1.64 seconds |
| Started | Oct 09 09:15:07 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1294611119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.1294611119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.3627938633 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 158568458 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:15:08 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627938633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_out_stall.3627938633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.2184515681 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 181547607 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:15:08 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184515681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.2184515681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.418685283 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 160300461 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:15:08 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=418685283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pending_in_trans.418685283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.205554832 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 270845628 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:15:08 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=205554832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.205554832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.1072208925 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 148037005 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:15:08 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072208925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.1072208925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.3245819235 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 12146895237 ps |
| CPU time | 30.49 seconds |
| Started | Oct 09 09:15:08 PM UTC 24 |
| Finished | Oct 09 09:15:40 PM UTC 24 |
| Peak memory | 235152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245819235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_pkt_buffer.3245819235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.100941527 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 210613230 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:15:08 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=100941527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_pkt_received.100941527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.3241790846 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 238359966 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:15:12 PM UTC 24 |
| Finished | Oct 09 09:15:15 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241790846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_pkt_sent.3241790846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.3406763684 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 235736122 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:15:12 PM UTC 24 |
| Finished | Oct 09 09:15:15 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3406763684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.3406763684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.3028596369 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 178241179 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:15:12 PM UTC 24 |
| Finished | Oct 09 09:15:15 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3028596369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.3028596369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.1448739604 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 20147338229 ps |
| CPU time | 24.65 seconds |
| Started | Oct 09 09:15:12 PM UTC 24 |
| Finished | Oct 09 09:15:38 PM UTC 24 |
| Peak memory | 217804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448739604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.1448739604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.4100796029 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 167780683 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:15:12 PM UTC 24 |
| Finished | Oct 09 09:15:14 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100796029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_rx_crc_err.4100796029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.3378939104 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 294491302 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:15:12 PM UTC 24 |
| Finished | Oct 09 09:15:15 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3378939104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.3378939104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.1548658282 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 181582111 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:15:12 PM UTC 24 |
| Finished | Oct 09 09:15:15 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548658282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.1548658282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.3849739618 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 146634452 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:15:12 PM UTC 24 |
| Finished | Oct 09 09:15:15 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849739618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.3849739618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.3062232257 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 231314370 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:15:12 PM UTC 24 |
| Finished | Oct 09 09:15:15 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062232257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.3062232257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.801523047 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 2701303485 ps |
| CPU time | 68.2 seconds |
| Started | Oct 09 09:15:13 PM UTC 24 |
| Finished | Oct 09 09:16:23 PM UTC 24 |
| Peak memory | 230504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=801523047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.801523047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.3842742497 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 231436155 ps |
| CPU time | 1.29 seconds |
| Started | Oct 09 09:15:13 PM UTC 24 |
| Finished | Oct 09 09:15:15 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3842742497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.3842742497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.902964536 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 163891107 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:15:13 PM UTC 24 |
| Finished | Oct 09 09:15:15 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=902964536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_stall_trans.902964536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.1479371686 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 728673384 ps |
| CPU time | 2.2 seconds |
| Started | Oct 09 09:15:13 PM UTC 24 |
| Finished | Oct 09 09:15:16 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479371686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.1479371686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.147673797 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 2410845016 ps |
| CPU time | 23.48 seconds |
| Started | Oct 09 09:15:13 PM UTC 24 |
| Finished | Oct 09 09:15:38 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=147673797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_streaming_out.147673797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.3234995945 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 3022177511 ps |
| CPU time | 22.36 seconds |
| Started | Oct 09 09:14:57 PM UTC 24 |
| Finished | Oct 09 09:15:21 PM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234995945 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.3234995945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.631411790 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 519300456 ps |
| CPU time | 1.96 seconds |
| Started | Oct 09 09:15:13 PM UTC 24 |
| Finished | Oct 09 09:15:16 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=631411790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_tx _rx_disruption.631411790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.294795129 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 475152315 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:46:07 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=294795129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.294795129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.2976335906 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 159823780 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:46:07 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976335906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 120.usbdev_fifo_levels.2976335906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/120.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.956172312 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 462040283 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=956172312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_t x_rx_disruption.956172312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.248967827 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 325662703 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=248967827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.248967827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.46934581 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 157612763 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=46934581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 121.usbdev_fifo_levels.46934581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/121.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.1507632196 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 447116776 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1507632196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_ tx_rx_disruption.1507632196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.2124555208 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 144717469 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124555208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 122.usbdev_fifo_levels.2124555208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/122.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.1415962703 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 638129607 ps |
| CPU time | 1.64 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1415962703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_ tx_rx_disruption.1415962703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.2312819984 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 193986853 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2312819984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.2312819984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.78507094 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 704659623 ps |
| CPU time | 1.74 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=78507094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_tx _rx_disruption.78507094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.2199672651 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 165243984 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:10 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199672651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 124.usbdev_fifo_levels.2199672651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/124.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.202296844 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 499990851 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=202296844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_t x_rx_disruption.202296844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.2898914822 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 311169101 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898914822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.2898914822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.1799217208 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 550048964 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1799217208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_ tx_rx_disruption.1799217208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.3396988471 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 373267110 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3396988471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.3396988471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.780533034 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 561315527 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=780533034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_t x_rx_disruption.780533034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.3903197906 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 380114844 ps |
| CPU time | 1.28 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903197906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.3903197906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.2838547458 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 161021912 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838547458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 127.usbdev_fifo_levels.2838547458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/127.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.3491893403 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 531066361 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3491893403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_ tx_rx_disruption.3491893403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.1378221774 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 248340521 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378221774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.1378221774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.1569593208 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 537353749 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1569593208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_ tx_rx_disruption.1569593208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.1617042783 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 286378201 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1617042783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 129.usbdev_fifo_levels.1617042783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.777144346 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 502426708 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=777144346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_t x_rx_disruption.777144346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.345568500 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 52365970 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:15:31 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=345568500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.345568500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.2576079636 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 8635211315 ps |
| CPU time | 11.52 seconds |
| Started | Oct 09 09:15:17 PM UTC 24 |
| Finished | Oct 09 09:15:30 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576079636 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.2576079636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.2912444639 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 15386226242 ps |
| CPU time | 21.9 seconds |
| Started | Oct 09 09:15:17 PM UTC 24 |
| Finished | Oct 09 09:15:41 PM UTC 24 |
| Peak memory | 228524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912444639 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.2912444639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.1904802965 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 23584527772 ps |
| CPU time | 33.92 seconds |
| Started | Oct 09 09:15:17 PM UTC 24 |
| Finished | Oct 09 09:15:53 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1904802965 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.1904802965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.1792703503 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 153816641 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:15:17 PM UTC 24 |
| Finished | Oct 09 09:15:20 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792703503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.1792703503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.3724962831 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 169364165 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:15:17 PM UTC 24 |
| Finished | Oct 09 09:15:20 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724962831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_bitstuff_err.3724962831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.3955321276 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 542382424 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:15:17 PM UTC 24 |
| Finished | Oct 09 09:15:21 PM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955321276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_data_toggle_clear.3955321276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.2004208680 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 1072712878 ps |
| CPU time | 3.32 seconds |
| Started | Oct 09 09:15:17 PM UTC 24 |
| Finished | Oct 09 09:15:22 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004208680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.2004208680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.98151417 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 47844320523 ps |
| CPU time | 77.56 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:16:37 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=98151417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_device_address.98151417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.1184566507 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 4933732239 ps |
| CPU time | 30.93 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:15:50 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1184566507 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.1184566507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.4227891290 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 694511133 ps |
| CPU time | 2.2 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:15:21 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4227891290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.4227891290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.4125383270 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 142312968 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:15:20 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125383270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_disconnected.4125383270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_enable.477904938 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 68548278 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:15:20 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477904938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_enable.477904938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.1452326870 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 831783117 ps |
| CPU time | 2.54 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:15:22 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452326870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.1452326870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.1036536278 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 142805275 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:15:20 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036536278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.1036536278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.4128481042 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 259492365 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:15:21 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128481042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_fifo_levels.4128481042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.727689166 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 406954013 ps |
| CPU time | 3.48 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:15:23 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=727689166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_fifo_rst.727689166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.2812952301 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 151746763 ps |
| CPU time | 1.13 seconds |
| Started | Oct 09 09:15:21 PM UTC 24 |
| Finished | Oct 09 09:15:23 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812952301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.2812952301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.3399234617 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 135583089 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:15:21 PM UTC 24 |
| Finished | Oct 09 09:15:23 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399234617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_stall.3399234617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.2595374621 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 159735424 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:15:21 PM UTC 24 |
| Finished | Oct 09 09:15:24 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2595374621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.2595374621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.731888461 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 2187562794 ps |
| CPU time | 21.42 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:15:41 PM UTC 24 |
| Peak memory | 235080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=731888461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.731888461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.3224366090 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 5385217180 ps |
| CPU time | 60.18 seconds |
| Started | Oct 09 09:15:21 PM UTC 24 |
| Finished | Oct 09 09:16:23 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3224366090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.3224366090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.2475177693 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 242157610 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:15:21 PM UTC 24 |
| Finished | Oct 09 09:15:24 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475177693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_in_err.2475177693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.374335026 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 9725553344 ps |
| CPU time | 18.08 seconds |
| Started | Oct 09 09:15:21 PM UTC 24 |
| Finished | Oct 09 09:15:41 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=374335026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_link_resume.374335026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.3129860886 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 8704799263 ps |
| CPU time | 12.84 seconds |
| Started | Oct 09 09:15:21 PM UTC 24 |
| Finished | Oct 09 09:15:35 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129860886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_link_suspend.3129860886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.3741128976 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 4405348436 ps |
| CPU time | 31.35 seconds |
| Started | Oct 09 09:15:21 PM UTC 24 |
| Finished | Oct 09 09:15:54 PM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741128976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.3741128976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.3826845665 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 3781779545 ps |
| CPU time | 93.43 seconds |
| Started | Oct 09 09:15:21 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826845665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.3826845665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.3831002726 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 237714104 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:15:22 PM UTC 24 |
| Finished | Oct 09 09:15:24 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831002726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.3831002726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.804410782 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 191483028 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:15:22 PM UTC 24 |
| Finished | Oct 09 09:15:24 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804410782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.804410782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.3057305633 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 3288927196 ps |
| CPU time | 81.43 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:16:48 PM UTC 24 |
| Peak memory | 230424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057305633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.3057305633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.547534548 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 2109226509 ps |
| CPU time | 54.1 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:16:21 PM UTC 24 |
| Peak memory | 230248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=547534548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.547534548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.4122140092 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 2808350242 ps |
| CPU time | 19.94 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:46 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122140092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.4122140092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.2359313304 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 153443800 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:27 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359313304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.2359313304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.2379338807 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 146315356 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:27 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379338807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.2379338807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.3517760878 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 219715405 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:28 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517760878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.3517760878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.4037244402 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 176638196 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:28 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037244402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_out_iso.4037244402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.2326744890 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 186421317 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:28 PM UTC 24 |
| Peak memory | 215876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326744890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_out_stall.2326744890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.2528802265 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 214509946 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:28 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528802265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.2528802265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.1915096990 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 165250608 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:28 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1915096990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.1915096990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.960363817 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 274351915 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:28 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=960363817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.960363817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.2724452122 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 157469871 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724452122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2724452122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.2564954802 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 41395610 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2564954802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.2564954802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.2808132051 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 9989265219 ps |
| CPU time | 27.14 seconds |
| Started | Oct 09 09:15:25 PM UTC 24 |
| Finished | Oct 09 09:15:54 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808132051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.2808132051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.3202501694 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 158138432 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:32 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202501694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_pkt_received.3202501694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.2884838664 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 167888456 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:32 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884838664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_pkt_sent.2884838664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.3697184393 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 194065121 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:32 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3697184393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.3697184393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.3574086016 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 161245596 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574086016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.3574086016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.2852028452 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 20171591753 ps |
| CPU time | 28.33 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:16:00 PM UTC 24 |
| Peak memory | 217808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852028452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.2852028452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.3233290660 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 143213777 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:32 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3233290660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.3233290660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.3581500328 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 368750209 ps |
| CPU time | 1.87 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581500328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_rx_full.3581500328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.4081351706 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 184171497 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081351706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.4081351706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.1510015249 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 148728285 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1510015249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.1510015249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.2035873981 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 237848088 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 215524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2035873981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.2035873981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.3938910821 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 2082490052 ps |
| CPU time | 19.71 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 234812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3938910821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.3938910821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.162132094 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 186791548 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=162132094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.162132094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.3861021362 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 151744300 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861021362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.3861021362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.3761317774 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 1301477217 ps |
| CPU time | 3.52 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:36 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3761317774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.3761317774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.1703617515 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 2590567466 ps |
| CPU time | 18.07 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:50 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703617515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.1703617515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.560879347 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 1000725742 ps |
| CPU time | 22.01 seconds |
| Started | Oct 09 09:15:18 PM UTC 24 |
| Finished | Oct 09 09:15:41 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=560879347 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.560879347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.1147680516 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 534112104 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:15:30 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1147680516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.1147680516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.93084742 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 409146644 ps |
| CPU time | 1.21 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=93084742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.93084742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.1475701878 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 607162565 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:46:08 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1475701878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.1475701878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.2858438352 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 355155309 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2858438352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.2858438352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.879681516 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 201085502 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:11 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879681516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 131.usbdev_fifo_levels.879681516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/131.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.3132487414 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 558535497 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3132487414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_ tx_rx_disruption.3132487414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.1336683735 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 645287101 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1336683735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_ tx_rx_disruption.1336683735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.2585307214 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 170077028 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585307214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.2585307214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.2139502454 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 288639782 ps |
| CPU time | 1.2 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139502454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 133.usbdev_fifo_levels.2139502454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.2144720006 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 532737426 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2144720006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_ tx_rx_disruption.2144720006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.719388257 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 338088517 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=719388257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.719388257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.120712219 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 498407152 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=120712219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_t x_rx_disruption.120712219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.3488487331 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 571178384 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488487331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.3488487331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.3502005474 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 643785730 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3502005474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.3502005474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.1489034523 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 626624293 ps |
| CPU time | 1.73 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:13 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489034523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.1489034523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.2387406068 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 266942011 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2387406068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 136.usbdev_fifo_levels.2387406068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/136.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.2362751356 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 467700473 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2362751356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.2362751356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3839784463 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 394503740 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3839784463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.3839784463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.2600466425 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 166999439 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2600466425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 137.usbdev_fifo_levels.2600466425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.3624896987 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 513491482 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3624896987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_ tx_rx_disruption.3624896987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.668936561 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 186887234 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=668936561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.668936561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.51737259 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 190348395 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=51737259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 138.usbdev_fifo_levels.51737259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/138.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.2385470792 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 537120447 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2385470792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.2385470792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.1800634958 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 199050069 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800634958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 139.usbdev_fifo_levels.1800634958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/139.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.2976857373 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 500641297 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2976857373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.2976857373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.2113412276 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 73128321 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:15:55 PM UTC 24 |
| Finished | Oct 09 09:15:57 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113412276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.2113412276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.3284792593 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 11316639041 ps |
| CPU time | 18.96 seconds |
| Started | Oct 09 09:15:32 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3284792593 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.3284792593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.449875408 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 19643621523 ps |
| CPU time | 27.69 seconds |
| Started | Oct 09 09:15:32 PM UTC 24 |
| Finished | Oct 09 09:16:01 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=449875408 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.449875408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.1430786698 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 30616265377 ps |
| CPU time | 40.86 seconds |
| Started | Oct 09 09:15:36 PM UTC 24 |
| Finished | Oct 09 09:16:18 PM UTC 24 |
| Peak memory | 218356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1430786698 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.1430786698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.636382628 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 157322820 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:15:36 PM UTC 24 |
| Finished | Oct 09 09:15:38 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=636382628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_av_buffer.636382628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.1378036546 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 176419088 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:15:36 PM UTC 24 |
| Finished | Oct 09 09:15:39 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378036546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.1378036546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.1873617250 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 324460819 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:15:36 PM UTC 24 |
| Finished | Oct 09 09:15:39 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873617250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_data_toggle_clear.1873617250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.1038232938 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 922453135 ps |
| CPU time | 3.41 seconds |
| Started | Oct 09 09:15:36 PM UTC 24 |
| Finished | Oct 09 09:15:41 PM UTC 24 |
| Peak memory | 217808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038232938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.1038232938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.3736293229 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 45219833458 ps |
| CPU time | 75.69 seconds |
| Started | Oct 09 09:15:36 PM UTC 24 |
| Finished | Oct 09 09:16:54 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736293229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.3736293229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.1775616097 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 3379856499 ps |
| CPU time | 26.21 seconds |
| Started | Oct 09 09:15:36 PM UTC 24 |
| Finished | Oct 09 09:16:04 PM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775616097 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.1775616097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.294512406 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 730637781 ps |
| CPU time | 2.9 seconds |
| Started | Oct 09 09:15:37 PM UTC 24 |
| Finished | Oct 09 09:15:41 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=294512406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disable_endpoint.294512406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.1223971547 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 164614014 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:15:37 PM UTC 24 |
| Finished | Oct 09 09:15:39 PM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223971547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.1223971547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_enable.3002489517 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 35248500 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:15:37 PM UTC 24 |
| Finished | Oct 09 09:15:39 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002489517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.3002489517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.2379195835 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 986115897 ps |
| CPU time | 2.69 seconds |
| Started | Oct 09 09:15:37 PM UTC 24 |
| Finished | Oct 09 09:15:41 PM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379195835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.2379195835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.4239642125 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 685781877 ps |
| CPU time | 2.01 seconds |
| Started | Oct 09 09:15:37 PM UTC 24 |
| Finished | Oct 09 09:15:40 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239642125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.4239642125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.2870471942 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 322364299 ps |
| CPU time | 2.81 seconds |
| Started | Oct 09 09:15:37 PM UTC 24 |
| Finished | Oct 09 09:15:41 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2870471942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.2870471942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.3109726437 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 233795216 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:15:37 PM UTC 24 |
| Finished | Oct 09 09:15:39 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109726437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.3109726437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.4046780778 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 171375495 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:15:42 PM UTC 24 |
| Finished | Oct 09 09:15:44 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046780778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.4046780778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.3508660744 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 202481097 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:15:42 PM UTC 24 |
| Finished | Oct 09 09:15:45 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508660744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_trans.3508660744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.1019349663 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 4427004733 ps |
| CPU time | 110.51 seconds |
| Started | Oct 09 09:15:37 PM UTC 24 |
| Finished | Oct 09 09:17:30 PM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1019349663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.1019349663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.464375289 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 6064640955 ps |
| CPU time | 37.46 seconds |
| Started | Oct 09 09:15:42 PM UTC 24 |
| Finished | Oct 09 09:16:22 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=464375289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.464375289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.4142086754 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 161895367 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:15:42 PM UTC 24 |
| Finished | Oct 09 09:15:45 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142086754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.4142086754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.1934430553 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 25170127818 ps |
| CPU time | 37.73 seconds |
| Started | Oct 09 09:15:42 PM UTC 24 |
| Finished | Oct 09 09:16:22 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1934430553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.1934430553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.3076520823 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 5115240415 ps |
| CPU time | 7.92 seconds |
| Started | Oct 09 09:15:42 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076520823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.3076520823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.1108620326 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 3713846560 ps |
| CPU time | 35.19 seconds |
| Started | Oct 09 09:15:42 PM UTC 24 |
| Finished | Oct 09 09:16:20 PM UTC 24 |
| Peak memory | 234864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108620326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.1108620326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.606284134 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 2730771369 ps |
| CPU time | 64.59 seconds |
| Started | Oct 09 09:15:42 PM UTC 24 |
| Finished | Oct 09 09:16:49 PM UTC 24 |
| Peak memory | 230456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=606284134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.606284134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.2464643311 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 280633337 ps |
| CPU time | 1.13 seconds |
| Started | Oct 09 09:15:42 PM UTC 24 |
| Finished | Oct 09 09:15:45 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464643311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.2464643311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.2833435325 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 204033309 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:15:42 PM UTC 24 |
| Finished | Oct 09 09:15:45 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833435325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.2833435325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.348898590 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 3249108277 ps |
| CPU time | 81.23 seconds |
| Started | Oct 09 09:15:43 PM UTC 24 |
| Finished | Oct 09 09:17:06 PM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=348898590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.348898590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.1861152661 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 2313273524 ps |
| CPU time | 57.48 seconds |
| Started | Oct 09 09:15:43 PM UTC 24 |
| Finished | Oct 09 09:16:42 PM UTC 24 |
| Peak memory | 234864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1861152661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.1861152661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.2505335332 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 1691388423 ps |
| CPU time | 41.54 seconds |
| Started | Oct 09 09:15:43 PM UTC 24 |
| Finished | Oct 09 09:16:26 PM UTC 24 |
| Peak memory | 228208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505335332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.2505335332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.3594454266 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 154121886 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:15:43 PM UTC 24 |
| Finished | Oct 09 09:15:45 PM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3594454266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.3594454266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.1089064297 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 142403984 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:15:43 PM UTC 24 |
| Finished | Oct 09 09:15:45 PM UTC 24 |
| Peak memory | 215520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089064297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.1089064297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.1022278376 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 190056416 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:15:43 PM UTC 24 |
| Finished | Oct 09 09:15:45 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022278376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_nak_trans.1022278376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.2993423289 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 183175361 ps |
| CPU time | 1.21 seconds |
| Started | Oct 09 09:15:43 PM UTC 24 |
| Finished | Oct 09 09:15:46 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993423289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.2993423289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.3244196797 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 174469999 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:15:43 PM UTC 24 |
| Finished | Oct 09 09:15:45 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3244196797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_out_stall.3244196797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.1760618002 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 177846606 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:51 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760618002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.1760618002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.3262717630 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 153135261 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:51 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262717630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.3262717630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.496137053 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 235199612 ps |
| CPU time | 1.28 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:51 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=496137053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.496137053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.3336676937 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 145888471 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:51 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336676937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.3336676937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.2242444639 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 29819642 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:51 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2242444639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.2242444639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.2410837836 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 21634206711 ps |
| CPU time | 55.43 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:16:46 PM UTC 24 |
| Peak memory | 232684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2410837836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_pkt_buffer.2410837836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.2777916264 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 168926027 ps |
| CPU time | 1.13 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:51 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777916264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.2777916264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.2536822085 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 252630490 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536822085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.2536822085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.2210651453 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 182016251 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2210651453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_random_length_in_transaction.2210651453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.3039585175 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 175185448 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039585175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.3039585175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.2353118349 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 20167293616 ps |
| CPU time | 27 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:16:17 PM UTC 24 |
| Peak memory | 217884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353118349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.2353118349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.1734271375 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 184372071 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734271375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_rx_crc_err.1734271375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.300095226 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 383069377 ps |
| CPU time | 1.8 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=300095226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_rx_full.300095226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.3170022207 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 161522985 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170022207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.3170022207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.714324391 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 152999313 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:51 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=714324391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_setup_trans_ignored.714324391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.1041448878 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 233874353 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1041448878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.1041448878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.2477850978 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 2664069966 ps |
| CPU time | 67.6 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:16:59 PM UTC 24 |
| Peak memory | 230424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477850978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.2477850978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.307400230 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 175832620 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:15:49 PM UTC 24 |
| Finished | Oct 09 09:15:52 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=307400230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.307400230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.41111890 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 259957911 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:15:55 PM UTC 24 |
| Finished | Oct 09 09:15:57 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=41111890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_stall_trans.41111890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.2612249139 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 361404628 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:15:55 PM UTC 24 |
| Finished | Oct 09 09:15:58 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2612249139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.2612249139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.3479075899 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 3961229042 ps |
| CPU time | 26.63 seconds |
| Started | Oct 09 09:15:55 PM UTC 24 |
| Finished | Oct 09 09:16:23 PM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479075899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.3479075899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.2604628748 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 5531332415 ps |
| CPU time | 34.84 seconds |
| Started | Oct 09 09:15:36 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604628748 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.2604628748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.2630949910 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 605446201 ps |
| CPU time | 1.91 seconds |
| Started | Oct 09 09:15:55 PM UTC 24 |
| Finished | Oct 09 09:15:59 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2630949910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.2630949910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.2618960632 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 274032032 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:46:09 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2618960632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.2618960632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.988472367 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 265857635 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:46:10 PM UTC 24 |
| Finished | Oct 09 09:46:12 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=988472367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 140.usbdev_fifo_levels.988472367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.482083792 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 543726607 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:46:10 PM UTC 24 |
| Finished | Oct 09 09:46:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=482083792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_t x_rx_disruption.482083792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.1729092553 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 293162534 ps |
| CPU time | 1.13 seconds |
| Started | Oct 09 09:47:21 PM UTC 24 |
| Finished | Oct 09 09:47:24 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729092553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.1729092553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.2413208186 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 283623906 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:47:21 PM UTC 24 |
| Finished | Oct 09 09:47:24 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2413208186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 141.usbdev_fifo_levels.2413208186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.543707903 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 517117355 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:47:21 PM UTC 24 |
| Finished | Oct 09 09:47:24 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=543707903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_t x_rx_disruption.543707903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.3942225279 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 292430157 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:47:21 PM UTC 24 |
| Finished | Oct 09 09:47:24 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3942225279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.3942225279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.1379022474 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 154820692 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:47:21 PM UTC 24 |
| Finished | Oct 09 09:47:24 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379022474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 142.usbdev_fifo_levels.1379022474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/142.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.2806831597 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 665305569 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2806831597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.2806831597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.715362086 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 432767543 ps |
| CPU time | 1.16 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:24 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=715362086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.715362086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.2819701261 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 651338977 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2819701261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.2819701261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.291425097 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 207220545 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:24 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=291425097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.291425097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.2505468158 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 652726450 ps |
| CPU time | 1.87 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2505468158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_ tx_rx_disruption.2505468158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.4163713943 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 413230072 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163713943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.4163713943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/145.usbdev_fifo_levels.2435832762 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 173839695 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435832762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 145.usbdev_fifo_levels.2435832762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/145.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.3719487015 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 468197510 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3719487015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.3719487015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.2713744866 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 550819946 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713744866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.2713744866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.3186942400 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 232328031 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 216352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186942400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 146.usbdev_fifo_levels.3186942400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.1223917075 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 468286153 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1223917075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.1223917075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.1315456815 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 248965919 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315456815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.1315456815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.3070555151 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 642757941 ps |
| CPU time | 1.82 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3070555151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.3070555151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.3050114081 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 215681544 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050114081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 148.usbdev_fifo_levels.3050114081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/148.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.835021955 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 487487624 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=835021955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_t x_rx_disruption.835021955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.1662204095 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 624909464 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662204095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.1662204095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.1458311580 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 266453075 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:25 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458311580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 149.usbdev_fifo_levels.1458311580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.3427587864 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 677230231 ps |
| CPU time | 1.76 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3427587864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.3427587864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.14097389 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 53923528 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:18 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=14097389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.14097389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.2459485999 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 5936452744 ps |
| CPU time | 9.02 seconds |
| Started | Oct 09 09:15:55 PM UTC 24 |
| Finished | Oct 09 09:16:06 PM UTC 24 |
| Peak memory | 228252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459485999 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.2459485999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.378339737 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 20208859721 ps |
| CPU time | 27.24 seconds |
| Started | Oct 09 09:15:55 PM UTC 24 |
| Finished | Oct 09 09:16:24 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=378339737 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.378339737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.859803972 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 30891117862 ps |
| CPU time | 39.41 seconds |
| Started | Oct 09 09:15:55 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=859803972 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.859803972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.4130762156 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 142371132 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:15:55 PM UTC 24 |
| Finished | Oct 09 09:15:58 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4130762156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.4130762156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.2067848906 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 156452048 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:15:56 PM UTC 24 |
| Finished | Oct 09 09:15:58 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2067848906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.2067848906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.1866021061 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 377984581 ps |
| CPU time | 1.74 seconds |
| Started | Oct 09 09:15:56 PM UTC 24 |
| Finished | Oct 09 09:15:59 PM UTC 24 |
| Peak memory | 215336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866021061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.1866021061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.3506255932 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 861172415 ps |
| CPU time | 2.7 seconds |
| Started | Oct 09 09:15:56 PM UTC 24 |
| Finished | Oct 09 09:16:00 PM UTC 24 |
| Peak memory | 218196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506255932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.3506255932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.1510509561 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 36020439269 ps |
| CPU time | 60.97 seconds |
| Started | Oct 09 09:15:56 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1510509561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.1510509561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.2349403891 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 7065051564 ps |
| CPU time | 40.09 seconds |
| Started | Oct 09 09:15:56 PM UTC 24 |
| Finished | Oct 09 09:16:37 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349403891 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.2349403891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.739035482 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 883769655 ps |
| CPU time | 2.26 seconds |
| Started | Oct 09 09:15:56 PM UTC 24 |
| Finished | Oct 09 09:15:59 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=739035482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_disable_endpoint.739035482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.2169959928 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 141278115 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:15:56 PM UTC 24 |
| Finished | Oct 09 09:15:58 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2169959928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.2169959928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_enable.3109802538 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 34813164 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:15:56 PM UTC 24 |
| Finished | Oct 09 09:15:58 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109802538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_enable.3109802538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.2253212426 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 871559440 ps |
| CPU time | 3.11 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:07 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253212426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.2253212426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.4254358364 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 277228616 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:05 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254358364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.4254358364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.1455996260 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 233512509 ps |
| CPU time | 1.75 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:05 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455996260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.1455996260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.2134404679 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 234759984 ps |
| CPU time | 1.73 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:06 PM UTC 24 |
| Peak memory | 225824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134404679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.2134404679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.4178857663 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 158444050 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:05 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178857663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.4178857663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.2980465343 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 206603244 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:05 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980465343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_trans.2980465343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.435304842 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 3969088268 ps |
| CPU time | 33.78 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:38 PM UTC 24 |
| Peak memory | 235160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=435304842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.435304842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.2131173542 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 10321628387 ps |
| CPU time | 116.19 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:18:01 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131173542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.2131173542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.642761020 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 159804928 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:05 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=642761020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_link_in_err.642761020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.1830041376 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 25904078923 ps |
| CPU time | 34.71 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:39 PM UTC 24 |
| Peak memory | 228376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830041376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_resume.1830041376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.1760146238 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 10482281355 ps |
| CPU time | 13.53 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:18 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760146238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.1760146238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.730708606 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 5756632436 ps |
| CPU time | 54.76 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:59 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=730708606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.730708606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.3036619480 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 2308889982 ps |
| CPU time | 21.51 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:26 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036619480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.3036619480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.276039611 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 240836405 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:06 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=276039611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.276039611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.214558964 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 213224540 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:16:02 PM UTC 24 |
| Finished | Oct 09 09:16:05 PM UTC 24 |
| Peak memory | 215372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=214558964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.214558964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.2290763445 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 2310424442 ps |
| CPU time | 21.44 seconds |
| Started | Oct 09 09:16:03 PM UTC 24 |
| Finished | Oct 09 09:16:26 PM UTC 24 |
| Peak memory | 234988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290763445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.2290763445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.2047708145 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 3231501324 ps |
| CPU time | 22.92 seconds |
| Started | Oct 09 09:16:03 PM UTC 24 |
| Finished | Oct 09 09:16:27 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047708145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.2047708145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.3992610274 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 152182821 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:16:03 PM UTC 24 |
| Finished | Oct 09 09:16:06 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992610274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.3992610274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.3045552630 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 150282683 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:16:03 PM UTC 24 |
| Finished | Oct 09 09:16:05 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045552630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.3045552630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.1912913810 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 185463377 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:16:05 PM UTC 24 |
| Finished | Oct 09 09:16:07 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912913810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.1912913810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.3750564876 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 160633302 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:16:05 PM UTC 24 |
| Finished | Oct 09 09:16:07 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3750564876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.3750564876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.677347311 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 172900481 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:16:05 PM UTC 24 |
| Finished | Oct 09 09:16:08 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=677347311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_out_trans_nak.677347311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.4194025272 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 170454965 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:16:05 PM UTC 24 |
| Finished | Oct 09 09:16:08 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194025272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.4194025272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.1968312318 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 241399463 ps |
| CPU time | 1.73 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968312318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.1968312318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.914316089 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 143796626 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:12 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=914316089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.914316089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.3649332277 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 84103288 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649332277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.3649332277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.3848448075 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 7943302408 ps |
| CPU time | 19.68 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:31 PM UTC 24 |
| Peak memory | 232608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848448075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.3848448075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.4072409569 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 154818300 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:12 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072409569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_pkt_received.4072409569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.1443051366 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 210255169 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1443051366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_pkt_sent.1443051366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.752943843 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 158174209 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=752943843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_random_length_in_transaction.752943843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.1757994444 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 212461167 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757994444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.1757994444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.2959666731 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 20158624568 ps |
| CPU time | 27.16 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:39 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2959666731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.2959666731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.3081098651 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 138168708 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081098651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.3081098651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.2282741970 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 412877273 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2282741970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.2282741970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.3435380949 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 197474657 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435380949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.3435380949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.680298198 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 150543841 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=680298198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_setup_trans_ignored.680298198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.483339855 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 221294764 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:16:10 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=483339855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.483339855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.657205326 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 2330708891 ps |
| CPU time | 16.18 seconds |
| Started | Oct 09 09:16:11 PM UTC 24 |
| Finished | Oct 09 09:16:28 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=657205326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.657205326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.3146976856 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 148176236 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:16:11 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146976856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.3146976856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.305004089 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 184520876 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:16:11 PM UTC 24 |
| Finished | Oct 09 09:16:13 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=305004089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_stall_trans.305004089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.1690541447 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 434114258 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:19 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1690541447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.1690541447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.809448994 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 1995277600 ps |
| CPU time | 15.12 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:32 PM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809448994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_streaming_out.809448994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.1645160114 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 1118886657 ps |
| CPU time | 22.72 seconds |
| Started | Oct 09 09:15:56 PM UTC 24 |
| Finished | Oct 09 09:16:20 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1645160114 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.1645160114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.2070572497 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 437637999 ps |
| CPU time | 2.47 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:19 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2070572497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.2070572497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.10885536 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 387121700 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=10885536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.10885536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.349936463 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 639012239 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=349936463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_t x_rx_disruption.349936463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.812801156 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 248009305 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=812801156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.812801156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.1889774154 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 254945010 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889774154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 151.usbdev_fifo_levels.1889774154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/151.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.572188410 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 442031673 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=572188410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_t x_rx_disruption.572188410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.2387734374 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 154542771 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:47:22 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2387734374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 152.usbdev_fifo_levels.2387734374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.406574241 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 446213892 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=406574241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_t x_rx_disruption.406574241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.420264789 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 261406384 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=420264789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.420264789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.3011768016 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 180564181 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011768016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 153.usbdev_fifo_levels.3011768016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.3923271102 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 452868493 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3923271102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_ tx_rx_disruption.3923271102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.2998591533 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 846381063 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998591533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.2998591533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.3835526662 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 216270872 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3835526662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 154.usbdev_fifo_levels.3835526662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.2096386685 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 605420170 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2096386685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_ tx_rx_disruption.2096386685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.3273229506 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 369712448 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3273229506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.3273229506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/155.usbdev_fifo_levels.4045187545 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 148432327 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4045187545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 155.usbdev_fifo_levels.4045187545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/155.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.95292136 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 479053508 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=95292136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_tx _rx_disruption.95292136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.3157503872 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 402239456 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3157503872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_ tx_rx_disruption.3157503872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.3734549551 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 200614578 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734549551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.3734549551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/157.usbdev_fifo_levels.2494451681 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 266672730 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494451681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 157.usbdev_fifo_levels.2494451681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/157.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.931936481 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 614083328 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=931936481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_t x_rx_disruption.931936481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.2378028180 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 378993064 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378028180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.2378028180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.4163344629 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 557164001 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4163344629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.4163344629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.2133133211 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 598051007 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 216612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133133211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.2133133211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/159.usbdev_fifo_levels.2346662689 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 232561776 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346662689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 159.usbdev_fifo_levels.2346662689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/159.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.2220735253 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 506089198 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2220735253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_ tx_rx_disruption.2220735253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.3422610401 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 67128650 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:45 PM UTC 24 |
| Peak memory | 215372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422610401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.3422610401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.1965152456 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 9384615633 ps |
| CPU time | 12.18 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:29 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1965152456 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.1965152456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.2003968672 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 18697478532 ps |
| CPU time | 23.59 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:41 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003968672 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.2003968672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.3541309798 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 29545570459 ps |
| CPU time | 36.84 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:54 PM UTC 24 |
| Peak memory | 218420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541309798 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.3541309798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.1630416898 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 174869525 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:19 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1630416898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.1630416898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.3529684770 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 194692976 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:18 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3529684770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_bitstuff_err.3529684770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.2689536322 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 318780030 ps |
| CPU time | 2.13 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:19 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689536322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.2689536322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.807195964 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 302576737 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:19 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=807195964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.807195964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.3198480761 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 30452303963 ps |
| CPU time | 50.42 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:17:09 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198480761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.3198480761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.3126958430 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 2543172556 ps |
| CPU time | 16.6 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:34 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3126958430 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.3126958430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.2936500374 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 471155695 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:19 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936500374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.2936500374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.346278350 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 146126900 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:16:22 PM UTC 24 |
| Finished | Oct 09 09:16:24 PM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=346278350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_disconnected.346278350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_enable.770757748 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 39427175 ps |
| CPU time | 0.74 seconds |
| Started | Oct 09 09:16:22 PM UTC 24 |
| Finished | Oct 09 09:16:24 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=770757748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_enable.770757748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.539133454 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 870385255 ps |
| CPU time | 2.51 seconds |
| Started | Oct 09 09:16:22 PM UTC 24 |
| Finished | Oct 09 09:16:26 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=539133454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.539133454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.2059575055 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 383297122 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:16:22 PM UTC 24 |
| Finished | Oct 09 09:16:25 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059575055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.2059575055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.3678201182 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 259587396 ps |
| CPU time | 1.2 seconds |
| Started | Oct 09 09:16:22 PM UTC 24 |
| Finished | Oct 09 09:16:25 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678201182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_fifo_levels.3678201182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.3988929245 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 321163729 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:16:22 PM UTC 24 |
| Finished | Oct 09 09:16:26 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988929245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.3988929245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.3950821022 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 184587683 ps |
| CPU time | 1.22 seconds |
| Started | Oct 09 09:16:23 PM UTC 24 |
| Finished | Oct 09 09:16:25 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950821022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.3950821022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.3394099890 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 154832194 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:16:23 PM UTC 24 |
| Finished | Oct 09 09:16:25 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394099890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_stall.3394099890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.1057752717 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 188118475 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:16:23 PM UTC 24 |
| Finished | Oct 09 09:16:25 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1057752717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.1057752717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.765272586 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 5284768977 ps |
| CPU time | 133.67 seconds |
| Started | Oct 09 09:16:23 PM UTC 24 |
| Finished | Oct 09 09:18:39 PM UTC 24 |
| Peak memory | 230556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=765272586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.765272586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.360558158 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 12271398552 ps |
| CPU time | 70.32 seconds |
| Started | Oct 09 09:16:23 PM UTC 24 |
| Finished | Oct 09 09:17:35 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=360558158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.360558158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.456686583 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 203822030 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:16:23 PM UTC 24 |
| Finished | Oct 09 09:16:25 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=456686583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_link_in_err.456686583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.2643622322 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 23449315176 ps |
| CPU time | 33.61 seconds |
| Started | Oct 09 09:16:23 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2643622322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_resume.2643622322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.494614427 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 8915108362 ps |
| CPU time | 13.91 seconds |
| Started | Oct 09 09:16:23 PM UTC 24 |
| Finished | Oct 09 09:16:38 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=494614427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_suspend.494614427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.3552326096 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 3220918815 ps |
| CPU time | 79.05 seconds |
| Started | Oct 09 09:16:23 PM UTC 24 |
| Finished | Oct 09 09:17:44 PM UTC 24 |
| Peak memory | 230388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3552326096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.3552326096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.4264566435 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 3971456302 ps |
| CPU time | 33.72 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:17:08 PM UTC 24 |
| Peak memory | 228640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264566435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.4264566435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.1106268329 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 240474512 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:35 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106268329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.1106268329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.2298407126 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 246597598 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:35 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2298407126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.2298407126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.427156196 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 3342374729 ps |
| CPU time | 22.49 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 234744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=427156196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.427156196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.4226762287 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 2119435894 ps |
| CPU time | 13.56 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:48 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226762287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.4226762287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.3421149817 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 151457354 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:35 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421149817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.3421149817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.3626377933 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 156167685 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:35 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626377933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.3626377933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.539412131 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 204228159 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:35 PM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=539412131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_out_iso.539412131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.1251106679 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 210610612 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:35 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251106679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.1251106679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.2227915743 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 183803868 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2227915743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_out_trans_nak.2227915743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.1613729361 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 145982661 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:35 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613729361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_pending_in_trans.1613729361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.1961677438 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 227537048 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1961677438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.1961677438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.393526195 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 192060389 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=393526195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.393526195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.847043869 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 41916501 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=847043869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_phy_pins_sense.847043869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.1211810659 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 20811451983 ps |
| CPU time | 48.47 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:17:24 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211810659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.1211810659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.1859578383 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 173538780 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1859578383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_pkt_received.1859578383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.3489682474 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 176493390 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:16:33 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489682474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.3489682474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.1275243693 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 158973992 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:16:34 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1275243693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_random_length_in_transaction.1275243693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.3360291848 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 185895475 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:16:34 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360291848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.3360291848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.2065797839 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 20172272704 ps |
| CPU time | 27.8 seconds |
| Started | Oct 09 09:16:34 PM UTC 24 |
| Finished | Oct 09 09:17:03 PM UTC 24 |
| Peak memory | 217820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065797839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.2065797839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.569882200 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 176101829 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:16:34 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=569882200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_rx_crc_err.569882200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.453078961 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 374044401 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:16:34 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=453078961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_rx_full.453078961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.1312354981 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 149958069 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:16:34 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312354981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_setup_stage.1312354981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.939714790 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 169916937 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:16:34 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=939714790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_setup_trans_ignored.939714790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.1645731823 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 269009780 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:16:34 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1645731823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.1645731823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.4264280014 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 3559301092 ps |
| CPU time | 89.41 seconds |
| Started | Oct 09 09:16:34 PM UTC 24 |
| Finished | Oct 09 09:18:05 PM UTC 24 |
| Peak memory | 228316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264280014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.4264280014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.960172938 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 164733407 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:16:34 PM UTC 24 |
| Finished | Oct 09 09:16:36 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=960172938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.960172938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.4008978703 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 181524254 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:45 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008978703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_stall_trans.4008978703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.3353626670 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 1002276459 ps |
| CPU time | 2.45 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:47 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3353626670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.3353626670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.3324093387 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 2180588212 ps |
| CPU time | 17.92 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:17:02 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324093387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.3324093387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.613311234 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 420507674 ps |
| CPU time | 7.96 seconds |
| Started | Oct 09 09:16:16 PM UTC 24 |
| Finished | Oct 09 09:16:26 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=613311234 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.613311234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.1989033326 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 460552769 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1989033326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.1989033326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.3763215783 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 153049305 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 217328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763215783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.3763215783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.1926139470 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 492672730 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 216516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1926139470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_ tx_rx_disruption.1926139470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.729122027 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 146233666 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:26 PM UTC 24 |
| Peak memory | 216600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=729122027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.729122027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.84579612 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 579701102 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=84579612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_tx _rx_disruption.84579612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.3580792612 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 432959352 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580792612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.3580792612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.2791024133 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 475588430 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2791024133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.2791024133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.2178252995 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 600655491 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:47:23 PM UTC 24 |
| Finished | Oct 09 09:47:27 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2178252995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.2178252995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.3942336508 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 580302865 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:48:39 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3942336508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_ tx_rx_disruption.3942336508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.2678663297 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 202523435 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2678663297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.2678663297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.1592782377 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 455215426 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1592782377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.1592782377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.1999339945 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 462907858 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999339945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.1999339945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.3063844786 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 505607731 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3063844786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_ tx_rx_disruption.3063844786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.1436431027 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 354866786 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436431027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.1436431027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.3570643407 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 537650332 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3570643407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.3570643407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.1228268275 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 657081133 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1228268275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.1228268275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.2513629839 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 390634343 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513629839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.2513629839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.1676242897 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 479107375 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1676242897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.1676242897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.3101036711 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 228440100 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101036711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.3101036711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.2933490586 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 598692729 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2933490586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.2933490586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.3811235207 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 63613054 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:11 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811235207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.3811235207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.3829937500 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 9440727435 ps |
| CPU time | 11.33 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:56 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829937500 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.3829937500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.2246772922 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 16255813290 ps |
| CPU time | 19.33 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:17:04 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246772922 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.2246772922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.2711191695 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 30688171469 ps |
| CPU time | 41.92 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:17:27 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2711191695 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.2711191695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.555098955 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 162785960 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:45 PM UTC 24 |
| Peak memory | 215424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=555098955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_av_buffer.555098955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.2111679988 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 168297853 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:45 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111679988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_bitstuff_err.2111679988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.12489153 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 553889544 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:46 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12489153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_clear.12489153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.2402057497 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 557089502 ps |
| CPU time | 1.95 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:46 PM UTC 24 |
| Peak memory | 215488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402057497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.2402057497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.275513185 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 29276846563 ps |
| CPU time | 46.13 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:17:31 PM UTC 24 |
| Peak memory | 217876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=275513185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_device_address.275513185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.314404332 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 1554407220 ps |
| CPU time | 8.78 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:53 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=314404332 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.314404332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.3717203049 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 827448080 ps |
| CPU time | 2.44 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:47 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717203049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.3717203049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.1193123196 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 138209030 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:46 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193123196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_disconnected.1193123196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_enable.1079799508 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 72284519 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:46 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1079799508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.1079799508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.1024925173 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 1058263405 ps |
| CPU time | 2.71 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:16:48 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024925173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.1024925173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.2887266180 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 255667260 ps |
| CPU time | 1.29 seconds |
| Started | Oct 09 09:16:44 PM UTC 24 |
| Finished | Oct 09 09:16:46 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2887266180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_fifo_levels.2887266180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.2601908511 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 558439879 ps |
| CPU time | 3.35 seconds |
| Started | Oct 09 09:16:44 PM UTC 24 |
| Finished | Oct 09 09:16:48 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601908511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.2601908511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.8011009 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 229513707 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:16:44 PM UTC 24 |
| Finished | Oct 09 09:16:46 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=8011009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.8011009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.3580158339 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 142830457 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:16:44 PM UTC 24 |
| Finished | Oct 09 09:16:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580158339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.3580158339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.1314338159 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 227772769 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1314338159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_trans.1314338159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.2885215265 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 4358816787 ps |
| CPU time | 108.78 seconds |
| Started | Oct 09 09:16:44 PM UTC 24 |
| Finished | Oct 09 09:18:35 PM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885215265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.2885215265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.2890180899 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 10967642733 ps |
| CPU time | 119.28 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2890180899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.2890180899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.3502656149 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 207453897 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502656149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.3502656149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.4191253041 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 32909939647 ps |
| CPU time | 48.91 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:17:46 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4191253041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_resume.4191253041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.2081122631 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 9821456876 ps |
| CPU time | 12.18 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:17:08 PM UTC 24 |
| Peak memory | 217876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081122631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_link_suspend.2081122631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.559146664 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 2960820152 ps |
| CPU time | 19.44 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:17:16 PM UTC 24 |
| Peak memory | 228244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=559146664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.559146664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.4125129055 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 1826451983 ps |
| CPU time | 43.87 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:17:41 PM UTC 24 |
| Peak memory | 234600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125129055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.4125129055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.3451784293 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 254783534 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451784293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.3451784293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.2460992997 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 194912507 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460992997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.2460992997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.3775096836 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 3135270594 ps |
| CPU time | 78.97 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:18:16 PM UTC 24 |
| Peak memory | 228208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3775096836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.3775096836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.2159977764 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 2966409120 ps |
| CPU time | 73.05 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:18:10 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159977764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.2159977764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.471167135 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 224919396 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=471167135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.471167135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.166595031 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 138173418 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=166595031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.166595031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.373569817 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 177738794 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=373569817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_out_iso.373569817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.3299593282 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 205181871 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299593282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_out_stall.3299593282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.3361015652 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 175589700 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361015652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.3361015652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.3724902807 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 146959096 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724902807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.3724902807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.255406166 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 255402398 ps |
| CPU time | 1.16 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=255406166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.255406166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.3887110288 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 151096004 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3887110288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.3887110288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.3842741690 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 43783973 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:57 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3842741690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.3842741690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.4293481728 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 18606538339 ps |
| CPU time | 45.57 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:17:43 PM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4293481728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.4293481728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.1279449632 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 152305160 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279449632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.1279449632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.1449381120 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 223078302 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449381120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_pkt_sent.1449381120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.859434153 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 187427952 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=859434153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_random_length_in_transaction.859434153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.877452159 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 155208672 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:16:55 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=877452159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.877452159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.1532433497 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 20195924498 ps |
| CPU time | 28.46 seconds |
| Started | Oct 09 09:16:56 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532433497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.1532433497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.3675194744 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 156748242 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:16:56 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675194744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.3675194744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.2566074571 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 378741321 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:16:56 PM UTC 24 |
| Finished | Oct 09 09:16:58 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566074571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.2566074571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.828030918 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 183602422 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:11 PM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=828030918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_setup_stage.828030918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.1259177465 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 147400050 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:11 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259177465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.1259177465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.3948613984 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 211542100 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:11 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948613984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.3948613984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.3796873948 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 3335234688 ps |
| CPU time | 79.95 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:18:31 PM UTC 24 |
| Peak memory | 230452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796873948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.3796873948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.1461459214 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 181581205 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:11 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461459214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.1461459214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.3867280009 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 203621068 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:11 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867280009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.3867280009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.2472601695 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 1294824585 ps |
| CPU time | 3.03 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:13 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472601695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.2472601695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.243524458 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 2835583229 ps |
| CPU time | 23.46 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:34 PM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=243524458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_streaming_out.243524458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.3272548640 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 874657596 ps |
| CPU time | 15.9 seconds |
| Started | Oct 09 09:16:43 PM UTC 24 |
| Finished | Oct 09 09:17:01 PM UTC 24 |
| Peak memory | 217940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272548640 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.3272548640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.753029083 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 512240449 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=753029083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_tx _rx_disruption.753029083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.1610042799 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 247166497 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1610042799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.1610042799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.489551954 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 600229409 ps |
| CPU time | 1.75 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=489551954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_t x_rx_disruption.489551954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.4252251229 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 380010303 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:42 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252251229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.4252251229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.3310635157 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 581722803 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3310635157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_ tx_rx_disruption.3310635157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.2037039034 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 331610208 ps |
| CPU time | 1.16 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037039034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.2037039034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.194520296 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 487836280 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=194520296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_t x_rx_disruption.194520296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.1517165327 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 316265210 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1517165327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.1517165327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.1799210556 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 582619168 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1799210556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_ tx_rx_disruption.1799210556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.1795977995 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 739740748 ps |
| CPU time | 1.98 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1795977995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.1795977995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.3762972657 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 595232735 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3762972657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.3762972657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.2198278875 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 514522616 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198278875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.2198278875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.2812968075 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 596119910 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2812968075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.2812968075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.799531365 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 269345044 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=799531365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.799531365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.1436373427 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 433738404 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1436373427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.1436373427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.1933168365 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 362751826 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933168365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.1933168365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.2469798078 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 540647535 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2469798078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_ tx_rx_disruption.2469798078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.2241609617 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 452945267 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2241609617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_ tx_rx_disruption.2241609617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.2014869394 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 738383493 ps |
| CPU time | 1.94 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014869394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.2014869394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.792485893 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 461704845 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=792485893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_t x_rx_disruption.792485893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.1381311759 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 66047413 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:38 PM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381311759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.1381311759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.3049161212 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 12020621837 ps |
| CPU time | 16.52 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:27 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3049161212 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.3049161212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.326885222 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 14095868967 ps |
| CPU time | 19.26 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:30 PM UTC 24 |
| Peak memory | 228524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=326885222 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.326885222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.1966031355 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 28571830242 ps |
| CPU time | 37.91 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:49 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966031355 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.1966031355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.2823889055 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 211752143 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823889055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.2823889055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.2053296801 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 152770098 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2053296801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.2053296801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.2071125475 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 352916209 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071125475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.2071125475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.3577203527 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 732798172 ps |
| CPU time | 2.31 seconds |
| Started | Oct 09 09:17:09 PM UTC 24 |
| Finished | Oct 09 09:17:13 PM UTC 24 |
| Peak memory | 217648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577203527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.3577203527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.230097144 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 42748699340 ps |
| CPU time | 68.47 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:18:20 PM UTC 24 |
| Peak memory | 218412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=230097144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_device_address.230097144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.206450151 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 730778588 ps |
| CPU time | 12.98 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:24 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=206450151 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.206450151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.1398696134 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 598229149 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398696134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.1398696134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.2844840310 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 139959374 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844840310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.2844840310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_enable.4259823794 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 82832037 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259823794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.4259823794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.618977838 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 791030790 ps |
| CPU time | 2.12 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:13 PM UTC 24 |
| Peak memory | 217936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=618977838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.618977838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.3636105972 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 514185796 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:13 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636105972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.3636105972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.1065727065 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 277798853 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065727065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_fifo_levels.1065727065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.2983709462 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 257022158 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:13 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2983709462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_fifo_rst.2983709462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.2034070539 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 159047300 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034070539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.2034070539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.3337925572 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 143121737 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337925572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.3337925572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.2778836406 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 295587313 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:12 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778836406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_trans.2778836406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.1054197311 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 4612858248 ps |
| CPU time | 41.19 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 234912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054197311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.1054197311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.1127455570 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 6526373342 ps |
| CPU time | 39.13 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:51 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127455570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.1127455570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.3408662888 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 178381024 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:17:23 PM UTC 24 |
| Finished | Oct 09 09:17:25 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3408662888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_in_err.3408662888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.1666170619 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 27498155587 ps |
| CPU time | 41.12 seconds |
| Started | Oct 09 09:17:23 PM UTC 24 |
| Finished | Oct 09 09:18:06 PM UTC 24 |
| Peak memory | 228588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666170619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.1666170619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.1842351172 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 9713552891 ps |
| CPU time | 14.74 seconds |
| Started | Oct 09 09:17:23 PM UTC 24 |
| Finished | Oct 09 09:17:39 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1842351172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.1842351172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.2082395205 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 4735609229 ps |
| CPU time | 29.72 seconds |
| Started | Oct 09 09:17:23 PM UTC 24 |
| Finished | Oct 09 09:17:55 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2082395205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.2082395205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.2513744690 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 4087039902 ps |
| CPU time | 102.12 seconds |
| Started | Oct 09 09:17:23 PM UTC 24 |
| Finished | Oct 09 09:19:08 PM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513744690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.2513744690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.1368806356 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 235804142 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:17:23 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1368806356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.1368806356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.2777733328 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 193730124 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:17:23 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777733328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.2777733328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.2222564709 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 1800002739 ps |
| CPU time | 15.8 seconds |
| Started | Oct 09 09:17:23 PM UTC 24 |
| Finished | Oct 09 09:17:41 PM UTC 24 |
| Peak memory | 230316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222564709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.2222564709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.1608671241 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 2577434232 ps |
| CPU time | 62.55 seconds |
| Started | Oct 09 09:17:23 PM UTC 24 |
| Finished | Oct 09 09:18:28 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1608671241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.1608671241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.439819571 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 169563093 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:17:23 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=439819571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.439819571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.131760148 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 160614029 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=131760148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.131760148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.3795276261 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 182119367 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795276261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_nak_trans.3795276261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.3546321664 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 200547160 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546321664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_out_iso.3546321664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.2058524735 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 217481225 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058524735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.2058524735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.503187746 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 194286220 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=503187746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_out_trans_nak.503187746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.2512629055 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 163178070 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512629055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.2512629055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.1363525388 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 227965330 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363525388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.1363525388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.3864835920 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 214233956 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864835920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.3864835920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.4181015785 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 47594833 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4181015785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.4181015785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.2505682816 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 7743383748 ps |
| CPU time | 18.19 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:44 PM UTC 24 |
| Peak memory | 228368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505682816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.2505682816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.65750960 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 166445153 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=65750960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_received.65750960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.4124295394 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 203096499 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124295394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.4124295394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.1280984774 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 179504885 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280984774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.1280984774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.2743390514 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 217078288 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2743390514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.2743390514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.2563098608 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 20161599019 ps |
| CPU time | 26.15 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 217812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2563098608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_resume_link_active.2563098608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.614216499 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 177817060 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:27 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=614216499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_rx_crc_err.614216499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.4140546995 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 305967226 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:27 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4140546995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.4140546995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.2343237267 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 171546885 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:27 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343237267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.2343237267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.3112071084 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 152199343 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:27 PM UTC 24 |
| Peak memory | 216928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3112071084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.3112071084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.1427304247 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 216197098 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:27 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427304247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.1427304247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.3348275857 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 2983556219 ps |
| CPU time | 20.61 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:47 PM UTC 24 |
| Peak memory | 229720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348275857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.3348275857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.528780098 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 178170065 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:17:24 PM UTC 24 |
| Finished | Oct 09 09:17:27 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528780098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.528780098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.2928579720 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 175042533 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:17:35 PM UTC 24 |
| Finished | Oct 09 09:17:38 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928579720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.2928579720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.700461411 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 548079048 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:17:35 PM UTC 24 |
| Finished | Oct 09 09:17:38 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=700461411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_stream_len_max.700461411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.722000771 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 2840365866 ps |
| CPU time | 67.58 seconds |
| Started | Oct 09 09:17:35 PM UTC 24 |
| Finished | Oct 09 09:18:45 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722000771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_streaming_out.722000771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.1425441497 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 8363071897 ps |
| CPU time | 48.06 seconds |
| Started | Oct 09 09:17:10 PM UTC 24 |
| Finished | Oct 09 09:17:59 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1425441497 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.1425441497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.2497429830 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 666173938 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:38 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2497429830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_t x_rx_disruption.2497429830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.421949653 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 495914092 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=421949653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.421949653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.2020774386 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 557641101 ps |
| CPU time | 1.82 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2020774386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_ tx_rx_disruption.2020774386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.3673259112 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 495949388 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:48:40 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673259112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.3673259112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.1005553338 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 542158554 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1005553338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.1005553338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.2895664544 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 157774178 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:43 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895664544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.2895664544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.3491437118 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 566225843 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3491437118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_ tx_rx_disruption.3491437118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.2198399405 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 492881055 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2198399405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.2198399405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.46947081 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 472962967 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=46947081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_tx _rx_disruption.46947081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.2433109956 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 696316489 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433109956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.2433109956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.3981205738 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 511544017 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3981205738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.3981205738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.855973069 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 166224041 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=855973069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.855973069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.1215749277 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 454975670 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1215749277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_ tx_rx_disruption.1215749277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.1686293556 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 558462388 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1686293556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_ tx_rx_disruption.1686293556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.4139856898 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 489928060 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139856898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.4139856898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.2408633893 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 447149180 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2408633893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.2408633893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.3436909279 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 490577400 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436909279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.3436909279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.1539091885 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 595152374 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:45 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1539091885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.1539091885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.3413561579 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 38200035 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:07 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413561579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.3413561579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.2858638842 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 7119325037 ps |
| CPU time | 9.96 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:47 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2858638842 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.2858638842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.4149186795 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 19341704372 ps |
| CPU time | 25.22 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:18:03 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4149186795 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.4149186795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.2137994115 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 25516587561 ps |
| CPU time | 33.55 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:18:11 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137994115 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.2137994115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.3810538661 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 151659484 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:38 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810538661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.3810538661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.1239387695 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 146438692 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:38 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239387695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.1239387695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.3820397559 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 328543925 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:39 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3820397559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_data_toggle_clear.3820397559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.733297223 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 1195560089 ps |
| CPU time | 3.01 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:40 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=733297223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.733297223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.2256708597 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 24360467696 ps |
| CPU time | 42.6 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:18:20 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256708597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.2256708597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.3187754338 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 433593443 ps |
| CPU time | 7.02 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:45 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187754338 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.3187754338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.621928782 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 660410732 ps |
| CPU time | 1.89 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:39 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=621928782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_disable_endpoint.621928782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.3066929060 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 143219142 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:38 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066929060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.3066929060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_enable.998710668 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 42132478 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:38 PM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=998710668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_enable.998710668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.1927476080 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 1075128508 ps |
| CPU time | 2.99 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:41 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927476080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.1927476080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.2630893639 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 301638891 ps |
| CPU time | 1.16 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:39 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2630893639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_fifo_levels.2630893639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.3345411128 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 331764239 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:40 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3345411128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_fifo_rst.3345411128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.660331469 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 235247757 ps |
| CPU time | 1.16 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:39 PM UTC 24 |
| Peak memory | 226076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=660331469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.660331469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.2806613435 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 138991963 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:39 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2806613435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_stall.2806613435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.1405223956 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 196959021 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:17:39 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405223956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.1405223956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.1720748129 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 4106745672 ps |
| CPU time | 96.24 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1720748129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.1720748129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.83956817 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 13341730389 ps |
| CPU time | 83.01 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=83956817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.83956817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.1980002048 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 243756162 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980002048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_in_err.1980002048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.864616448 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 6920720144 ps |
| CPU time | 10.49 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:18:01 PM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=864616448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_resume.864616448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.417141936 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 9069770927 ps |
| CPU time | 10.82 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:18:02 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=417141936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_suspend.417141936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.2262649999 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 5175309584 ps |
| CPU time | 126.07 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:19:58 PM UTC 24 |
| Peak memory | 235116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262649999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.2262649999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.1425650336 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 2882763614 ps |
| CPU time | 26.43 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:18:18 PM UTC 24 |
| Peak memory | 228376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1425650336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.1425650336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.1984842103 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 246835631 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984842103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.1984842103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.3355612499 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 197298389 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3355612499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.3355612499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.1761765890 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 3272881238 ps |
| CPU time | 77.43 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:19:09 PM UTC 24 |
| Peak memory | 234924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761765890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.1761765890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.432630266 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 2074553424 ps |
| CPU time | 13.62 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:18:05 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=432630266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.432630266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.43067839 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 156875451 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=43067839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.43067839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.1074541168 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 142868573 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074541168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.1074541168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.3595891467 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 181934938 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595891467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.3595891467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.3210185105 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 158606763 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210185105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.3210185105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.3501596551 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 223537412 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3501596551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_out_trans_nak.3501596551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.1665334490 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 159194917 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1665334490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.1665334490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.1876731523 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 220786483 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1876731523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.1876731523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.777749475 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 145180120 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=777749475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.777749475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.2474860668 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 50085683 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:52 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2474860668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2474860668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.1175521678 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 9288027786 ps |
| CPU time | 22.85 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:18:15 PM UTC 24 |
| Peak memory | 228188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175521678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.1175521678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.3608176096 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 191148974 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608176096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.3608176096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.3921311928 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 238678298 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921311928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.3921311928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.3354929336 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 221551794 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3354929336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_random_length_in_transaction.3354929336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.3577440781 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 159554304 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:17:50 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577440781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.3577440781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.126733609 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 20211502975 ps |
| CPU time | 23.78 seconds |
| Started | Oct 09 09:17:51 PM UTC 24 |
| Finished | Oct 09 09:18:16 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=126733609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_resume_link_active.126733609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.3482382779 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 138242188 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:17:51 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482382779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.3482382779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.386465524 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 266247896 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:17:51 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 215876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=386465524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_rx_full.386465524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.985434361 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 163299359 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:17:51 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=985434361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_setup_stage.985434361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.770874102 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 159783888 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:17:51 PM UTC 24 |
| Finished | Oct 09 09:17:53 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=770874102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 19.usbdev_setup_trans_ignored.770874102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.2618233144 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 245254237 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:07 PM UTC 24 |
| Peak memory | 215448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2618233144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.2618233144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.1663363226 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 2318750080 ps |
| CPU time | 19.85 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:26 PM UTC 24 |
| Peak memory | 228160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663363226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.1663363226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.3753451298 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 194642626 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:07 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753451298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.3753451298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.2926558417 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 166653361 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:07 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926558417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.2926558417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.2207278869 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 535596693 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207278869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.2207278869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.3357577770 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 2574482927 ps |
| CPU time | 62.03 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:19:09 PM UTC 24 |
| Peak memory | 235136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357577770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.3357577770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.758798346 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 1815664745 ps |
| CPU time | 39.14 seconds |
| Started | Oct 09 09:17:36 PM UTC 24 |
| Finished | Oct 09 09:18:17 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=758798346 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.758798346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.842969639 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 311286243 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=842969639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.842969639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.1454142583 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 454417252 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1454142583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.1454142583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.3136574584 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 522701932 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136574584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.3136574584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.1329675225 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 618390467 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:45 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1329675225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_ tx_rx_disruption.1329675225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.3391977847 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 291095664 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391977847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.3391977847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.2609516484 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 604681899 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:45 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2609516484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_ tx_rx_disruption.2609516484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.1042899576 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 316427800 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1042899576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.1042899576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.274904685 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 622705270 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:45 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=274904685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_t x_rx_disruption.274904685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.2771498663 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 438779261 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771498663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.2771498663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.142721995 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 571352092 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:45 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=142721995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_t x_rx_disruption.142721995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.3165068521 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 385128642 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:48:41 PM UTC 24 |
| Finished | Oct 09 09:48:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165068521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.3165068521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.2846720080 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 532415454 ps |
| CPU time | 1.75 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 214288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2846720080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_ tx_rx_disruption.2846720080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.2327769869 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 495368251 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:00 PM UTC 24 |
| Peak memory | 212928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327769869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.2327769869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.4008728226 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 447364130 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:00 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4008728226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.4008728226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.896507384 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 409679236 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:00 PM UTC 24 |
| Peak memory | 215420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=896507384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.896507384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.101168892 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 511453364 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=101168892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_t x_rx_disruption.101168892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.569688994 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 429152527 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:00 PM UTC 24 |
| Peak memory | 213400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=569688994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.569688994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.902798407 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 499281249 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 214432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=902798407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_t x_rx_disruption.902798407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.2173904771 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 363618995 ps |
| CPU time | 1.16 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:00 PM UTC 24 |
| Peak memory | 214688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173904771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.2173904771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.3512601779 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 513903259 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3512601779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.3512601779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.2644692478 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 117258569 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:10:21 PM UTC 24 |
| Finished | Oct 09 09:10:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2644692478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.2644692478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.4256377354 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 14356059817 ps |
| CPU time | 18.12 seconds |
| Started | Oct 09 09:10:03 PM UTC 24 |
| Finished | Oct 09 09:10:23 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256377354 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.4256377354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.4014095536 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 28787002173 ps |
| CPU time | 50.28 seconds |
| Started | Oct 09 09:10:03 PM UTC 24 |
| Finished | Oct 09 09:10:56 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4014095536 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.4014095536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.1947284202 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 176184441 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:10:03 PM UTC 24 |
| Finished | Oct 09 09:10:06 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947284202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.1947284202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.3507870416 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 164018582 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:10:04 PM UTC 24 |
| Finished | Oct 09 09:10:07 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507870416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.3507870416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.4277302526 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 138846939 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:10:04 PM UTC 24 |
| Finished | Oct 09 09:10:07 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277302526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.4277302526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.2111390231 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 157074356 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:10:04 PM UTC 24 |
| Finished | Oct 09 09:10:07 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111390231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.2111390231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.2386993291 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 494236503 ps |
| CPU time | 2.57 seconds |
| Started | Oct 09 09:10:04 PM UTC 24 |
| Finished | Oct 09 09:10:08 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386993291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.2386993291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.3744713157 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 38402823061 ps |
| CPU time | 69.49 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:11:16 PM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744713157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.3744713157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.3243168201 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 4263994357 ps |
| CPU time | 27.1 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:10:34 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243168201 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.3243168201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.1849639105 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 865584058 ps |
| CPU time | 2.26 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:10:09 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1849639105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_disable_endpoint.1849639105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.4279147335 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 161895025 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:10:07 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279147335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.4279147335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_enable.3908677120 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 30958379 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:10:07 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908677120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_enable.3908677120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.2568672904 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 882781894 ps |
| CPU time | 3.01 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:10:09 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2568672904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.2568672904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.3580049662 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 594937742 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:10:08 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580049662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.3580049662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.438668385 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 155840282 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:10:08 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=438668385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_fifo_levels.438668385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.3710120767 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 293915803 ps |
| CPU time | 1.98 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:10:09 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710120767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.3710120767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.4052456499 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 87171780890 ps |
| CPU time | 154.93 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:12:43 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052456499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.4052456499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.3754197516 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 85384769129 ps |
| CPU time | 149.65 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:12:38 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3754197516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_hiclk_max.3754197516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.1679254470 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 116098547842 ps |
| CPU time | 232.62 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:14:02 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1679254470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.1679254470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.823492048 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 119230151447 ps |
| CPU time | 245.57 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:14:15 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=823492048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_loclk_max.823492048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.3158351603 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 119150988824 ps |
| CPU time | 288.16 seconds |
| Started | Oct 09 09:10:06 PM UTC 24 |
| Finished | Oct 09 09:14:59 PM UTC 24 |
| Peak memory | 218456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3158351603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.3158351603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.2886138977 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 167520539 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:10:06 PM UTC 24 |
| Finished | Oct 09 09:10:09 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2886138977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.2886138977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.2039579862 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 213769268 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:10:06 PM UTC 24 |
| Finished | Oct 09 09:10:09 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039579862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.2039579862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.464692383 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 173818893 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:10:06 PM UTC 24 |
| Finished | Oct 09 09:10:09 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=464692383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_in_trans.464692383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.2220621546 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 2651949231 ps |
| CPU time | 22.76 seconds |
| Started | Oct 09 09:10:06 PM UTC 24 |
| Finished | Oct 09 09:10:30 PM UTC 24 |
| Peak memory | 235032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220621546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.2220621546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.1734489834 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 11045904053 ps |
| CPU time | 131.99 seconds |
| Started | Oct 09 09:10:06 PM UTC 24 |
| Finished | Oct 09 09:12:21 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734489834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.1734489834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.1003912077 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 217950884 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:10:08 PM UTC 24 |
| Finished | Oct 09 09:10:10 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003912077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_in_err.1003912077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.2140069987 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 6532349920 ps |
| CPU time | 11.55 seconds |
| Started | Oct 09 09:10:08 PM UTC 24 |
| Finished | Oct 09 09:10:21 PM UTC 24 |
| Peak memory | 228252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140069987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.2140069987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.1800414721 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 4133253992 ps |
| CPU time | 7.3 seconds |
| Started | Oct 09 09:10:09 PM UTC 24 |
| Finished | Oct 09 09:10:17 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800414721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.1800414721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.1244190046 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 3311756372 ps |
| CPU time | 90.06 seconds |
| Started | Oct 09 09:10:09 PM UTC 24 |
| Finished | Oct 09 09:11:41 PM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244190046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.1244190046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.1803229017 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 3397229722 ps |
| CPU time | 28.05 seconds |
| Started | Oct 09 09:10:09 PM UTC 24 |
| Finished | Oct 09 09:10:38 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803229017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.1803229017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.2678646219 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 240063119 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:10:09 PM UTC 24 |
| Finished | Oct 09 09:10:12 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2678646219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.2678646219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.963082928 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 181329425 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:10:09 PM UTC 24 |
| Finished | Oct 09 09:10:11 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=963082928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.963082928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.704116516 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 1993029764 ps |
| CPU time | 51.57 seconds |
| Started | Oct 09 09:10:09 PM UTC 24 |
| Finished | Oct 09 09:11:02 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=704116516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.704116516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.1930006333 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 2548758654 ps |
| CPU time | 24.13 seconds |
| Started | Oct 09 09:10:09 PM UTC 24 |
| Finished | Oct 09 09:10:35 PM UTC 24 |
| Peak memory | 234624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930006333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.1930006333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.1144849578 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 1828379920 ps |
| CPU time | 46.93 seconds |
| Started | Oct 09 09:10:10 PM UTC 24 |
| Finished | Oct 09 09:10:59 PM UTC 24 |
| Peak memory | 234520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144849578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.1144849578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.3197297540 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 153644161 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:10:10 PM UTC 24 |
| Finished | Oct 09 09:10:13 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197297540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.3197297540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.259798617 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 184194896 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:10:10 PM UTC 24 |
| Finished | Oct 09 09:10:13 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259798617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.259798617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.2886468986 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 194556212 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:10:10 PM UTC 24 |
| Finished | Oct 09 09:10:13 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2886468986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.2886468986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.2796203444 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 231744550 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:10:10 PM UTC 24 |
| Finished | Oct 09 09:10:13 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2796203444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.2796203444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.1086804728 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 159585710 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:10:11 PM UTC 24 |
| Finished | Oct 09 09:10:13 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086804728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_out_stall.1086804728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.1758622694 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 221690549 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:10:11 PM UTC 24 |
| Finished | Oct 09 09:10:13 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758622694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_out_trans_nak.1758622694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.1301593499 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 190234171 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:10:11 PM UTC 24 |
| Finished | Oct 09 09:10:13 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301593499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.1301593499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.3519706325 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 205150780 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:10:12 PM UTC 24 |
| Finished | Oct 09 09:10:14 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519706325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.3519706325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.4280430789 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 236129005 ps |
| CPU time | 1.74 seconds |
| Started | Oct 09 09:10:12 PM UTC 24 |
| Finished | Oct 09 09:10:15 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280430789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.4280430789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.1389244924 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 158680535 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:10:12 PM UTC 24 |
| Finished | Oct 09 09:10:15 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389244924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.1389244924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.3613425411 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 31187499 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:10:13 PM UTC 24 |
| Finished | Oct 09 09:10:15 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3613425411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.3613425411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.2854109358 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 12920133557 ps |
| CPU time | 35.09 seconds |
| Started | Oct 09 09:10:13 PM UTC 24 |
| Finished | Oct 09 09:10:50 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854109358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.2854109358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.1450514864 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 180290217 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:10:13 PM UTC 24 |
| Finished | Oct 09 09:10:16 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450514864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.1450514864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.3455210047 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 282303874 ps |
| CPU time | 1.2 seconds |
| Started | Oct 09 09:10:15 PM UTC 24 |
| Finished | Oct 09 09:10:17 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3455210047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.3455210047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.2359465040 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 10371766627 ps |
| CPU time | 189.7 seconds |
| Started | Oct 09 09:10:15 PM UTC 24 |
| Finished | Oct 09 09:13:28 PM UTC 24 |
| Peak memory | 230752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359465040 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.2359465040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.1557952092 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 6008206748 ps |
| CPU time | 56.1 seconds |
| Started | Oct 09 09:10:15 PM UTC 24 |
| Finished | Oct 09 09:11:13 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557952092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.1557952092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.2096343758 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 6402724314 ps |
| CPU time | 85.32 seconds |
| Started | Oct 09 09:10:15 PM UTC 24 |
| Finished | Oct 09 09:11:43 PM UTC 24 |
| Peak memory | 228296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096343758 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.2096343758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.744159323 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 179423899 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:10:15 PM UTC 24 |
| Finished | Oct 09 09:10:18 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744159323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_random_length_in_transaction.744159323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.924515892 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 188378651 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:10:15 PM UTC 24 |
| Finished | Oct 09 09:10:18 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924515892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.924515892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.426082562 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 20154015253 ps |
| CPU time | 33.88 seconds |
| Started | Oct 09 09:10:15 PM UTC 24 |
| Finished | Oct 09 09:10:51 PM UTC 24 |
| Peak memory | 217812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=426082562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_resume_link_active.426082562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.772221091 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 197913090 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:10:15 PM UTC 24 |
| Finished | Oct 09 09:10:18 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=772221091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_rx_crc_err.772221091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.149815905 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 375504885 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:10:15 PM UTC 24 |
| Finished | Oct 09 09:10:18 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=149815905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_rx_full.149815905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.1872234744 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 198661253 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:10:15 PM UTC 24 |
| Finished | Oct 09 09:10:18 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872234744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.1872234744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.2840793617 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 419683376 ps |
| CPU time | 2.27 seconds |
| Started | Oct 09 09:10:21 PM UTC 24 |
| Finished | Oct 09 09:10:35 PM UTC 24 |
| Peak memory | 252204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840793617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.2840793617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.3084613158 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 465045247 ps |
| CPU time | 2.61 seconds |
| Started | Oct 09 09:10:16 PM UTC 24 |
| Finished | Oct 09 09:10:20 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084613158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.3084613158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.3771410435 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 173295286 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:10:17 PM UTC 24 |
| Finished | Oct 09 09:10:19 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3771410435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.3771410435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.911719867 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 159642081 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:10:17 PM UTC 24 |
| Finished | Oct 09 09:10:19 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911719867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_setup_stage.911719867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1441798642 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 152845164 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:10:17 PM UTC 24 |
| Finished | Oct 09 09:10:19 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1441798642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.1441798642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.3393694209 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 236668283 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:10:18 PM UTC 24 |
| Finished | Oct 09 09:10:21 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393694209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.3393694209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.487656953 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 1837749208 ps |
| CPU time | 15.04 seconds |
| Started | Oct 09 09:10:18 PM UTC 24 |
| Finished | Oct 09 09:10:34 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=487656953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.487656953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.874963089 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 150615735 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:10:18 PM UTC 24 |
| Finished | Oct 09 09:10:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=874963089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.874963089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.4281318212 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 185432029 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:10:19 PM UTC 24 |
| Finished | Oct 09 09:10:22 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281318212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.4281318212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.3720236744 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 1121434858 ps |
| CPU time | 3.26 seconds |
| Started | Oct 09 09:10:19 PM UTC 24 |
| Finished | Oct 09 09:10:24 PM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3720236744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.3720236744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.464586521 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 4225297234 ps |
| CPU time | 113.71 seconds |
| Started | Oct 09 09:10:19 PM UTC 24 |
| Finished | Oct 09 09:12:16 PM UTC 24 |
| Peak memory | 227444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=464586521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_streaming_out.464586521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.1238363333 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 10015908048 ps |
| CPU time | 260.92 seconds |
| Started | Oct 09 09:10:19 PM UTC 24 |
| Finished | Oct 09 09:14:45 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238363333 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.1238363333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.969478835 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 3001851360 ps |
| CPU time | 24.13 seconds |
| Started | Oct 09 09:10:05 PM UTC 24 |
| Finished | Oct 09 09:10:30 PM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=969478835 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.969478835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.2049774640 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 631808152 ps |
| CPU time | 2.92 seconds |
| Started | Oct 09 09:10:21 PM UTC 24 |
| Finished | Oct 09 09:10:35 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2049774640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.2049774640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.644836741 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 44144079 ps |
| CPU time | 0.63 seconds |
| Started | Oct 09 09:18:37 PM UTC 24 |
| Finished | Oct 09 09:18:39 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=644836741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.644836741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.3548680311 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 11018695746 ps |
| CPU time | 16.79 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:24 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548680311 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.3548680311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.3245495297 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 19951892911 ps |
| CPU time | 24.81 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:31 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245495297 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.3245495297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.796029197 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 25389222767 ps |
| CPU time | 31.87 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:39 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=796029197 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.796029197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.2990981686 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 214494602 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2990981686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_av_buffer.2990981686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.284433815 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 147363992 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 215324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=284433815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_bitstuff_err.284433815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.2674309395 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 488457234 ps |
| CPU time | 1.86 seconds |
| Started | Oct 09 09:18:05 PM UTC 24 |
| Finished | Oct 09 09:18:09 PM UTC 24 |
| Peak memory | 215456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674309395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.2674309395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.3541615569 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 43051988375 ps |
| CPU time | 76.28 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:19:24 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541615569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.3541615569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.3545202391 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 1400238502 ps |
| CPU time | 28.35 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:36 PM UTC 24 |
| Peak memory | 217564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3545202391 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.3545202391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.4137865905 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 721237567 ps |
| CPU time | 1.95 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:09 PM UTC 24 |
| Peak memory | 215216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4137865905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_disable_endpoint.4137865905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.640096388 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 150902565 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=640096388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_disconnected.640096388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_enable.522027697 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 40966551 ps |
| CPU time | 0.73 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=522027697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_enable.522027697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.3436250943 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 847906374 ps |
| CPU time | 2.55 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:10 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436250943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.3436250943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.2550105904 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 445522049 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:09 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550105904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.2550105904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.619991281 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 180231882 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=619991281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_fifo_levels.619991281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.1576182755 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 475909171 ps |
| CPU time | 2.66 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:10 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1576182755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.1576182755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.2141423005 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 213190855 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2141423005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.2141423005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.805012482 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 155209049 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=805012482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_in_stall.805012482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.1352789762 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 250136855 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1352789762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.1352789762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.1140119177 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 3623451291 ps |
| CPU time | 23.27 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:31 PM UTC 24 |
| Peak memory | 235136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140119177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.1140119177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.881998560 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 4325653049 ps |
| CPU time | 46.39 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:54 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=881998560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.881998560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.1786524930 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 164002907 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:08 PM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786524930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.1786524930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.1143774678 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 13096032571 ps |
| CPU time | 16.02 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:24 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143774678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.1143774678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.754713558 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 3930778165 ps |
| CPU time | 5.48 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:27 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754713558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_suspend.754713558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.1810521630 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 2259510692 ps |
| CPU time | 20.36 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:42 PM UTC 24 |
| Peak memory | 234844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810521630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.1810521630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.4188465197 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 2416856242 ps |
| CPU time | 56.55 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:19:18 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188465197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.4188465197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.2303571758 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 257687169 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:22 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2303571758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.2303571758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.224812002 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 223304529 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:22 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=224812002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.224812002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.3074334895 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 2919760086 ps |
| CPU time | 25.75 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:47 PM UTC 24 |
| Peak memory | 235232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3074334895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.3074334895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.2014440624 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 4247227304 ps |
| CPU time | 36.74 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:58 PM UTC 24 |
| Peak memory | 228588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014440624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.2014440624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.2071300071 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 165682988 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:22 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071300071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.2071300071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.2396374492 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 190180697 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:22 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396374492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.2396374492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.3407413287 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 221542365 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:22 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407413287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.3407413287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.3905880966 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 155389856 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:22 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3905880966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_out_iso.3905880966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.3122022865 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 188468142 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122022865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_out_stall.3122022865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.698814634 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 185846418 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698814634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_out_trans_nak.698814634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.4270398760 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 221322720 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:22 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4270398760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.4270398760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.1379642758 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 199631677 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379642758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.1379642758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.731098346 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 202279435 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=731098346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.731098346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.707292885 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 36665154 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:18:20 PM UTC 24 |
| Finished | Oct 09 09:18:22 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=707292885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_phy_pins_sense.707292885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.711165875 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 15658137165 ps |
| CPU time | 39.71 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:19:02 PM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711165875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_pkt_buffer.711165875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.1727632897 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 180628506 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1727632897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_pkt_received.1727632897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.3685898529 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 170783161 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685898529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.3685898529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.1117897964 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 231105367 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117897964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.1117897964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.2401494591 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 214443785 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2401494591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.2401494591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.3059210784 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 184104206 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059210784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_rx_crc_err.3059210784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.1812779364 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 380089674 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812779364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.1812779364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.3333241021 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 151583258 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333241021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.3333241021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.3679318405 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 158567379 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679318405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.3679318405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.2037588400 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 215325529 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037588400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.2037588400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.1438929526 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 2394469081 ps |
| CPU time | 20.22 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:43 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1438929526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.1438929526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.1245663030 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 159430952 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245663030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.1245663030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.399152578 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 167890798 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:18:23 PM UTC 24 |
| Peak memory | 215092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=399152578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_stall_trans.399152578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.3561777482 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 419838630 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:18:37 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561777482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.3561777482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.2301887606 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 1997144725 ps |
| CPU time | 48.39 seconds |
| Started | Oct 09 09:18:21 PM UTC 24 |
| Finished | Oct 09 09:19:11 PM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301887606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_streaming_out.2301887606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.2671572361 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 441233680 ps |
| CPU time | 7.13 seconds |
| Started | Oct 09 09:18:06 PM UTC 24 |
| Finished | Oct 09 09:18:14 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671572361 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.2671572361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.2813401251 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 586343770 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:18:37 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2813401251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.2813401251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.2909521419 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 427366650 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2909521419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.2909521419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.121801644 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 673334571 ps |
| CPU time | 1.82 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=121801644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_t x_rx_disruption.121801644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.2618283499 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 556211920 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2618283499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.2618283499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.1621664855 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 505417519 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1621664855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.1621664855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.2674372408 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 438594225 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2674372408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.2674372408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.1028464853 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 567102019 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1028464853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.1028464853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.3029064963 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 564481696 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3029064963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.3029064963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.1558022032 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 545872583 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1558022032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.1558022032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.29678397 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 670862486 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 216324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=29678397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_tx _rx_disruption.29678397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.2792292843 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 536618096 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 216576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2792292843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.2792292843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.88380761 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 51263058 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=88380761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.88380761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.1815809892 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 11125943325 ps |
| CPU time | 14.31 seconds |
| Started | Oct 09 09:18:37 PM UTC 24 |
| Finished | Oct 09 09:18:53 PM UTC 24 |
| Peak memory | 217636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815809892 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.1815809892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.3684441311 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 14544642458 ps |
| CPU time | 16.94 seconds |
| Started | Oct 09 09:18:37 PM UTC 24 |
| Finished | Oct 09 09:18:56 PM UTC 24 |
| Peak memory | 228524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684441311 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.3684441311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.1918419092 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 23725353763 ps |
| CPU time | 32.77 seconds |
| Started | Oct 09 09:18:37 PM UTC 24 |
| Finished | Oct 09 09:19:12 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1918419092 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.1918419092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.2417265212 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 178253571 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:18:37 PM UTC 24 |
| Finished | Oct 09 09:18:39 PM UTC 24 |
| Peak memory | 215308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417265212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.2417265212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.2290636503 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 136434072 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:18:37 PM UTC 24 |
| Finished | Oct 09 09:18:39 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290636503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.2290636503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.1942011798 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 253145171 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1942011798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 21.usbdev_data_toggle_clear.1942011798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.1883572848 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 379548491 ps |
| CPU time | 1.28 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1883572848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.1883572848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.2836382612 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 15801312787 ps |
| CPU time | 25.97 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:19:05 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836382612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.2836382612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.1605574261 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 154562275 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605574261 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.1605574261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.2036345412 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 702603378 ps |
| CPU time | 2.06 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:41 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2036345412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.2036345412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.2438305179 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 133881693 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2438305179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.2438305179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_enable.391033789 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 41409277 ps |
| CPU time | 0.73 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=391033789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_enable.391033789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.4215648303 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 836913271 ps |
| CPU time | 2.42 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:42 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4215648303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.4215648303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.435400064 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 510997729 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:41 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=435400064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.435400064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.4207189086 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 249550934 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207189086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_fifo_levels.4207189086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.2896631257 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 348409719 ps |
| CPU time | 2.26 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:42 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896631257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_fifo_rst.2896631257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.1504120574 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 185103735 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1504120574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.1504120574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.191177318 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 179606238 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=191177318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_in_stall.191177318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.3599051244 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 177014340 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599051244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.3599051244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.3771798845 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 3637494362 ps |
| CPU time | 31.55 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:19:11 PM UTC 24 |
| Peak memory | 234844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3771798845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.3771798845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.1310320704 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 5308676814 ps |
| CPU time | 52.99 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:19:33 PM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310320704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.1310320704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.3412997401 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 200354151 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:40 PM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3412997401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_in_err.3412997401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.978547620 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 27026335535 ps |
| CPU time | 34.38 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:19:14 PM UTC 24 |
| Peak memory | 228252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=978547620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_link_resume.978547620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.2228532815 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 10595626649 ps |
| CPU time | 12.97 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:53 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2228532815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_link_suspend.2228532815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.93738713 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 3100559964 ps |
| CPU time | 22.51 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:19:02 PM UTC 24 |
| Peak memory | 234784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=93738713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.93738713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.3338097683 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 3064193724 ps |
| CPU time | 26.53 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:19:07 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3338097683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.3338097683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.1094180175 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 279716893 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:41 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094180175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.1094180175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.383635640 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 214224541 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:41 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383635640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.383635640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.637520844 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 2009912616 ps |
| CPU time | 48 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:19:28 PM UTC 24 |
| Peak memory | 234668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=637520844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.637520844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.3697282003 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 2684789541 ps |
| CPU time | 17.29 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 234932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3697282003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.3697282003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.2532852665 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 166921601 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:56 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2532852665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.2532852665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.1035313290 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 234834099 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:56 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035313290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.1035313290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.824470766 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 161973151 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:56 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=824470766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_out_iso.824470766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.2926740764 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 160666013 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:56 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926740764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_out_stall.2926740764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.2919909005 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 177462737 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:56 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919909005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.2919909005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.2347985955 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 190565641 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:56 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347985955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.2347985955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.2944811410 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 226741632 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2944811410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.2944811410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.2603732517 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 163518127 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:56 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603732517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.2603732517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.345907656 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 62629514 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=345907656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_phy_pins_sense.345907656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.3991697567 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 16458819069 ps |
| CPU time | 40.39 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:19:37 PM UTC 24 |
| Peak memory | 230448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3991697567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_pkt_buffer.3991697567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.1981506988 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 158720120 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981506988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.1981506988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.2543591808 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 209976508 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2543591808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_pkt_sent.2543591808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.1549439027 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 171806797 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1549439027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_random_length_in_transaction.1549439027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.1592220355 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 189494395 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1592220355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.1592220355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.3021780732 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 141997511 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021780732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.3021780732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.1304612904 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 250666207 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304612904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_full.1304612904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.1906511381 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 165548954 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906511381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_setup_stage.1906511381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.3270306342 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 149384671 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270306342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.3270306342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.160693038 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 227290811 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:18:54 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=160693038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.160693038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.16735440 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 1481992404 ps |
| CPU time | 9.76 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:19:06 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=16735440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.16735440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.2650025454 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 165547425 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2650025454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.2650025454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.1141321063 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 167026376 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:18:57 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1141321063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.1141321063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.2667883033 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 1399947188 ps |
| CPU time | 3.22 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:19:00 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667883033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.2667883033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.1211441054 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 3435905227 ps |
| CPU time | 31.22 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:19:28 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211441054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.1211441054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.601108883 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 727506401 ps |
| CPU time | 13.4 seconds |
| Started | Oct 09 09:18:38 PM UTC 24 |
| Finished | Oct 09 09:18:52 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=601108883 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.601108883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.3121073630 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 511770199 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:18:58 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3121073630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_t x_rx_disruption.3121073630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.3357547220 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 467604381 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3357547220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_ tx_rx_disruption.3357547220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.331659419 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 529584894 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=331659419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_t x_rx_disruption.331659419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.2107640891 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 491709394 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2107640891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.2107640891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.2588339042 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 464951510 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2588339042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.2588339042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.3492446110 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 519324566 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3492446110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_ tx_rx_disruption.3492446110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.1339979789 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 594102019 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1339979789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_ tx_rx_disruption.1339979789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.4217054939 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 475371816 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4217054939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.4217054939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.3751221954 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 467413784 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3751221954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_ tx_rx_disruption.3751221954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.3384818791 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 589227198 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3384818791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.3384818791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.2223221443 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 497384485 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2223221443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.2223221443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.2156824738 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 60236370 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156824738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.2156824738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.3379292777 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 9424533231 ps |
| CPU time | 13.47 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:19:10 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379292777 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.3379292777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.198171944 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 20612759818 ps |
| CPU time | 24.7 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:19:22 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=198171944 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.198171944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.3173111123 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 30186988347 ps |
| CPU time | 43.36 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:19:40 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3173111123 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.3173111123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.2234414785 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 162110262 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:18:58 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234414785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.2234414785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.182423676 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 215339562 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:18:55 PM UTC 24 |
| Finished | Oct 09 09:18:58 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=182423676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_bitstuff_err.182423676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.2732145386 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 176416071 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732145386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.2732145386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.3056990126 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 825585869 ps |
| CPU time | 2.17 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:16 PM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3056990126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.3056990126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.2705467753 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 18030071237 ps |
| CPU time | 26.77 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:41 PM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2705467753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_address.2705467753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.3308506848 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 1282713779 ps |
| CPU time | 24.69 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308506848 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.3308506848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.3273130745 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 640478094 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:16 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3273130745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.3273130745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.1535612866 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 139951673 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:14 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535612866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.1535612866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_enable.3529444784 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 38662738 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:14 PM UTC 24 |
| Peak memory | 215344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3529444784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.3529444784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.3329518584 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 993460939 ps |
| CPU time | 2.62 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:16 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329518584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.3329518584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.1576855699 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 467669278 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1576855699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.1576855699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.2695140580 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 238562440 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2695140580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_fifo_levels.2695140580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.3933551730 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 293791475 ps |
| CPU time | 2.75 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:17 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933551730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.3933551730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.2834943964 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 209446503 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2834943964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.2834943964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.1140482878 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 173026087 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140482878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.1140482878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.1278894320 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 230207510 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1278894320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_trans.1278894320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.1920930340 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 3141822580 ps |
| CPU time | 21.34 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:36 PM UTC 24 |
| Peak memory | 235204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920930340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.1920930340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.976977152 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 10694271108 ps |
| CPU time | 65.44 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:20:20 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=976977152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.976977152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.832557572 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 245056179 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:16 PM UTC 24 |
| Peak memory | 215540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832557572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_link_in_err.832557572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.1209491369 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 7474756559 ps |
| CPU time | 12.7 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:27 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209491369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.1209491369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.3669693628 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 9455770531 ps |
| CPU time | 12.03 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:26 PM UTC 24 |
| Peak memory | 217712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3669693628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_link_suspend.3669693628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.1626751919 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 3281198930 ps |
| CPU time | 82.7 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:20:38 PM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626751919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.1626751919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.296999932 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 1932747058 ps |
| CPU time | 16.44 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:31 PM UTC 24 |
| Peak memory | 234768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=296999932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.296999932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.564164827 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 240185987 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=564164827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.564164827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.1589307649 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 190522501 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1589307649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.1589307649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.835579461 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 2151854359 ps |
| CPU time | 51.04 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:20:06 PM UTC 24 |
| Peak memory | 228296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=835579461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.835579461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.2748708130 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 4140764194 ps |
| CPU time | 27.03 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:42 PM UTC 24 |
| Peak memory | 227784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2748708130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.2748708130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.1721481821 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 173963017 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1721481821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.1721481821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.1042018543 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 168868924 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1042018543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.1042018543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.1442706059 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 155533031 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442706059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.1442706059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.146439225 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 142805174 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:16 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=146439225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_out_iso.146439225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.1830341116 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 151619948 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:16 PM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830341116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_out_stall.1830341116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.1910236305 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 152131684 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910236305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.1910236305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.2621269564 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 189226959 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:16 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2621269564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.2621269564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.3848665800 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 252753643 ps |
| CPU time | 1.22 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:16 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848665800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.3848665800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.239177651 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 158432139 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:16 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=239177651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.239177651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.3515402425 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 37272503 ps |
| CPU time | 0.71 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:15 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515402425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.3515402425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.471872825 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 15640289213 ps |
| CPU time | 37.25 seconds |
| Started | Oct 09 09:19:13 PM UTC 24 |
| Finished | Oct 09 09:19:52 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=471872825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_pkt_buffer.471872825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.1669205607 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 145833344 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:19:35 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669205607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_pkt_received.1669205607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.4128551067 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 190565607 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128551067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.4128551067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.3566441233 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 165862660 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566441233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.3566441233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.4241119057 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 177231198 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4241119057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.4241119057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.2833403768 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 175985122 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833403768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_rx_crc_err.2833403768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.3300545842 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 253564207 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3300545842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_rx_full.3300545842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.3042657749 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 161159869 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042657749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.3042657749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.2199515685 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 153571728 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199515685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 22.usbdev_setup_trans_ignored.2199515685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.2638128635 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 229543988 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638128635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.2638128635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.817080701 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 3364006736 ps |
| CPU time | 80.7 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:20:59 PM UTC 24 |
| Peak memory | 230544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=817080701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.817080701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.92943050 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 214722710 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92943050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.92943050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.3361155217 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 173871797 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361155217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.3361155217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.2853960120 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 451000259 ps |
| CPU time | 1.29 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853960120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.2853960120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.560793910 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 2160350844 ps |
| CPU time | 14.57 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:52 PM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=560793910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_streaming_out.560793910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.3120156776 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 2353392664 ps |
| CPU time | 12.91 seconds |
| Started | Oct 09 09:19:12 PM UTC 24 |
| Finished | Oct 09 09:19:27 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3120156776 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.3120156776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.4239783976 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 635385877 ps |
| CPU time | 1.81 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4239783976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.4239783976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.858472490 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 564828990 ps |
| CPU time | 1.8 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=858472490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_t x_rx_disruption.858472490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.3181803980 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 493795728 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3181803980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.3181803980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.2837561915 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 599601598 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2837561915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.2837561915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.3096322396 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 448612124 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3096322396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_ tx_rx_disruption.3096322396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.3034365640 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 475403287 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3034365640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.3034365640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.3383952130 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 576654131 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3383952130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.3383952130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.2396445501 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 484923958 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:49:58 PM UTC 24 |
| Finished | Oct 09 09:50:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2396445501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.2396445501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.906716709 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 583483723 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=906716709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_t x_rx_disruption.906716709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.2286531750 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 600804109 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2286531750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_ tx_rx_disruption.2286531750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.1464357007 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 591901778 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1464357007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.1464357007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.4237284521 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 72308848 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237284521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.4237284521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.4205486184 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 9296520608 ps |
| CPU time | 12.22 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:50 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4205486184 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.4205486184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.3979971998 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 15905996493 ps |
| CPU time | 18.92 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:57 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979971998 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.3979971998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.994304448 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 25875893247 ps |
| CPU time | 34.63 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:20:12 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=994304448 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.994304448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.2620978115 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 143206459 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620978115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_av_buffer.2620978115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.4232265813 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 147197089 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:38 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232265813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_bitstuff_err.4232265813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.822219722 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 579222466 ps |
| CPU time | 1.8 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 215508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=822219722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_data_toggle_clear.822219722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.3641595822 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 881257685 ps |
| CPU time | 2.22 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:40 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641595822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.3641595822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.3329097152 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 47184446037 ps |
| CPU time | 72.67 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:20:51 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329097152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.3329097152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.726446018 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 4275644670 ps |
| CPU time | 31.55 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:20:10 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726446018 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.726446018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.1730868699 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 435622581 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1730868699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_disable_endpoint.1730868699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.844123814 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 143451081 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=844123814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_disconnected.844123814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_enable.2987638750 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 42858935 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987638750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.2987638750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.2919695415 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 964226557 ps |
| CPU time | 2.6 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:41 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919695415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.2919695415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.1886233478 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 443969464 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1886233478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.1886233478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.172248620 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 291670982 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172248620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_fifo_levels.172248620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.1858558839 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 319045280 ps |
| CPU time | 1.84 seconds |
| Started | Oct 09 09:19:37 PM UTC 24 |
| Finished | Oct 09 09:19:40 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858558839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.1858558839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.3055067786 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 193854448 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:19:37 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055067786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.3055067786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.690499027 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 163258148 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:19:37 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690499027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_in_stall.690499027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.1801811934 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 208501242 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:19:37 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801811934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.1801811934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.3634483023 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 4749428535 ps |
| CPU time | 117.23 seconds |
| Started | Oct 09 09:19:37 PM UTC 24 |
| Finished | Oct 09 09:21:36 PM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634483023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.3634483023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.1429232878 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 4771875455 ps |
| CPU time | 26.15 seconds |
| Started | Oct 09 09:19:37 PM UTC 24 |
| Finished | Oct 09 09:20:05 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429232878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.1429232878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.2499620069 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 235128689 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:19:37 PM UTC 24 |
| Finished | Oct 09 09:19:39 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2499620069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.2499620069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.2950800942 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 24262498128 ps |
| CPU time | 40.42 seconds |
| Started | Oct 09 09:19:37 PM UTC 24 |
| Finished | Oct 09 09:20:19 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950800942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_resume.2950800942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.58448089 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 4914847665 ps |
| CPU time | 6.7 seconds |
| Started | Oct 09 09:19:37 PM UTC 24 |
| Finished | Oct 09 09:19:45 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=58448089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_link_suspend.58448089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.510958431 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 5243739707 ps |
| CPU time | 34.5 seconds |
| Started | Oct 09 09:19:37 PM UTC 24 |
| Finished | Oct 09 09:20:13 PM UTC 24 |
| Peak memory | 230580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=510958431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.510958431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.1418366226 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 3204309573 ps |
| CPU time | 27.88 seconds |
| Started | Oct 09 09:20:00 PM UTC 24 |
| Finished | Oct 09 09:20:30 PM UTC 24 |
| Peak memory | 235084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1418366226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.1418366226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.414931294 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 254802430 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:20:00 PM UTC 24 |
| Finished | Oct 09 09:20:02 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=414931294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.414931294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.2939149186 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 214739414 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:20:00 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939149186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.2939149186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.1619880395 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 3067667800 ps |
| CPU time | 27.36 seconds |
| Started | Oct 09 09:20:00 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 230444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619880395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.1619880395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.596070626 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 2070197903 ps |
| CPU time | 18.26 seconds |
| Started | Oct 09 09:20:00 PM UTC 24 |
| Finished | Oct 09 09:20:20 PM UTC 24 |
| Peak memory | 228188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=596070626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.596070626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.3395584508 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 183019632 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:20:00 PM UTC 24 |
| Finished | Oct 09 09:20:02 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395584508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.3395584508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.1962837019 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 205815758 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:20:00 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962837019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.1962837019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.487047699 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 247588330 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:20:00 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487047699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_nak_trans.487047699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.15991251 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 233876612 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:20:00 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=15991251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_iso.15991251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.2796860063 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 163634666 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2796860063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.2796860063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.2055692638 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 147273422 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055692638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_out_trans_nak.2055692638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.2546826896 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 152268497 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2546826896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.2546826896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.79732650 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 218305556 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=79732650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.79732650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.1747860484 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 145917033 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747860484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.1747860484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.2747462185 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 64086161 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2747462185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.2747462185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.1043987213 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 16956228896 ps |
| CPU time | 41.28 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:44 PM UTC 24 |
| Peak memory | 228692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043987213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_pkt_buffer.1043987213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.3906949280 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 189545887 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906949280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_pkt_received.3906949280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.2662279826 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 161748683 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2662279826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.2662279826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.3151960827 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 213123950 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151960827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_random_length_in_transaction.3151960827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.418735190 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 176211653 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=418735190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.418735190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.1443436484 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 164091788 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1443436484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.1443436484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.1179718889 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 252682182 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179718889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_rx_full.1179718889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.3623951811 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 159026549 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3623951811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.3623951811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.234110341 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 160230157 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:03 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=234110341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 23.usbdev_setup_trans_ignored.234110341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.840121493 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 231473966 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:04 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=840121493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.840121493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.1808258104 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 2817690483 ps |
| CPU time | 69.76 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:21:13 PM UTC 24 |
| Peak memory | 230356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808258104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.1808258104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.2992904499 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 180948295 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992904499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.2992904499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.2374357111 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 193173468 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:04 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2374357111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.2374357111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.1019346001 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 1051459369 ps |
| CPU time | 2.45 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:05 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1019346001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.1019346001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.2231530174 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 2724722685 ps |
| CPU time | 62.77 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:21:06 PM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231530174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_streaming_out.2231530174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.3646968868 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 874506166 ps |
| CPU time | 4.7 seconds |
| Started | Oct 09 09:19:36 PM UTC 24 |
| Finished | Oct 09 09:19:43 PM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3646968868 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.3646968868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.197299092 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 479662968 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:04 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=197299092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_tx _rx_disruption.197299092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.2019334333 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 606328092 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2019334333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_ tx_rx_disruption.2019334333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.4151914496 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 498732677 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4151914496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.4151914496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.1867754907 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 567233919 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1867754907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_ tx_rx_disruption.1867754907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.414500178 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 467617217 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=414500178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_t x_rx_disruption.414500178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.2690082894 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 536433328 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2690082894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_ tx_rx_disruption.2690082894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.2814917822 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 591019034 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2814917822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.2814917822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.2725192338 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 488178730 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2725192338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_ tx_rx_disruption.2725192338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.2736152409 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 482000666 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2736152409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.2736152409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.1527058035 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 546784385 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1527058035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.1527058035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.15264278 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 565356630 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=15264278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_tx _rx_disruption.15264278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.2040032146 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 97660597 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:52 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040032146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.2040032146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.331973910 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 4373992111 ps |
| CPU time | 6.28 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:09 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=331973910 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.331973910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.2801793401 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 20876770852 ps |
| CPU time | 24.97 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2801793401 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.2801793401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.3180224656 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 30403275372 ps |
| CPU time | 45.98 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:49 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180224656 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.3180224656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.3772918090 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 162545510 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:04 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772918090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.3772918090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.2017344571 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 212390915 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:20:01 PM UTC 24 |
| Finished | Oct 09 09:20:04 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2017344571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.2017344571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.3211257683 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 153577969 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:20:02 PM UTC 24 |
| Finished | Oct 09 09:20:04 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211257683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 24.usbdev_data_toggle_clear.3211257683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.3511642770 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 419321420 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:20:02 PM UTC 24 |
| Finished | Oct 09 09:20:05 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511642770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.3511642770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.289272282 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 26874634465 ps |
| CPU time | 43.94 seconds |
| Started | Oct 09 09:20:02 PM UTC 24 |
| Finished | Oct 09 09:20:47 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=289272282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_device_address.289272282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.3081862070 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 546912909 ps |
| CPU time | 9.49 seconds |
| Started | Oct 09 09:20:02 PM UTC 24 |
| Finished | Oct 09 09:20:13 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081862070 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.3081862070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.3713625924 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 771839018 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:20:02 PM UTC 24 |
| Finished | Oct 09 09:20:05 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713625924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_disable_endpoint.3713625924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.3956618918 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 164678580 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:20:02 PM UTC 24 |
| Finished | Oct 09 09:20:04 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3956618918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.3956618918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_enable.1110467515 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 54790494 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:20:02 PM UTC 24 |
| Finished | Oct 09 09:20:04 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110467515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.1110467515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.290233688 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 808507581 ps |
| CPU time | 2.06 seconds |
| Started | Oct 09 09:20:25 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=290233688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.290233688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.3591086719 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 152028287 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:20:25 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591086719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.3591086719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.759873951 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 244286613 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:20:25 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759873951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_fifo_levels.759873951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.3953933027 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 319114014 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:20:25 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953933027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.3953933027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.2543927817 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 246156898 ps |
| CPU time | 1.22 seconds |
| Started | Oct 09 09:20:25 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2543927817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.2543927817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.4278469874 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 146355529 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278469874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_stall.4278469874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.4145458071 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 260785739 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4145458071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.4145458071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.3070905474 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 2614252641 ps |
| CPU time | 22.14 seconds |
| Started | Oct 09 09:20:25 PM UTC 24 |
| Finished | Oct 09 09:20:49 PM UTC 24 |
| Peak memory | 235020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070905474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.3070905474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.2971836771 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 4247267260 ps |
| CPU time | 24.81 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:52 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971836771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.2971836771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.231609414 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 190573352 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231609414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_in_err.231609414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.728348216 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 6880311128 ps |
| CPU time | 10.5 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:38 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=728348216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_resume.728348216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.2874610034 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 8533662680 ps |
| CPU time | 11.22 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:38 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2874610034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_link_suspend.2874610034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.3798272609 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 2595105503 ps |
| CPU time | 18.8 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:46 PM UTC 24 |
| Peak memory | 235220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798272609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.3798272609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.2455261188 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 3241170702 ps |
| CPU time | 75.19 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:21:43 PM UTC 24 |
| Peak memory | 228816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455261188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.2455261188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.1729251177 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 235371732 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729251177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.1729251177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.1461187962 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 213699826 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461187962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.1461187962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.1265969736 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 2850921079 ps |
| CPU time | 19.84 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:47 PM UTC 24 |
| Peak memory | 228588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265969736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.1265969736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.1857359780 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 3353961965 ps |
| CPU time | 79.88 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:21:48 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1857359780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.1857359780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.228026355 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 166093529 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=228026355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.228026355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.1800376663 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 206409747 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800376663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.1800376663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.2735362269 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 192787439 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735362269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_out_iso.2735362269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.3621726700 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 178076804 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621726700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.3621726700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.4231827682 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 203375750 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231827682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.4231827682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.3460508003 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 151846581 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460508003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_pending_in_trans.3460508003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.977007091 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 194065143 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=977007091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.977007091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.2043926060 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 143081285 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2043926060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.2043926060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.1862825174 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 38481446 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1862825174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.1862825174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.2218431783 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 12389679119 ps |
| CPU time | 29.4 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:57 PM UTC 24 |
| Peak memory | 228440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218431783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.2218431783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.2058638162 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 184879070 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058638162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_pkt_received.2058638162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.1912405750 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 213173617 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912405750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.1912405750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.2502342150 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 255729364 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502342150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.2502342150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.2932396716 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 156116681 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932396716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.2932396716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.3736749702 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 142566675 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736749702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.3736749702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.788957624 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 315576307 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=788957624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_rx_full.788957624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.3634753210 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 161307537 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634753210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_setup_stage.3634753210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.1814465550 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 162790198 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:20:26 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814465550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.1814465550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.864164621 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 223949626 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:20:27 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=864164621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.864164621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.2017580246 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 1827969015 ps |
| CPU time | 41.35 seconds |
| Started | Oct 09 09:20:27 PM UTC 24 |
| Finished | Oct 09 09:21:10 PM UTC 24 |
| Peak memory | 228204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2017580246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.2017580246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.3943366410 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 197606606 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:20:27 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3943366410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.3943366410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.1834343966 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 175776626 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:20:27 PM UTC 24 |
| Finished | Oct 09 09:20:29 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834343966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.1834343966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.2394574332 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 890548140 ps |
| CPU time | 2.26 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394574332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.2394574332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.3531061048 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 3641101236 ps |
| CPU time | 23.33 seconds |
| Started | Oct 09 09:20:27 PM UTC 24 |
| Finished | Oct 09 09:20:52 PM UTC 24 |
| Peak memory | 228664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3531061048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_streaming_out.3531061048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.3158860597 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 676335559 ps |
| CPU time | 4.64 seconds |
| Started | Oct 09 09:20:02 PM UTC 24 |
| Finished | Oct 09 09:20:08 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3158860597 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.3158860597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.1021111592 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 567748752 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1021111592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.1021111592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.1650691788 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 472258401 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1650691788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.1650691788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.3571387169 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 566950126 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3571387169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_ tx_rx_disruption.3571387169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.1813569312 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 447659941 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1813569312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_ tx_rx_disruption.1813569312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.170421242 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 481819617 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=170421242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_t x_rx_disruption.170421242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.680494998 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 551963850 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=680494998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_t x_rx_disruption.680494998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.2067929484 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 660326255 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:03 PM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2067929484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_ tx_rx_disruption.2067929484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.2278112456 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 623310398 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:03 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2278112456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.2278112456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.1780135185 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 619375523 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1780135185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.1780135185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.2823666514 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 437644720 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2823666514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.2823666514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.424131277 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 618616048 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=424131277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_t x_rx_disruption.424131277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.1483895762 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 35658534 ps |
| CPU time | 0.6 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1483895762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.1483895762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.3476273731 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 11673419696 ps |
| CPU time | 15.86 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:21:07 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476273731 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.3476273731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.3775497057 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 20061571905 ps |
| CPU time | 24.31 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:21:16 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3775497057 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.3775497057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.1297090603 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 23385402559 ps |
| CPU time | 29.8 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:21:21 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297090603 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.1297090603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.2112180138 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 172764849 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:52 PM UTC 24 |
| Peak memory | 215872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2112180138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.2112180138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.2559979955 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 147599476 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:52 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559979955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.2559979955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.3862668062 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 415217350 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862668062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 25.usbdev_data_toggle_clear.3862668062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.2532157851 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 716385846 ps |
| CPU time | 2.09 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:54 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2532157851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.2532157851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.208260361 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 2878479047 ps |
| CPU time | 21.76 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:21:13 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=208260361 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.208260361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.1099454337 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 421402731 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099454337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.1099454337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.1896730228 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 153508363 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896730228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_disconnected.1896730228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_enable.2311159404 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 47161709 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:52 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2311159404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_enable.2311159404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.4085687568 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 912882766 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:54 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085687568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.4085687568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.711145217 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 152304668 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 214940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=711145217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.711145217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.894941280 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 264077806 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=894941280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_fifo_levels.894941280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.380095562 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 320255451 ps |
| CPU time | 2.5 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:54 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=380095562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_fifo_rst.380095562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.1691754149 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 171654417 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1691754149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.1691754149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.3270033619 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 157788140 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270033619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.3270033619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.1645895922 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 172334780 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1645895922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.1645895922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.3051819568 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 2645985446 ps |
| CPU time | 62.73 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:21:55 PM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051819568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.3051819568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.4199793910 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 7313642236 ps |
| CPU time | 46.62 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:21:39 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4199793910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.4199793910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.1537167409 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 226431332 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537167409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.1537167409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.2538258259 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 6068198407 ps |
| CPU time | 9.51 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:21:02 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2538258259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.2538258259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.3923665125 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 4041362194 ps |
| CPU time | 5.89 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:58 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3923665125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.3923665125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.1964874862 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 4304530636 ps |
| CPU time | 38.46 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:21:31 PM UTC 24 |
| Peak memory | 235260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1964874862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.1964874862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.699151819 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 3029684389 ps |
| CPU time | 71.61 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:22:05 PM UTC 24 |
| Peak memory | 228492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=699151819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.699151819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.1374088269 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 290101002 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1374088269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.1374088269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.722925062 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 190639734 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722925062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.722925062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.3976968825 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 2719969066 ps |
| CPU time | 65.08 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:21:58 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976968825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.3976968825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.3494308719 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 156404711 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494308719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.3494308719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.754908365 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 157557875 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754908365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.754908365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.880468490 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 153906228 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=880468490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_out_iso.880468490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.461598083 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 198786320 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:54 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=461598083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_out_stall.461598083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.283590370 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 183473267 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=283590370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_out_trans_nak.283590370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.784471713 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 167946094 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:20:51 PM UTC 24 |
| Finished | Oct 09 09:20:53 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=784471713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pending_in_trans.784471713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.678985140 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 263856435 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=678985140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.678985140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.2320259393 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 157671365 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320259393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.2320259393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.79575222 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 78756789 ps |
| CPU time | 0.72 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=79575222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_phy_pins_sense.79575222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.240297644 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 14550430043 ps |
| CPU time | 36.01 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:54 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=240297644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_pkt_buffer.240297644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.2594507333 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 183146403 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594507333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.2594507333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.3960875538 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 231915181 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960875538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.3960875538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.329901715 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 194930415 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=329901715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_random_length_in_transaction.329901715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.759027668 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 259618026 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759027668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.759027668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.4261671015 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 216855494 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261671015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.4261671015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.3162946434 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 336162609 ps |
| CPU time | 1.2 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162946434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.3162946434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.3533558956 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 149120062 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533558956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.3533558956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.2977418752 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 146873267 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977418752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 25.usbdev_setup_trans_ignored.2977418752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.904189033 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 220493376 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=904189033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.904189033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.2694984124 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 3384082708 ps |
| CPU time | 28.78 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:47 PM UTC 24 |
| Peak memory | 234812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2694984124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.2694984124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.3642267279 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 160760213 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3642267279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.3642267279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.3730883339 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 179468201 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:19 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3730883339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.3730883339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.1617705357 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 466669129 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1617705357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.1617705357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.3616923650 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 2750827919 ps |
| CPU time | 23.71 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:42 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3616923650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_streaming_out.3616923650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.1733184601 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 1339328255 ps |
| CPU time | 24.62 seconds |
| Started | Oct 09 09:20:50 PM UTC 24 |
| Finished | Oct 09 09:21:16 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733184601 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.1733184601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.1603793869 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 475278240 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1603793869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.1603793869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.3596229625 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 592685413 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3596229625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_ tx_rx_disruption.3596229625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.2299095745 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 573812476 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2299095745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.2299095745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.2032908466 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 614363837 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:03 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2032908466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_ tx_rx_disruption.2032908466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.3222160530 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 503140003 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:49:59 PM UTC 24 |
| Finished | Oct 09 09:50:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3222160530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_ tx_rx_disruption.3222160530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.3703875696 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 500397206 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3703875696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_ tx_rx_disruption.3703875696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.4272797619 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 505795353 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4272797619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.4272797619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.3999621549 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 534618582 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 216624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3999621549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_ tx_rx_disruption.3999621549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.928367127 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 668422642 ps |
| CPU time | 1.86 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=928367127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_t x_rx_disruption.928367127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.4134720549 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 473211449 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4134720549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_ tx_rx_disruption.4134720549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.1807104297 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 548247404 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1807104297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_ tx_rx_disruption.1807104297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.1837329219 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 58930849 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1837329219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.1837329219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.3604889230 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 6944211662 ps |
| CPU time | 9.92 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:29 PM UTC 24 |
| Peak memory | 228144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604889230 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.3604889230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.2898851850 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 16211840042 ps |
| CPU time | 17.83 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:37 PM UTC 24 |
| Peak memory | 228252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898851850 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.2898851850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.2270163339 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 30573380753 ps |
| CPU time | 39.51 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:59 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270163339 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.2270163339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.2530076495 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 148258059 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530076495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.2530076495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.2694512517 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 167915822 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2694512517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.2694512517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.362592112 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 403856428 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=362592112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_data_toggle_clear.362592112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.3783219573 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 712391093 ps |
| CPU time | 1.98 seconds |
| Started | Oct 09 09:21:17 PM UTC 24 |
| Finished | Oct 09 09:21:21 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783219573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.3783219573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.1967528632 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 23407532250 ps |
| CPU time | 39.2 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:59 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967528632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.1967528632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.3948876221 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 1143576195 ps |
| CPU time | 21.15 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:40 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948876221 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.3948876221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.2286376523 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 739768092 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:21 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286376523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.2286376523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.1487902457 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 146148971 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487902457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.1487902457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_enable.4098616467 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 41999315 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098616467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.4098616467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.2180430730 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 858172741 ps |
| CPU time | 2.4 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:22 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180430730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.2180430730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.1800699312 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 358492614 ps |
| CPU time | 1.13 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800699312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.1800699312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.543762079 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 586394028 ps |
| CPU time | 3.25 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:23 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=543762079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_fifo_rst.543762079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.773364360 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 217655962 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:21 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=773364360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.773364360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.3061858609 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 143293953 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3061858609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.3061858609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.3285378419 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 184424917 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3285378419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.3285378419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.54350332 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 2655719760 ps |
| CPU time | 21.75 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:41 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=54350332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.54350332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.2907173506 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 12204795813 ps |
| CPU time | 123.37 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:23:24 PM UTC 24 |
| Peak memory | 220756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907173506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.2907173506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.2655309604 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 174965936 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655309604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.2655309604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.286264135 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 30248298459 ps |
| CPU time | 51.75 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:22:36 PM UTC 24 |
| Peak memory | 217620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=286264135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_link_resume.286264135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.951194737 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 5127697571 ps |
| CPU time | 6.44 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:51 PM UTC 24 |
| Peak memory | 217884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=951194737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_suspend.951194737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.2176723671 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 3769708658 ps |
| CPU time | 32.56 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:22:17 PM UTC 24 |
| Peak memory | 234828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2176723671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.2176723671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.3924209903 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 2438809352 ps |
| CPU time | 15.95 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:22:00 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924209903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.3924209903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.683125864 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 307193769 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=683125864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.683125864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.960776203 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 230671153 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=960776203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.960776203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.2111251498 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 2738588828 ps |
| CPU time | 17.49 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:22:02 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111251498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.2111251498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.1221945538 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 152297554 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221945538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.1221945538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.3847516804 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 135535605 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847516804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.3847516804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.422100200 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 169411161 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=422100200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_nak_trans.422100200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.2828280837 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 219572787 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828280837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.2828280837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.253389826 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 175088854 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=253389826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_out_stall.253389826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.3104582317 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 161999809 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104582317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.3104582317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.661149607 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 171927041 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=661149607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pending_in_trans.661149607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.3880146884 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 212661708 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880146884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.3880146884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.981948745 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 145058620 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=981948745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.981948745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.2845076223 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 69919734 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:45 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845076223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.2845076223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.1625003492 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 13705210078 ps |
| CPU time | 31.69 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:22:17 PM UTC 24 |
| Peak memory | 228320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625003492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.1625003492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.3898253610 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 187405509 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898253610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.3898253610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.3036667340 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 290971760 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036667340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.3036667340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.1080046271 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 228147571 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080046271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.1080046271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.2123966248 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 191704206 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123966248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.2123966248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.165736496 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 188561196 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:21:43 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=165736496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_rx_crc_err.165736496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.3632321891 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 307244163 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632321891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.3632321891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.3275796399 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 153468409 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275796399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.3275796399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.3818810887 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 208113862 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818810887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.3818810887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.2611187569 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 184577060 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2611187569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.2611187569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.192127913 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 1919640267 ps |
| CPU time | 45.14 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:22:31 PM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192127913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.192127913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.1612325253 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 163004790 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1612325253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.1612325253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.3259094887 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 159257109 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259094887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.3259094887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.1573261862 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 1292126101 ps |
| CPU time | 2.77 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:48 PM UTC 24 |
| Peak memory | 217744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573261862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.1573261862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.2125240361 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 4032083033 ps |
| CPU time | 95.03 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:23:21 PM UTC 24 |
| Peak memory | 228820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125240361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.2125240361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.173981679 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 303926316 ps |
| CPU time | 3.96 seconds |
| Started | Oct 09 09:21:18 PM UTC 24 |
| Finished | Oct 09 09:21:23 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=173981679 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.173981679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.3574050871 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 541865673 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:47 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3574050871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.3574050871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.2254316675 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 477672553 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2254316675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.2254316675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.1825778688 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 660616431 ps |
| CPU time | 1.96 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1825778688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.1825778688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.4010834617 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 506834190 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 214568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4010834617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.4010834617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.2847238040 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 654438052 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2847238040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_ tx_rx_disruption.2847238040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.3391076149 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 660789765 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3391076149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_ tx_rx_disruption.3391076149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.2216779925 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 583977447 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2216779925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.2216779925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.3458393272 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 455700385 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3458393272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.3458393272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.2922531543 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 517713032 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2922531543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.2922531543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.2610245283 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 530628424 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2610245283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_ tx_rx_disruption.2610245283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.3559312377 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 540634059 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:51:08 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3559312377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.3559312377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.2370231276 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 83231773 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:45 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370231276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.2370231276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.1544744132 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 10206441033 ps |
| CPU time | 13.83 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:59 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544744132 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.1544744132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.3329826215 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 15067392206 ps |
| CPU time | 18.12 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:22:04 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329826215 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.3329826215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.3427627962 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 23582864789 ps |
| CPU time | 31.16 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:22:17 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427627962 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.3427627962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.3381094412 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 154924295 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:47 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381094412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.3381094412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.462316551 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 165673013 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:46 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=462316551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_bitstuff_err.462316551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.1395649813 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 199201667 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:47 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395649813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.1395649813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.3766458886 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 378143907 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:21:44 PM UTC 24 |
| Finished | Oct 09 09:21:47 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3766458886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.3766458886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.476199206 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 37440348442 ps |
| CPU time | 62.04 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:23:16 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476199206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_device_address.476199206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.413600664 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 844850765 ps |
| CPU time | 15.4 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:29 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=413600664 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.413600664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.1301015510 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 534364590 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301015510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.1301015510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.647975700 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 158677592 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:14 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=647975700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_disconnected.647975700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_enable.705984183 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 66267940 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:14 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=705984183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_enable.705984183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.1260661886 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 791501267 ps |
| CPU time | 2.19 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260661886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.1260661886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.2938057276 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 326070934 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938057276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.2938057276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.1288286569 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 252011256 ps |
| CPU time | 1.13 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288286569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_fifo_levels.1288286569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.66259020 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 600905282 ps |
| CPU time | 3.52 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:17 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=66259020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_fifo_rst.66259020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.1013076000 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 161434802 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013076000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.1013076000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.393895330 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 140522900 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=393895330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_in_stall.393895330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.3795232072 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 270593915 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795232072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.3795232072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.3640233351 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 4051948096 ps |
| CPU time | 98.29 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:23:53 PM UTC 24 |
| Peak memory | 234136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3640233351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.3640233351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.1235932203 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 13924987088 ps |
| CPU time | 150.85 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:24:46 PM UTC 24 |
| Peak memory | 220592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1235932203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.1235932203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.3546776243 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 210453468 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546776243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.3546776243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.3789051671 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 23171759502 ps |
| CPU time | 35.81 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:50 PM UTC 24 |
| Peak memory | 228588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3789051671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.3789051671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.478995343 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 8875555138 ps |
| CPU time | 11.78 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:26 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=478995343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_suspend.478995343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.742699284 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 2668786865 ps |
| CPU time | 63.08 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:23:18 PM UTC 24 |
| Peak memory | 230496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=742699284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.742699284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.3557540870 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 2431420247 ps |
| CPU time | 15.55 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:30 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557540870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.3557540870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.3735062145 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 257042556 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735062145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.3735062145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.3628669964 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 253976561 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3628669964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.3628669964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.1165999809 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 2404062668 ps |
| CPU time | 21.66 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:36 PM UTC 24 |
| Peak memory | 234868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165999809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.1165999809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.1677863947 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 172042522 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677863947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.1677863947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.705552504 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 167930340 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=705552504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.705552504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.2126265105 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 207416510 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126265105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.2126265105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.2594704617 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 185808898 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594704617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.2594704617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.2411534292 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 147123257 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411534292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.2411534292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.80023873 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 182944828 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=80023873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_out_trans_nak.80023873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.1270056194 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 150450626 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270056194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.1270056194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.715213347 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 218714072 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=715213347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.715213347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.3968717566 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 169308430 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968717566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.3968717566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.2296790676 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 34379386 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296790676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.2296790676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.1446858449 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 15825143118 ps |
| CPU time | 38.46 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:53 PM UTC 24 |
| Peak memory | 228588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1446858449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.1446858449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.380602472 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 157514364 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:15 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=380602472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_pkt_received.380602472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.629495975 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 211855976 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=629495975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_pkt_sent.629495975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.4007345523 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 258772267 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4007345523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_random_length_in_transaction.4007345523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.1380734407 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 196375165 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1380734407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.1380734407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.4034962109 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 164933970 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034962109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.4034962109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.749735867 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 250401677 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=749735867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_rx_full.749735867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.3193196375 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 144188753 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3193196375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_setup_stage.3193196375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.2386585295 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 151467007 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386585295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.2386585295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.1186953820 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 203119878 ps |
| CPU time | 1.13 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186953820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.1186953820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.950400102 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 2694206484 ps |
| CPU time | 65.38 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:23:21 PM UTC 24 |
| Peak memory | 235060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=950400102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.950400102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.1549731702 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 174807904 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:22:13 PM UTC 24 |
| Finished | Oct 09 09:22:16 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1549731702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.1549731702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.3893839993 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 154829329 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:45 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893839993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.3893839993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.2902405112 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 206215314 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:45 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902405112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.2902405112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.3961417601 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 2428621430 ps |
| CPU time | 15.88 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:23:00 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961417601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.3961417601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.4121148040 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 826108843 ps |
| CPU time | 15.53 seconds |
| Started | Oct 09 09:22:12 PM UTC 24 |
| Finished | Oct 09 09:22:29 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121148040 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.4121148040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.3849580811 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 468166363 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3849580811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.3849580811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.1115360219 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 461924430 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1115360219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.1115360219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.1997412725 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 435727166 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1997412725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.1997412725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.584503268 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 479104211 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=584503268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_t x_rx_disruption.584503268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.3048917474 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 461817866 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:11 PM UTC 24 |
| Peak memory | 215464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3048917474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_ tx_rx_disruption.3048917474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.676287471 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 500319956 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=676287471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_t x_rx_disruption.676287471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.1900492992 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 537934909 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1900492992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_ tx_rx_disruption.1900492992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.3386434771 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 593452387 ps |
| CPU time | 1.85 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3386434771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.3386434771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.1024693330 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 654168880 ps |
| CPU time | 1.76 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1024693330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_ tx_rx_disruption.1024693330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.3276658132 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 604746064 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3276658132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_ tx_rx_disruption.3276658132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.1775186352 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 45639749 ps |
| CPU time | 0.62 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:14 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775186352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.1775186352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.1778460781 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 6081342770 ps |
| CPU time | 8.46 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:53 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778460781 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.1778460781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.1461548839 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 20070209968 ps |
| CPU time | 24.87 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:23:09 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461548839 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.1461548839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.363749001 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 25532086308 ps |
| CPU time | 35.74 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:23:20 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=363749001 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.363749001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.2849894291 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 148539010 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:45 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849894291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_av_buffer.2849894291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.1204459181 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 159389409 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:45 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204459181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.1204459181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.1518078723 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 221425668 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:45 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518078723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.1518078723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.1940321537 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 910712843 ps |
| CPU time | 2.47 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 217856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940321537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.1940321537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.64514563 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 49917929358 ps |
| CPU time | 70.98 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:23:56 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=64514563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_device_address.64514563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.3909681188 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 649127283 ps |
| CPU time | 4.36 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:49 PM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909681188 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.3909681188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.1790443709 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 629213200 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790443709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_disable_endpoint.1790443709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.2740246376 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 136868627 ps |
| CPU time | 0.75 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740246376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.2740246376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_enable.3448935571 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 34475456 ps |
| CPU time | 0.67 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448935571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.3448935571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.4123760902 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 746472049 ps |
| CPU time | 1.99 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123760902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.4123760902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.2633007074 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 162814046 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2633007074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.2633007074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.2736035600 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 184553314 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2736035600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_fifo_levels.2736035600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.3045139596 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 424222701 ps |
| CPU time | 2.56 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:48 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045139596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.3045139596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.2258827032 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 237681967 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258827032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.2258827032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.380597722 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 148098363 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=380597722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_in_stall.380597722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.1681641486 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 217031561 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1681641486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.1681641486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.1974685763 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 3607196233 ps |
| CPU time | 87.98 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974685763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.1974685763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.3550625035 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 7090537962 ps |
| CPU time | 43 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:23:29 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3550625035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.3550625035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.1994262189 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 216093366 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1994262189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.1994262189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.1724190025 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 5849392919 ps |
| CPU time | 8.66 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:54 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724190025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.1724190025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.4161131976 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 5341486723 ps |
| CPU time | 7.28 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:53 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161131976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.4161131976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.3278233836 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 4792146730 ps |
| CPU time | 33.48 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:23:19 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278233836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.3278233836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.3600573549 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 1907645915 ps |
| CPU time | 12.58 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:58 PM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600573549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.3600573549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.2295093801 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 244351712 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295093801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.2295093801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.4104112480 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 183849417 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104112480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.4104112480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.803518146 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 1522386639 ps |
| CPU time | 35.7 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:23:22 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=803518146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.803518146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.2784034651 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 215842090 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2784034651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.2784034651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.1249491874 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 151642363 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249491874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.1249491874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.1836093254 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 241173514 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836093254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.1836093254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.1881463994 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 162274955 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881463994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.1881463994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.1765530541 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 167213842 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1765530541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_out_stall.1765530541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.317968430 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 164113948 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=317968430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_out_trans_nak.317968430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.3243740633 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 158748788 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243740633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.3243740633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.579599560 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 243242438 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579599560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.579599560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.1925251349 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 170288698 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:22:44 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1925251349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.1925251349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.3051858031 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 37338189 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:22:45 PM UTC 24 |
| Finished | Oct 09 09:22:47 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051858031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.3051858031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.2380084055 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 12758540028 ps |
| CPU time | 31.03 seconds |
| Started | Oct 09 09:23:11 PM UTC 24 |
| Finished | Oct 09 09:23:44 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380084055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_pkt_buffer.2380084055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.4258464398 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 152971671 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:23:11 PM UTC 24 |
| Finished | Oct 09 09:23:13 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258464398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_pkt_received.4258464398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.1682608473 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 246795036 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:23:11 PM UTC 24 |
| Finished | Oct 09 09:23:13 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682608473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_pkt_sent.1682608473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.787553226 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 225149709 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:23:11 PM UTC 24 |
| Finished | Oct 09 09:23:13 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=787553226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_random_length_in_transaction.787553226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.2023184071 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 155931197 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:23:11 PM UTC 24 |
| Finished | Oct 09 09:23:13 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2023184071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.2023184071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.2775705862 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 148239482 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:23:11 PM UTC 24 |
| Finished | Oct 09 09:23:13 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2775705862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_rx_crc_err.2775705862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.386833698 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 264355154 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:23:11 PM UTC 24 |
| Finished | Oct 09 09:23:14 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=386833698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_rx_full.386833698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.3687489605 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 158944961 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:14 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687489605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_setup_stage.3687489605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.3507332332 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 152251212 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:14 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507332332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.3507332332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.4287009180 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 240129436 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:14 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287009180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.4287009180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.738534366 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 2725462011 ps |
| CPU time | 64.17 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:24:18 PM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=738534366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.738534366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.1435226951 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 198374882 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:14 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435226951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.1435226951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.3674831554 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 160524171 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:14 PM UTC 24 |
| Peak memory | 215876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674831554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.3674831554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.1615938117 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 892904975 ps |
| CPU time | 2.55 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:16 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615938117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.1615938117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.2772559923 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 2343589675 ps |
| CPU time | 19.7 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:33 PM UTC 24 |
| Peak memory | 235124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2772559923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.2772559923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.1501588246 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 1415369101 ps |
| CPU time | 26.4 seconds |
| Started | Oct 09 09:22:43 PM UTC 24 |
| Finished | Oct 09 09:23:11 PM UTC 24 |
| Peak memory | 217796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501588246 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.1501588246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.3392371382 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 448382293 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:15 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3392371382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.3392371382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.2101255395 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 521314141 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2101255395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.2101255395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.859629876 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 544025184 ps |
| CPU time | 1.81 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=859629876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_t x_rx_disruption.859629876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.2238717362 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 599456843 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2238717362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_ tx_rx_disruption.2238717362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.443353969 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 534761865 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=443353969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_t x_rx_disruption.443353969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.1434264542 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 508520208 ps |
| CPU time | 1.81 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1434264542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_ tx_rx_disruption.1434264542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.341558099 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 570285374 ps |
| CPU time | 1.64 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=341558099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_t x_rx_disruption.341558099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.1240683897 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 451652065 ps |
| CPU time | 1.76 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1240683897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_ tx_rx_disruption.1240683897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.447098408 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 610200316 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=447098408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_t x_rx_disruption.447098408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.265159153 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 584030932 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=265159153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_t x_rx_disruption.265159153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.2941738077 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 647286344 ps |
| CPU time | 1.85 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2941738077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.2941738077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.2661208057 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 40229595 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2661208057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.2661208057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.2723987160 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 5373558104 ps |
| CPU time | 8.07 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:21 PM UTC 24 |
| Peak memory | 228108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723987160 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.2723987160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.3261344414 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 18389670340 ps |
| CPU time | 24.62 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:38 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3261344414 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.3261344414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.3328820440 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 29193808524 ps |
| CPU time | 36.21 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:50 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3328820440 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.3328820440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.1535980455 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 191308071 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:14 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535980455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.1535980455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.3380933588 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 167282467 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:14 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380933588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.3380933588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.2102239754 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 192374408 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:14 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102239754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.2102239754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.1591071491 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 771622141 ps |
| CPU time | 2.31 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:16 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591071491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.1591071491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.760316375 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 19469862593 ps |
| CPU time | 31.44 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:45 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=760316375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_device_address.760316375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.4074837246 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 2936874031 ps |
| CPU time | 16.4 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:30 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074837246 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.4074837246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.2881089373 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 745470491 ps |
| CPU time | 1.93 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:16 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881089373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.2881089373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.2924394456 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 178354366 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:15 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2924394456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.2924394456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_enable.2269883097 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 90322262 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:15 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269883097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_enable.2269883097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.2315458120 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 1004280793 ps |
| CPU time | 2.71 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:17 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315458120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.2315458120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.156468910 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 212188290 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:15 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=156468910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.156468910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.409656795 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 275670633 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:23:13 PM UTC 24 |
| Finished | Oct 09 09:23:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=409656795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_fifo_levels.409656795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.2952812879 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 326165134 ps |
| CPU time | 1.88 seconds |
| Started | Oct 09 09:23:13 PM UTC 24 |
| Finished | Oct 09 09:23:16 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952812879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.2952812879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.1267764966 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 255273987 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:23:13 PM UTC 24 |
| Finished | Oct 09 09:23:15 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267764966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.1267764966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.3816434341 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 148152160 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:23:13 PM UTC 24 |
| Finished | Oct 09 09:23:15 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816434341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.3816434341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.1326824340 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 212846935 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:23:13 PM UTC 24 |
| Finished | Oct 09 09:23:15 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326824340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.1326824340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.4143030310 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 2970631993 ps |
| CPU time | 19.36 seconds |
| Started | Oct 09 09:23:13 PM UTC 24 |
| Finished | Oct 09 09:23:33 PM UTC 24 |
| Peak memory | 230712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4143030310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.4143030310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.3525567040 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 6651549859 ps |
| CPU time | 37.65 seconds |
| Started | Oct 09 09:23:13 PM UTC 24 |
| Finished | Oct 09 09:23:52 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525567040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.3525567040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.1263521185 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 225023382 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:23:13 PM UTC 24 |
| Finished | Oct 09 09:23:15 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263521185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.1263521185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.2582193931 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 27633981289 ps |
| CPU time | 43.84 seconds |
| Started | Oct 09 09:23:13 PM UTC 24 |
| Finished | Oct 09 09:23:58 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582193931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.2582193931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.1302995659 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 10512859845 ps |
| CPU time | 13.37 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:23:53 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302995659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_link_suspend.1302995659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.3333390899 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 2808921885 ps |
| CPU time | 63.84 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:24:44 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333390899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.3333390899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.105272146 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 1675568424 ps |
| CPU time | 10.83 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:23:50 PM UTC 24 |
| Peak memory | 235052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=105272146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.105272146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.4130843024 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 263856836 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:23:40 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4130843024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.4130843024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.870559232 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 190486062 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:23:40 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=870559232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.870559232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.2079528006 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 1948979243 ps |
| CPU time | 44.26 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:24:24 PM UTC 24 |
| Peak memory | 234916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079528006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.2079528006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.2492107394 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 194762530 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:23:40 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2492107394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.2492107394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.2785178657 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 174898335 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:23:40 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785178657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.2785178657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.2931892283 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 202279676 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:23:40 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931892283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_nak_trans.2931892283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.4113828527 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 167851796 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 214728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4113828527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.4113828527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.2138563102 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 240454321 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:23:38 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138563102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_out_stall.2138563102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.2905758785 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 203051941 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905758785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.2905758785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.2985668458 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 171860111 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2985668458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.2985668458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.4132946306 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 243546234 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4132946306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.4132946306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.3772752965 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 155618118 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772752965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.3772752965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.4281572880 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 81375979 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281572880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.4281572880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.2442777095 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 15292336562 ps |
| CPU time | 36.54 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:24:17 PM UTC 24 |
| Peak memory | 228584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442777095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_pkt_buffer.2442777095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.3989535650 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 174755607 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989535650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_pkt_received.3989535650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.3913711765 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 224763662 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3913711765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.3913711765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.3349299388 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 176031296 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349299388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_random_length_in_transaction.3349299388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.2641671105 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 187763943 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641671105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.2641671105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.1092691676 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 148904935 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092691676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.1092691676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.816925727 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 348315451 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=816925727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_rx_full.816925727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.3373241028 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 150611076 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373241028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_setup_stage.3373241028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.4225162819 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 148621717 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4225162819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.4225162819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.1348039926 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 207236612 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348039926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.1348039926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.802548987 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 1923526193 ps |
| CPU time | 16.08 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:57 PM UTC 24 |
| Peak memory | 234868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=802548987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.802548987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.2158262512 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 158690765 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:41 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2158262512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.2158262512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.3532878597 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 192203804 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:42 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532878597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_stall_trans.3532878597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.3758836533 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 900485001 ps |
| CPU time | 2.13 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:43 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758836533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.3758836533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.596502617 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 3095931887 ps |
| CPU time | 73.55 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:24:55 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=596502617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_streaming_out.596502617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.3485939488 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 1071725443 ps |
| CPU time | 7.8 seconds |
| Started | Oct 09 09:23:12 PM UTC 24 |
| Finished | Oct 09 09:23:22 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485939488 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.3485939488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.3329968378 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 507413058 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:42 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3329968378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.3329968378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.4141904086 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 476976738 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4141904086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_ tx_rx_disruption.4141904086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.751131113 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 596575875 ps |
| CPU time | 1.95 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 216044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=751131113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_t x_rx_disruption.751131113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.2439401314 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 539401588 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2439401314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.2439401314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.1846097382 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 574638734 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1846097382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.1846097382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.3374345471 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 616903203 ps |
| CPU time | 1.9 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3374345471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_ tx_rx_disruption.3374345471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.2413384056 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 515872801 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2413384056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_ tx_rx_disruption.2413384056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.1167937095 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 574447555 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1167937095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_ tx_rx_disruption.1167937095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.2729177422 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 446205718 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2729177422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.2729177422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.809631076 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 633009983 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=809631076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_t x_rx_disruption.809631076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.3823555127 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 555420233 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3823555127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_ tx_rx_disruption.3823555127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.3309842647 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 35217832 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:11:01 PM UTC 24 |
| Finished | Oct 09 09:11:03 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3309842647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.3309842647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.4202591336 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 6184087881 ps |
| CPU time | 15.47 seconds |
| Started | Oct 09 09:10:22 PM UTC 24 |
| Finished | Oct 09 09:10:46 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4202591336 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.4202591336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.2431923166 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 14867442093 ps |
| CPU time | 20.58 seconds |
| Started | Oct 09 09:10:22 PM UTC 24 |
| Finished | Oct 09 09:10:51 PM UTC 24 |
| Peak memory | 228524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2431923166 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.2431923166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.4017153713 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 23879519527 ps |
| CPU time | 42.99 seconds |
| Started | Oct 09 09:10:22 PM UTC 24 |
| Finished | Oct 09 09:11:14 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4017153713 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.4017153713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.3477369467 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 205561002 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:10:22 PM UTC 24 |
| Finished | Oct 09 09:10:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477369467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.3477369467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.3932911898 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 160829538 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:10:22 PM UTC 24 |
| Finished | Oct 09 09:10:32 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932911898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.3932911898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.3127437999 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 195837502 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:10:24 PM UTC 24 |
| Finished | Oct 09 09:10:34 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3127437999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_bitstuff_err.3127437999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.1664674997 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 233318616 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:10:24 PM UTC 24 |
| Finished | Oct 09 09:10:27 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664674997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_data_toggle_clear.1664674997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.2056214154 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 1067750442 ps |
| CPU time | 3.28 seconds |
| Started | Oct 09 09:10:25 PM UTC 24 |
| Finished | Oct 09 09:10:36 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056214154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.2056214154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.237335050 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 1953156489 ps |
| CPU time | 12.54 seconds |
| Started | Oct 09 09:10:28 PM UTC 24 |
| Finished | Oct 09 09:10:45 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=237335050 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.237335050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.2994590606 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 655125511 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:10:30 PM UTC 24 |
| Finished | Oct 09 09:10:34 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2994590606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_disable_endpoint.2994590606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.3104233736 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 168886513 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:10:31 PM UTC 24 |
| Finished | Oct 09 09:10:34 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104233736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.3104233736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_enable.2646316657 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 41541240 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:10:31 PM UTC 24 |
| Finished | Oct 09 09:10:34 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2646316657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_enable.2646316657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.2941930269 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 817316798 ps |
| CPU time | 3.36 seconds |
| Started | Oct 09 09:10:31 PM UTC 24 |
| Finished | Oct 09 09:10:36 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941930269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.2941930269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.2236286741 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 402865599 ps |
| CPU time | 4.11 seconds |
| Started | Oct 09 09:10:34 PM UTC 24 |
| Finished | Oct 09 09:10:39 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2236286741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_fifo_rst.2236286741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.108886495 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 83168626168 ps |
| CPU time | 186.81 seconds |
| Started | Oct 09 09:10:34 PM UTC 24 |
| Finished | Oct 09 09:13:44 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=108886495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.108886495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.397530928 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 85400784613 ps |
| CPU time | 142.79 seconds |
| Started | Oct 09 09:10:34 PM UTC 24 |
| Finished | Oct 09 09:12:59 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=397530928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 3.usbdev_freq_hiclk_max.397530928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.2793050884 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 118136043616 ps |
| CPU time | 242.82 seconds |
| Started | Oct 09 09:10:35 PM UTC 24 |
| Finished | Oct 09 09:14:42 PM UTC 24 |
| Peak memory | 218356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2793050884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.2793050884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.630345321 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 104046305527 ps |
| CPU time | 207.77 seconds |
| Started | Oct 09 09:10:35 PM UTC 24 |
| Finished | Oct 09 09:14:06 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=630345321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 3.usbdev_freq_loclk_max.630345321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.1502293968 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 106176279751 ps |
| CPU time | 202.39 seconds |
| Started | Oct 09 09:10:35 PM UTC 24 |
| Finished | Oct 09 09:14:01 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1502293968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.1502293968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.3230163094 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 235827199 ps |
| CPU time | 1.75 seconds |
| Started | Oct 09 09:10:35 PM UTC 24 |
| Finished | Oct 09 09:10:38 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230163094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.3230163094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.1279851778 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 152844000 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:10:35 PM UTC 24 |
| Finished | Oct 09 09:10:38 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279851778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_stall.1279851778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.2824676055 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 170225064 ps |
| CPU time | 1.29 seconds |
| Started | Oct 09 09:10:35 PM UTC 24 |
| Finished | Oct 09 09:10:38 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2824676055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_trans.2824676055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.3632166823 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 3355923550 ps |
| CPU time | 101.05 seconds |
| Started | Oct 09 09:10:35 PM UTC 24 |
| Finished | Oct 09 09:12:19 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632166823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.3632166823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.1226996427 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 10561869461 ps |
| CPU time | 89.85 seconds |
| Started | Oct 09 09:10:37 PM UTC 24 |
| Finished | Oct 09 09:12:08 PM UTC 24 |
| Peak memory | 217580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226996427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.1226996427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1810170458 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 247334808 ps |
| CPU time | 1.84 seconds |
| Started | Oct 09 09:10:37 PM UTC 24 |
| Finished | Oct 09 09:10:40 PM UTC 24 |
| Peak memory | 215452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810170458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.1810170458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.2904465899 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 28343383584 ps |
| CPU time | 56.38 seconds |
| Started | Oct 09 09:10:37 PM UTC 24 |
| Finished | Oct 09 09:11:35 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2904465899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.2904465899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.778949494 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 5644656931 ps |
| CPU time | 15.36 seconds |
| Started | Oct 09 09:10:37 PM UTC 24 |
| Finished | Oct 09 09:10:53 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=778949494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_suspend.778949494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.12084833 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 3544866445 ps |
| CPU time | 38.33 seconds |
| Started | Oct 09 09:10:38 PM UTC 24 |
| Finished | Oct 09 09:11:18 PM UTC 24 |
| Peak memory | 230312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=12084833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.12084833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.2979485486 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 3371861308 ps |
| CPU time | 86.14 seconds |
| Started | Oct 09 09:10:38 PM UTC 24 |
| Finished | Oct 09 09:12:06 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2979485486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.2979485486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.1918674242 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 247370988 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:10:38 PM UTC 24 |
| Finished | Oct 09 09:10:41 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1918674242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.1918674242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.1813428930 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 195952671 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:10:39 PM UTC 24 |
| Finished | Oct 09 09:10:42 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1813428930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.1813428930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.4159652934 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 2894736803 ps |
| CPU time | 31.7 seconds |
| Started | Oct 09 09:10:39 PM UTC 24 |
| Finished | Oct 09 09:11:13 PM UTC 24 |
| Peak memory | 235160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159652934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.4159652934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.1351753350 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 3310938668 ps |
| CPU time | 91.48 seconds |
| Started | Oct 09 09:10:39 PM UTC 24 |
| Finished | Oct 09 09:12:13 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1351753350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.1351753350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.4116255725 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 3356185785 ps |
| CPU time | 34.16 seconds |
| Started | Oct 09 09:10:40 PM UTC 24 |
| Finished | Oct 09 09:11:15 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116255725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.4116255725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.2847110083 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 177893422 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:10:40 PM UTC 24 |
| Finished | Oct 09 09:10:42 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847110083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.2847110083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.3537261531 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 162276011 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:10:41 PM UTC 24 |
| Finished | Oct 09 09:10:43 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537261531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.3537261531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.2973216430 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 219984629 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:10:42 PM UTC 24 |
| Finished | Oct 09 09:10:44 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973216430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.2973216430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.515665506 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 198051861 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:10:43 PM UTC 24 |
| Finished | Oct 09 09:10:45 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=515665506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_out_iso.515665506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.3417125944 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 180256757 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:10:43 PM UTC 24 |
| Finished | Oct 09 09:10:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3417125944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_out_stall.3417125944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.3026675496 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 174279401 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:10:44 PM UTC 24 |
| Finished | Oct 09 09:10:47 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026675496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_out_trans_nak.3026675496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.3802699440 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 162865134 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:10:45 PM UTC 24 |
| Finished | Oct 09 09:10:48 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802699440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_pending_in_trans.3802699440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.3417140940 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 254478283 ps |
| CPU time | 1.81 seconds |
| Started | Oct 09 09:10:46 PM UTC 24 |
| Finished | Oct 09 09:10:49 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3417140940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.3417140940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.3866161541 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 193617324 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:10:46 PM UTC 24 |
| Finished | Oct 09 09:10:49 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3866161541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.3866161541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.429532928 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 161852501 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:10:47 PM UTC 24 |
| Finished | Oct 09 09:10:49 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=429532928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.429532928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.2998872108 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 35577485 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:10:47 PM UTC 24 |
| Finished | Oct 09 09:10:49 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998872108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.2998872108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.2547401608 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 23033753373 ps |
| CPU time | 67.95 seconds |
| Started | Oct 09 09:10:48 PM UTC 24 |
| Finished | Oct 09 09:11:57 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547401608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.2547401608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.2194774637 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 151547672 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:10:48 PM UTC 24 |
| Finished | Oct 09 09:10:50 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2194774637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_pkt_received.2194774637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.100261815 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 180063755 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:10:49 PM UTC 24 |
| Finished | Oct 09 09:10:51 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=100261815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_pkt_sent.100261815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.3154249624 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 5580875917 ps |
| CPU time | 22.35 seconds |
| Started | Oct 09 09:10:50 PM UTC 24 |
| Finished | Oct 09 09:11:14 PM UTC 24 |
| Peak memory | 235136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154249624 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.3154249624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.3730502670 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 8011807001 ps |
| CPU time | 66.56 seconds |
| Started | Oct 09 09:10:50 PM UTC 24 |
| Finished | Oct 09 09:11:59 PM UTC 24 |
| Peak memory | 235076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3730502670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.3730502670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.2531188741 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 6034154010 ps |
| CPU time | 61.75 seconds |
| Started | Oct 09 09:10:52 PM UTC 24 |
| Finished | Oct 09 09:11:56 PM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531188741 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.2531188741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.2833567439 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 176065404 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:10:50 PM UTC 24 |
| Finished | Oct 09 09:10:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833567439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.2833567439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.1332836687 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 185507878 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:10:50 PM UTC 24 |
| Finished | Oct 09 09:10:52 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332836687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.1332836687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.1736719003 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 20167232175 ps |
| CPU time | 40.31 seconds |
| Started | Oct 09 09:10:52 PM UTC 24 |
| Finished | Oct 09 09:11:34 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736719003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.1736719003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.3798579153 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 180487088 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:10:52 PM UTC 24 |
| Finished | Oct 09 09:10:55 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798579153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.3798579153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.3149693431 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 371278445 ps |
| CPU time | 2.24 seconds |
| Started | Oct 09 09:10:52 PM UTC 24 |
| Finished | Oct 09 09:10:56 PM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149693431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_rx_full.3149693431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.1366498041 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 195870226 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:10:52 PM UTC 24 |
| Finished | Oct 09 09:10:55 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366498041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_pid_err.1366498041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.2100535960 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 683390157 ps |
| CPU time | 2.37 seconds |
| Started | Oct 09 09:11:01 PM UTC 24 |
| Finished | Oct 09 09:11:04 PM UTC 24 |
| Peak memory | 252216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100535960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.2100535960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.1996422096 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 455595754 ps |
| CPU time | 2.07 seconds |
| Started | Oct 09 09:10:53 PM UTC 24 |
| Finished | Oct 09 09:10:56 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1996422096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.1996422096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.2701233692 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 171803345 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:10:54 PM UTC 24 |
| Finished | Oct 09 09:10:56 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701233692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.2701233692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.436630269 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 165542973 ps |
| CPU time | 1.2 seconds |
| Started | Oct 09 09:10:54 PM UTC 24 |
| Finished | Oct 09 09:10:56 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=436630269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_setup_stage.436630269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.3457217614 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 186124502 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:10:55 PM UTC 24 |
| Finished | Oct 09 09:10:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457217614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 3.usbdev_setup_trans_ignored.3457217614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.1544513677 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 227923224 ps |
| CPU time | 1.81 seconds |
| Started | Oct 09 09:10:56 PM UTC 24 |
| Finished | Oct 09 09:10:59 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544513677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.1544513677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.3504048776 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 2768073303 ps |
| CPU time | 30.79 seconds |
| Started | Oct 09 09:10:56 PM UTC 24 |
| Finished | Oct 09 09:11:28 PM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3504048776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.3504048776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.2202011196 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 178910444 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:10:57 PM UTC 24 |
| Finished | Oct 09 09:11:00 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2202011196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.2202011196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.3729860725 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 191768986 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:10:57 PM UTC 24 |
| Finished | Oct 09 09:11:00 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729860725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.3729860725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.3007923381 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 1375316261 ps |
| CPU time | 6.06 seconds |
| Started | Oct 09 09:10:57 PM UTC 24 |
| Finished | Oct 09 09:11:05 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007923381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.3007923381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.1082398538 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 2806288219 ps |
| CPU time | 83.56 seconds |
| Started | Oct 09 09:10:57 PM UTC 24 |
| Finished | Oct 09 09:12:23 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1082398538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_streaming_out.1082398538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.1625805 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 4979670788 ps |
| CPU time | 31.44 seconds |
| Started | Oct 09 09:10:28 PM UTC 24 |
| Finished | Oct 09 09:11:02 PM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625805 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.1625805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.2285817209 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 464732032 ps |
| CPU time | 2.7 seconds |
| Started | Oct 09 09:11:00 PM UTC 24 |
| Finished | Oct 09 09:11:03 PM UTC 24 |
| Peak memory | 217820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2285817209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.2285817209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.1886207829 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 62009822 ps |
| CPU time | 0.62 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:48 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1886207829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.1886207829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.1734364121 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 9622197707 ps |
| CPU time | 12.12 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:53 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734364121 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.1734364121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.1882537383 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 15835221821 ps |
| CPU time | 20.48 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:24:01 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882537383 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.1882537383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.3109371823 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 29243064750 ps |
| CPU time | 32.41 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:24:13 PM UTC 24 |
| Peak memory | 217944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109371823 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.3109371823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.109113888 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 188207554 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:42 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=109113888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_av_buffer.109113888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.3809731792 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 146535957 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:23:39 PM UTC 24 |
| Finished | Oct 09 09:23:42 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3809731792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_bitstuff_err.3809731792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.4110375700 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 569463021 ps |
| CPU time | 1.78 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4110375700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.4110375700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.3379426651 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 353672370 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:13 PM UTC 24 |
| Peak memory | 215440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379426651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.3379426651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.937554934 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 29564593861 ps |
| CPU time | 55.44 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:25:08 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=937554934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_device_address.937554934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.260641187 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 967187376 ps |
| CPU time | 19.24 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:31 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=260641187 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.260641187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.3687321664 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 966795642 ps |
| CPU time | 2.35 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687321664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_disable_endpoint.3687321664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.3308629082 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 155187193 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:13 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308629082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.3308629082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_enable.4170922678 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 41928918 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:13 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170922678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.4170922678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.3950056664 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 775389165 ps |
| CPU time | 2.12 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950056664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.3950056664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.3592040913 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 172850937 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:13 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592040913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_fifo_levels.3592040913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.1136691349 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 285420605 ps |
| CPU time | 1.92 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136691349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.1136691349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.4053128945 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 182745144 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053128945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.4053128945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.2590580057 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 179874178 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:13 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590580057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.2590580057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.538754407 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 188106445 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=538754407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_in_trans.538754407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.723650070 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 4314401325 ps |
| CPU time | 28.04 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:41 PM UTC 24 |
| Peak memory | 235068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=723650070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.723650070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.2218355683 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 10384484395 ps |
| CPU time | 64.4 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:25:18 PM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218355683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.2218355683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.3016348078 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 170963668 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3016348078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.3016348078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.1987720605 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 5626156515 ps |
| CPU time | 8.23 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:21 PM UTC 24 |
| Peak memory | 227864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987720605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.1987720605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.3966836462 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 9087364981 ps |
| CPU time | 11.5 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:24 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3966836462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.3966836462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.1227380412 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 2951639083 ps |
| CPU time | 25.78 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:39 PM UTC 24 |
| Peak memory | 230688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227380412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.1227380412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.2573366663 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 1840534152 ps |
| CPU time | 15.87 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:29 PM UTC 24 |
| Peak memory | 228468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573366663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.2573366663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.434345661 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 244158875 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=434345661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.434345661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.253277347 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 198273226 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=253277347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.253277347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.3786920584 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 3169285986 ps |
| CPU time | 28.01 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:41 PM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3786920584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.3786920584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.2811459120 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 157213490 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811459120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.2811459120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.2590310017 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 165872001 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590310017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.2590310017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.3903452919 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 193932041 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903452919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.3903452919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.3589597645 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 190576815 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589597645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_iso.3589597645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.926691444 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 152907882 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=926691444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_out_stall.926691444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.3256270747 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 181757556 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256270747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.3256270747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.520277434 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 183803662 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=520277434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pending_in_trans.520277434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.632573724 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 180903460 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=632573724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.632573724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.3873470233 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 201494156 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873470233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.3873470233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.734929534 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 48709658 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:14 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=734929534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_phy_pins_sense.734929534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.1959270472 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 21150116318 ps |
| CPU time | 52.27 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:25:06 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1959270472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.1959270472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.202815900 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 234140560 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=202815900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_pkt_received.202815900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.1897216886 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 225159430 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897216886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_pkt_sent.1897216886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.3561870996 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 186614692 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 214764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561870996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.3561870996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.1944345293 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 141644661 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944345293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.1944345293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.1492203810 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 185521937 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492203810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_rx_crc_err.1492203810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.2079505837 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 257736699 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079505837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.2079505837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.3867442780 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 147675969 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867442780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.3867442780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.1093259769 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 182388521 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1093259769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.1093259769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.102218067 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 199096403 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=102218067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.102218067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.398260874 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 1656648321 ps |
| CPU time | 14.2 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:28 PM UTC 24 |
| Peak memory | 228508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=398260874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.398260874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.957507085 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 172617996 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:24:12 PM UTC 24 |
| Finished | Oct 09 09:24:15 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=957507085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.957507085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.2031564644 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 193783460 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:24:45 PM UTC 24 |
| Finished | Oct 09 09:24:47 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031564644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.2031564644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.3356412036 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 392984338 ps |
| CPU time | 1.28 seconds |
| Started | Oct 09 09:24:45 PM UTC 24 |
| Finished | Oct 09 09:24:48 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356412036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.3356412036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.4083099617 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 2752431709 ps |
| CPU time | 17.73 seconds |
| Started | Oct 09 09:24:45 PM UTC 24 |
| Finished | Oct 09 09:25:05 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083099617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.4083099617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.2341600280 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 411814449 ps |
| CPU time | 6.87 seconds |
| Started | Oct 09 09:24:11 PM UTC 24 |
| Finished | Oct 09 09:24:19 PM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341600280 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.2341600280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.248361389 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 557104229 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:24:45 PM UTC 24 |
| Finished | Oct 09 09:24:48 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=248361389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_tx _rx_disruption.248361389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.2041478397 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 549227020 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2041478397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.2041478397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.3309454469 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 606051467 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3309454469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.3309454469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.680835737 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 472019290 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:51:09 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=680835737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_t x_rx_disruption.680835737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.3600552513 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 682286269 ps |
| CPU time | 1.9 seconds |
| Started | Oct 09 09:51:10 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3600552513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.3600552513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.1178868556 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 481590091 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:51:10 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1178868556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_ tx_rx_disruption.1178868556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.977071157 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 480211081 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:51:10 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=977071157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_t x_rx_disruption.977071157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.1087179642 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 558394032 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:51:10 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1087179642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.1087179642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.373128397 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 465571304 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:51:10 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=373128397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_t x_rx_disruption.373128397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.2613331929 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 589034072 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:51:10 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2613331929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_ tx_rx_disruption.2613331929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.3483609542 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 622659367 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:51:10 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3483609542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.3483609542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.4135124500 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 62184996 ps |
| CPU time | 0.62 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:23 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135124500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.4135124500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.1062259591 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 7010276564 ps |
| CPU time | 10.19 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:57 PM UTC 24 |
| Peak memory | 228656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1062259591 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.1062259591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.629893395 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 15949736086 ps |
| CPU time | 18.5 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:06 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=629893395 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.629893395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.3772987214 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 25029012426 ps |
| CPU time | 31.44 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:19 PM UTC 24 |
| Peak memory | 228160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772987214 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.3772987214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.2741635535 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 178405865 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:48 PM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741635535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.2741635535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.3947442917 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 157103655 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:48 PM UTC 24 |
| Peak memory | 215412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947442917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_bitstuff_err.3947442917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.2869802057 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 324439202 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:48 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869802057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 31.usbdev_data_toggle_clear.2869802057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.828581902 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 1073085480 ps |
| CPU time | 3.09 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:50 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=828581902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.828581902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.715487882 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 15008066733 ps |
| CPU time | 22.79 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:10 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=715487882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_device_address.715487882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.3134068224 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 5007114764 ps |
| CPU time | 28.26 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:16 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134068224 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.3134068224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.2576409655 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 397810879 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576409655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.2576409655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.374601528 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 194772114 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:48 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=374601528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_disconnected.374601528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_enable.1243305121 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 47480730 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:48 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243305121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.1243305121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.3970875086 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 922289358 ps |
| CPU time | 2.24 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:50 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970875086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.3970875086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_levels.78894224 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 272172770 ps |
| CPU time | 1.2 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=78894224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_fifo_levels.78894224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.483915592 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 453251924 ps |
| CPU time | 2.9 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:51 PM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=483915592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_fifo_rst.483915592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.2106040356 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 186694553 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106040356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.2106040356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.528626580 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 161148246 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528626580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_in_stall.528626580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.362221113 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 207888200 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=362221113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_in_trans.362221113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.2963136635 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 4998239174 ps |
| CPU time | 32.44 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:20 PM UTC 24 |
| Peak memory | 235096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963136635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.2963136635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.246238291 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 5510426127 ps |
| CPU time | 35.98 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=246238291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.246238291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.1230312248 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 225525771 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230312248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.1230312248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.4073097816 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 8466800381 ps |
| CPU time | 12.26 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:00 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4073097816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.4073097816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.3298950061 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 11310900197 ps |
| CPU time | 17.05 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:05 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3298950061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.3298950061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.658113143 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 4572742835 ps |
| CPU time | 31.05 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:19 PM UTC 24 |
| Peak memory | 235000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=658113143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.658113143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.231762185 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 2920220777 ps |
| CPU time | 70.4 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:59 PM UTC 24 |
| Peak memory | 228728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=231762185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.231762185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.688381259 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 247235031 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=688381259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.688381259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.3226672526 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 204182488 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226672526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.3226672526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.1637867480 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 1758550924 ps |
| CPU time | 11.53 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:25:00 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637867480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.1637867480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.914293189 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 164587586 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=914293189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.914293189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.2884647224 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 142588152 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884647224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.2884647224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.2002030638 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 211537736 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002030638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.2002030638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.1946274197 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 166912210 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946274197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.1946274197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.3435740604 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 150711997 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435740604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.3435740604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.2105027079 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 165948513 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2105027079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.2105027079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.2061400842 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 155378448 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061400842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.2061400842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.2560597951 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 230750670 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:50 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2560597951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.2560597951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.3317892227 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 146434960 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3317892227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.3317892227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.139515333 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 81478000 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=139515333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_phy_pins_sense.139515333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.246772268 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 17668461455 ps |
| CPU time | 42.41 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:25:31 PM UTC 24 |
| Peak memory | 232492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=246772268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_pkt_buffer.246772268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.3160036390 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 168418664 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160036390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.3160036390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.3041857978 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 206136640 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:50 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3041857978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.3041857978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.16876724 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 199960000 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:24:47 PM UTC 24 |
| Finished | Oct 09 09:24:49 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=16876724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_random_length_in_transaction.16876724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.421696518 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 173023683 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:25:20 PM UTC 24 |
| Finished | Oct 09 09:25:22 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=421696518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.421696518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.1349480653 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 185586587 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:25:20 PM UTC 24 |
| Finished | Oct 09 09:25:22 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1349480653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.1349480653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.65125088 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 257913298 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:25:20 PM UTC 24 |
| Finished | Oct 09 09:25:23 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=65125088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_rx_full.65125088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.3094068278 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 161258108 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:25:20 PM UTC 24 |
| Finished | Oct 09 09:25:22 PM UTC 24 |
| Peak memory | 215880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094068278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_setup_stage.3094068278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.2696386205 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 154783389 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:25:20 PM UTC 24 |
| Finished | Oct 09 09:25:22 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696386205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.2696386205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.3592043859 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 205100419 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:25:20 PM UTC 24 |
| Finished | Oct 09 09:25:22 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592043859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.3592043859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.1839825294 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 1769383355 ps |
| CPU time | 41.02 seconds |
| Started | Oct 09 09:25:20 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 228212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1839825294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.1839825294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.2422427678 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 167894017 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:25:20 PM UTC 24 |
| Finished | Oct 09 09:25:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422427678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.2422427678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.385663692 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 226562363 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=385663692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_stall_trans.385663692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.1536469757 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 1267721483 ps |
| CPU time | 2.92 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:25 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536469757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.1536469757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.732431813 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 2854780924 ps |
| CPU time | 23.81 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:46 PM UTC 24 |
| Peak memory | 230388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=732431813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_streaming_out.732431813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.3290185579 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 1167719328 ps |
| CPU time | 22.65 seconds |
| Started | Oct 09 09:24:46 PM UTC 24 |
| Finished | Oct 09 09:25:10 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290185579 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.3290185579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.2255400467 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 555876534 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2255400467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.2255400467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.10171889 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 574983148 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:51:10 PM UTC 24 |
| Finished | Oct 09 09:51:13 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=10171889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_tx _rx_disruption.10171889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.3004392571 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 587403745 ps |
| CPU time | 1.78 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3004392571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_ tx_rx_disruption.3004392571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.1324113036 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 461197804 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1324113036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.1324113036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.328481966 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 616850528 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=328481966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_t x_rx_disruption.328481966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.3635158343 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 588209591 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3635158343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_ tx_rx_disruption.3635158343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.1324728351 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 579910602 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1324728351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.1324728351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.3284496138 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 642748301 ps |
| CPU time | 1.74 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 216524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3284496138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_ tx_rx_disruption.3284496138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.2259506938 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 560715579 ps |
| CPU time | 1.64 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 216468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2259506938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_ tx_rx_disruption.2259506938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.4209244698 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 495579527 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4209244698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_ tx_rx_disruption.4209244698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.3023157693 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 743935050 ps |
| CPU time | 1.95 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 214740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3023157693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_ tx_rx_disruption.3023157693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.384058368 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 39209267 ps |
| CPU time | 0.59 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=384058368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.384058368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.2699476986 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 6194795216 ps |
| CPU time | 8.12 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:30 PM UTC 24 |
| Peak memory | 227824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2699476986 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.2699476986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.3113067472 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 13613076181 ps |
| CPU time | 18.42 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:41 PM UTC 24 |
| Peak memory | 228588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113067472 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.3113067472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.19500511 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 30507860938 ps |
| CPU time | 44.15 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:26:07 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=19500511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.19500511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.55767586 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 150468542 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:23 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=55767586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_av_buffer.55767586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.1168896652 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 157798734 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:23 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168896652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_bitstuff_err.1168896652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.1288227723 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 445962550 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 217528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288227723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.1288227723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.948017916 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 537808699 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=948017916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.948017916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.3785122005 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 32972135223 ps |
| CPU time | 52.6 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:26:15 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785122005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.3785122005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.2619592824 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 2931588925 ps |
| CPU time | 22.09 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:45 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2619592824 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.2619592824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.1605794142 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 1268112114 ps |
| CPU time | 2.49 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:25 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605794142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.1605794142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.2585125651 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 160941896 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585125651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.2585125651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_enable.628791401 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 33785919 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=628791401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_enable.628791401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.3031233451 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 846834625 ps |
| CPU time | 2.02 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:25 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3031233451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.3031233451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.3949287465 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 336825372 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949287465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.3949287465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.1507508718 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 156903785 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507508718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_fifo_levels.1507508718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.1390509872 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 361860300 ps |
| CPU time | 2.65 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:26 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390509872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_fifo_rst.1390509872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.1198329007 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 233198113 ps |
| CPU time | 1.29 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198329007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.1198329007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.1438682007 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 156420211 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1438682007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.1438682007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.2270242960 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 233196771 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270242960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_trans.2270242960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.3942376113 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 3847476450 ps |
| CPU time | 31.59 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:55 PM UTC 24 |
| Peak memory | 235072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3942376113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.3942376113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.2527924474 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 4848803451 ps |
| CPU time | 45.6 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:26:09 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2527924474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.2527924474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.3392678172 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 233355245 ps |
| CPU time | 1.13 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392678172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.3392678172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.3791687320 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 26009747962 ps |
| CPU time | 37.06 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:26:00 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3791687320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.3791687320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.3095137529 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 5655388905 ps |
| CPU time | 8.01 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:25:31 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3095137529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.3095137529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.326691553 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 3744834030 ps |
| CPU time | 31.66 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:25:55 PM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=326691553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.326691553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.3171196494 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 3946715334 ps |
| CPU time | 33.69 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:25:57 PM UTC 24 |
| Peak memory | 228376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171196494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.3171196494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.2797811990 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 241679678 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797811990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.2797811990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.3072272871 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 191473530 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072272871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.3072272871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.145036726 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 1994351949 ps |
| CPU time | 16.04 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:25:40 PM UTC 24 |
| Peak memory | 228212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=145036726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.145036726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.2057775919 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 179782337 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057775919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.2057775919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.1904082982 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 167820633 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:25:22 PM UTC 24 |
| Finished | Oct 09 09:25:24 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1904082982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.1904082982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.3343980922 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 166868126 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343980922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.3343980922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.40976749 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 156801771 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40976749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_iso.40976749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.1208701588 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 152205563 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1208701588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_out_stall.1208701588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.3566269240 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 189735311 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566269240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.3566269240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.156740460 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 157401963 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=156740460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pending_in_trans.156740460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.3399642261 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 235346187 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399642261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.3399642261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.1763388124 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 144194538 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763388124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.1763388124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.1610549669 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 66501729 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1610549669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.1610549669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.327898990 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 23003061159 ps |
| CPU time | 54.83 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:58 PM UTC 24 |
| Peak memory | 232632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327898990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_pkt_buffer.327898990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.397455518 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 206321337 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 216056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397455518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_pkt_received.397455518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.3078493567 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 181250495 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3078493567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.3078493567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.586142173 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 246987569 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=586142173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_random_length_in_transaction.586142173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.1854879220 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 172482324 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854879220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.1854879220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.2026659285 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 144435050 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2026659285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_rx_crc_err.2026659285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.3748993923 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 425943481 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:04 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748993923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_rx_full.3748993923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.2175414202 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 153355608 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175414202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_setup_stage.2175414202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.2581584482 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 167154107 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:03 PM UTC 24 |
| Peak memory | 215888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2581584482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.2581584482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.2424559876 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 261287533 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:04 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2424559876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.2424559876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.2932341843 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 2480946690 ps |
| CPU time | 21.14 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:24 PM UTC 24 |
| Peak memory | 234840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932341843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.2932341843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.1825878076 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 191655529 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:04 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1825878076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.1825878076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.156321151 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 168945573 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:04 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=156321151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_stall_trans.156321151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.1709068392 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 631398964 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:05 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709068392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.1709068392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.1310396303 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 2568973696 ps |
| CPU time | 61.68 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:27:05 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310396303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_streaming_out.1310396303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.2597288762 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 3831745389 ps |
| CPU time | 29.31 seconds |
| Started | Oct 09 09:25:21 PM UTC 24 |
| Finished | Oct 09 09:25:52 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597288762 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.2597288762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.634451635 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 524541025 ps |
| CPU time | 1.78 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:05 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=634451635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_tx _rx_disruption.634451635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.3809767984 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 458447432 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3809767984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_ tx_rx_disruption.3809767984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.3177562388 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 587461057 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3177562388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_ tx_rx_disruption.3177562388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.1344466058 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 563343724 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1344466058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_ tx_rx_disruption.1344466058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.3793603151 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 505643471 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3793603151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.3793603151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.4128148730 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 609120419 ps |
| CPU time | 1.74 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4128148730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_ tx_rx_disruption.4128148730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.4175744552 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 431180504 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4175744552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.4175744552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.3539272303 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 590104783 ps |
| CPU time | 1.74 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3539272303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.3539272303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.3622493780 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 558732464 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3622493780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_ tx_rx_disruption.3622493780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.4236111290 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 509939898 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4236111290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.4236111290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.2436186508 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 504716639 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:33 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2436186508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.2436186508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.2888261775 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 36433106 ps |
| CPU time | 0.63 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888261775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.2888261775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.2057278259 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 10572141129 ps |
| CPU time | 13.74 seconds |
| Started | Oct 09 09:26:01 PM UTC 24 |
| Finished | Oct 09 09:26:17 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057278259 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.2057278259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.1297937436 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 14892488972 ps |
| CPU time | 17.3 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:21 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297937436 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.1297937436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.1530420717 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 31257171538 ps |
| CPU time | 35.74 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:39 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530420717 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.1530420717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.1337101967 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 152620955 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:04 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337101967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.1337101967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.1274805674 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 196460163 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:04 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274805674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_bitstuff_err.1274805674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.3680751697 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 466895958 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:05 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3680751697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.3680751697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.1612224923 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 1251634317 ps |
| CPU time | 3.06 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:06 PM UTC 24 |
| Peak memory | 217844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1612224923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.1612224923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.3759914343 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 42898359266 ps |
| CPU time | 74.83 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:27:19 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759914343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.3759914343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.4191556170 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 1064218466 ps |
| CPU time | 7.97 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:11 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4191556170 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.4191556170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.148723545 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 682490796 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:05 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=148723545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_disable_endpoint.148723545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.3648660252 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 162046718 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:04 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648660252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_disconnected.3648660252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_enable.536595613 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 31661750 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=536595613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_enable.536595613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.3308024428 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 1030814537 ps |
| CPU time | 2.74 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:06 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308024428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.3308024428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.3537711475 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 345196157 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:05 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537711475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.3537711475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_levels.849890136 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 328655669 ps |
| CPU time | 1.21 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:05 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=849890136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_fifo_levels.849890136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.3708589453 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 292971777 ps |
| CPU time | 2.12 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:06 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708589453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.3708589453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.4032274232 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 152543164 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:05 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032274232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.4032274232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.4175040529 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 179213497 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:05 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175040529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.4175040529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.1802343158 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 191521584 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:05 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802343158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.1802343158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.1601181620 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 2663820527 ps |
| CPU time | 23.21 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:27 PM UTC 24 |
| Peak memory | 234812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601181620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.1601181620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.1472444457 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 4121146190 ps |
| CPU time | 24.95 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:29 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1472444457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.1472444457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.2148752884 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 193959923 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:05 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148752884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_in_err.2148752884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.3653982016 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 22157419735 ps |
| CPU time | 38.52 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:43 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653982016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_resume.3653982016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.1458356809 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 9497551594 ps |
| CPU time | 11.36 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:15 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458356809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_link_suspend.1458356809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.1096287086 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 3042803533 ps |
| CPU time | 21.03 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:25 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096287086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.1096287086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.928836993 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 2102904905 ps |
| CPU time | 13.58 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:57 PM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=928836993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.928836993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.3263596871 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 242828949 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263596871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.3263596871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.3445774049 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 187245309 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445774049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.3445774049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.1892482539 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 2031596444 ps |
| CPU time | 47.56 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:27:31 PM UTC 24 |
| Peak memory | 235272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1892482539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.1892482539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.3981495196 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 154766740 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981495196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.3981495196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.1241797152 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 143218025 ps |
| CPU time | 0.75 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241797152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.1241797152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.2472785030 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 158242842 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472785030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_nak_trans.2472785030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.3587574355 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 210574896 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587574355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.3587574355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.28440199 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 161851975 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=28440199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_stall.28440199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.563436633 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 180651392 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=563436633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_out_trans_nak.563436633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.2962114782 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 153403577 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2962114782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.2962114782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.3245707088 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 206079640 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245707088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.3245707088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.87127420 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 144623551 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=87127420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.87127420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.195593706 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 35870209 ps |
| CPU time | 0.63 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:44 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=195593706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_phy_pins_sense.195593706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.297096886 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 23229206319 ps |
| CPU time | 55.69 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:27:40 PM UTC 24 |
| Peak memory | 228556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=297096886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_pkt_buffer.297096886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.3638627326 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 202159041 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3638627326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.3638627326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.2470256176 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 173064713 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:26:42 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470256176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.2470256176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.1827802774 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 215000309 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827802774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_random_length_in_transaction.1827802774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.1137083871 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 188448459 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1137083871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.1137083871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.4086009458 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 141690412 ps |
| CPU time | 0.73 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086009458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_rx_crc_err.4086009458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.81963923 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 265144122 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=81963923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_rx_full.81963923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.3850778017 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 226519526 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850778017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.3850778017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.2423436938 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 166033211 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2423436938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.2423436938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.1968936606 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 203820679 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968936606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.1968936606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.2053054933 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 1818335598 ps |
| CPU time | 43.34 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:27:28 PM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2053054933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.2053054933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.2932400256 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 168866567 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932400256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.2932400256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.1315811084 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 184217123 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:45 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315811084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.1315811084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.744435557 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 1353701245 ps |
| CPU time | 2.99 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:48 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744435557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_stream_len_max.744435557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.3574232373 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 3564445923 ps |
| CPU time | 87.58 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:28:13 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574232373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.3574232373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.486385518 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 2524891494 ps |
| CPU time | 18.56 seconds |
| Started | Oct 09 09:26:02 PM UTC 24 |
| Finished | Oct 09 09:26:22 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=486385518 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.486385518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.468802718 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 516529070 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=468802718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_tx _rx_disruption.468802718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.1009366995 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 695935924 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1009366995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.1009366995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.45525284 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 566290907 ps |
| CPU time | 1.76 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=45525284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_tx _rx_disruption.45525284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.4173037108 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 601729860 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4173037108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_ tx_rx_disruption.4173037108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.1679209149 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 482136344 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:52:30 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1679209149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.1679209149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.90071295 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 548955867 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=90071295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_tx _rx_disruption.90071295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.3719299424 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 502156299 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3719299424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.3719299424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.396821924 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 618558919 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=396821924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_t x_rx_disruption.396821924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.2402059202 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 590713364 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2402059202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.2402059202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.2610670802 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 591033038 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2610670802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_ tx_rx_disruption.2610670802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.58504750 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 583675683 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=58504750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_tx _rx_disruption.58504750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.3284883957 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 57907194 ps |
| CPU time | 0.61 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3284883957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.3284883957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.1560815246 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 8764064742 ps |
| CPU time | 11.09 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:56 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1560815246 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.1560815246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.1539244607 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 14028027445 ps |
| CPU time | 16.27 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:27:01 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539244607 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.1539244607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.3207695519 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 31224687810 ps |
| CPU time | 35.97 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:27:21 PM UTC 24 |
| Peak memory | 218356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3207695519 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.3207695519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.3489532442 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 181584566 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489532442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_av_buffer.3489532442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.815464540 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 165936796 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=815464540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_bitstuff_err.815464540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.444360448 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 169047558 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=444360448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_data_toggle_clear.444360448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.2151169554 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 889143950 ps |
| CPU time | 2.41 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:47 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151169554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.2151169554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.1117116316 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 39006766843 ps |
| CPU time | 71.61 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:27:57 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117116316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.1117116316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.657119657 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 954577129 ps |
| CPU time | 19.18 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:27:04 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=657119657 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.657119657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.4114762245 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 1045405083 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:47 PM UTC 24 |
| Peak memory | 217944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4114762245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.4114762245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.3964246607 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 185366042 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3964246607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.3964246607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_enable.315107258 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 36593721 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=315107258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_enable.315107258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.1528205788 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 905596969 ps |
| CPU time | 2.35 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:26:47 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528205788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.1528205788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.2638697258 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 410967826 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:26:44 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638697258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.2638697258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.551103990 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 153764665 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:26:44 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=551103990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_fifo_levels.551103990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.3653492303 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 190756664 ps |
| CPU time | 2.25 seconds |
| Started | Oct 09 09:26:44 PM UTC 24 |
| Finished | Oct 09 09:26:47 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653492303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_fifo_rst.3653492303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.803363336 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 230337740 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:26:44 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 216712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=803363336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.803363336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.3208867489 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 140572229 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:26:44 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3208867489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.3208867489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.3442426448 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 204343672 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:26:44 PM UTC 24 |
| Finished | Oct 09 09:26:46 PM UTC 24 |
| Peak memory | 216696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442426448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_trans.3442426448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.2124746556 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 4816477585 ps |
| CPU time | 41.48 seconds |
| Started | Oct 09 09:26:44 PM UTC 24 |
| Finished | Oct 09 09:27:27 PM UTC 24 |
| Peak memory | 235040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124746556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.2124746556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.630691973 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 3546395248 ps |
| CPU time | 30.97 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:55 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=630691973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.630691973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.3444986701 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 206486192 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:25 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444986701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.3444986701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.3985328961 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 5282794057 ps |
| CPU time | 6.92 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:31 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985328961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.3985328961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.2069926328 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 11134787503 ps |
| CPU time | 12.63 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:37 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069926328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_link_suspend.2069926328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.1805139206 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 2305511262 ps |
| CPU time | 14.65 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:39 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1805139206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.1805139206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.3848681018 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 3432778995 ps |
| CPU time | 21.54 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:46 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848681018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.3848681018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.2949059200 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 240551656 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949059200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.2949059200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.557051838 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 248963575 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=557051838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.557051838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.1921475071 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 2391065031 ps |
| CPU time | 58.26 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:28:23 PM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1921475071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.1921475071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.1632635278 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 166327965 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:25 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632635278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.1632635278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.1768840902 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 156377277 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:25 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768840902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.1768840902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.1429552781 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 191587776 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429552781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_nak_trans.1429552781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.4036458371 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 211657197 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4036458371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.4036458371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.1207432413 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 173686953 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1207432413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.1207432413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.103966681 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 222259909 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=103966681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_out_trans_nak.103966681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.520983460 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 148217236 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=520983460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pending_in_trans.520983460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.753082700 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 261381619 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=753082700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.753082700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.534316421 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 143487313 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:27:23 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=534316421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.534316421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.1123668494 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 57504367 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123668494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.1123668494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.1768473258 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 8218965791 ps |
| CPU time | 20.42 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:46 PM UTC 24 |
| Peak memory | 234888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768473258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.1768473258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.3472225755 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 189408390 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472225755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_pkt_received.3472225755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.2345081352 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 210263307 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2345081352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.2345081352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.3439280051 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 239890721 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439280051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.3439280051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.3253613192 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 197750867 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3253613192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.3253613192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.613908929 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 137161083 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=613908929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_rx_crc_err.613908929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.2026457470 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 257665806 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2026457470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.2026457470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.3249411838 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 152235060 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249411838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_setup_stage.3249411838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.1188243066 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 194315846 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188243066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.1188243066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.3031501102 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 200814974 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3031501102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.3031501102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.3763565625 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 1745782960 ps |
| CPU time | 41.85 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:28:08 PM UTC 24 |
| Peak memory | 227680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763565625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.3763565625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.2403084076 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 199180350 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403084076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.2403084076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.4003386786 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 147352736 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4003386786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.4003386786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.694332837 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 693721244 ps |
| CPU time | 1.86 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:27 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=694332837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_stream_len_max.694332837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.3369655631 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 3328020972 ps |
| CPU time | 27.48 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:53 PM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369655631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.3369655631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.2780212280 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 5670380972 ps |
| CPU time | 41.01 seconds |
| Started | Oct 09 09:26:43 PM UTC 24 |
| Finished | Oct 09 09:27:26 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780212280 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.2780212280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.3283315927 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 555195200 ps |
| CPU time | 1.64 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:27 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3283315927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_t x_rx_disruption.3283315927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.938333561 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 598026233 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=938333561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_t x_rx_disruption.938333561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.2324003450 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 592267048 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2324003450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_ tx_rx_disruption.2324003450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.42869600 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 573338686 ps |
| CPU time | 1.76 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=42869600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_tx _rx_disruption.42869600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.852201006 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 646617639 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=852201006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_t x_rx_disruption.852201006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.3097347351 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 541182245 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3097347351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_ tx_rx_disruption.3097347351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.2526603281 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 447220130 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2526603281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.2526603281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.2333068765 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 454104154 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2333068765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.2333068765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.2662495857 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 524605533 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2662495857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.2662495857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.3686780103 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 560243807 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3686780103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.3686780103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.1216110319 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 622076100 ps |
| CPU time | 1.84 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1216110319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_ tx_rx_disruption.1216110319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.1126187665 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 122612112 ps |
| CPU time | 0.74 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126187665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.1126187665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.1987448284 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 5049681534 ps |
| CPU time | 6.55 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:32 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987448284 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.1987448284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.1346983703 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 20241339617 ps |
| CPU time | 29.3 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:55 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346983703 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.1346983703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.1625868022 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 29248933094 ps |
| CPU time | 37.38 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625868022 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.1625868022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.798064374 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 158236492 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:27 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=798064374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_av_buffer.798064374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.2209835604 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 147045099 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:27 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209835604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.2209835604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.1950679144 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 434929516 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:27 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950679144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.1950679144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.1916604184 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 1280720234 ps |
| CPU time | 3.18 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:29 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1916604184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.1916604184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.431116908 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 43621507310 ps |
| CPU time | 71.72 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:28:38 PM UTC 24 |
| Peak memory | 218516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=431116908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_device_address.431116908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.303043480 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 4316405134 ps |
| CPU time | 32.91 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:59 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=303043480 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.303043480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.430603226 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 705501389 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=430603226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_disable_endpoint.430603226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.573268642 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 149470366 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:27:25 PM UTC 24 |
| Finished | Oct 09 09:27:27 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=573268642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_disconnected.573268642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_enable.2082617704 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 36481870 ps |
| CPU time | 0.63 seconds |
| Started | Oct 09 09:27:25 PM UTC 24 |
| Finished | Oct 09 09:27:27 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2082617704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_enable.2082617704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.3983226303 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 945273415 ps |
| CPU time | 2.57 seconds |
| Started | Oct 09 09:28:00 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3983226303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.3983226303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.3992446839 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 273551524 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:28:00 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992446839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_fifo_levels.3992446839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.885870083 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 530092671 ps |
| CPU time | 2.82 seconds |
| Started | Oct 09 09:28:00 PM UTC 24 |
| Finished | Oct 09 09:28:05 PM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=885870083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_fifo_rst.885870083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.2875504312 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 160090116 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:28:00 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875504312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.2875504312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.4115774547 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 167204809 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4115774547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_stall.4115774547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.3707247449 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 195414866 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707247449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_trans.3707247449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.764483110 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 3721373241 ps |
| CPU time | 31.46 seconds |
| Started | Oct 09 09:28:00 PM UTC 24 |
| Finished | Oct 09 09:28:33 PM UTC 24 |
| Peak memory | 234696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=764483110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.764483110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.3924922366 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 5807499144 ps |
| CPU time | 35.45 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:38 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924922366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.3924922366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.755359651 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 184745838 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=755359651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_link_in_err.755359651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.2409119178 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 28625621297 ps |
| CPU time | 44.17 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:47 PM UTC 24 |
| Peak memory | 218524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409119178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.2409119178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.2174245154 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 10588596858 ps |
| CPU time | 14.14 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:16 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2174245154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.2174245154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.22830016 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 4806399103 ps |
| CPU time | 113.67 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:29:57 PM UTC 24 |
| Peak memory | 230908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=22830016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.22830016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.296628150 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 2520757507 ps |
| CPU time | 60.57 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:29:03 PM UTC 24 |
| Peak memory | 228452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=296628150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.296628150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.1360897171 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 245449200 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1360897171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.1360897171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.224615031 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 207390833 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=224615031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.224615031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.3710447049 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 1741523279 ps |
| CPU time | 41.83 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710447049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.3710447049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.3689078218 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 154866959 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689078218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.3689078218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.551373930 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 152318750 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=551373930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.551373930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.3744398609 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 180556701 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744398609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.3744398609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.659620213 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 180096114 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=659620213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_out_iso.659620213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.2597731103 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 207230819 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597731103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_out_stall.2597731103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.3836305834 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 160781133 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836305834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.3836305834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.954062491 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 188808441 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=954062491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pending_in_trans.954062491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.3924359062 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 224446405 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924359062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.3924359062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.1940951891 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 176218703 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940951891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.1940951891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.3773851624 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 36260652 ps |
| CPU time | 0.63 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:03 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773851624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.3773851624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.3272805001 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 12617119633 ps |
| CPU time | 33.08 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:36 PM UTC 24 |
| Peak memory | 235092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272805001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_pkt_buffer.3272805001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.623863389 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 149635338 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=623863389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_pkt_received.623863389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.3435793440 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 243481982 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435793440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.3435793440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.2611298690 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 172717765 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2611298690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.2611298690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.2238551697 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 218723162 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238551697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.2238551697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.2028655728 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 151874118 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:28:01 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028655728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_rx_crc_err.2028655728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.2376043215 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 418914751 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2376043215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.2376043215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.3779398320 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 188764054 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3779398320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.3779398320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.582317810 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 153204913 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=582317810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 35.usbdev_setup_trans_ignored.582317810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.3822710754 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 218424867 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822710754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.3822710754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.2821599063 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 3165749100 ps |
| CPU time | 75 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:29:19 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2821599063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.2821599063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.2016456843 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 169908210 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016456843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.2016456843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.3771117310 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 166511276 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:04 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3771117310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_stall_trans.3771117310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.2932287738 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 404141658 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:05 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932287738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.2932287738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.2483139046 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 2577717323 ps |
| CPU time | 21.98 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:25 PM UTC 24 |
| Peak memory | 230676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2483139046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_streaming_out.2483139046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.2583461663 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 1918495633 ps |
| CPU time | 11.57 seconds |
| Started | Oct 09 09:27:24 PM UTC 24 |
| Finished | Oct 09 09:27:38 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2583461663 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.2583461663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.2854904189 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 584717729 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:05 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2854904189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_t x_rx_disruption.2854904189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.4169465421 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 523425644 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4169465421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_ tx_rx_disruption.4169465421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.2444600331 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 568039694 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2444600331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_ tx_rx_disruption.2444600331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.1004767029 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 600027253 ps |
| CPU time | 1.9 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1004767029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.1004767029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.3482950615 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 551022323 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3482950615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.3482950615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.3397568306 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 501209911 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3397568306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.3397568306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.2876226809 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 571574228 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2876226809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_ tx_rx_disruption.2876226809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.4034448006 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 557078209 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4034448006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.4034448006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.3412971238 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 479437477 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3412971238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.3412971238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.3191530697 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 506556664 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3191530697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_ tx_rx_disruption.3191530697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.2764614391 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 584904687 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2764614391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_ tx_rx_disruption.2764614391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.3550557620 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 78222311 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:26 PM UTC 24 |
| Peak memory | 215512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3550557620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.3550557620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.393753565 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 9217756882 ps |
| CPU time | 12.7 seconds |
| Started | Oct 09 09:28:02 PM UTC 24 |
| Finished | Oct 09 09:28:16 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=393753565 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.393753565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.1764835648 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 21137878682 ps |
| CPU time | 24.75 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:29:09 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764835648 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.1764835648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.3692150667 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 31341841725 ps |
| CPU time | 40.14 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:29:24 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3692150667 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.3692150667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.1596197806 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 159645740 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1596197806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.1596197806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.4232208153 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 153207778 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232208153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_bitstuff_err.4232208153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.3421446259 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 377253641 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421446259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.3421446259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.4113455701 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 621250463 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4113455701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.4113455701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.1644782271 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 38480867442 ps |
| CPU time | 56.63 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:29:41 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644782271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.1644782271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.3810453285 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 4302587686 ps |
| CPU time | 24.14 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:29:08 PM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810453285 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.3810453285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.764592630 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 678575190 ps |
| CPU time | 1.88 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=764592630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_disable_endpoint.764592630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.2102829074 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 136406993 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102829074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_disconnected.2102829074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_enable.1629753558 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 42251982 ps |
| CPU time | 0.61 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629753558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.1629753558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.354495770 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 879594030 ps |
| CPU time | 2.45 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:47 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354495770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.354495770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.3167726021 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 396081257 ps |
| CPU time | 1.22 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3167726021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.3167726021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.4021510870 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 277370781 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021510870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_fifo_levels.4021510870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.1535705163 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 342816621 ps |
| CPU time | 2.32 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:47 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535705163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.1535705163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.4157115624 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 169637929 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157115624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.4157115624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.3174386020 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 150268040 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174386020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.3174386020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.2371640453 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 217926353 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2371640453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.2371640453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.1507460153 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 4644087543 ps |
| CPU time | 38.63 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:29:23 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507460153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.1507460153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.3683173272 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 8710635635 ps |
| CPU time | 83.39 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:30:09 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683173272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.3683173272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.1452265452 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 175930526 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452265452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.1452265452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.565047139 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 29223310075 ps |
| CPU time | 48.71 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:29:34 PM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=565047139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_link_resume.565047139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.4162596312 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 10981125943 ps |
| CPU time | 14.99 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:29:00 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162596312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.4162596312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.2785574200 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 2988488148 ps |
| CPU time | 26.28 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:29:11 PM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785574200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.2785574200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.2554160961 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 2445340615 ps |
| CPU time | 20.65 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:29:06 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554160961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.2554160961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.465873592 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 236486775 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=465873592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.465873592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.3558011381 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 189712742 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558011381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.3558011381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.934387829 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 3567205825 ps |
| CPU time | 31.04 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:29:16 PM UTC 24 |
| Peak memory | 230388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=934387829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.934387829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.181486500 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 155495443 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=181486500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.181486500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.981948926 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 145301534 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=981948926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.981948926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.3364385453 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 259719474 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364385453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.3364385453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.3588468191 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 171373800 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588468191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.3588468191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.2453082686 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 185813215 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2453082686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_out_stall.2453082686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.2132643194 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 164774175 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132643194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_out_trans_nak.2132643194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.91367524 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 178738751 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=91367524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pending_in_trans.91367524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.2255916154 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 209730045 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2255916154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.2255916154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.2896190836 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 185102515 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896190836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.2896190836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.2812464773 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 80063385 ps |
| CPU time | 0.73 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812464773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.2812464773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.776531530 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 12911418613 ps |
| CPU time | 30.57 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:29:16 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=776531530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_pkt_buffer.776531530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.2839234191 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 193635364 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839234191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.2839234191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.1986054992 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 230386188 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986054992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.1986054992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.17734377 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 189981643 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17734377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_random_length_in_transaction.17734377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.3652675173 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 180388715 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652675173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.3652675173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.1656925429 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 160406577 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656925429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.1656925429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.3409183512 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 384485196 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:47 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409183512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_rx_full.3409183512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.1477051063 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 153178034 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:47 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477051063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.1477051063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.1568811318 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 183390603 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:46 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1568811318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 36.usbdev_setup_trans_ignored.1568811318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.1454061904 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 268361424 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:47 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454061904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.1454061904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.1654188704 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 2630501712 ps |
| CPU time | 16.88 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:29:03 PM UTC 24 |
| Peak memory | 234808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654188704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.1654188704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.4077054723 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 164981544 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:28:44 PM UTC 24 |
| Finished | Oct 09 09:28:47 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4077054723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.4077054723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.2792795836 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 182948661 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:26 PM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2792795836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.2792795836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.1621461655 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 884554484 ps |
| CPU time | 2.28 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621461655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.1621461655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.1394490278 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 3948715159 ps |
| CPU time | 96.44 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:31:03 PM UTC 24 |
| Peak memory | 229624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1394490278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_streaming_out.1394490278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.3666118662 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 149250181 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:28:43 PM UTC 24 |
| Finished | Oct 09 09:28:45 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666118662 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.3666118662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.2668125355 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 526557008 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:27 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2668125355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_t x_rx_disruption.2668125355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.106191178 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 669814763 ps |
| CPU time | 1.98 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=106191178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_t x_rx_disruption.106191178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.3735762978 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 497912623 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3735762978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.3735762978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.3146675685 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 493924499 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3146675685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.3146675685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.3141075515 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 565012659 ps |
| CPU time | 1.89 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3141075515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_ tx_rx_disruption.3141075515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.3303686433 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 466186045 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3303686433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_ tx_rx_disruption.3303686433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.428932013 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 602047403 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=428932013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_t x_rx_disruption.428932013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.2905213611 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 515848491 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2905213611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_ tx_rx_disruption.2905213611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.3654154223 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 571094747 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3654154223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.3654154223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.1130024501 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 490449719 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:52:31 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1130024501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.1130024501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.1846240806 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 489777024 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:52:32 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1846240806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.1846240806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.1159409255 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 43357166 ps |
| CPU time | 0.59 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159409255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.1159409255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.1324870064 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 10154656611 ps |
| CPU time | 15.4 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:41 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1324870064 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.1324870064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.3967295698 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 20039055149 ps |
| CPU time | 26.3 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:52 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3967295698 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.3967295698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.3442441099 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 31207377515 ps |
| CPU time | 39.57 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:30:06 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442441099 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.3442441099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.1511651369 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 167497474 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:27 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511651369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.1511651369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.3678872390 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 153578546 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:27 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678872390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.3678872390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.1381783279 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 217771220 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:27 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381783279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.1381783279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.3178025796 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 1442658349 ps |
| CPU time | 3.49 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:30 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3178025796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.3178025796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.525492293 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 23430533155 ps |
| CPU time | 39.08 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:30:05 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=525492293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_device_address.525492293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.3495983539 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 632843821 ps |
| CPU time | 9.89 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:36 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495983539 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.3495983539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.361971760 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 647070704 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=361971760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disable_endpoint.361971760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.1076701324 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 201891138 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:27 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076701324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.1076701324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_enable.1555976440 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 36155046 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:27 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1555976440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_enable.1555976440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.923979703 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 1024768803 ps |
| CPU time | 2.51 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:29 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=923979703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.923979703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.2867751158 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 256098288 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867751158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.2867751158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.1532512924 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 268223046 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532512924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_fifo_levels.1532512924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.1926461547 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 302768215 ps |
| CPU time | 2.01 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:29 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926461547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.1926461547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.3226058411 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 178753328 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:27 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226058411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.3226058411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.2856116928 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 139708638 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:27 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856116928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.2856116928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.2024924441 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 167739797 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2024924441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.2024924441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.2272541696 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 4166246996 ps |
| CPU time | 103.08 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:31:11 PM UTC 24 |
| Peak memory | 227992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2272541696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.2272541696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.3317897240 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 7220802404 ps |
| CPU time | 78.32 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:30:46 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3317897240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.3317897240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.3601562440 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 243621825 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3601562440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.3601562440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.1394861106 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 25107637002 ps |
| CPU time | 34.65 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:30:02 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1394861106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.1394861106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.1893477765 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 10723086605 ps |
| CPU time | 14.93 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:42 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893477765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_link_suspend.1893477765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.790783075 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 3558305255 ps |
| CPU time | 81.05 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:30:49 PM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=790783075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.790783075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.3924244408 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 2806765536 ps |
| CPU time | 23.69 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:51 PM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924244408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.3924244408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.1954350724 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 244163079 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954350724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.1954350724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.1063710797 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 227974318 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1063710797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.1063710797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.464647484 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 2651138373 ps |
| CPU time | 64.45 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:30:32 PM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=464647484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.464647484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.3259536607 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 166671623 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259536607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.3259536607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.3237256613 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 156051211 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3237256613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.3237256613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.2593272747 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 246043892 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593272747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.2593272747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.1185832100 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 204319994 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1185832100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.1185832100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.1806320806 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 170198881 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806320806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_out_stall.1806320806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.75132679 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 194413916 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=75132679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_out_trans_nak.75132679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.1530671697 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 150032535 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530671697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_pending_in_trans.1530671697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.3364573285 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 199050693 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364573285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.3364573285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.481154692 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 147954461 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=481154692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.481154692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.3167404802 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 41020818 ps |
| CPU time | 0.67 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3167404802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.3167404802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.291939223 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 8130915483 ps |
| CPU time | 20.55 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:48 PM UTC 24 |
| Peak memory | 232540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=291939223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_pkt_buffer.291939223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.733116769 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 199324048 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:29:25 PM UTC 24 |
| Finished | Oct 09 09:29:28 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=733116769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_pkt_received.733116769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.4226019671 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 187392919 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:30:04 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226019671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.4226019671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.721935747 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 238296975 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:30:04 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=721935747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_random_length_in_transaction.721935747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.2601069692 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 172710260 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601069692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.2601069692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.3123209032 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 153739318 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3123209032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.3123209032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.3186372008 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 254802396 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186372008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.3186372008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.2882864594 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 175569018 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2882864594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.2882864594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.765866515 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 152553129 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=765866515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 37.usbdev_setup_trans_ignored.765866515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.3575123539 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 221085952 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575123539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.3575123539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.2850729501 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 2349830126 ps |
| CPU time | 16.52 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:23 PM UTC 24 |
| Peak memory | 230452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850729501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.2850729501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.1395966590 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 174512497 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395966590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.1395966590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.1795378481 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 171511464 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1795378481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.1795378481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.157365692 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 456512767 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157365692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_stream_len_max.157365692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.523493591 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 3634546869 ps |
| CPU time | 85.25 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:31:32 PM UTC 24 |
| Peak memory | 228428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=523493591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_streaming_out.523493591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.425836940 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 3732680078 ps |
| CPU time | 22.08 seconds |
| Started | Oct 09 09:29:24 PM UTC 24 |
| Finished | Oct 09 09:29:48 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=425836940 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.425836940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.3733641383 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 496573354 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3733641383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_t x_rx_disruption.3733641383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.102922364 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 574212665 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:52:32 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=102922364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_t x_rx_disruption.102922364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.3738388312 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 451372784 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:52:32 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3738388312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_ tx_rx_disruption.3738388312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.481167016 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 537802941 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:52:32 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=481167016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_t x_rx_disruption.481167016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.463336298 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 505825679 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:52:32 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=463336298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_t x_rx_disruption.463336298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.2585142683 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 655100314 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:52:32 PM UTC 24 |
| Finished | Oct 09 09:52:35 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2585142683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.2585142683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.2161184654 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 530707315 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2161184654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_ tx_rx_disruption.2161184654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.458378595 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 536909982 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=458378595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_t x_rx_disruption.458378595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.2448224565 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 584529559 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2448224565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.2448224565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.689347265 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 521017525 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=689347265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_t x_rx_disruption.689347265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.1118136008 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 548131843 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1118136008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_ tx_rx_disruption.1118136008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.1810788310 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 45209032 ps |
| CPU time | 0.64 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:51 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810788310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.1810788310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.745139695 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 9214824022 ps |
| CPU time | 11.06 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:17 PM UTC 24 |
| Peak memory | 218192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=745139695 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.745139695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.2056677755 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 15393747908 ps |
| CPU time | 18.37 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:25 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056677755 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.2056677755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.2335426325 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 24180060448 ps |
| CPU time | 30.56 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:37 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335426325 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.2335426325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.516346195 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 228890530 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=516346195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_av_buffer.516346195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.653285644 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 176337858 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:07 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=653285644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_bitstuff_err.653285644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.2329173752 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 375247011 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329173752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.2329173752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.2762875544 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 935606026 ps |
| CPU time | 2.63 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:09 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2762875544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.2762875544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.1288014582 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 21127087885 ps |
| CPU time | 34.39 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:41 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288014582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.1288014582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.1047525064 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 3387044086 ps |
| CPU time | 25.3 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:32 PM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047525064 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.1047525064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.2123880531 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 947200080 ps |
| CPU time | 2.03 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:09 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123880531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.2123880531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.1991878962 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 140040827 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991878962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.1991878962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_enable.1552748683 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 47370150 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1552748683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.1552748683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.2992811106 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 850631868 ps |
| CPU time | 2.16 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:09 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992811106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.2992811106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.4249626355 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 214199443 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249626355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.4249626355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.2262604015 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 272259916 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262604015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_fifo_levels.2262604015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.845316701 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 434413537 ps |
| CPU time | 2.65 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:10 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=845316701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_fifo_rst.845316701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.3609239525 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 181590865 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609239525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.3609239525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.1094284041 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 134247780 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094284041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.1094284041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.813766364 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 218814637 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=813766364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_in_trans.813766364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.840208882 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 3718470090 ps |
| CPU time | 32.91 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:40 PM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=840208882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.840208882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.1625350615 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 9486583314 ps |
| CPU time | 60.48 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:31:08 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625350615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.1625350615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.2971655119 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 254543606 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971655119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_in_err.2971655119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.2906780065 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 33095319612 ps |
| CPU time | 53.29 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:31:01 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2906780065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.2906780065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.2448951108 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 8545153300 ps |
| CPU time | 10.33 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:18 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448951108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.2448951108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.3016199476 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 2963231071 ps |
| CPU time | 71.8 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:31:19 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3016199476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.3016199476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.3017870378 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 3585229620 ps |
| CPU time | 24.1 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:32 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017870378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.3017870378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.3453536622 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 261218531 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453536622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.3453536622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.2166696049 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 198658182 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166696049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.2166696049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.1069546810 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 4040817677 ps |
| CPU time | 35.32 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:43 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1069546810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.1069546810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.2933472722 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 160213498 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933472722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.2933472722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.653298747 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 149777616 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:30:06 PM UTC 24 |
| Finished | Oct 09 09:30:08 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=653298747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.653298747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.1358712443 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 219923101 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:30:47 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 215356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358712443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_nak_trans.1358712443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.742075534 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 149545412 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:30:47 PM UTC 24 |
| Finished | Oct 09 09:30:49 PM UTC 24 |
| Peak memory | 215540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=742075534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_out_iso.742075534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.2548129537 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 168121046 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:30:47 PM UTC 24 |
| Finished | Oct 09 09:30:49 PM UTC 24 |
| Peak memory | 215548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548129537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.2548129537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.656075155 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 191081312 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:30:47 PM UTC 24 |
| Finished | Oct 09 09:30:49 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=656075155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_out_trans_nak.656075155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.2992054144 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 150110280 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:30:47 PM UTC 24 |
| Finished | Oct 09 09:30:49 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992054144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.2992054144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.2778802890 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 229976313 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:30:47 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778802890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.2778802890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.3887992214 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 161158744 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:30:47 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3887992214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.3887992214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.401855455 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 65574759 ps |
| CPU time | 0.67 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:49 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=401855455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_phy_pins_sense.401855455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.3422490209 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 18836240316 ps |
| CPU time | 43.92 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:31:33 PM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422490209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.3422490209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.3981498593 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 179361092 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 215348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981498593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.3981498593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.756558902 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 293329769 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 216796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=756558902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_pkt_sent.756558902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.2198091181 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 200586299 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198091181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_random_length_in_transaction.2198091181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.1792242616 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 188297617 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792242616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.1792242616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.56477575 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 146033813 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=56477575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_rx_crc_err.56477575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.805802270 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 374037725 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=805802270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_rx_full.805802270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.22797232 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 162945953 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=22797232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_setup_stage.22797232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.339551415 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 166748415 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=339551415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 38.usbdev_setup_trans_ignored.339551415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.2541005032 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 258816040 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:50 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541005032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.2541005032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.3089932130 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 2672702158 ps |
| CPU time | 18.04 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:31:08 PM UTC 24 |
| Peak memory | 234856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089932130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.3089932130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.2403425862 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 187322776 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:51 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403425862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.2403425862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.134019932 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 176315927 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:51 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=134019932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_stall_trans.134019932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.205641719 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 736781018 ps |
| CPU time | 1.84 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:52 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=205641719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_stream_len_max.205641719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.1349099613 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 2169218307 ps |
| CPU time | 18.5 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:31:08 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1349099613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.1349099613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.1661939758 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 3343501491 ps |
| CPU time | 25.23 seconds |
| Started | Oct 09 09:30:05 PM UTC 24 |
| Finished | Oct 09 09:30:32 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1661939758 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.1661939758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.3869806008 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 437497964 ps |
| CPU time | 1.29 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:51 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3869806008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.3869806008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.3401079330 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 502288917 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3401079330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_ tx_rx_disruption.3401079330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.3567039797 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 456035379 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3567039797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.3567039797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.3521213726 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 501926991 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3521213726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_ tx_rx_disruption.3521213726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.2648940765 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 605849655 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2648940765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.2648940765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.1192677603 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 650087702 ps |
| CPU time | 1.78 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 214744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1192677603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_ tx_rx_disruption.1192677603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.3101347533 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 627317877 ps |
| CPU time | 1.81 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3101347533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.3101347533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.2032799562 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 629572026 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 214748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2032799562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.2032799562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.3031240193 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 500038602 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3031240193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.3031240193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.3108138944 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 558246469 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3108138944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.3108138944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.3760145583 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 630337101 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3760145583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.3760145583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.802933762 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 66107146 ps |
| CPU time | 0.68 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=802933762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.802933762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.3924147344 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 12135866744 ps |
| CPU time | 15.05 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:31:05 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924147344 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.3924147344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.196310833 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 16047825646 ps |
| CPU time | 18.55 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:31:09 PM UTC 24 |
| Peak memory | 228240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=196310833 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.196310833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.3941438744 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 26451924816 ps |
| CPU time | 36.44 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:31:27 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941438744 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.3941438744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.3184309615 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 198062523 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:51 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184309615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_av_buffer.3184309615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.3076665891 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 177388292 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:51 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076665891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.3076665891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.3463600218 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 196091912 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:51 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463600218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.3463600218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.3926469014 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 1028424114 ps |
| CPU time | 2.49 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:30:53 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926469014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.3926469014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.1661865585 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 15099808544 ps |
| CPU time | 25.56 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:31:16 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1661865585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.1661865585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.1286223345 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 4347195116 ps |
| CPU time | 31.25 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:31:22 PM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286223345 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.1286223345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.3986817675 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 614947148 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:30:52 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986817675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_disable_endpoint.3986817675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.2494464680 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 143291144 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:30:51 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494464680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_disconnected.2494464680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_enable.3050666979 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 35716497 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:30:51 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050666979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.3050666979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.1521009532 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 759932175 ps |
| CPU time | 2.06 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:30:53 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521009532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.1521009532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.4139447705 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 525188448 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:30:52 PM UTC 24 |
| Peak memory | 215472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139447705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.4139447705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.95202168 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 194458706 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:30:51 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=95202168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_fifo_levels.95202168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.1680944079 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 321684008 ps |
| CPU time | 2.63 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:30:53 PM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680944079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_fifo_rst.1680944079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.3107511834 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 218689194 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:30:52 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107511834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.3107511834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.2648410982 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 145729254 ps |
| CPU time | 0.74 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:30:52 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648410982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_stall.2648410982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.3469833567 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 197433660 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:30:52 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469833567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_trans.3469833567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.345734504 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 4106981950 ps |
| CPU time | 28.7 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:31:20 PM UTC 24 |
| Peak memory | 230580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=345734504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.345734504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.3124780234 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 9148504943 ps |
| CPU time | 55 seconds |
| Started | Oct 09 09:30:49 PM UTC 24 |
| Finished | Oct 09 09:31:46 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3124780234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.3124780234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.2552680919 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 243008345 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2552680919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_in_err.2552680919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.1874386831 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 23464712379 ps |
| CPU time | 35.5 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:32:12 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1874386831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.1874386831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.2433859345 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 5581719831 ps |
| CPU time | 7.94 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:44 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433859345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.2433859345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.3783164823 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 5014526389 ps |
| CPU time | 34.96 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:32:11 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783164823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.3783164823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.801375102 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 1735143200 ps |
| CPU time | 14.32 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:51 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=801375102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.801375102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.3581844276 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 238066345 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581844276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.3581844276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.2481142742 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 184288992 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481142742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.2481142742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.2427912540 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 2272283899 ps |
| CPU time | 19.04 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:55 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427912540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.2427912540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.3664509853 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 170477824 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664509853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.3664509853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.2386129081 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 178956830 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386129081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.2386129081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.294102045 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 186451634 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=294102045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_nak_trans.294102045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.470327668 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 165739418 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=470327668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_out_iso.470327668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.1306248356 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 160437367 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306248356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_out_stall.1306248356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.1224307331 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 156670706 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224307331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_out_trans_nak.1224307331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.2224509141 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 157560848 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224509141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.2224509141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.301371797 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 267653682 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=301371797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.301371797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.2521452275 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 167240408 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2521452275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.2521452275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.747022438 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 56565545 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:37 PM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=747022438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_phy_pins_sense.747022438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.360362363 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 9303803626 ps |
| CPU time | 21.24 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:58 PM UTC 24 |
| Peak memory | 228368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=360362363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_pkt_buffer.360362363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.2177669602 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 212072728 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2177669602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.2177669602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.2250975442 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 232074657 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250975442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.2250975442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.268101727 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 188350030 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=268101727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_random_length_in_transaction.268101727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.2912207906 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 202714914 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912207906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.2912207906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.3665055169 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 157847270 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:31:35 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665055169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.3665055169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.1346392572 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 247557614 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346392572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_rx_full.1346392572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.3428133037 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 206637118 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428133037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_setup_stage.3428133037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.4038674394 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 161368611 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4038674394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 39.usbdev_setup_trans_ignored.4038674394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.3587009130 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 198036930 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587009130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.3587009130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.2799250032 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 2183970631 ps |
| CPU time | 49.89 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 234960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2799250032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.2799250032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.2770994000 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 184138633 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770994000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.2770994000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.3072456399 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 165524746 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072456399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_stall_trans.3072456399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.436432637 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 803461732 ps |
| CPU time | 2.05 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:39 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=436432637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_stream_len_max.436432637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.1760902679 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 2626050575 ps |
| CPU time | 16.83 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:54 PM UTC 24 |
| Peak memory | 234808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760902679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_streaming_out.1760902679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.3332396290 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 3640461044 ps |
| CPU time | 20.66 seconds |
| Started | Oct 09 09:30:48 PM UTC 24 |
| Finished | Oct 09 09:31:11 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332396290 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.3332396290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.2320706202 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 511189294 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:39 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2320706202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_t x_rx_disruption.2320706202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.2274689047 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 538649559 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2274689047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.2274689047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.309874 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 440087720 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:53:55 PM UTC 24 |
| Finished | Oct 09 09:53:58 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=309874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_tx_r x_disruption.309874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.2804943143 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 579541140 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2804943143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.2804943143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.2670409475 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 508388447 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2670409475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.2670409475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.3515564361 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 592807883 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3515564361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.3515564361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.3726981764 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 469739314 ps |
| CPU time | 1.84 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3726981764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.3726981764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.1759200177 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 530564434 ps |
| CPU time | 1.91 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1759200177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.1759200177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.1442730475 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 542704158 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1442730475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.1442730475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.3643229405 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 646094753 ps |
| CPU time | 2.32 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3643229405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.3643229405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.794230653 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 645394431 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=794230653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_t x_rx_disruption.794230653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.2285791677 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 37992941 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:11:50 PM UTC 24 |
| Finished | Oct 09 09:11:52 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285791677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.2285791677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.1769433349 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 10529769005 ps |
| CPU time | 17.36 seconds |
| Started | Oct 09 09:11:01 PM UTC 24 |
| Finished | Oct 09 09:11:20 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769433349 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.1769433349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.4124836704 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 26284739403 ps |
| CPU time | 42.36 seconds |
| Started | Oct 09 09:11:03 PM UTC 24 |
| Finished | Oct 09 09:11:47 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124836704 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.4124836704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.3827427892 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 159429993 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:11:03 PM UTC 24 |
| Finished | Oct 09 09:11:06 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827427892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.3827427892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.3608315758 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 199031155 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:11:04 PM UTC 24 |
| Finished | Oct 09 09:11:07 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608315758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.3608315758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.3702305054 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 150544732 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:11:05 PM UTC 24 |
| Finished | Oct 09 09:11:07 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702305054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.3702305054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.1721273681 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 144266495 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:11:06 PM UTC 24 |
| Finished | Oct 09 09:11:08 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1721273681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.1721273681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.2948772605 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 329093540 ps |
| CPU time | 2.23 seconds |
| Started | Oct 09 09:11:06 PM UTC 24 |
| Finished | Oct 09 09:11:09 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2948772605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.2948772605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.2378262555 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 900157869 ps |
| CPU time | 4.44 seconds |
| Started | Oct 09 09:11:07 PM UTC 24 |
| Finished | Oct 09 09:11:12 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378262555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.2378262555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.3677217966 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 38437786393 ps |
| CPU time | 79.39 seconds |
| Started | Oct 09 09:11:08 PM UTC 24 |
| Finished | Oct 09 09:12:29 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677217966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.3677217966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.3749713106 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 1154320990 ps |
| CPU time | 13.02 seconds |
| Started | Oct 09 09:11:08 PM UTC 24 |
| Finished | Oct 09 09:11:22 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749713106 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.3749713106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.1963233750 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 774516935 ps |
| CPU time | 3 seconds |
| Started | Oct 09 09:11:09 PM UTC 24 |
| Finished | Oct 09 09:11:13 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963233750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_disable_endpoint.1963233750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.1863335287 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 140453651 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:11:10 PM UTC 24 |
| Finished | Oct 09 09:11:13 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863335287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_disconnected.1863335287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_enable.1454166819 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 77226616 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:11:13 PM UTC 24 |
| Finished | Oct 09 09:11:16 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454166819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.1454166819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.1297554981 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 737829338 ps |
| CPU time | 3.17 seconds |
| Started | Oct 09 09:11:14 PM UTC 24 |
| Finished | Oct 09 09:11:18 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297554981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.1297554981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.4137383892 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 272918735 ps |
| CPU time | 1.73 seconds |
| Started | Oct 09 09:11:14 PM UTC 24 |
| Finished | Oct 09 09:11:16 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4137383892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.4137383892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.3801835812 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 410614278 ps |
| CPU time | 2.77 seconds |
| Started | Oct 09 09:11:15 PM UTC 24 |
| Finished | Oct 09 09:11:19 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3801835812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.3801835812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.3850506525 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 86176827254 ps |
| CPU time | 159.7 seconds |
| Started | Oct 09 09:11:15 PM UTC 24 |
| Finished | Oct 09 09:13:57 PM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850506525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.3850506525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.3914811626 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 95145466299 ps |
| CPU time | 194.77 seconds |
| Started | Oct 09 09:11:16 PM UTC 24 |
| Finished | Oct 09 09:14:34 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3914811626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.3914811626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.3202137103 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 100254184117 ps |
| CPU time | 212.44 seconds |
| Started | Oct 09 09:11:16 PM UTC 24 |
| Finished | Oct 09 09:14:52 PM UTC 24 |
| Peak memory | 218356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3202137103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_loclk_max.3202137103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.432309625 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 105128329648 ps |
| CPU time | 236.94 seconds |
| Started | Oct 09 09:11:18 PM UTC 24 |
| Finished | Oct 09 09:15:19 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=432309625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_phase.432309625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.3149814569 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 242294569 ps |
| CPU time | 2.2 seconds |
| Started | Oct 09 09:11:19 PM UTC 24 |
| Finished | Oct 09 09:11:23 PM UTC 24 |
| Peak memory | 228216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149814569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.3149814569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.2972007902 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 157031840 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:11:19 PM UTC 24 |
| Finished | Oct 09 09:11:22 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2972007902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_stall.2972007902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.2155496585 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 184214991 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:11:20 PM UTC 24 |
| Finished | Oct 09 09:11:22 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155496585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.2155496585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.2385323145 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 3717748778 ps |
| CPU time | 34.67 seconds |
| Started | Oct 09 09:11:18 PM UTC 24 |
| Finished | Oct 09 09:11:54 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2385323145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.2385323145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.3639567845 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 11405283785 ps |
| CPU time | 83.73 seconds |
| Started | Oct 09 09:11:20 PM UTC 24 |
| Finished | Oct 09 09:12:45 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3639567845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.3639567845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.942042260 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 252874148 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:11:20 PM UTC 24 |
| Finished | Oct 09 09:11:22 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942042260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_link_in_err.942042260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.2060558019 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 8073254598 ps |
| CPU time | 21.31 seconds |
| Started | Oct 09 09:11:21 PM UTC 24 |
| Finished | Oct 09 09:11:43 PM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060558019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.2060558019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.818699620 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 9024245427 ps |
| CPU time | 17.27 seconds |
| Started | Oct 09 09:11:21 PM UTC 24 |
| Finished | Oct 09 09:11:39 PM UTC 24 |
| Peak memory | 218424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=818699620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_suspend.818699620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.3913583836 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 5008678811 ps |
| CPU time | 47.79 seconds |
| Started | Oct 09 09:11:23 PM UTC 24 |
| Finished | Oct 09 09:12:13 PM UTC 24 |
| Peak memory | 230452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3913583836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.3913583836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.1862333360 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 3422559097 ps |
| CPU time | 110.94 seconds |
| Started | Oct 09 09:11:24 PM UTC 24 |
| Finished | Oct 09 09:13:17 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1862333360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.1862333360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.2984941795 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 243216489 ps |
| CPU time | 1.97 seconds |
| Started | Oct 09 09:11:24 PM UTC 24 |
| Finished | Oct 09 09:11:27 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2984941795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.2984941795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.3227086330 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 197808789 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:11:24 PM UTC 24 |
| Finished | Oct 09 09:11:27 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3227086330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.3227086330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.683060569 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 2076661973 ps |
| CPU time | 26.64 seconds |
| Started | Oct 09 09:11:24 PM UTC 24 |
| Finished | Oct 09 09:11:52 PM UTC 24 |
| Peak memory | 235044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=683060569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.683060569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.1663160494 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 2799534726 ps |
| CPU time | 31.47 seconds |
| Started | Oct 09 09:11:24 PM UTC 24 |
| Finished | Oct 09 09:11:57 PM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663160494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.1663160494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.4190445693 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 3257992486 ps |
| CPU time | 93.59 seconds |
| Started | Oct 09 09:11:27 PM UTC 24 |
| Finished | Oct 09 09:13:03 PM UTC 24 |
| Peak memory | 228704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4190445693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.4190445693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.2682702015 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 153759048 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:11:28 PM UTC 24 |
| Finished | Oct 09 09:11:31 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682702015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.2682702015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.2954713095 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 140169609 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:11:29 PM UTC 24 |
| Finished | Oct 09 09:11:32 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2954713095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.2954713095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.3514860413 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 283283836 ps |
| CPU time | 2.01 seconds |
| Started | Oct 09 09:11:31 PM UTC 24 |
| Finished | Oct 09 09:11:34 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514860413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_nak_trans.3514860413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.3813602313 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 165078706 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:11:33 PM UTC 24 |
| Finished | Oct 09 09:11:36 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813602313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.3813602313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.2187310347 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 191191289 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:11:33 PM UTC 24 |
| Finished | Oct 09 09:11:36 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2187310347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_out_stall.2187310347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.1641309970 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 143426157 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:11:34 PM UTC 24 |
| Finished | Oct 09 09:11:37 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1641309970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_out_trans_nak.1641309970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.1384328114 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 168269630 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:11:34 PM UTC 24 |
| Finished | Oct 09 09:11:37 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384328114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.1384328114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.3501718801 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 234614200 ps |
| CPU time | 1.79 seconds |
| Started | Oct 09 09:11:36 PM UTC 24 |
| Finished | Oct 09 09:11:39 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3501718801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.3501718801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.779542838 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 266469560 ps |
| CPU time | 1.82 seconds |
| Started | Oct 09 09:11:36 PM UTC 24 |
| Finished | Oct 09 09:11:39 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=779542838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.779542838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.121525877 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 143726908 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:11:36 PM UTC 24 |
| Finished | Oct 09 09:11:38 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=121525877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.121525877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.4101252389 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 20606372141 ps |
| CPU time | 58.66 seconds |
| Started | Oct 09 09:11:37 PM UTC 24 |
| Finished | Oct 09 09:12:37 PM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101252389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.4101252389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.907219518 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 163911371 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:11:37 PM UTC 24 |
| Finished | Oct 09 09:11:39 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=907219518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_pkt_received.907219518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.2604265099 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 240872912 ps |
| CPU time | 1.82 seconds |
| Started | Oct 09 09:11:38 PM UTC 24 |
| Finished | Oct 09 09:11:41 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604265099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.2604265099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.1641516731 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 3255364436 ps |
| CPU time | 24.58 seconds |
| Started | Oct 09 09:11:40 PM UTC 24 |
| Finished | Oct 09 09:12:05 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1641516731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.1641516731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.2154648434 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 5697899112 ps |
| CPU time | 49.73 seconds |
| Started | Oct 09 09:11:40 PM UTC 24 |
| Finished | Oct 09 09:12:31 PM UTC 24 |
| Peak memory | 234928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154648434 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.2154648434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.4284086500 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 241401781 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:11:38 PM UTC 24 |
| Finished | Oct 09 09:11:41 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284086500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_random_length_in_transaction.4284086500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.4233979991 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 154730178 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:11:39 PM UTC 24 |
| Finished | Oct 09 09:11:42 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233979991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.4233979991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.901411074 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 20169148095 ps |
| CPU time | 34.59 seconds |
| Started | Oct 09 09:11:41 PM UTC 24 |
| Finished | Oct 09 09:12:17 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901411074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_resume_link_active.901411074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.679585596 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 169061611 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:11:41 PM UTC 24 |
| Finished | Oct 09 09:11:43 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=679585596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_rx_crc_err.679585596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.1532366066 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 247964383 ps |
| CPU time | 1.75 seconds |
| Started | Oct 09 09:11:43 PM UTC 24 |
| Finished | Oct 09 09:11:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532366066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.1532366066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.4247691396 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 164979262 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:11:43 PM UTC 24 |
| Finished | Oct 09 09:11:45 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247691396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.4247691396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.738334374 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 331042093 ps |
| CPU time | 1.96 seconds |
| Started | Oct 09 09:11:50 PM UTC 24 |
| Finished | Oct 09 09:11:53 PM UTC 24 |
| Peak memory | 250672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=738334374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.738334374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.3861090022 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 426201755 ps |
| CPU time | 2.61 seconds |
| Started | Oct 09 09:11:43 PM UTC 24 |
| Finished | Oct 09 09:11:46 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861090022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.3861090022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.3477817463 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 168561567 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:11:43 PM UTC 24 |
| Finished | Oct 09 09:11:45 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477817463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.3477817463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.4108786001 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 165459192 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:11:43 PM UTC 24 |
| Finished | Oct 09 09:11:45 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4108786001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.4108786001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.907720794 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 164949339 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:11:44 PM UTC 24 |
| Finished | Oct 09 09:11:47 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=907720794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 4.usbdev_setup_trans_ignored.907720794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.1264014572 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 244488538 ps |
| CPU time | 1.84 seconds |
| Started | Oct 09 09:11:44 PM UTC 24 |
| Finished | Oct 09 09:11:47 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1264014572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.1264014572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.270007932 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 3002936148 ps |
| CPU time | 78.59 seconds |
| Started | Oct 09 09:11:44 PM UTC 24 |
| Finished | Oct 09 09:13:05 PM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=270007932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.270007932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.4228287309 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 165634704 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:11:46 PM UTC 24 |
| Finished | Oct 09 09:11:49 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4228287309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.4228287309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.1938881166 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 169226597 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:11:46 PM UTC 24 |
| Finished | Oct 09 09:11:49 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1938881166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.1938881166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.3477408684 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 441725782 ps |
| CPU time | 2.78 seconds |
| Started | Oct 09 09:11:47 PM UTC 24 |
| Finished | Oct 09 09:11:50 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477408684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.3477408684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.168651101 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 2261938847 ps |
| CPU time | 60.63 seconds |
| Started | Oct 09 09:11:46 PM UTC 24 |
| Finished | Oct 09 09:12:49 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=168651101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_streaming_out.168651101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.2609587035 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 9364853058 ps |
| CPU time | 225.29 seconds |
| Started | Oct 09 09:11:48 PM UTC 24 |
| Finished | Oct 09 09:15:37 PM UTC 24 |
| Peak memory | 228452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609587035 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.2609587035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.2381936842 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 1584506355 ps |
| CPU time | 10.48 seconds |
| Started | Oct 09 09:11:08 PM UTC 24 |
| Finished | Oct 09 09:11:20 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381936842 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.2381936842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.3989904332 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 547732249 ps |
| CPU time | 2.28 seconds |
| Started | Oct 09 09:11:48 PM UTC 24 |
| Finished | Oct 09 09:11:51 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3989904332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx _rx_disruption.3989904332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.1162428444 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 52419686 ps |
| CPU time | 0.61 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162428444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.1162428444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.2927307709 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 3734799852 ps |
| CPU time | 5.67 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:43 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2927307709 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.2927307709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.4172104343 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 15586106193 ps |
| CPU time | 20.34 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:58 PM UTC 24 |
| Peak memory | 228524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172104343 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.4172104343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.323343167 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 31360466593 ps |
| CPU time | 39.9 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:32:18 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=323343167 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.323343167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.1535520765 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 160969211 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:39 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535520765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.1535520765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.2145158080 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 151120853 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145158080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.2145158080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.2192238419 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 225902229 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:39 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192238419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.2192238419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.1581596746 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 385292409 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:39 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581596746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.1581596746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.4022922381 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 30699849188 ps |
| CPU time | 44.74 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:32:23 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4022922381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.4022922381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.1932633206 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 1215329550 ps |
| CPU time | 22.3 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:32:00 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932633206 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.1932633206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.1952803238 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 1013181052 ps |
| CPU time | 2.1 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:40 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952803238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_disable_endpoint.1952803238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.3727849404 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 169034650 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:39 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3727849404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.3727849404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_enable.1639929695 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 33383254 ps |
| CPU time | 0.64 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:38 PM UTC 24 |
| Peak memory | 216864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1639929695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.1639929695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.387426967 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 961166592 ps |
| CPU time | 2.57 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:41 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=387426967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.387426967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.2078902109 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 471511838 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:39 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078902109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.2078902109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.1090350034 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 274475229 ps |
| CPU time | 1.13 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:39 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090350034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.1090350034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.482657884 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 506066396 ps |
| CPU time | 2.76 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:41 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=482657884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_fifo_rst.482657884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.484061011 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 162750498 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=484061011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.484061011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.2155216761 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 194765150 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:26 PM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155216761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_stall.2155216761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.2377472718 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 189866471 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:26 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2377472718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.2377472718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.978964667 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 2798746173 ps |
| CPU time | 67.41 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:32:46 PM UTC 24 |
| Peak memory | 230824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=978964667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.978964667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.2255557622 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 4988201250 ps |
| CPU time | 45.21 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:33:11 PM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2255557622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.2255557622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.1085010208 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 248781795 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:26 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1085010208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_in_err.1085010208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.1366430017 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 8144517090 ps |
| CPU time | 12.32 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:38 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366430017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_resume.1366430017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.3330701405 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 4760363770 ps |
| CPU time | 6.83 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:32 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3330701405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.3330701405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.3914025507 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 3860379352 ps |
| CPU time | 25.01 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:51 PM UTC 24 |
| Peak memory | 234808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3914025507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.3914025507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.1308613849 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 3613118539 ps |
| CPU time | 24.43 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:50 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308613849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.1308613849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.3082938038 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 298247624 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082938038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.3082938038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.542685807 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 198156678 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=542685807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.542685807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.2590563415 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 2240329910 ps |
| CPU time | 14.69 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:40 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590563415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.2590563415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.1601038560 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 199210943 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601038560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.1601038560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.259375870 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 208269130 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259375870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.259375870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.4283283875 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 239870573 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283283875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.4283283875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.2451430858 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 195515005 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451430858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_iso.2451430858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.2732542451 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 156216037 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:32:24 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732542451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_out_stall.2732542451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.3004195155 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 195445798 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004195155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_out_trans_nak.3004195155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.2020326258 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 183338113 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020326258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.2020326258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.1615713265 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 203815807 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615713265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.1615713265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.562831933 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 176001680 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=562831933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.562831933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.2164036293 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 44085090 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164036293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.2164036293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.2735499468 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 12716987197 ps |
| CPU time | 30.56 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:57 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735499468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_pkt_buffer.2735499468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.700674948 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 158867327 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=700674948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_pkt_received.700674948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.252846669 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 234946222 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=252846669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_pkt_sent.252846669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.1588406766 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 171217345 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588406766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_random_length_in_transaction.1588406766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.343312699 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 216934657 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=343312699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.343312699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.862749357 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 178020334 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=862749357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_rx_crc_err.862749357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.3207125425 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 244379580 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3207125425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.3207125425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.3577288401 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 157335919 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577288401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_setup_stage.3577288401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.2630346968 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 153122815 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2630346968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 40.usbdev_setup_trans_ignored.2630346968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.2476499545 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 197034939 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476499545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.2476499545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.3970345063 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 2360534063 ps |
| CPU time | 56.26 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:33:23 PM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970345063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.3970345063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.736784466 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 190034009 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=736784466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.736784466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.1998805132 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 187526630 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:27 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998805132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_stall_trans.1998805132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.1280402409 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 558113336 ps |
| CPU time | 1.64 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:28 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280402409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.1280402409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.1749887711 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 2499907843 ps |
| CPU time | 60.64 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:33:28 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749887711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_streaming_out.1749887711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.3756468302 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 1984011230 ps |
| CPU time | 15.4 seconds |
| Started | Oct 09 09:31:36 PM UTC 24 |
| Finished | Oct 09 09:31:53 PM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756468302 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.3756468302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.877036331 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 566576785 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:28 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=877036331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_tx _rx_disruption.877036331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.967674124 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 560744336 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=967674124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_t x_rx_disruption.967674124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.118579251 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 581456641 ps |
| CPU time | 1.78 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=118579251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_t x_rx_disruption.118579251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.191360897 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 603983715 ps |
| CPU time | 1.74 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=191360897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_t x_rx_disruption.191360897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.395039529 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 549208238 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=395039529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_t x_rx_disruption.395039529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.1268755464 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 542177906 ps |
| CPU time | 1.76 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1268755464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_ tx_rx_disruption.1268755464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.194687636 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 567999242 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=194687636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_t x_rx_disruption.194687636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.3539887207 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 502586920 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3539887207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.3539887207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.2626454781 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 512170283 ps |
| CPU time | 1.64 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2626454781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.2626454781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.1514851140 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 519728013 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1514851140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_ tx_rx_disruption.1514851140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.1168949888 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 603337804 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1168949888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_ tx_rx_disruption.1168949888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.4122349630 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 38772854 ps |
| CPU time | 0.62 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122349630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.4122349630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.4046677784 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 9297121893 ps |
| CPU time | 12.6 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:39 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046677784 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.4046677784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.2164515656 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 16038793627 ps |
| CPU time | 19.28 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:46 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164515656 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.2164515656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.546815575 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 26261630680 ps |
| CPU time | 29.15 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:56 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=546815575 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.546815575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.3246687601 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 190241250 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:28 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246687601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_av_buffer.3246687601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.1223685723 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 151933119 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:28 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223685723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.1223685723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.3183958222 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 276290838 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:28 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183958222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.3183958222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.3251208512 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 971145909 ps |
| CPU time | 2.32 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:32:29 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251208512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.3251208512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.3721042313 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 40151540005 ps |
| CPU time | 62.78 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:33:30 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3721042313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.3721042313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.457657249 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 1696011953 ps |
| CPU time | 33.58 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:33:01 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=457657249 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.457657249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.1969750771 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 977095941 ps |
| CPU time | 2.12 seconds |
| Started | Oct 09 09:32:26 PM UTC 24 |
| Finished | Oct 09 09:32:29 PM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969750771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.1969750771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.3219678976 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 145968557 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:32:26 PM UTC 24 |
| Finished | Oct 09 09:32:28 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219678976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.3219678976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_enable.2096818411 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 42019658 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:32:26 PM UTC 24 |
| Finished | Oct 09 09:32:28 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096818411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_enable.2096818411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.3768637473 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 837232626 ps |
| CPU time | 2.22 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768637473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.3768637473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.2811104412 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 383887103 ps |
| CPU time | 1.2 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811104412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.2811104412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.4224911874 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 175408245 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224911874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_fifo_levels.4224911874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.2564308275 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 552688869 ps |
| CPU time | 2.98 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:20 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2564308275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.2564308275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.3601617663 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 172869623 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3601617663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.3601617663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.3150394774 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 149283683 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150394774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_stall.3150394774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.4122153741 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 177377559 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122153741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.4122153741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.3113627355 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 3970926339 ps |
| CPU time | 95.9 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:34:54 PM UTC 24 |
| Peak memory | 233060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113627355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.3113627355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.2943986622 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 12383394334 ps |
| CPU time | 122.35 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:35:21 PM UTC 24 |
| Peak memory | 220772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943986622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.2943986622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.2936412461 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 225779267 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936412461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.2936412461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.1747354002 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 25593886020 ps |
| CPU time | 39.45 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:57 PM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747354002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.1747354002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.2553310117 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 3834830813 ps |
| CPU time | 5.27 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:23 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553310117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.2553310117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.2279527319 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 6055948194 ps |
| CPU time | 41.83 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:34:00 PM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279527319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.2279527319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.1787212255 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 2207973425 ps |
| CPU time | 15.33 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:33 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787212255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.1787212255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.3677366493 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 305480055 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677366493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.3677366493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.2392155668 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 189164292 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2392155668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.2392155668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.3597340581 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 3957062105 ps |
| CPU time | 96.95 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:34:55 PM UTC 24 |
| Peak memory | 227892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597340581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.3597340581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.3847693423 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 165730482 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847693423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.3847693423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.2455361080 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 152819167 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455361080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.2455361080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.1447511015 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 195012158 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447511015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.1447511015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.1078767769 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 167946675 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078767769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_out_iso.1078767769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.2513460939 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 166972963 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:18 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513460939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_out_stall.2513460939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.646496691 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 179874017 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=646496691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_out_trans_nak.646496691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.1735630723 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 165003633 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1735630723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.1735630723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.1845768344 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 233618365 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845768344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.1845768344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.3639376097 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 191144652 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3639376097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.3639376097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.2811769603 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 37605848 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:33:16 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811769603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.2811769603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.1867173684 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 6577355082 ps |
| CPU time | 16.98 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:35 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867173684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_pkt_buffer.1867173684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.540787369 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 203391998 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=540787369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_pkt_received.540787369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.2468008393 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 227257361 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468008393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.2468008393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.3743648155 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 284249884 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743648155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.3743648155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.3119722794 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 193509105 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119722794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.3119722794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.3904719699 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 165352858 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3904719699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_rx_crc_err.3904719699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.1009492277 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 245711161 ps |
| CPU time | 1.21 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:20 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009492277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.1009492277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.2402717655 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 147343433 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402717655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_setup_stage.2402717655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.1449146348 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 147761508 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449146348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.1449146348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.1788529183 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 197699136 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788529183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.1788529183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.1824473120 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 2659246580 ps |
| CPU time | 22.51 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:41 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824473120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.1824473120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.376244753 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 161886254 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=376244753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.376244753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.804688936 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 216565803 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:19 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804688936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_stall_trans.804688936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.3634430591 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 200027443 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:20 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634430591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.3634430591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.663801970 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 2074450629 ps |
| CPU time | 14.62 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:33 PM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=663801970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_streaming_out.663801970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.2290552506 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 5244522670 ps |
| CPU time | 40.98 seconds |
| Started | Oct 09 09:32:25 PM UTC 24 |
| Finished | Oct 09 09:33:08 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290552506 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.2290552506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.3127434725 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 655379290 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3127434725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.3127434725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.1520317248 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 466311050 ps |
| CPU time | 1.85 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1520317248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.1520317248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.530847922 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 460977959 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=530847922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_t x_rx_disruption.530847922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.3249220088 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 512853947 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3249220088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_ tx_rx_disruption.3249220088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.350755597 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 464999521 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=350755597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_t x_rx_disruption.350755597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.343310708 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 670463639 ps |
| CPU time | 1.85 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=343310708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_t x_rx_disruption.343310708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.58448472 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 601198484 ps |
| CPU time | 1.8 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=58448472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_tx _rx_disruption.58448472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.1846692723 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 442766858 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:53:59 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1846692723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.1846692723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.2246108243 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 469513709 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2246108243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.2246108243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.1696966344 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 474941625 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1696966344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_ tx_rx_disruption.1696966344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.2834274112 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 576640071 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2834274112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.2834274112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.3164088374 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 41335547 ps |
| CPU time | 0.59 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164088374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.3164088374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.495734990 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 4404828258 ps |
| CPU time | 7.32 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:26 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=495734990 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.495734990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.3607796580 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 19114248204 ps |
| CPU time | 20.9 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:40 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607796580 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.3607796580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.2409591366 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 31180128341 ps |
| CPU time | 34.85 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:54 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409591366 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.2409591366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.2762425676 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 167275041 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:20 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2762425676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.2762425676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.369363486 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 185174633 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:20 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=369363486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_bitstuff_err.369363486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.116026030 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 252570886 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:20 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=116026030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_data_toggle_clear.116026030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.4206305578 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 379543728 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:20 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206305578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.4206305578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.3830623068 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 47357265682 ps |
| CPU time | 83.63 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:34:43 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830623068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.3830623068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.3624485447 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 1951389866 ps |
| CPU time | 11.26 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:30 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3624485447 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.3624485447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.3226394820 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 749316459 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226394820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.3226394820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.2367544532 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 156909306 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367544532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_disconnected.2367544532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_enable.79241261 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 70624754 ps |
| CPU time | 0.69 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=79241261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_enable.79241261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.3530752426 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 772584220 ps |
| CPU time | 2.19 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530752426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.3530752426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.4171378904 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 349343586 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4171378904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.4171378904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.1986290818 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 186951331 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986290818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_fifo_levels.1986290818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.3135294930 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 271924258 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135294930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.3135294930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.4186923857 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 270194845 ps |
| CPU time | 1.22 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186923857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.4186923857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.4165365305 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 145147874 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165365305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.4165365305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.4250608022 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 207199948 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 215472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250608022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.4250608022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.3520196744 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 5821038855 ps |
| CPU time | 141.47 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:36:31 PM UTC 24 |
| Peak memory | 237576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520196744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.3520196744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.2786891380 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 9442765539 ps |
| CPU time | 98.09 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:35:47 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786891380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.2786891380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.1969007993 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 198860718 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969007993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.1969007993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.3778719410 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 9218571356 ps |
| CPU time | 14.24 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:23 PM UTC 24 |
| Peak memory | 227968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778719410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.3778719410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.765374634 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 3314062966 ps |
| CPU time | 4.95 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:13 PM UTC 24 |
| Peak memory | 228012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=765374634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_suspend.765374634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.1794404309 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 3834015723 ps |
| CPU time | 33.89 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:43 PM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1794404309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.1794404309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.153811052 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 3246580238 ps |
| CPU time | 21.01 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:30 PM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=153811052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.153811052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.676711316 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 244036208 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=676711316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.676711316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.3619669579 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 204521135 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619669579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.3619669579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.3270102414 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 2908947924 ps |
| CPU time | 19 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:28 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270102414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.3270102414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.2371286730 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 189010334 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:09 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2371286730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.2371286730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.1692473452 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 223882915 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692473452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.1692473452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.550883957 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 209453748 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=550883957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_nak_trans.550883957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.923514660 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 198374344 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=923514660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_out_iso.923514660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.1336640352 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 166404163 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336640352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_out_stall.1336640352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.831478124 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 180157673 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=831478124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_out_trans_nak.831478124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.2559729351 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 150876708 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559729351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_pending_in_trans.2559729351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.2958938905 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 221147176 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958938905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.2958938905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.2081474699 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 206938690 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081474699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.2081474699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.1550608625 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 31206687 ps |
| CPU time | 0.67 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550608625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.1550608625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.1411810523 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 18387014487 ps |
| CPU time | 45.28 seconds |
| Started | Oct 09 09:34:07 PM UTC 24 |
| Finished | Oct 09 09:34:55 PM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411810523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_pkt_buffer.1411810523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.2186743597 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 204572638 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2186743597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.2186743597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.451327234 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 242370870 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=451327234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_pkt_sent.451327234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.312888782 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 227810375 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312888782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_random_length_in_transaction.312888782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.3603279131 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 197414622 ps |
| CPU time | 1.16 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3603279131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.3603279131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.3963822793 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 191813210 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963822793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.3963822793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.3600212104 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 471086325 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:11 PM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600212104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_rx_full.3600212104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.2099591835 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 153817660 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099591835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.2099591835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.2978680274 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 155134852 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978680274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.2978680274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.2561356162 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 236312418 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561356162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.2561356162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.1360337802 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 3337589153 ps |
| CPU time | 23.29 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:33 PM UTC 24 |
| Peak memory | 235068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1360337802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.1360337802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.1578292845 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 177820328 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1578292845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.1578292845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.1655018996 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 173862948 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655018996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stall_trans.1655018996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.3791897253 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 335164359 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:11 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3791897253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.3791897253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.3420178813 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 2626094202 ps |
| CPU time | 23.38 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:33 PM UTC 24 |
| Peak memory | 234936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420178813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.3420178813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.1407505443 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 1969946626 ps |
| CPU time | 11.79 seconds |
| Started | Oct 09 09:33:17 PM UTC 24 |
| Finished | Oct 09 09:33:31 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407505443 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.1407505443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.1979548101 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 424028195 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:11 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1979548101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_t x_rx_disruption.1979548101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.1140493856 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 584920463 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1140493856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_ tx_rx_disruption.1140493856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.4176914933 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 563871463 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:53:56 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4176914933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_ tx_rx_disruption.4176914933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.2916876350 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 510681005 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2916876350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.2916876350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.3459375545 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 622891664 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3459375545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.3459375545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.3291426999 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 605015848 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3291426999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.3291426999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.4171936377 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 651283445 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4171936377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.4171936377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.7127585 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 466711840 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=7127585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_tx_ rx_disruption.7127585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.1980816231 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 595823598 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1980816231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.1980816231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.3747606499 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 490728868 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3747606499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_ tx_rx_disruption.3747606499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.2958443426 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 599659366 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2958443426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.2958443426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.3469677311 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 38839679 ps |
| CPU time | 0.61 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469677311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.3469677311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.3931607537 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 7055453314 ps |
| CPU time | 10.48 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:20 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3931607537 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.3931607537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.1998822292 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 18816286428 ps |
| CPU time | 22.62 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:33 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998822292 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.1998822292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.1499982581 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 31348859788 ps |
| CPU time | 39.39 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:49 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1499982581 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.1499982581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.3260677986 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 151496532 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:11 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3260677986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.3260677986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.2899288347 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 147877178 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:34:08 PM UTC 24 |
| Finished | Oct 09 09:34:10 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899288347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_bitstuff_err.2899288347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.174505822 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 175104248 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:34:58 PM UTC 24 |
| Finished | Oct 09 09:35:01 PM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174505822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_data_toggle_clear.174505822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.1818349653 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 597960537 ps |
| CPU time | 1.73 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:01 PM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818349653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.1818349653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.1292704827 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 16589155609 ps |
| CPU time | 28.24 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:28 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292704827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.1292704827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.280895740 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 3795231068 ps |
| CPU time | 22.14 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:22 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=280895740 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.280895740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.3308242827 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 833858298 ps |
| CPU time | 2.12 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308242827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.3308242827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.3803175551 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 142211897 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:01 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3803175551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.3803175551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_enable.3166438904 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 53477106 ps |
| CPU time | 0.61 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:01 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166438904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_enable.3166438904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.3316916965 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 859632160 ps |
| CPU time | 2.39 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316916965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.3316916965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.1213485547 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 415093162 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:01 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213485547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.1213485547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.600842221 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 183508735 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:01 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=600842221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_fifo_levels.600842221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.2674318614 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 289711386 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674318614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_fifo_rst.2674318614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.705129572 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 206221170 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=705129572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.705129572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.2204586870 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 160792315 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:01 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204586870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_stall.2204586870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.1281045736 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 246530893 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:01 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281045736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.1281045736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.231789780 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 4825472709 ps |
| CPU time | 41.18 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:42 PM UTC 24 |
| Peak memory | 230380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=231789780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.231789780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.1299388311 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 9043773326 ps |
| CPU time | 58.95 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:36:00 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1299388311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.1299388311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.3611147845 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 228626608 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:01 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611147845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.3611147845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.118056806 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 28856951500 ps |
| CPU time | 41.88 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:43 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=118056806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_link_resume.118056806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.859081416 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 5319922123 ps |
| CPU time | 7.87 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:08 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=859081416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_suspend.859081416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.3547561411 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 4507658968 ps |
| CPU time | 39.17 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:40 PM UTC 24 |
| Peak memory | 230452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3547561411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.3547561411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.3713411094 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 3913982779 ps |
| CPU time | 25.02 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:26 PM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713411094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.3713411094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.3595500119 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 245917939 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595500119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.3595500119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.738532042 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 195562020 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=738532042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.738532042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.4082677975 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 2783094850 ps |
| CPU time | 67.35 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:36:09 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082677975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.4082677975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.2287898836 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 151992228 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287898836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.2287898836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.10955818 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 145011268 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=10955818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.10955818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.913679392 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 217285120 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=913679392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_nak_trans.913679392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.3592694606 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 157954916 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592694606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_out_iso.3592694606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.592692763 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 198508075 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=592692763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_out_stall.592692763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.2137531156 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 154659249 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137531156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.2137531156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.201697331 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 150771848 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201697331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pending_in_trans.201697331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.1466915944 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 221776486 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1466915944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.1466915944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.3312125538 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 146805610 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312125538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.3312125538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.1755414607 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 33962848 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1755414607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.1755414607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.897741422 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 20876603207 ps |
| CPU time | 50.99 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:53 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=897741422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_pkt_buffer.897741422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.373451968 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 182798021 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=373451968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_pkt_received.373451968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.524432778 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 191648143 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=524432778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_pkt_sent.524432778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.485968235 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 226439010 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=485968235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_random_length_in_transaction.485968235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.2026646282 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 173776790 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2026646282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.2026646282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.2478807330 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 139933760 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2478807330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.2478807330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.1664744297 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 400037504 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:03 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664744297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_rx_full.1664744297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.429958899 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 157211694 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=429958899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_setup_stage.429958899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.221944984 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 166115417 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=221944984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 43.usbdev_setup_trans_ignored.221944984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.977585823 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 290919480 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:03 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=977585823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.977585823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.1783086021 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 1854774099 ps |
| CPU time | 15.23 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:17 PM UTC 24 |
| Peak memory | 230324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783086021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.1783086021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.1067294922 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 152936222 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067294922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.1067294922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.1408545504 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 207732846 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:02 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1408545504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_stall_trans.1408545504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.3837943424 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 1144742924 ps |
| CPU time | 2.8 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:04 PM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3837943424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.3837943424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.3854383778 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 3727715292 ps |
| CPU time | 90.87 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:36:33 PM UTC 24 |
| Peak memory | 228672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854383778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.3854383778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.1296876811 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 1988082965 ps |
| CPU time | 14.79 seconds |
| Started | Oct 09 09:34:59 PM UTC 24 |
| Finished | Oct 09 09:35:15 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296876811 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.1296876811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.3827708723 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 612057840 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:03 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3827708723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_t x_rx_disruption.3827708723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.536885660 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 523892223 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=536885660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_t x_rx_disruption.536885660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.1009808995 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 540017471 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1009808995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_ tx_rx_disruption.1009808995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.3833998987 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 613543098 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3833998987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_ tx_rx_disruption.3833998987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.2308719218 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 490263458 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2308719218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.2308719218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.1639041554 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 587406308 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1639041554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_ tx_rx_disruption.1639041554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.251761484 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 529913484 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=251761484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_t x_rx_disruption.251761484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.912652996 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 554885406 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=912652996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_t x_rx_disruption.912652996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.1998389129 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 546385128 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1998389129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.1998389129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.11221092 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 468933953 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:53:57 PM UTC 24 |
| Finished | Oct 09 09:54:00 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=11221092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_tx _rx_disruption.11221092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.1618404024 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 473184429 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:55:22 PM UTC 24 |
| Finished | Oct 09 09:55:25 PM UTC 24 |
| Peak memory | 215500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1618404024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.1618404024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.1078386322 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 82279127 ps |
| CPU time | 0.63 seconds |
| Started | Oct 09 09:36:37 PM UTC 24 |
| Finished | Oct 09 09:36:39 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078386322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.1078386322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.127823420 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 6481969150 ps |
| CPU time | 8.75 seconds |
| Started | Oct 09 09:35:00 PM UTC 24 |
| Finished | Oct 09 09:35:11 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=127823420 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.127823420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.1393161485 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 14779666496 ps |
| CPU time | 16.67 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:36:05 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393161485 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.1393161485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.4270057183 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 28915085847 ps |
| CPU time | 36.1 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:36:24 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4270057183 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.4270057183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.1216846706 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 148475015 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:49 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216846706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.1216846706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.3103836300 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 181053024 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:49 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3103836300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_bitstuff_err.3103836300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.963617276 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 680449105 ps |
| CPU time | 2.22 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=963617276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_data_toggle_clear.963617276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.3469518125 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 956901176 ps |
| CPU time | 2.45 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469518125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.3469518125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.942992285 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 14780787193 ps |
| CPU time | 21.98 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:36:10 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942992285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_device_address.942992285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.1124964320 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 1842215844 ps |
| CPU time | 35.89 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:36:24 PM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124964320 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.1124964320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.3527832094 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 699419497 ps |
| CPU time | 2.04 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527832094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.3527832094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.64038221 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 184609268 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:49 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=64038221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_disconnected.64038221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_enable.1007641854 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 38906739 ps |
| CPU time | 0.63 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:49 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1007641854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_enable.1007641854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.1368981393 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 822664121 ps |
| CPU time | 2.2 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1368981393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.1368981393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.2919090953 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 485666732 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919090953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.2919090953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.3748058403 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 331882799 ps |
| CPU time | 1.2 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748058403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_fifo_levels.3748058403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.2953300121 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 207093272 ps |
| CPU time | 1.89 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953300121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_fifo_rst.2953300121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.3697695900 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 216647609 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 225812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3697695900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.3697695900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.4275189117 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 142661396 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275189117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_stall.4275189117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.2576404677 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 243564974 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576404677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.2576404677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.4194609023 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 6340385985 ps |
| CPU time | 156.06 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:38:26 PM UTC 24 |
| Peak memory | 231128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194609023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.4194609023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.2276035447 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 6760223628 ps |
| CPU time | 36.92 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:36:26 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2276035447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.2276035447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.3554923083 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 204548941 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3554923083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.3554923083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.2687591467 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 23717001820 ps |
| CPU time | 36.15 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:36:26 PM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2687591467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.2687591467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.3188278242 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 4629406438 ps |
| CPU time | 7.2 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:56 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188278242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_link_suspend.3188278242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.3958968558 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 4520507536 ps |
| CPU time | 28.42 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:36:18 PM UTC 24 |
| Peak memory | 235016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3958968558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.3958968558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.4010898900 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 2558718382 ps |
| CPU time | 22.12 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:36:11 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010898900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.4010898900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.1152147790 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 276588372 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152147790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.1152147790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.2269525332 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 193527299 ps |
| CPU time | 1.27 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269525332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.2269525332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.1339128830 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 3561910963 ps |
| CPU time | 84.95 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:37:15 PM UTC 24 |
| Peak memory | 228216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1339128830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.1339128830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.3572548313 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 165478296 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572548313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.3572548313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.3231952416 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 163870450 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3231952416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.3231952416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.3548742561 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 204985570 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548742561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_out_iso.3548742561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.2901304592 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 168844694 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2901304592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.2901304592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.2305565062 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 254783344 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305565062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.2305565062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.3562278780 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 160076829 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562278780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.3562278780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.3170097190 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 222055817 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170097190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.3170097190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.734845726 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 153492078 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=734845726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.734845726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.481261541 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 61082029 ps |
| CPU time | 0.72 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=481261541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_phy_pins_sense.481261541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.3446141688 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 18790251872 ps |
| CPU time | 42.41 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:36:32 PM UTC 24 |
| Peak memory | 228364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446141688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.3446141688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.1138334465 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 153681090 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:50 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138334465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.1138334465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.3773119866 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 205543937 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773119866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.3773119866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.3732590314 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 298830942 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732590314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_random_length_in_transaction.3732590314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.3866126217 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 188322988 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3866126217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.3866126217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.1364140753 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 153772855 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1364140753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.1364140753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.4083608966 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 374901364 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083608966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.4083608966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.2785518437 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 171285556 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785518437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.2785518437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.3302171106 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 152525430 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3302171106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.3302171106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.2760444563 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 258386712 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:35:48 PM UTC 24 |
| Finished | Oct 09 09:35:51 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760444563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.2760444563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.3421930986 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 1703213575 ps |
| CPU time | 11.34 seconds |
| Started | Oct 09 09:36:36 PM UTC 24 |
| Finished | Oct 09 09:36:49 PM UTC 24 |
| Peak memory | 235012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421930986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.3421930986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.3753875026 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 165126984 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:36:36 PM UTC 24 |
| Finished | Oct 09 09:36:38 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753875026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.3753875026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.3230806463 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 177986224 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:36:36 PM UTC 24 |
| Finished | Oct 09 09:36:38 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230806463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.3230806463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.4266961229 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 415178243 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:36:36 PM UTC 24 |
| Finished | Oct 09 09:36:38 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4266961229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.4266961229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.2308581765 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 4246151386 ps |
| CPU time | 27.61 seconds |
| Started | Oct 09 09:36:36 PM UTC 24 |
| Finished | Oct 09 09:37:05 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308581765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.2308581765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.3607391645 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 717479705 ps |
| CPU time | 13.19 seconds |
| Started | Oct 09 09:35:47 PM UTC 24 |
| Finished | Oct 09 09:36:02 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607391645 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.3607391645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.2235404615 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 552934793 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:36:37 PM UTC 24 |
| Finished | Oct 09 09:36:40 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2235404615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.2235404615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.1049333513 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 562799062 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:25 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1049333513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.1049333513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.1328002832 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 570763430 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:25 PM UTC 24 |
| Peak memory | 215536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1328002832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.1328002832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.2307562458 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 481769871 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:25 PM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2307562458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_ tx_rx_disruption.2307562458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.1946079619 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 450759502 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:25 PM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1946079619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_ tx_rx_disruption.1946079619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.146559265 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 641401934 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=146559265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_t x_rx_disruption.146559265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.556235361 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 454132818 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:25 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=556235361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_t x_rx_disruption.556235361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.3524203172 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 510986112 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:25 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3524203172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.3524203172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.2508463855 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 509169636 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2508463855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.2508463855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.889210017 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 531211735 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=889210017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_t x_rx_disruption.889210017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.1169509272 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 499007793 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1169509272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.1169509272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.3367541736 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 39952079 ps |
| CPU time | 0.63 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367541736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.3367541736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.2784092177 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 9140770505 ps |
| CPU time | 11.61 seconds |
| Started | Oct 09 09:36:37 PM UTC 24 |
| Finished | Oct 09 09:36:50 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2784092177 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.2784092177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.3069248371 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 16018439565 ps |
| CPU time | 20.63 seconds |
| Started | Oct 09 09:36:37 PM UTC 24 |
| Finished | Oct 09 09:37:00 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069248371 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.3069248371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.1238996883 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 28954409808 ps |
| CPU time | 38.87 seconds |
| Started | Oct 09 09:36:37 PM UTC 24 |
| Finished | Oct 09 09:37:18 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238996883 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.1238996883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.1275344243 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 155043838 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:36:37 PM UTC 24 |
| Finished | Oct 09 09:36:40 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1275344243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.1275344243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.1242184898 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 176191978 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:36:37 PM UTC 24 |
| Finished | Oct 09 09:36:40 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242184898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.1242184898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.796737051 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 200067816 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:40 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=796737051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_data_toggle_clear.796737051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.3379346444 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 318310861 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:40 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379346444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.3379346444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.2149551618 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 36849019532 ps |
| CPU time | 64.45 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:37:44 PM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149551618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_address.2149551618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.2465255518 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 3808342094 ps |
| CPU time | 29.17 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:37:09 PM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465255518 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.2465255518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.3087390558 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 896575178 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3087390558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.3087390558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.3507386216 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 153438346 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:40 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507386216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_disconnected.3507386216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_enable.2060028350 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 63754804 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:40 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060028350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_enable.2060028350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.434021860 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 1086619365 ps |
| CPU time | 2.76 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:42 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=434021860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.434021860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.969463122 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 351013011 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:40 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=969463122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.969463122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.3855028266 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 307508564 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855028266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_fifo_levels.3855028266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.1654579693 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 258075496 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654579693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.1654579693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.3952212215 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 235749755 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952212215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.3952212215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.3883788592 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 156044959 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:40 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883788592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.3883788592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.2674867751 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 219187684 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674867751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.2674867751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.2592929469 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 3030878476 ps |
| CPU time | 26.16 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:37:06 PM UTC 24 |
| Peak memory | 230500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2592929469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.2592929469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.1924497975 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 14030244751 ps |
| CPU time | 84.47 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:38:05 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924497975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.1924497975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.521343869 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 290874156 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=521343869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_link_in_err.521343869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.282665759 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 8805180206 ps |
| CPU time | 13.08 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:53 PM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=282665759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_link_resume.282665759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.1138973762 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 8728689525 ps |
| CPU time | 11.82 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:52 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138973762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.1138973762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.3826248481 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 3367625100 ps |
| CPU time | 22.88 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:37:03 PM UTC 24 |
| Peak memory | 235156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826248481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.3826248481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.1826625765 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 3571934247 ps |
| CPU time | 88.34 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:38:09 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1826625765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.1826625765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.1920161509 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 243964519 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920161509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.1920161509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.1995905129 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 224590953 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1995905129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.1995905129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.2743545981 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 2287744083 ps |
| CPU time | 15.26 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:55 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2743545981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.2743545981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.1808210599 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 160940942 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808210599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.1808210599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.2051595303 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 171649832 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051595303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.2051595303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.592144730 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 177282414 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:36:39 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=592144730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_nak_trans.592144730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.3657428529 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 154492706 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:36:39 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657428529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.3657428529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.3574206613 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 155180039 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:36:39 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574206613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_out_stall.3574206613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.744768736 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 159972282 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:36:39 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744768736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_out_trans_nak.744768736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.1960429351 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 182817896 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:36:39 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1960429351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.1960429351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.219562824 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 231308443 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:36:39 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=219562824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.219562824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.3521547084 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 180699209 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:36:39 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3521547084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.3521547084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.3067629528 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 31562335 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:36:39 PM UTC 24 |
| Finished | Oct 09 09:36:41 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067629528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.3067629528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.3719992099 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 7730111157 ps |
| CPU time | 19.65 seconds |
| Started | Oct 09 09:36:39 PM UTC 24 |
| Finished | Oct 09 09:37:00 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719992099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_pkt_buffer.3719992099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.3447737824 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 180942389 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:36 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447737824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.3447737824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.3502488476 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 209493542 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502488476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.3502488476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.23213608 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 214436458 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=23213608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_random_length_in_transaction.23213608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.1748649277 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 178246865 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748649277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.1748649277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.502157200 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 159083459 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=502157200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_rx_crc_err.502157200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.78295665 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 360817805 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=78295665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_rx_full.78295665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.4154522069 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 146945612 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154522069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_setup_stage.4154522069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.172370179 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 150123480 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172370179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 45.usbdev_setup_trans_ignored.172370179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.3514112776 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 254683049 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514112776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.3514112776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.556378361 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 3455555152 ps |
| CPU time | 29.02 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:38:05 PM UTC 24 |
| Peak memory | 234928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=556378361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.556378361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.1480584240 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 167508814 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1480584240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.1480584240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.3135349263 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 234031710 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135349263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_stall_trans.3135349263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.1893632336 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 1120957689 ps |
| CPU time | 2.82 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:39 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893632336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.1893632336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.2465007091 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 2653824957 ps |
| CPU time | 17.43 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:54 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465007091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.2465007091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.1340677042 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 1061247117 ps |
| CPU time | 7.93 seconds |
| Started | Oct 09 09:36:38 PM UTC 24 |
| Finished | Oct 09 09:36:47 PM UTC 24 |
| Peak memory | 217516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340677042 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.1340677042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.3322302427 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 461457438 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:37:34 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3322302427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_t x_rx_disruption.3322302427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.396715789 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 546614235 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=396715789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_t x_rx_disruption.396715789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.2226926370 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 644238302 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2226926370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.2226926370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.2129992990 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 480121055 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2129992990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.2129992990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.3276590452 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 482454825 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3276590452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.3276590452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.3514671716 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 591698390 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3514671716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_ tx_rx_disruption.3514671716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.517907878 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 595803333 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=517907878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_t x_rx_disruption.517907878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.834791407 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 609397018 ps |
| CPU time | 1.79 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=834791407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_t x_rx_disruption.834791407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.1305875803 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 598730975 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1305875803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.1305875803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.373420536 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 583341218 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=373420536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_t x_rx_disruption.373420536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.2980430636 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 506463657 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2980430636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_ tx_rx_disruption.2980430636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.418353344 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 67558477 ps |
| CPU time | 0.63 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:29 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=418353344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.418353344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.590546689 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 11154361870 ps |
| CPU time | 14.29 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:51 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=590546689 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.590546689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.2752475030 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 19374916754 ps |
| CPU time | 22.37 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:59 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752475030 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.2752475030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.1642458691 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 31262040237 ps |
| CPU time | 39.14 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:38:16 PM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1642458691 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.1642458691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.1793318200 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 185337427 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1793318200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.1793318200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.2758366579 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 156668567 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758366579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.2758366579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.3829999099 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 420523357 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829999099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 46.usbdev_data_toggle_clear.3829999099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.3822726617 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 714575106 ps |
| CPU time | 2 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:39 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822726617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.3822726617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.405051610 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 27883489947 ps |
| CPU time | 43.15 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:38:20 PM UTC 24 |
| Peak memory | 216676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=405051610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_device_address.405051610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.1196528318 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 489552124 ps |
| CPU time | 7.42 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:44 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196528318 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.1196528318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.1650201410 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 511363546 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650201410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.1650201410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.2283011089 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 145281020 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283011089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.2283011089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_enable.1331514991 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 41663730 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:37 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331514991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.1331514991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.561060365 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 846747580 ps |
| CPU time | 2.43 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:39 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561060365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.561060365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.2857831584 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 327221821 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2857831584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.2857831584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.3476786363 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 256877987 ps |
| CPU time | 1.26 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476786363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_fifo_levels.3476786363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.2861060680 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 265612833 ps |
| CPU time | 1.98 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:39 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861060680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.2861060680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.3837336546 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 226373293 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3837336546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.3837336546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.2768968351 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 235299713 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768968351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_stall.2768968351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.2150322373 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 267762105 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150322373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.2150322373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.3918862771 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 2301644132 ps |
| CPU time | 53.51 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:38:31 PM UTC 24 |
| Peak memory | 235012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3918862771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.3918862771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.1323896306 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 10836613404 ps |
| CPU time | 116.26 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:39:34 PM UTC 24 |
| Peak memory | 220772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323896306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.1323896306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.3452468730 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 167766952 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452468730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.3452468730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.1251928255 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 6416212878 ps |
| CPU time | 9.2 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:46 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251928255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_resume.1251928255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.2627478560 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 10575418836 ps |
| CPU time | 14.75 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:52 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2627478560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_link_suspend.2627478560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.4226366487 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 5737519320 ps |
| CPU time | 49.34 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:38:27 PM UTC 24 |
| Peak memory | 230452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226366487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.4226366487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.3260236071 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 3530861991 ps |
| CPU time | 83.33 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:39:01 PM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3260236071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.3260236071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.2287823997 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 259586797 ps |
| CPU time | 1.13 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287823997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.2287823997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.2700477882 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 203119364 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:37:36 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700477882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.2700477882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.2777014604 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 1597575059 ps |
| CPU time | 34.95 seconds |
| Started | Oct 09 09:37:36 PM UTC 24 |
| Finished | Oct 09 09:38:12 PM UTC 24 |
| Peak memory | 228112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777014604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.2777014604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.3472013005 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 190415863 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:37:36 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472013005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.3472013005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.2398694130 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 139204362 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:37:36 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398694130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.2398694130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.1904840801 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 173738731 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:37:36 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1904840801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.1904840801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.918100957 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 207577801 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:37:36 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=918100957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_out_iso.918100957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.1961751045 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 165797420 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:37:36 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1961751045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.1961751045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.3857933770 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 172593806 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:37:36 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3857933770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.3857933770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.787122279 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 172969598 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:37:36 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=787122279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pending_in_trans.787122279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.1320669266 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 244586899 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:37:36 PM UTC 24 |
| Finished | Oct 09 09:37:38 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320669266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.1320669266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.782291444 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 183490498 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:38:26 PM UTC 24 |
| Finished | Oct 09 09:38:27 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=782291444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.782291444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.3180923168 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 37718596 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:38:26 PM UTC 24 |
| Finished | Oct 09 09:38:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180923168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.3180923168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.3362385725 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 18814350951 ps |
| CPU time | 42.47 seconds |
| Started | Oct 09 09:38:26 PM UTC 24 |
| Finished | Oct 09 09:39:09 PM UTC 24 |
| Peak memory | 228588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362385725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.3362385725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.2044837731 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 197790088 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:38:26 PM UTC 24 |
| Finished | Oct 09 09:38:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2044837731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.2044837731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.3131547965 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 194090764 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:38:26 PM UTC 24 |
| Finished | Oct 09 09:38:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131547965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.3131547965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.1303758279 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 243849850 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:29 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1303758279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.1303758279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.3274880137 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 186524762 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:29 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3274880137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.3274880137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.1833478036 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 166989593 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:29 PM UTC 24 |
| Peak memory | 216204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1833478036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_rx_crc_err.1833478036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.3065937646 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 305685674 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:29 PM UTC 24 |
| Peak memory | 216004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3065937646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.3065937646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.1381293134 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 185765924 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:29 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381293134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.1381293134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.2233849137 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 162094027 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:29 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2233849137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.2233849137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.2404133400 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 222773399 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:29 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404133400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.2404133400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.254074684 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 2368289955 ps |
| CPU time | 15.55 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:44 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=254074684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.254074684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.373560751 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 234886040 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:29 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=373560751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.373560751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.2419256534 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 166064099 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:29 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419256534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.2419256534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.1815254763 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 449909562 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815254763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.1815254763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.2162539760 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 3955789517 ps |
| CPU time | 34.24 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:39:03 PM UTC 24 |
| Peak memory | 228380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162539760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.2162539760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.1123986711 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 309951064 ps |
| CPU time | 4.11 seconds |
| Started | Oct 09 09:37:35 PM UTC 24 |
| Finished | Oct 09 09:37:41 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123986711 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.1123986711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.1622960341 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 542506094 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1622960341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_t x_rx_disruption.1622960341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.2701866446 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 612522377 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2701866446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.2701866446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.1431239744 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 533427112 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1431239744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.1431239744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.3269216180 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 714717027 ps |
| CPU time | 1.8 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3269216180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_ tx_rx_disruption.3269216180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.2889383774 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 666208937 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2889383774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.2889383774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.1486480119 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 454805648 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1486480119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_ tx_rx_disruption.1486480119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.4040865346 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 502160531 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:26 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4040865346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_ tx_rx_disruption.4040865346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.3888936619 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 598985046 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3888936619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_ tx_rx_disruption.3888936619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.1059395980 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 658744321 ps |
| CPU time | 1.73 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1059395980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_ tx_rx_disruption.1059395980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.46085920 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 559569364 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=46085920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_tx _rx_disruption.46085920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.3832600995 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 629936771 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3832600995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.3832600995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.2631109328 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 53034597 ps |
| CPU time | 0.62 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2631109328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.2631109328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.3762672754 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 12247296269 ps |
| CPU time | 17.29 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:46 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3762672754 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.3762672754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.1535918260 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 20148951325 ps |
| CPU time | 22.51 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:51 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535918260 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.1535918260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.2963809017 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 30949379631 ps |
| CPU time | 45.69 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:39:15 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963809017 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.2963809017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.4219745671 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 179388719 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4219745671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.4219745671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.573447434 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 179240611 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=573447434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_bitstuff_err.573447434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.4145560773 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 158433436 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4145560773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 47.usbdev_data_toggle_clear.4145560773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.4213405915 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 443421854 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213405915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.4213405915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.2578273614 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 36816172095 ps |
| CPU time | 63.8 seconds |
| Started | Oct 09 09:38:27 PM UTC 24 |
| Finished | Oct 09 09:39:33 PM UTC 24 |
| Peak memory | 218644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2578273614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.2578273614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.3278617805 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 1447070637 ps |
| CPU time | 27.08 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:56 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278617805 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.3278617805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.1526289181 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 904137212 ps |
| CPU time | 2.01 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:31 PM UTC 24 |
| Peak memory | 217820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1526289181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.1526289181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.1017486695 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 145775095 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017486695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.1017486695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_enable.604029631 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 51918941 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=604029631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_enable.604029631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.416206363 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 830353832 ps |
| CPU time | 2.25 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:32 PM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=416206363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.416206363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.3548116538 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 487553889 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:31 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548116538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.3548116538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.3975879846 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 181938462 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975879846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_fifo_levels.3975879846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.866770881 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 490737000 ps |
| CPU time | 2.72 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:32 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866770881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_fifo_rst.866770881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.4168503717 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 203438748 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4168503717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.4168503717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.1681606156 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 172936624 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1681606156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.1681606156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.1031563910 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 214081654 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1031563910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_trans.1031563910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.3533087696 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 4579886677 ps |
| CPU time | 29.77 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:59 PM UTC 24 |
| Peak memory | 234944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533087696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.3533087696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.687694203 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 7284437311 ps |
| CPU time | 41.23 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:39:11 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=687694203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.687694203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.573488271 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 198094212 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:30 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=573488271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_link_in_err.573488271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.2292234466 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 24596108525 ps |
| CPU time | 38.64 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:39:09 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292234466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_resume.2292234466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.1575305406 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 3413491700 ps |
| CPU time | 4.68 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:34 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575305406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_link_suspend.1575305406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.3325651967 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 3552031965 ps |
| CPU time | 30.3 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:39:00 PM UTC 24 |
| Peak memory | 230380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325651967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.3325651967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.2530970994 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 2558964192 ps |
| CPU time | 22.05 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:52 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530970994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.2530970994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.3644672297 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 285834262 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:31 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3644672297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.3644672297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.4240068703 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 186741852 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:31 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4240068703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.4240068703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.4062751487 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 1586295593 ps |
| CPU time | 13.08 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:43 PM UTC 24 |
| Peak memory | 228208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4062751487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.4062751487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.3111076510 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 166225370 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:27 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3111076510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.3111076510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.1765720482 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 146869412 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:27 PM UTC 24 |
| Peak memory | 214396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1765720482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.1765720482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.2903608960 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 182218408 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:27 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903608960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.2903608960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.26114389 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 174661045 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:27 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=26114389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_out_iso.26114389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.239868186 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 190645258 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:27 PM UTC 24 |
| Peak memory | 214408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=239868186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_out_stall.239868186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.2394791994 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 193542594 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:27 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394791994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.2394791994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.2086119472 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 154896499 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:27 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086119472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.2086119472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.65386945 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 220359961 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=65386945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.65386945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.2424191165 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 146741377 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2424191165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.2424191165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.136935705 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 37453526 ps |
| CPU time | 0.64 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:27 PM UTC 24 |
| Peak memory | 216796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=136935705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_phy_pins_sense.136935705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.3770858611 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 11329060240 ps |
| CPU time | 26.15 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:53 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770858611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_pkt_buffer.3770858611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.878254376 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 188288638 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878254376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_pkt_received.878254376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.800420077 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 232555050 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=800420077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_pkt_sent.800420077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.4062942756 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 231465290 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4062942756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_random_length_in_transaction.4062942756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.3652300158 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 152933398 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:39:25 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652300158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.3652300158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.3508584246 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 166158673 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508584246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_rx_crc_err.3508584246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.2630524360 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 253508443 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2630524360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.2630524360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.1051136488 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 168205576 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051136488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_setup_stage.1051136488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.3524190365 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 195623079 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524190365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 47.usbdev_setup_trans_ignored.3524190365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.3013791196 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 246135826 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 216584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013791196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.3013791196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.1815405484 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 2103095453 ps |
| CPU time | 17.64 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:45 PM UTC 24 |
| Peak memory | 228320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815405484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.1815405484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.2355884993 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 205507930 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355884993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.2355884993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.280201246 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 181129743 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280201246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_stall_trans.280201246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.3941265206 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 224837255 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941265206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.3941265206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.2154505298 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 4143108295 ps |
| CPU time | 103.11 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:41:11 PM UTC 24 |
| Peak memory | 230236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154505298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.2154505298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.892235124 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 1152953432 ps |
| CPU time | 21.89 seconds |
| Started | Oct 09 09:38:28 PM UTC 24 |
| Finished | Oct 09 09:38:51 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=892235124 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.892235124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.3024823941 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 541047797 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3024823941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_t x_rx_disruption.3024823941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.4184874996 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 595351464 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4184874996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_ tx_rx_disruption.4184874996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.474783104 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 424568144 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=474783104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_t x_rx_disruption.474783104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.3525451664 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 500689284 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3525451664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_ tx_rx_disruption.3525451664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.478526398 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 621342762 ps |
| CPU time | 1.74 seconds |
| Started | Oct 09 09:55:23 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=478526398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_t x_rx_disruption.478526398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.3799308858 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 489973676 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3799308858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_ tx_rx_disruption.3799308858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.304433489 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 557611763 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=304433489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_t x_rx_disruption.304433489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.173724634 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 522978283 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=173724634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_t x_rx_disruption.173724634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.1075904134 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 564269839 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1075904134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_ tx_rx_disruption.1075904134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.2146089694 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 620391909 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 216156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2146089694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.2146089694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.103283982 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 490468566 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=103283982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_t x_rx_disruption.103283982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.611809900 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 32770303 ps |
| CPU time | 0.58 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=611809900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.611809900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.3632114138 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 5223933549 ps |
| CPU time | 7.56 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:35 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632114138 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.3632114138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.1961376196 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 20782211781 ps |
| CPU time | 25.06 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:53 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1961376196 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.1961376196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.2082901496 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 23574280005 ps |
| CPU time | 30.86 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:59 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2082901496 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.2082901496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.3530850451 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 180279859 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530850451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.3530850451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.3936804311 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 199096583 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936804311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_bitstuff_err.3936804311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.463769493 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 278842124 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=463769493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_data_toggle_clear.463769493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.795554597 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 1225896904 ps |
| CPU time | 2.86 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:31 PM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=795554597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.795554597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.4259227060 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 45204562258 ps |
| CPU time | 75.11 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:40:44 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259227060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.4259227060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3130956456 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 721290559 ps |
| CPU time | 12.62 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:41 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130956456 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.3130956456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.4129689326 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 653838578 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:30 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4129689326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_disable_endpoint.4129689326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.3461348566 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 177846404 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461348566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_disconnected.3461348566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_enable.1258429186 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 63979829 ps |
| CPU time | 0.7 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258429186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_enable.1258429186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.682698698 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 818559179 ps |
| CPU time | 2.11 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:30 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=682698698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.682698698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.1075450063 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 553444542 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:30 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075450063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.1075450063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.3952694982 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 180292888 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952694982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_fifo_levels.3952694982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.1622808896 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 208733055 ps |
| CPU time | 2.46 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:39:31 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622808896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_fifo_rst.1622808896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.3480422275 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 206898044 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480422275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.3480422275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.2511508601 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 173647224 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511508601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.2511508601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.1225755102 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 170343765 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225755102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_trans.1225755102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.4033727030 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 4734204941 ps |
| CPU time | 112.23 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:41:22 PM UTC 24 |
| Peak memory | 230612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033727030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.4033727030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.3271469960 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 9331671449 ps |
| CPU time | 96.82 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:41:06 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3271469960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.3271469960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.722276426 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 195431173 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722276426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_link_in_err.722276426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.2305559494 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 27036553991 ps |
| CPU time | 39.3 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:40:08 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305559494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_resume.2305559494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.573017715 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 10924493070 ps |
| CPU time | 13.38 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:39:42 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=573017715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_suspend.573017715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.1016223289 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 3996749397 ps |
| CPU time | 95.43 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:41:05 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016223289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.1016223289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.458283850 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 2848538431 ps |
| CPU time | 18.2 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:39:47 PM UTC 24 |
| Peak memory | 234944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=458283850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.458283850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.4117027389 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 252664565 ps |
| CPU time | 0.94 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:39:29 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117027389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.4117027389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.4095463174 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 201308192 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:39:27 PM UTC 24 |
| Finished | Oct 09 09:39:30 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095463174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.4095463174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.1114388945 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 2628273508 ps |
| CPU time | 21.3 seconds |
| Started | Oct 09 09:40:25 PM UTC 24 |
| Finished | Oct 09 09:40:48 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114388945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.1114388945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.2682884057 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 158866834 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:40:25 PM UTC 24 |
| Finished | Oct 09 09:40:27 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682884057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.2682884057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.2558707259 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 141068525 ps |
| CPU time | 0.75 seconds |
| Started | Oct 09 09:40:25 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2558707259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.2558707259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.1426197554 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 211333476 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:40:25 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426197554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.1426197554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.4157915458 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 190032284 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:40:25 PM UTC 24 |
| Finished | Oct 09 09:40:27 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157915458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.4157915458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.2663725758 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 163809641 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:40:25 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663725758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.2663725758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.173536954 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 186671724 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:40:25 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173536954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_out_trans_nak.173536954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.1500672503 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 159380641 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:40:25 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1500672503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.1500672503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.3897292630 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 208520973 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:40:25 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897292630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.3897292630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.2648062268 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 144037670 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:40:25 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648062268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.2648062268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.782263821 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 42000926 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=782263821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_phy_pins_sense.782263821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.2423044085 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 20895039968 ps |
| CPU time | 45.12 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:41:13 PM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2423044085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.2423044085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.1043658243 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 174058664 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043658243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_pkt_received.1043658243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.2342764666 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 224552929 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2342764666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_pkt_sent.2342764666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.1235000259 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 210043620 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1235000259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.1235000259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.2755581310 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 187974697 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2755581310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.2755581310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.4255861567 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 161002204 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4255861567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_rx_crc_err.4255861567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.3890636412 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 419366582 ps |
| CPU time | 1.28 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890636412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.3890636412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.2778253648 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 190039797 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:28 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778253648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_setup_stage.2778253648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.3291616003 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 164874676 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291616003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.3291616003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.4047183707 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 244850733 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4047183707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.4047183707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.1048449557 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 2396903904 ps |
| CPU time | 15.52 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:43 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048449557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.1048449557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.3100679026 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 220209994 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100679026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.3100679026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.2834692788 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 209848202 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2834692788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stall_trans.2834692788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.120722824 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 280236963 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=120722824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_stream_len_max.120722824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.2761128566 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 3626366543 ps |
| CPU time | 24.07 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:52 PM UTC 24 |
| Peak memory | 228644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761128566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_streaming_out.2761128566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.3724150791 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 1041058226 ps |
| CPU time | 18.68 seconds |
| Started | Oct 09 09:39:26 PM UTC 24 |
| Finished | Oct 09 09:39:47 PM UTC 24 |
| Peak memory | 218196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724150791 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.3724150791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.2566848584 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 499207476 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2566848584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.2566848584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.4058964545 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 607541718 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4058964545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_ tx_rx_disruption.4058964545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.4252747492 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 603559321 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4252747492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.4252747492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.4085604658 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 531650836 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4085604658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.4085604658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.1784499392 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 620665369 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1784499392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.1784499392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.3546476720 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 505699019 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3546476720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.3546476720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.1890897029 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 599983120 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1890897029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.1890897029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.293329184 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 512669473 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=293329184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_t x_rx_disruption.293329184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.3441838890 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 559050899 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3441838890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_ tx_rx_disruption.3441838890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.1465040002 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 592706060 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1465040002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.1465040002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.3991848923 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 552318931 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3991848923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_ tx_rx_disruption.3991848923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.1479895862 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 84477779 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479895862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.1479895862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.1986578078 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 5972703861 ps |
| CPU time | 8.11 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:36 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986578078 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.1986578078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3184531153 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 13430872151 ps |
| CPU time | 18.22 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:46 PM UTC 24 |
| Peak memory | 228524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184531153 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.3184531153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.606273823 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 24536902813 ps |
| CPU time | 33.31 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:41:02 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=606273823 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.606273823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.651280805 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 192362391 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=651280805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_av_buffer.651280805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.3880503289 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 150039759 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880503289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_bitstuff_err.3880503289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.3451491001 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 423112016 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:30 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451491001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 49.usbdev_data_toggle_clear.3451491001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.2187512296 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 374632734 ps |
| CPU time | 1.2 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:30 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2187512296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.2187512296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.2898855166 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 25859972097 ps |
| CPU time | 46.68 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:41:15 PM UTC 24 |
| Peak memory | 218420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898855166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.2898855166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.2114355679 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 577189889 ps |
| CPU time | 9.69 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:38 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114355679 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.2114355679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.3441908097 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 1321584292 ps |
| CPU time | 2.44 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:31 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441908097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.3441908097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.1410672963 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 154081651 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410672963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.1410672963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_enable.3430351686 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 34628637 ps |
| CPU time | 0.66 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3430351686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.3430351686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.2875848447 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 924199569 ps |
| CPU time | 2.33 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:31 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875848447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.2875848447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.3758331519 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 571499902 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:30 PM UTC 24 |
| Peak memory | 215476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758331519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.3758331519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.1258085441 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 273787912 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:30 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258085441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_fifo_levels.1258085441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.2300438369 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 295095919 ps |
| CPU time | 1.77 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:30 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300438369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.2300438369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.3616592979 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 229282843 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:30 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3616592979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.3616592979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.1179196505 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 142757343 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:29 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179196505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.1179196505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.2573630796 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 239318627 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:30 PM UTC 24 |
| Peak memory | 215440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573630796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.2573630796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.2232013966 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 4411677803 ps |
| CPU time | 107.85 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:42:18 PM UTC 24 |
| Peak memory | 230208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2232013966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.2232013966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.377608446 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 8392907041 ps |
| CPU time | 52.91 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:41:22 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=377608446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.377608446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.3882110332 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 197740586 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:30 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3882110332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.3882110332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.894529916 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 28180676318 ps |
| CPU time | 42.9 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:41:12 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=894529916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_link_resume.894529916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.3052564373 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 5872376524 ps |
| CPU time | 8.56 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:37 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052564373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.3052564373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.1962191130 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 3118206210 ps |
| CPU time | 19.66 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:49 PM UTC 24 |
| Peak memory | 234972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962191130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.1962191130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.2974570069 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 3351402366 ps |
| CPU time | 79.4 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:41:49 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2974570069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.2974570069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.4286066310 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 240215025 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:40:27 PM UTC 24 |
| Finished | Oct 09 09:40:30 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4286066310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.4286066310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.2769586113 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 187463582 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769586113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.2769586113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.2449463910 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 2456314115 ps |
| CPU time | 20.93 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:45 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449463910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.2449463910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.2435438033 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 169752185 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435438033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.2435438033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.2542697735 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 142589408 ps |
| CPU time | 0.75 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542697735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.2542697735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.3492238926 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 284222467 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492238926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_nak_trans.3492238926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.593679478 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 235928187 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=593679478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_out_iso.593679478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.3380792652 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 180995527 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380792652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_out_stall.3380792652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.3352599622 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 185659019 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3352599622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.3352599622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.764831707 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 200769355 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=764831707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pending_in_trans.764831707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.1382312040 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 239958212 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382312040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.1382312040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.1998566662 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 157300551 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998566662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.1998566662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.3992417971 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 58465231 ps |
| CPU time | 0.65 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:25 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992417971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.3992417971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.271668136 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 14031108008 ps |
| CPU time | 32.14 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:57 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=271668136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_pkt_buffer.271668136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.2475088597 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 154732415 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475088597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.2475088597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.4083389955 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 255194789 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083389955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.4083389955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.3657617456 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 202783500 ps |
| CPU time | 0.91 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657617456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.3657617456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.1098372452 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 181574593 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098372452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.1098372452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.2384299556 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 198596902 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2384299556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.2384299556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.3197450021 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 254660154 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:41:23 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197450021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.3197450021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.2880670103 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 147068882 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880670103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.2880670103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.2369429940 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 178051009 ps |
| CPU time | 0.81 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369429940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.2369429940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.4213504426 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 181286605 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213504426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.4213504426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.1060937836 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 2476773315 ps |
| CPU time | 58 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:42:24 PM UTC 24 |
| Peak memory | 235380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1060937836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.1060937836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.3183552716 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 196652403 ps |
| CPU time | 0.84 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183552716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.3183552716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.1306747833 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 150796527 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306747833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.1306747833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.476525027 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 210196571 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476525027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_stream_len_max.476525027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.1858169775 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 2245148955 ps |
| CPU time | 51.38 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:42:17 PM UTC 24 |
| Peak memory | 228708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858169775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.1858169775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.3957367200 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 1309718783 ps |
| CPU time | 25.25 seconds |
| Started | Oct 09 09:40:26 PM UTC 24 |
| Finished | Oct 09 09:40:54 PM UTC 24 |
| Peak memory | 217488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3957367200 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.3957367200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.3394885052 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 509828452 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3394885052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_t x_rx_disruption.3394885052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.2030608417 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 435489188 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2030608417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.2030608417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.1195259610 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 558269493 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1195259610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.1195259610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.2188885777 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 574021426 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2188885777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.2188885777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.3203755442 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 513048116 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3203755442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.3203755442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.2080247359 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 499650391 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2080247359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.2080247359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.1127068370 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 568975118 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1127068370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.1127068370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.1953274950 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 609028027 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1953274950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_ tx_rx_disruption.1953274950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.809679180 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 544678143 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=809679180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_t x_rx_disruption.809679180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.3197239108 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 584896564 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3197239108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.3197239108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.3033845349 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 551671298 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:55:24 PM UTC 24 |
| Finished | Oct 09 09:55:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3033845349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.3033845349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.2269908141 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 45914751 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:12:22 PM UTC 24 |
| Finished | Oct 09 09:12:24 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269908141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.2269908141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.4105963068 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 5253382237 ps |
| CPU time | 15.34 seconds |
| Started | Oct 09 09:11:51 PM UTC 24 |
| Finished | Oct 09 09:12:08 PM UTC 24 |
| Peak memory | 228520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105963068 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.4105963068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.3344236667 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 14530250417 ps |
| CPU time | 20.88 seconds |
| Started | Oct 09 09:11:51 PM UTC 24 |
| Finished | Oct 09 09:12:13 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344236667 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.3344236667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.1014235418 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 25537884165 ps |
| CPU time | 37.14 seconds |
| Started | Oct 09 09:11:51 PM UTC 24 |
| Finished | Oct 09 09:12:30 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1014235418 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.1014235418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.3774296743 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 168119111 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:11:53 PM UTC 24 |
| Finished | Oct 09 09:11:55 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774296743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_av_buffer.3774296743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.600688102 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 164145615 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:11:53 PM UTC 24 |
| Finished | Oct 09 09:11:55 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=600688102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_bitstuff_err.600688102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.1169880885 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 243897035 ps |
| CPU time | 1.78 seconds |
| Started | Oct 09 09:11:53 PM UTC 24 |
| Finished | Oct 09 09:11:56 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1169880885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.1169880885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.2224018972 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 697573794 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:11:54 PM UTC 24 |
| Finished | Oct 09 09:11:57 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224018972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.2224018972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.25003404 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 47778842967 ps |
| CPU time | 92.02 seconds |
| Started | Oct 09 09:11:55 PM UTC 24 |
| Finished | Oct 09 09:13:29 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=25003404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_device_address.25003404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.3557371765 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 579644478 ps |
| CPU time | 11.6 seconds |
| Started | Oct 09 09:11:56 PM UTC 24 |
| Finished | Oct 09 09:12:09 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557371765 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.3557371765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.322520841 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 456831491 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:11:56 PM UTC 24 |
| Finished | Oct 09 09:11:59 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=322520841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_disable_endpoint.322520841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.2235947549 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 150067460 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:11:58 PM UTC 24 |
| Finished | Oct 09 09:12:00 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235947549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.2235947549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_enable.163049132 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 91811913 ps |
| CPU time | 1.28 seconds |
| Started | Oct 09 09:11:58 PM UTC 24 |
| Finished | Oct 09 09:12:00 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=163049132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_enable.163049132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.290080053 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 888548960 ps |
| CPU time | 4.54 seconds |
| Started | Oct 09 09:12:00 PM UTC 24 |
| Finished | Oct 09 09:12:06 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=290080053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.290080053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.4279828816 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 223086177 ps |
| CPU time | 1.65 seconds |
| Started | Oct 09 09:12:00 PM UTC 24 |
| Finished | Oct 09 09:12:03 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279828816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.4279828816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.3054625628 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 302722769 ps |
| CPU time | 3.97 seconds |
| Started | Oct 09 09:12:00 PM UTC 24 |
| Finished | Oct 09 09:12:05 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3054625628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_fifo_rst.3054625628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.2238426383 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 225308175 ps |
| CPU time | 1.99 seconds |
| Started | Oct 09 09:12:03 PM UTC 24 |
| Finished | Oct 09 09:12:06 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238426383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.2238426383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.1751566701 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 219118925 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:12:03 PM UTC 24 |
| Finished | Oct 09 09:12:05 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751566701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_stall.1751566701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.2758854929 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 212501710 ps |
| CPU time | 1.79 seconds |
| Started | Oct 09 09:12:03 PM UTC 24 |
| Finished | Oct 09 09:12:06 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758854929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.2758854929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.1603053589 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 3114663887 ps |
| CPU time | 32.14 seconds |
| Started | Oct 09 09:12:00 PM UTC 24 |
| Finished | Oct 09 09:12:34 PM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1603053589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.1603053589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.2503484288 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 7835671659 ps |
| CPU time | 103.56 seconds |
| Started | Oct 09 09:12:03 PM UTC 24 |
| Finished | Oct 09 09:13:49 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503484288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.2503484288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.1401476109 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 186068114 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:12:04 PM UTC 24 |
| Finished | Oct 09 09:12:07 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401476109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.1401476109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.4103229182 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 5112194597 ps |
| CPU time | 12.69 seconds |
| Started | Oct 09 09:12:04 PM UTC 24 |
| Finished | Oct 09 09:12:18 PM UTC 24 |
| Peak memory | 228516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103229182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.4103229182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.147729202 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 6205603698 ps |
| CPU time | 15.6 seconds |
| Started | Oct 09 09:12:04 PM UTC 24 |
| Finished | Oct 09 09:12:21 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=147729202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_suspend.147729202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.1025706744 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 2096630342 ps |
| CPU time | 15.87 seconds |
| Started | Oct 09 09:12:06 PM UTC 24 |
| Finished | Oct 09 09:12:23 PM UTC 24 |
| Peak memory | 230260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1025706744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.1025706744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.439354332 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 3783146432 ps |
| CPU time | 101.82 seconds |
| Started | Oct 09 09:12:06 PM UTC 24 |
| Finished | Oct 09 09:13:50 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=439354332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.439354332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.3153139969 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 250032347 ps |
| CPU time | 1.88 seconds |
| Started | Oct 09 09:12:06 PM UTC 24 |
| Finished | Oct 09 09:12:09 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153139969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.3153139969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.2633157119 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 203074773 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:12:07 PM UTC 24 |
| Finished | Oct 09 09:12:10 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2633157119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.2633157119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.2150123776 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 3030010312 ps |
| CPU time | 29.65 seconds |
| Started | Oct 09 09:12:07 PM UTC 24 |
| Finished | Oct 09 09:12:39 PM UTC 24 |
| Peak memory | 235196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150123776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.2150123776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.1331692003 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 3166475647 ps |
| CPU time | 88.23 seconds |
| Started | Oct 09 09:12:07 PM UTC 24 |
| Finished | Oct 09 09:13:38 PM UTC 24 |
| Peak memory | 235068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331692003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.1331692003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.2550080206 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 1842353032 ps |
| CPU time | 48.15 seconds |
| Started | Oct 09 09:12:07 PM UTC 24 |
| Finished | Oct 09 09:12:58 PM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550080206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.2550080206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.1919630164 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 152024191 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:12:07 PM UTC 24 |
| Finished | Oct 09 09:12:10 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1919630164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.1919630164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.186743644 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 139868087 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:12:08 PM UTC 24 |
| Finished | Oct 09 09:12:10 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=186743644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.186743644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.3916656113 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 233675357 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:12:09 PM UTC 24 |
| Finished | Oct 09 09:12:11 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3916656113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_nak_trans.3916656113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.5451505 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 163061640 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:12:10 PM UTC 24 |
| Finished | Oct 09 09:12:13 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=5451505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_out_iso.5451505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.319889079 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 153884061 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:12:10 PM UTC 24 |
| Finished | Oct 09 09:12:12 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=319889079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_out_stall.319889079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.3803979198 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 204149299 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:12:10 PM UTC 24 |
| Finished | Oct 09 09:12:13 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3803979198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.3803979198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.4178935337 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 211624864 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:12:11 PM UTC 24 |
| Finished | Oct 09 09:12:14 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178935337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.4178935337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.2209178195 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 236072006 ps |
| CPU time | 1.75 seconds |
| Started | Oct 09 09:12:11 PM UTC 24 |
| Finished | Oct 09 09:12:14 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209178195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.2209178195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.3168450138 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 34029483 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:12:12 PM UTC 24 |
| Finished | Oct 09 09:12:15 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168450138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.3168450138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.827795461 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 8048993794 ps |
| CPU time | 25.29 seconds |
| Started | Oct 09 09:12:14 PM UTC 24 |
| Finished | Oct 09 09:12:41 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=827795461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_pkt_buffer.827795461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.4160485460 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 177059842 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:12:14 PM UTC 24 |
| Finished | Oct 09 09:12:17 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160485460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.4160485460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.1112381719 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 235881718 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:12:14 PM UTC 24 |
| Finished | Oct 09 09:12:17 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112381719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_pkt_sent.1112381719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.741475958 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 3795919003 ps |
| CPU time | 26.16 seconds |
| Started | Oct 09 09:12:15 PM UTC 24 |
| Finished | Oct 09 09:12:43 PM UTC 24 |
| Peak memory | 235004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=741475958 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.741475958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.2016026877 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 5802940082 ps |
| CPU time | 27.72 seconds |
| Started | Oct 09 09:12:15 PM UTC 24 |
| Finished | Oct 09 09:12:45 PM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016026877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.2016026877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.1745941290 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 17117714531 ps |
| CPU time | 110.42 seconds |
| Started | Oct 09 09:12:15 PM UTC 24 |
| Finished | Oct 09 09:14:08 PM UTC 24 |
| Peak memory | 230384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1745941290 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.1745941290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.1638236872 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 259595835 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:12:14 PM UTC 24 |
| Finished | Oct 09 09:12:17 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1638236872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.1638236872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.789563556 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 181212521 ps |
| CPU time | 1.22 seconds |
| Started | Oct 09 09:12:14 PM UTC 24 |
| Finished | Oct 09 09:12:17 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=789563556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.789563556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.3692578444 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 20160531942 ps |
| CPU time | 36.93 seconds |
| Started | Oct 09 09:12:15 PM UTC 24 |
| Finished | Oct 09 09:12:54 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3692578444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.3692578444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.3513024305 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 161193999 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:12:17 PM UTC 24 |
| Finished | Oct 09 09:12:19 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3513024305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.3513024305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.124255572 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 256116194 ps |
| CPU time | 1.8 seconds |
| Started | Oct 09 09:12:17 PM UTC 24 |
| Finished | Oct 09 09:12:20 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124255572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_rx_full.124255572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.625629038 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 151333887 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:12:19 PM UTC 24 |
| Finished | Oct 09 09:12:22 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=625629038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_setup_stage.625629038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.873691085 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 155463524 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:12:19 PM UTC 24 |
| Finished | Oct 09 09:12:21 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873691085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_setup_trans_ignored.873691085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.1167057317 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 200239749 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:12:19 PM UTC 24 |
| Finished | Oct 09 09:12:22 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167057317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.1167057317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.662779052 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 2467868744 ps |
| CPU time | 26.64 seconds |
| Started | Oct 09 09:12:19 PM UTC 24 |
| Finished | Oct 09 09:12:47 PM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=662779052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.662779052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.2268845216 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 170663394 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:12:19 PM UTC 24 |
| Finished | Oct 09 09:12:22 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268845216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.2268845216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.2647857651 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 183476359 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:12:19 PM UTC 24 |
| Finished | Oct 09 09:12:21 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2647857651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.2647857651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.2054453442 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 446964947 ps |
| CPU time | 1.88 seconds |
| Started | Oct 09 09:12:21 PM UTC 24 |
| Finished | Oct 09 09:12:24 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2054453442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.2054453442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.3927934305 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 2367106651 ps |
| CPU time | 22.52 seconds |
| Started | Oct 09 09:12:19 PM UTC 24 |
| Finished | Oct 09 09:12:43 PM UTC 24 |
| Peak memory | 230552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3927934305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.3927934305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.1048515956 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 351760325 ps |
| CPU time | 5.39 seconds |
| Started | Oct 09 09:11:56 PM UTC 24 |
| Finished | Oct 09 09:12:03 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048515956 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.1048515956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.2921681855 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 525750088 ps |
| CPU time | 1.85 seconds |
| Started | Oct 09 09:12:22 PM UTC 24 |
| Finished | Oct 09 09:12:25 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2921681855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.2921681855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.1385694161 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 781595844 ps |
| CPU time | 1.74 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385694161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.1385694161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.3008238012 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 328651896 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008238012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 50.usbdev_fifo_levels.3008238012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.172752736 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 596653429 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=172752736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_tx _rx_disruption.172752736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.3724391377 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 583853684 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724391377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.3724391377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.3185115988 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 276824745 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185115988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 51.usbdev_fifo_levels.3185115988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1361186747 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 502071804 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1361186747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.1361186747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.3098862371 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 249055691 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3098862371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.3098862371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.2120691655 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 171243238 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:26 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2120691655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.2120691655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.1050512873 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 515890384 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1050512873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.1050512873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.3687729110 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 210663400 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687729110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.3687729110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.1434134803 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 327522163 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434134803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 53.usbdev_fifo_levels.1434134803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.1060677787 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 490380028 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1060677787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.1060677787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.174327169 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 264175680 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174327169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 54.usbdev_fifo_levels.174327169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.3432238840 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 631599044 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:28 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3432238840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.3432238840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.1992579315 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 163954326 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992579315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.1992579315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.652657717 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 299013214 ps |
| CPU time | 1.07 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=652657717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 55.usbdev_fifo_levels.652657717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.3458404115 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 658718440 ps |
| CPU time | 1.9 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:28 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3458404115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_t x_rx_disruption.3458404115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.2999127766 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 230125181 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:41:24 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999127766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.2999127766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.2926653036 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 242021975 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:41:25 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926653036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 56.usbdev_fifo_levels.2926653036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.2460516975 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 442776578 ps |
| CPU time | 1.34 seconds |
| Started | Oct 09 09:41:25 PM UTC 24 |
| Finished | Oct 09 09:41:27 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2460516975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_t x_rx_disruption.2460516975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.2566594852 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 146929474 ps |
| CPU time | 0.78 seconds |
| Started | Oct 09 09:42:28 PM UTC 24 |
| Finished | Oct 09 09:42:30 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566594852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 57.usbdev_fifo_levels.2566594852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.3509509328 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 454266216 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:42:28 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3509509328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.3509509328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.4068955227 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 291543647 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:42:28 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4068955227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 58.usbdev_fifo_levels.4068955227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.298120539 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 474146084 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:42:28 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=298120539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_tx _rx_disruption.298120539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.1121955590 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 190118052 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:42:28 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121955590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.1121955590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.1158647588 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 164240430 ps |
| CPU time | 0.83 seconds |
| Started | Oct 09 09:42:28 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158647588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 59.usbdev_fifo_levels.1158647588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.2079842466 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 598685471 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:42:28 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2079842466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.2079842466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.1685094500 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 89159771 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:12:51 PM UTC 24 |
| Finished | Oct 09 09:12:53 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685094500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.1685094500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.3719190290 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 5211123803 ps |
| CPU time | 12.18 seconds |
| Started | Oct 09 09:12:22 PM UTC 24 |
| Finished | Oct 09 09:12:36 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719190290 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.3719190290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.123755596 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 14979046303 ps |
| CPU time | 19.98 seconds |
| Started | Oct 09 09:12:24 PM UTC 24 |
| Finished | Oct 09 09:12:45 PM UTC 24 |
| Peak memory | 228452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=123755596 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.123755596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.3656898384 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 31117709663 ps |
| CPU time | 52.59 seconds |
| Started | Oct 09 09:12:24 PM UTC 24 |
| Finished | Oct 09 09:13:18 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656898384 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.3656898384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.3470724086 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 155759753 ps |
| CPU time | 1.39 seconds |
| Started | Oct 09 09:12:24 PM UTC 24 |
| Finished | Oct 09 09:12:26 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470724086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.3470724086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.4056311639 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 153540506 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:12:24 PM UTC 24 |
| Finished | Oct 09 09:12:26 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4056311639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.4056311639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.1656589936 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 461455798 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:12:24 PM UTC 24 |
| Finished | Oct 09 09:12:27 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656589936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_data_toggle_clear.1656589936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.3279591367 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 488340929 ps |
| CPU time | 2.63 seconds |
| Started | Oct 09 09:12:25 PM UTC 24 |
| Finished | Oct 09 09:12:29 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3279591367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.3279591367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.1074563451 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 21116915786 ps |
| CPU time | 41.81 seconds |
| Started | Oct 09 09:12:25 PM UTC 24 |
| Finished | Oct 09 09:13:09 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074563451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.1074563451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.3509208595 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 1285823140 ps |
| CPU time | 28.64 seconds |
| Started | Oct 09 09:12:25 PM UTC 24 |
| Finished | Oct 09 09:12:56 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509208595 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.3509208595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.501946159 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 961517139 ps |
| CPU time | 3.58 seconds |
| Started | Oct 09 09:12:27 PM UTC 24 |
| Finished | Oct 09 09:12:32 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=501946159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disable_endpoint.501946159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.1196032773 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 151286852 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:12:27 PM UTC 24 |
| Finished | Oct 09 09:12:30 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196032773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.1196032773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_enable.3410569524 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 42205530 ps |
| CPU time | 0.96 seconds |
| Started | Oct 09 09:12:27 PM UTC 24 |
| Finished | Oct 09 09:12:29 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410569524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.3410569524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.1982285464 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 1011676353 ps |
| CPU time | 4.6 seconds |
| Started | Oct 09 09:12:27 PM UTC 24 |
| Finished | Oct 09 09:12:33 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1982285464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.1982285464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.2948747096 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 303177041 ps |
| CPU time | 1.9 seconds |
| Started | Oct 09 09:12:28 PM UTC 24 |
| Finished | Oct 09 09:12:31 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2948747096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.2948747096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.2822676190 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 263372164 ps |
| CPU time | 1.79 seconds |
| Started | Oct 09 09:12:31 PM UTC 24 |
| Finished | Oct 09 09:12:35 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822676190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_fifo_levels.2822676190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.3305302239 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 213006805 ps |
| CPU time | 2.37 seconds |
| Started | Oct 09 09:12:31 PM UTC 24 |
| Finished | Oct 09 09:12:35 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305302239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_fifo_rst.3305302239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.272174673 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 298421984 ps |
| CPU time | 2.35 seconds |
| Started | Oct 09 09:12:32 PM UTC 24 |
| Finished | Oct 09 09:12:36 PM UTC 24 |
| Peak memory | 228136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=272174673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.272174673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.428312146 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 148767192 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:12:32 PM UTC 24 |
| Finished | Oct 09 09:12:34 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=428312146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_in_stall.428312146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.3245986859 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 205929783 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:12:33 PM UTC 24 |
| Finished | Oct 09 09:12:36 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245986859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_trans.3245986859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.1829333964 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 5344402246 ps |
| CPU time | 140.49 seconds |
| Started | Oct 09 09:12:31 PM UTC 24 |
| Finished | Oct 09 09:14:55 PM UTC 24 |
| Peak memory | 230364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1829333964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.1829333964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.1712940882 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 6252293402 ps |
| CPU time | 77.29 seconds |
| Started | Oct 09 09:12:33 PM UTC 24 |
| Finished | Oct 09 09:13:52 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1712940882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.1712940882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.3599069073 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 172848878 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:12:33 PM UTC 24 |
| Finished | Oct 09 09:12:36 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599069073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_in_err.3599069073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.3735453949 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 3849086329 ps |
| CPU time | 7.23 seconds |
| Started | Oct 09 09:12:36 PM UTC 24 |
| Finished | Oct 09 09:12:45 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735453949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.3735453949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.2138470873 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 4439523395 ps |
| CPU time | 31.26 seconds |
| Started | Oct 09 09:12:36 PM UTC 24 |
| Finished | Oct 09 09:13:09 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138470873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.2138470873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.2875904150 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 1793962628 ps |
| CPU time | 17.99 seconds |
| Started | Oct 09 09:12:36 PM UTC 24 |
| Finished | Oct 09 09:12:56 PM UTC 24 |
| Peak memory | 228208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875904150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.2875904150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.563131699 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 251944871 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:12:36 PM UTC 24 |
| Finished | Oct 09 09:12:39 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=563131699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.563131699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.257045385 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 198735269 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:12:37 PM UTC 24 |
| Finished | Oct 09 09:12:40 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=257045385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.257045385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.268362595 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 1802533468 ps |
| CPU time | 59.64 seconds |
| Started | Oct 09 09:12:37 PM UTC 24 |
| Finished | Oct 09 09:13:39 PM UTC 24 |
| Peak memory | 230248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=268362595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.268362595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.2511952295 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 2157369435 ps |
| CPU time | 57.15 seconds |
| Started | Oct 09 09:12:37 PM UTC 24 |
| Finished | Oct 09 09:13:36 PM UTC 24 |
| Peak memory | 230316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511952295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.2511952295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.204609221 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 1528516817 ps |
| CPU time | 10.53 seconds |
| Started | Oct 09 09:12:38 PM UTC 24 |
| Finished | Oct 09 09:12:49 PM UTC 24 |
| Peak memory | 228252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=204609221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.204609221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.2725826584 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 150064396 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:12:38 PM UTC 24 |
| Finished | Oct 09 09:12:40 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725826584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.2725826584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.11065777 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 149329345 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:12:40 PM UTC 24 |
| Finished | Oct 09 09:12:42 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=11065777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.11065777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.1063014394 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 206156827 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:12:40 PM UTC 24 |
| Finished | Oct 09 09:12:43 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1063014394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_nak_trans.1063014394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.4149360312 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 254636749 ps |
| CPU time | 1.87 seconds |
| Started | Oct 09 09:12:40 PM UTC 24 |
| Finished | Oct 09 09:12:43 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4149360312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.4149360312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.2230770591 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 194725390 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:12:40 PM UTC 24 |
| Finished | Oct 09 09:12:43 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2230770591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.2230770591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.3475563768 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 195412376 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:12:40 PM UTC 24 |
| Finished | Oct 09 09:12:43 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3475563768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.3475563768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.2923886225 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 154786628 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:12:42 PM UTC 24 |
| Finished | Oct 09 09:12:44 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923886225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_pending_in_trans.2923886225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.1168548965 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 260490277 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:12:42 PM UTC 24 |
| Finished | Oct 09 09:12:44 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168548965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.1168548965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.4069428382 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 163125501 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:12:42 PM UTC 24 |
| Finished | Oct 09 09:12:44 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4069428382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.4069428382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.4216649230 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 31220494 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:12:45 PM UTC 24 |
| Finished | Oct 09 09:12:48 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4216649230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.4216649230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.1807410331 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 18263212971 ps |
| CPU time | 48.75 seconds |
| Started | Oct 09 09:12:45 PM UTC 24 |
| Finished | Oct 09 09:13:36 PM UTC 24 |
| Peak memory | 228288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807410331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.1807410331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.2365903313 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 178799222 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:12:45 PM UTC 24 |
| Finished | Oct 09 09:12:48 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365903313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_pkt_received.2365903313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.1175128992 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 162191077 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:12:45 PM UTC 24 |
| Finished | Oct 09 09:12:48 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175128992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_pkt_sent.1175128992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.1355624418 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 2794884297 ps |
| CPU time | 20.9 seconds |
| Started | Oct 09 09:12:46 PM UTC 24 |
| Finished | Oct 09 09:13:08 PM UTC 24 |
| Peak memory | 235096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355624418 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.1355624418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.2572414313 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 5655191404 ps |
| CPU time | 64.19 seconds |
| Started | Oct 09 09:12:46 PM UTC 24 |
| Finished | Oct 09 09:13:52 PM UTC 24 |
| Peak memory | 230716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572414313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.2572414313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.3331764715 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 5839996298 ps |
| CPU time | 73.76 seconds |
| Started | Oct 09 09:12:46 PM UTC 24 |
| Finished | Oct 09 09:14:02 PM UTC 24 |
| Peak memory | 234936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331764715 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.3331764715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.616836855 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 176430815 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:12:45 PM UTC 24 |
| Finished | Oct 09 09:12:48 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=616836855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_random_length_in_transaction.616836855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.628255573 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 174690356 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:12:45 PM UTC 24 |
| Finished | Oct 09 09:12:48 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=628255573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.628255573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.3619380670 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 20171154961 ps |
| CPU time | 24.64 seconds |
| Started | Oct 09 09:12:46 PM UTC 24 |
| Finished | Oct 09 09:13:12 PM UTC 24 |
| Peak memory | 217816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619380670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.3619380670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.2391977454 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 200024376 ps |
| CPU time | 1.52 seconds |
| Started | Oct 09 09:12:46 PM UTC 24 |
| Finished | Oct 09 09:12:49 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391977454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_rx_crc_err.2391977454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.1268844518 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 257128215 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:12:46 PM UTC 24 |
| Finished | Oct 09 09:12:48 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268844518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.1268844518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.2215163990 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 153147648 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:12:47 PM UTC 24 |
| Finished | Oct 09 09:12:50 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215163990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_setup_stage.2215163990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.2494576232 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 156303637 ps |
| CPU time | 1.19 seconds |
| Started | Oct 09 09:12:47 PM UTC 24 |
| Finished | Oct 09 09:12:50 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494576232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.2494576232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.3476924261 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 235607410 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:12:47 PM UTC 24 |
| Finished | Oct 09 09:12:50 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476924261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.3476924261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.3938269085 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 3396644652 ps |
| CPU time | 92.27 seconds |
| Started | Oct 09 09:12:47 PM UTC 24 |
| Finished | Oct 09 09:14:22 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3938269085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.3938269085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.2273578713 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 198242093 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:12:47 PM UTC 24 |
| Finished | Oct 09 09:12:50 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2273578713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.2273578713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.883006108 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 239322799 ps |
| CPU time | 1.64 seconds |
| Started | Oct 09 09:12:49 PM UTC 24 |
| Finished | Oct 09 09:12:52 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=883006108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_stall_trans.883006108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.2223295046 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 897253675 ps |
| CPU time | 4.21 seconds |
| Started | Oct 09 09:12:49 PM UTC 24 |
| Finished | Oct 09 09:12:54 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223295046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.2223295046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.2043363666 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 3108861241 ps |
| CPU time | 99.29 seconds |
| Started | Oct 09 09:12:49 PM UTC 24 |
| Finished | Oct 09 09:14:31 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2043363666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.2043363666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.1800028053 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 7961835821 ps |
| CPU time | 36.17 seconds |
| Started | Oct 09 09:12:49 PM UTC 24 |
| Finished | Oct 09 09:13:27 PM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800028053 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.1800028053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.1624661521 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 570130196 ps |
| CPU time | 11.48 seconds |
| Started | Oct 09 09:12:25 PM UTC 24 |
| Finished | Oct 09 09:12:38 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624661521 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.1624661521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.2748711993 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 582908728 ps |
| CPU time | 3.31 seconds |
| Started | Oct 09 09:12:49 PM UTC 24 |
| Finished | Oct 09 09:12:54 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2748711993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.2748711993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.1117961506 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 587521059 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:42:28 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117961506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.1117961506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.808362623 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 512466923 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=808362623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_tx _rx_disruption.808362623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.1875394859 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 336395168 ps |
| CPU time | 1.12 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1875394859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.1875394859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.1474308252 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 247248563 ps |
| CPU time | 0.95 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474308252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 61.usbdev_fifo_levels.1474308252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.1432450359 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 532066995 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1432450359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_t x_rx_disruption.1432450359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.1378429901 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 551243511 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378429901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.1378429901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.2445834154 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 441978329 ps |
| CPU time | 1.36 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2445834154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_t x_rx_disruption.2445834154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.1851913691 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 465290303 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851913691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.1851913691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.3410248667 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 148981111 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410248667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 63.usbdev_fifo_levels.3410248667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.4088011886 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 528675105 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4088011886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.4088011886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.1867014859 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 166099575 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:31 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867014859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 64.usbdev_fifo_levels.1867014859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.2396996346 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 450797092 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2396996346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_t x_rx_disruption.2396996346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.850250063 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 283745623 ps |
| CPU time | 1.04 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=850250063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.850250063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.3899168835 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 527404116 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3899168835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_t x_rx_disruption.3899168835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.648628347 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 292109784 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=648628347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.648628347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.309440363 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 190850810 ps |
| CPU time | 0.86 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=309440363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 66.usbdev_fifo_levels.309440363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.4127779982 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 565488322 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4127779982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.4127779982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.2398811709 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 334911324 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398811709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.2398811709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.1673446619 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 278652876 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673446619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 67.usbdev_fifo_levels.1673446619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.415053264 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 495958471 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 216960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=415053264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_tx _rx_disruption.415053264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.1651250334 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 247381726 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 217132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651250334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 68.usbdev_fifo_levels.1651250334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.3784133325 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 528872261 ps |
| CPU time | 1.56 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3784133325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_t x_rx_disruption.3784133325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.1485688711 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 204162869 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485688711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.1485688711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.823831693 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 294096680 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=823831693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 69.usbdev_fifo_levels.823831693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.3911778462 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 516154446 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3911778462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.3911778462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.1774784940 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 60385952 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:13:18 PM UTC 24 |
| Finished | Oct 09 09:13:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774784940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.1774784940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.2904265934 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 4926507226 ps |
| CPU time | 8.59 seconds |
| Started | Oct 09 09:12:51 PM UTC 24 |
| Finished | Oct 09 09:13:01 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2904265934 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.2904265934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.1496650945 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 16040811790 ps |
| CPU time | 21.35 seconds |
| Started | Oct 09 09:12:51 PM UTC 24 |
| Finished | Oct 09 09:13:14 PM UTC 24 |
| Peak memory | 228520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496650945 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.1496650945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.81823856 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 23966800263 ps |
| CPU time | 47.89 seconds |
| Started | Oct 09 09:12:51 PM UTC 24 |
| Finished | Oct 09 09:13:41 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=81823856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.81823856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.2740893640 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 147494420 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:12:51 PM UTC 24 |
| Finished | Oct 09 09:12:54 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740893640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.2740893640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.1561568520 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 139918740 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:12:51 PM UTC 24 |
| Finished | Oct 09 09:12:54 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561568520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.1561568520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.2443897416 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 521145448 ps |
| CPU time | 2.98 seconds |
| Started | Oct 09 09:12:51 PM UTC 24 |
| Finished | Oct 09 09:12:55 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2443897416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_data_toggle_clear.2443897416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.1492191247 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 1142264750 ps |
| CPU time | 3.27 seconds |
| Started | Oct 09 09:12:53 PM UTC 24 |
| Finished | Oct 09 09:12:57 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492191247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.1492191247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.1458444871 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 15816981460 ps |
| CPU time | 30.41 seconds |
| Started | Oct 09 09:12:53 PM UTC 24 |
| Finished | Oct 09 09:13:25 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458444871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.1458444871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.3481133077 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 4410995657 ps |
| CPU time | 29.22 seconds |
| Started | Oct 09 09:12:53 PM UTC 24 |
| Finished | Oct 09 09:13:23 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481133077 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.3481133077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.2782159489 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 626297261 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:12:54 PM UTC 24 |
| Finished | Oct 09 09:12:57 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782159489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.2782159489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.3933965801 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 138179338 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:12:56 PM UTC 24 |
| Finished | Oct 09 09:12:58 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933965801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.3933965801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_enable.2598835468 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 44014477 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:12:56 PM UTC 24 |
| Finished | Oct 09 09:12:58 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2598835468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_enable.2598835468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.1136504710 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 1131925451 ps |
| CPU time | 3.82 seconds |
| Started | Oct 09 09:12:56 PM UTC 24 |
| Finished | Oct 09 09:13:01 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136504710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.1136504710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.2749815464 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 278254302 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:12:56 PM UTC 24 |
| Finished | Oct 09 09:12:59 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2749815464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_fifo_levels.2749815464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.3579632751 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 514285838 ps |
| CPU time | 4.79 seconds |
| Started | Oct 09 09:12:58 PM UTC 24 |
| Finished | Oct 09 09:13:04 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579632751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_fifo_rst.3579632751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.1490535915 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 229335195 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:12:58 PM UTC 24 |
| Finished | Oct 09 09:13:00 PM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490535915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.1490535915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.4125869672 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 142805442 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:12:58 PM UTC 24 |
| Finished | Oct 09 09:13:00 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125869672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.4125869672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.2920948537 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 247884427 ps |
| CPU time | 1.24 seconds |
| Started | Oct 09 09:12:58 PM UTC 24 |
| Finished | Oct 09 09:13:00 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920948537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_trans.2920948537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.3441793934 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 4537861689 ps |
| CPU time | 118.35 seconds |
| Started | Oct 09 09:12:58 PM UTC 24 |
| Finished | Oct 09 09:14:59 PM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441793934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.3441793934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.1569700394 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 12031337479 ps |
| CPU time | 82.57 seconds |
| Started | Oct 09 09:12:58 PM UTC 24 |
| Finished | Oct 09 09:14:23 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569700394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.1569700394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.1155744913 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 185422991 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:12:59 PM UTC 24 |
| Finished | Oct 09 09:13:02 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155744913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.1155744913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.1059381009 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 12283087616 ps |
| CPU time | 22.67 seconds |
| Started | Oct 09 09:13:00 PM UTC 24 |
| Finished | Oct 09 09:13:23 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059381009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.1059381009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.1283328825 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 11244299308 ps |
| CPU time | 21.39 seconds |
| Started | Oct 09 09:13:00 PM UTC 24 |
| Finished | Oct 09 09:13:22 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283328825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_link_suspend.1283328825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.2455225920 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 3655203636 ps |
| CPU time | 95.64 seconds |
| Started | Oct 09 09:13:00 PM UTC 24 |
| Finished | Oct 09 09:14:37 PM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455225920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.2455225920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.3125368231 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 2319282425 ps |
| CPU time | 23.79 seconds |
| Started | Oct 09 09:13:00 PM UTC 24 |
| Finished | Oct 09 09:13:25 PM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125368231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.3125368231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.2106844058 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 271901132 ps |
| CPU time | 1.71 seconds |
| Started | Oct 09 09:13:02 PM UTC 24 |
| Finished | Oct 09 09:13:04 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106844058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.2106844058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.1167040196 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 209015806 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:13:02 PM UTC 24 |
| Finished | Oct 09 09:13:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167040196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.1167040196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.525894848 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 2708889218 ps |
| CPU time | 34.52 seconds |
| Started | Oct 09 09:13:02 PM UTC 24 |
| Finished | Oct 09 09:13:38 PM UTC 24 |
| Peak memory | 230312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=525894848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.525894848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.248391318 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 2399636406 ps |
| CPU time | 20.3 seconds |
| Started | Oct 09 09:13:02 PM UTC 24 |
| Finished | Oct 09 09:13:23 PM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=248391318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.248391318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.4104160030 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 1626478321 ps |
| CPU time | 21.35 seconds |
| Started | Oct 09 09:13:02 PM UTC 24 |
| Finished | Oct 09 09:13:25 PM UTC 24 |
| Peak memory | 228204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104160030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.4104160030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.27738113 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 152333548 ps |
| CPU time | 1.35 seconds |
| Started | Oct 09 09:13:02 PM UTC 24 |
| Finished | Oct 09 09:13:04 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=27738113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.27738113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.4247830888 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 146031169 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:13:03 PM UTC 24 |
| Finished | Oct 09 09:13:05 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247830888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.4247830888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.2247207420 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 249861418 ps |
| CPU time | 1.88 seconds |
| Started | Oct 09 09:13:03 PM UTC 24 |
| Finished | Oct 09 09:13:06 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2247207420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_nak_trans.2247207420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.2627031708 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 191019437 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:13:05 PM UTC 24 |
| Finished | Oct 09 09:13:07 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2627031708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.2627031708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.3422998628 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 159812196 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:13:05 PM UTC 24 |
| Finished | Oct 09 09:13:07 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422998628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.3422998628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.2435542185 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 170768945 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:13:06 PM UTC 24 |
| Finished | Oct 09 09:13:08 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435542185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.2435542185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.3209537901 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 184452770 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:13:06 PM UTC 24 |
| Finished | Oct 09 09:13:08 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209537901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.3209537901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.1771531775 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 285638101 ps |
| CPU time | 2 seconds |
| Started | Oct 09 09:13:06 PM UTC 24 |
| Finished | Oct 09 09:13:09 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1771531775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.1771531775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.2661201473 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 142221510 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:13:06 PM UTC 24 |
| Finished | Oct 09 09:13:09 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2661201473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.2661201473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.3053225008 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 89646038 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:13:06 PM UTC 24 |
| Finished | Oct 09 09:13:08 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3053225008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.3053225008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.2805403099 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 19490834492 ps |
| CPU time | 56.28 seconds |
| Started | Oct 09 09:13:07 PM UTC 24 |
| Finished | Oct 09 09:14:05 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805403099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.2805403099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.2718588615 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 203792204 ps |
| CPU time | 1.17 seconds |
| Started | Oct 09 09:13:07 PM UTC 24 |
| Finished | Oct 09 09:13:10 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718588615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_pkt_received.2718588615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.3127510915 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 196264439 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:13:09 PM UTC 24 |
| Finished | Oct 09 09:13:11 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3127510915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.3127510915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.3664260285 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 5432270231 ps |
| CPU time | 25.47 seconds |
| Started | Oct 09 09:13:11 PM UTC 24 |
| Finished | Oct 09 09:13:38 PM UTC 24 |
| Peak memory | 234916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664260285 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.3664260285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.2706608229 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 3753173398 ps |
| CPU time | 29.07 seconds |
| Started | Oct 09 09:13:11 PM UTC 24 |
| Finished | Oct 09 09:13:42 PM UTC 24 |
| Peak memory | 228648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706608229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.2706608229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.2237556734 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 11071758987 ps |
| CPU time | 74.1 seconds |
| Started | Oct 09 09:13:11 PM UTC 24 |
| Finished | Oct 09 09:14:27 PM UTC 24 |
| Peak memory | 234936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2237556734 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.2237556734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.807446334 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 220541519 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:13:09 PM UTC 24 |
| Finished | Oct 09 09:13:11 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807446334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_random_length_in_transaction.807446334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.2030926367 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 156410913 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:13:09 PM UTC 24 |
| Finished | Oct 09 09:13:11 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2030926367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.2030926367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.706410350 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 20165686246 ps |
| CPU time | 37.64 seconds |
| Started | Oct 09 09:13:11 PM UTC 24 |
| Finished | Oct 09 09:13:50 PM UTC 24 |
| Peak memory | 217932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=706410350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_resume_link_active.706410350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.3732437332 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 166096431 ps |
| CPU time | 1.31 seconds |
| Started | Oct 09 09:13:11 PM UTC 24 |
| Finished | Oct 09 09:13:14 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732437332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_rx_crc_err.3732437332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.1645010154 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 372174381 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:13:11 PM UTC 24 |
| Finished | Oct 09 09:13:15 PM UTC 24 |
| Peak memory | 217740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1645010154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_rx_full.1645010154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.2759625031 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 155562216 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:13:11 PM UTC 24 |
| Finished | Oct 09 09:13:14 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2759625031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.2759625031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.2840343991 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 168647638 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:13:13 PM UTC 24 |
| Finished | Oct 09 09:13:15 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840343991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.2840343991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.1206662051 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 227659314 ps |
| CPU time | 1.83 seconds |
| Started | Oct 09 09:13:13 PM UTC 24 |
| Finished | Oct 09 09:13:16 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206662051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.1206662051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.1168458105 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 2391815376 ps |
| CPU time | 65.8 seconds |
| Started | Oct 09 09:13:13 PM UTC 24 |
| Finished | Oct 09 09:14:20 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168458105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.1168458105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.1629234817 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 186326477 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:13:13 PM UTC 24 |
| Finished | Oct 09 09:13:15 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629234817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.1629234817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.2790604535 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 208976161 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:13:15 PM UTC 24 |
| Finished | Oct 09 09:13:18 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790604535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_stall_trans.2790604535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.383333082 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 952135382 ps |
| CPU time | 4.49 seconds |
| Started | Oct 09 09:13:15 PM UTC 24 |
| Finished | Oct 09 09:13:21 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383333082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_stream_len_max.383333082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.2154609635 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 2273453490 ps |
| CPU time | 18.35 seconds |
| Started | Oct 09 09:13:15 PM UTC 24 |
| Finished | Oct 09 09:13:35 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154609635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.2154609635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.1661948542 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 10344884353 ps |
| CPU time | 174.97 seconds |
| Started | Oct 09 09:13:17 PM UTC 24 |
| Finished | Oct 09 09:16:15 PM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1661948542 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.1661948542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.3407393727 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 1414821902 ps |
| CPU time | 32.07 seconds |
| Started | Oct 09 09:12:54 PM UTC 24 |
| Finished | Oct 09 09:13:27 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407393727 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.3407393727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.489849014 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 559107967 ps |
| CPU time | 3.04 seconds |
| Started | Oct 09 09:13:17 PM UTC 24 |
| Finished | Oct 09 09:13:21 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=489849014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx_ rx_disruption.489849014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.147057633 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 173686620 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=147057633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.147057633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.3202343100 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 247791136 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202343100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 70.usbdev_fifo_levels.3202343100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.4003048755 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 469123303 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4003048755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_t x_rx_disruption.4003048755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.1597191501 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 191963650 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:42:29 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597191501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.1597191501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.3711902678 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 269390645 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3711902678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 71.usbdev_fifo_levels.3711902678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.1093634073 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 615320934 ps |
| CPU time | 1.58 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1093634073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_t x_rx_disruption.1093634073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.280380573 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 393240233 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=280380573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.280380573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.2754808381 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 282903825 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754808381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.2754808381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.41284783 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 651509024 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=41284783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_tx_ rx_disruption.41284783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.1940072500 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 153382715 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:32 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940072500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.1940072500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.1181231986 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 264824280 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181231986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 73.usbdev_fifo_levels.1181231986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.2028798514 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 503644448 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2028798514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.2028798514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.2065305188 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 266515177 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065305188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.2065305188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.480341886 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 194136014 ps |
| CPU time | 0.88 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=480341886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 74.usbdev_fifo_levels.480341886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.623997362 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 519753928 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=623997362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_tx _rx_disruption.623997362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.568637893 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 249019769 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=568637893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.568637893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.266321674 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 162382510 ps |
| CPU time | 0.76 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=266321674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 75.usbdev_fifo_levels.266321674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.3191215016 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 611069191 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3191215016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_t x_rx_disruption.3191215016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.1846658511 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 436360805 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846658511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.1846658511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.857104470 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 264800351 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=857104470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 76.usbdev_fifo_levels.857104470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.9531921 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 516195328 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=9531921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_tx_r x_disruption.9531921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.803622862 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 179646812 ps |
| CPU time | 0.87 seconds |
| Started | Oct 09 09:42:30 PM UTC 24 |
| Finished | Oct 09 09:42:33 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=803622862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.803622862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.3842611973 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 247549573 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:42 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3842611973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 77.usbdev_fifo_levels.3842611973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.1441081206 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 497450492 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1441081206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_t x_rx_disruption.1441081206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.2774607211 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 716996834 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774607211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.2774607211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.3807270873 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 293180643 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3807270873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 78.usbdev_fifo_levels.3807270873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.635783382 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 498308275 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=635783382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_tx _rx_disruption.635783382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.2030088156 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 402939843 ps |
| CPU time | 1.22 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2030088156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.2030088156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.1200272104 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 260795206 ps |
| CPU time | 1 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200272104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 79.usbdev_fifo_levels.1200272104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.1654505655 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 552365769 ps |
| CPU time | 1.54 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1654505655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_t x_rx_disruption.1654505655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.2192781906 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 51500230 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:13:47 PM UTC 24 |
| Finished | Oct 09 09:13:50 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192781906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.2192781906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.434351308 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 11432000113 ps |
| CPU time | 19.19 seconds |
| Started | Oct 09 09:13:18 PM UTC 24 |
| Finished | Oct 09 09:13:39 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=434351308 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.434351308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.306593033 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 20843565039 ps |
| CPU time | 27.67 seconds |
| Started | Oct 09 09:13:20 PM UTC 24 |
| Finished | Oct 09 09:13:49 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=306593033 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.306593033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.2967355645 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 30127088229 ps |
| CPU time | 42.77 seconds |
| Started | Oct 09 09:13:20 PM UTC 24 |
| Finished | Oct 09 09:14:04 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967355645 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.2967355645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.3898647364 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 145814966 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:13:20 PM UTC 24 |
| Finished | Oct 09 09:13:22 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898647364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.3898647364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.2852384709 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 143947155 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:13:21 PM UTC 24 |
| Finished | Oct 09 09:13:23 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852384709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.2852384709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.1169220657 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 233536441 ps |
| CPU time | 1.29 seconds |
| Started | Oct 09 09:13:22 PM UTC 24 |
| Finished | Oct 09 09:13:25 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1169220657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.1169220657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.2033312433 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 914575821 ps |
| CPU time | 2.76 seconds |
| Started | Oct 09 09:13:22 PM UTC 24 |
| Finished | Oct 09 09:13:26 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2033312433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.2033312433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.4112982528 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 570171150 ps |
| CPU time | 10.54 seconds |
| Started | Oct 09 09:13:24 PM UTC 24 |
| Finished | Oct 09 09:13:36 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112982528 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.4112982528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.1209453795 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 988794655 ps |
| CPU time | 4.36 seconds |
| Started | Oct 09 09:13:24 PM UTC 24 |
| Finished | Oct 09 09:13:30 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209453795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.1209453795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.2933099847 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 185994958 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:13:26 PM UTC 24 |
| Finished | Oct 09 09:13:29 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933099847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_disconnected.2933099847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_enable.1561252521 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 29303502 ps |
| CPU time | 1.06 seconds |
| Started | Oct 09 09:13:26 PM UTC 24 |
| Finished | Oct 09 09:13:28 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561252521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.1561252521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.277381102 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 939531578 ps |
| CPU time | 2.88 seconds |
| Started | Oct 09 09:13:26 PM UTC 24 |
| Finished | Oct 09 09:13:30 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=277381102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.277381102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.1117455570 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 484629702 ps |
| CPU time | 2.36 seconds |
| Started | Oct 09 09:13:26 PM UTC 24 |
| Finished | Oct 09 09:13:30 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117455570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.1117455570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.566874454 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 282981232 ps |
| CPU time | 2.83 seconds |
| Started | Oct 09 09:13:26 PM UTC 24 |
| Finished | Oct 09 09:13:30 PM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=566874454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_fifo_rst.566874454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.1382266077 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 174849070 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:13:28 PM UTC 24 |
| Finished | Oct 09 09:13:30 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382266077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.1382266077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.3626083211 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 163115910 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:13:28 PM UTC 24 |
| Finished | Oct 09 09:13:30 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626083211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.3626083211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.1846622244 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 227168259 ps |
| CPU time | 1.23 seconds |
| Started | Oct 09 09:13:29 PM UTC 24 |
| Finished | Oct 09 09:13:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846622244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_trans.1846622244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.3091389021 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 5352964445 ps |
| CPU time | 51.36 seconds |
| Started | Oct 09 09:13:26 PM UTC 24 |
| Finished | Oct 09 09:14:20 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091389021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.3091389021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.2360183429 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 5696753013 ps |
| CPU time | 59.05 seconds |
| Started | Oct 09 09:13:29 PM UTC 24 |
| Finished | Oct 09 09:14:30 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360183429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.2360183429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.181530126 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 214917436 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:13:29 PM UTC 24 |
| Finished | Oct 09 09:13:32 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=181530126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_link_in_err.181530126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.3752035257 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 33728025926 ps |
| CPU time | 55.37 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:14:31 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752035257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.3752035257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.2025212060 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 10981376436 ps |
| CPU time | 16.19 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:13:51 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025212060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_link_suspend.2025212060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.4005733973 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 2656217338 ps |
| CPU time | 69.68 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:14:45 PM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005733973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.4005733973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.3245477438 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 3547482354 ps |
| CPU time | 27.07 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:14:02 PM UTC 24 |
| Peak memory | 228380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245477438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.3245477438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.1324617446 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 239912040 ps |
| CPU time | 1.72 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:13:37 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1324617446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.1324617446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.448163725 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 198223462 ps |
| CPU time | 1.16 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:13:36 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=448163725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.448163725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.3970519995 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 2751974127 ps |
| CPU time | 71.42 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:14:47 PM UTC 24 |
| Peak memory | 228256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970519995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.3970519995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.3713314172 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 2714885528 ps |
| CPU time | 22.37 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:13:58 PM UTC 24 |
| Peak memory | 234920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713314172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.3713314172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.1564981489 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 1536170375 ps |
| CPU time | 15.31 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:13:51 PM UTC 24 |
| Peak memory | 234676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564981489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.1564981489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.3226080655 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 173178729 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:13:37 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226080655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.3226080655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.652605583 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 172528732 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:13:37 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=652605583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.652605583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.1026621177 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 203617476 ps |
| CPU time | 1.6 seconds |
| Started | Oct 09 09:13:34 PM UTC 24 |
| Finished | Oct 09 09:13:37 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026621177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_nak_trans.1026621177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.3736878330 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 217489442 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:13:35 PM UTC 24 |
| Finished | Oct 09 09:13:38 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736878330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.3736878330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.45487462 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 164725498 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:13:37 PM UTC 24 |
| Finished | Oct 09 09:13:40 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=45487462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_stall.45487462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.852387751 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 205480574 ps |
| CPU time | 1.14 seconds |
| Started | Oct 09 09:13:37 PM UTC 24 |
| Finished | Oct 09 09:13:40 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=852387751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_out_trans_nak.852387751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.1928221379 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 150791599 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:13:38 PM UTC 24 |
| Finished | Oct 09 09:13:40 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928221379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.1928221379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.448113630 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 178745365 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:13:38 PM UTC 24 |
| Finished | Oct 09 09:13:40 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=448113630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.448113630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.1163780797 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 193167161 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:13:38 PM UTC 24 |
| Finished | Oct 09 09:13:40 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1163780797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.1163780797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.1953357342 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 41523146 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:13:38 PM UTC 24 |
| Finished | Oct 09 09:13:40 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953357342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.1953357342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.2147340911 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 8341542823 ps |
| CPU time | 25.32 seconds |
| Started | Oct 09 09:13:38 PM UTC 24 |
| Finished | Oct 09 09:14:04 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147340911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_pkt_buffer.2147340911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.2453986264 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 166644107 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:13:40 PM UTC 24 |
| Finished | Oct 09 09:13:42 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2453986264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_pkt_received.2453986264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.970346825 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 169979017 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:13:40 PM UTC 24 |
| Finished | Oct 09 09:13:42 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=970346825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_pkt_sent.970346825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.3987634619 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 3703317399 ps |
| CPU time | 84.24 seconds |
| Started | Oct 09 09:13:40 PM UTC 24 |
| Finished | Oct 09 09:15:06 PM UTC 24 |
| Peak memory | 235068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987634619 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.3987634619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.1984977119 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 3545180060 ps |
| CPU time | 24.93 seconds |
| Started | Oct 09 09:13:40 PM UTC 24 |
| Finished | Oct 09 09:14:06 PM UTC 24 |
| Peak memory | 234924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984977119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.1984977119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.683040041 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 5099360941 ps |
| CPU time | 23.93 seconds |
| Started | Oct 09 09:13:42 PM UTC 24 |
| Finished | Oct 09 09:14:07 PM UTC 24 |
| Peak memory | 235060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=683040041 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.683040041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.4206127903 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 254762867 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:13:40 PM UTC 24 |
| Finished | Oct 09 09:13:42 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206127903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.4206127903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.3537533192 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 191707557 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:13:40 PM UTC 24 |
| Finished | Oct 09 09:13:42 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537533192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.3537533192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.229160594 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 20217435916 ps |
| CPU time | 33.45 seconds |
| Started | Oct 09 09:13:42 PM UTC 24 |
| Finished | Oct 09 09:14:17 PM UTC 24 |
| Peak memory | 217884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=229160594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_resume_link_active.229160594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.299848619 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 144007814 ps |
| CPU time | 1.33 seconds |
| Started | Oct 09 09:13:42 PM UTC 24 |
| Finished | Oct 09 09:13:45 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=299848619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_rx_crc_err.299848619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.3598469612 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 272545294 ps |
| CPU time | 1.75 seconds |
| Started | Oct 09 09:13:42 PM UTC 24 |
| Finished | Oct 09 09:13:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598469612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_rx_full.3598469612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.3518817906 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 168338853 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:13:42 PM UTC 24 |
| Finished | Oct 09 09:13:45 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3518817906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.3518817906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.28848680 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 154979943 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:13:42 PM UTC 24 |
| Finished | Oct 09 09:13:45 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=28848680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_setup_trans_ignored.28848680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.1925362647 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 261684926 ps |
| CPU time | 1.79 seconds |
| Started | Oct 09 09:13:42 PM UTC 24 |
| Finished | Oct 09 09:13:45 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1925362647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.1925362647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.4241179023 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 3393997796 ps |
| CPU time | 90.84 seconds |
| Started | Oct 09 09:13:42 PM UTC 24 |
| Finished | Oct 09 09:15:15 PM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4241179023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.4241179023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.1986659026 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 185026709 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:13:44 PM UTC 24 |
| Finished | Oct 09 09:13:47 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986659026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.1986659026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.3489901886 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 154479159 ps |
| CPU time | 1.29 seconds |
| Started | Oct 09 09:13:44 PM UTC 24 |
| Finished | Oct 09 09:13:47 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489901886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.3489901886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.1558514118 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 259591752 ps |
| CPU time | 2.02 seconds |
| Started | Oct 09 09:13:44 PM UTC 24 |
| Finished | Oct 09 09:13:47 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558514118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.1558514118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.87427311 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 3114794945 ps |
| CPU time | 33.5 seconds |
| Started | Oct 09 09:13:44 PM UTC 24 |
| Finished | Oct 09 09:14:19 PM UTC 24 |
| Peak memory | 228652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=87427311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_streaming_out.87427311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.1923211702 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 8023497681 ps |
| CPU time | 54.91 seconds |
| Started | Oct 09 09:13:47 PM UTC 24 |
| Finished | Oct 09 09:14:44 PM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923211702 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.1923211702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.2779355978 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 4300559251 ps |
| CPU time | 25.95 seconds |
| Started | Oct 09 09:13:24 PM UTC 24 |
| Finished | Oct 09 09:13:51 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779355978 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.2779355978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.2140570943 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 573911849 ps |
| CPU time | 2.55 seconds |
| Started | Oct 09 09:13:47 PM UTC 24 |
| Finished | Oct 09 09:13:51 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2140570943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.2140570943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.3748921411 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 196795734 ps |
| CPU time | 0.89 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748921411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.3748921411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.1194552598 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 295097387 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194552598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 80.usbdev_fifo_levels.1194552598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.2441304434 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 415801010 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441304434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.2441304434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.2673574535 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 261459091 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 216488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673574535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 81.usbdev_fifo_levels.2673574535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/81.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.416567129 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 506587716 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=416567129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_tx _rx_disruption.416567129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.2199923849 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 350398728 ps |
| CPU time | 1.16 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199923849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.2199923849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.749453099 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 234884201 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=749453099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 82.usbdev_fifo_levels.749453099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/82.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.2137088560 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 510872606 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 216456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2137088560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.2137088560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.2704788837 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 496318270 ps |
| CPU time | 1.3 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704788837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.2704788837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.2046671751 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 255050926 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2046671751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 83.usbdev_fifo_levels.2046671751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.2656308669 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 583983939 ps |
| CPU time | 1.66 seconds |
| Started | Oct 09 09:43:40 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2656308669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.2656308669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.932971208 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 200756284 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=932971208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.932971208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.418437858 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 289560081 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:43 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=418437858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 84.usbdev_fifo_levels.418437858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.2233997446 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 529986100 ps |
| CPU time | 1.63 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2233997446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_t x_rx_disruption.2233997446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.235942338 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 307429042 ps |
| CPU time | 1.11 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=235942338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 85.usbdev_fifo_levels.235942338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.3734032136 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 602078822 ps |
| CPU time | 1.69 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3734032136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.3734032136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.1295378102 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 248962781 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1295378102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.1295378102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.2901357332 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 159953314 ps |
| CPU time | 0.8 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2901357332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 86.usbdev_fifo_levels.2901357332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.2406683085 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 498331333 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2406683085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_t x_rx_disruption.2406683085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.2218431309 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 690151136 ps |
| CPU time | 1.76 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218431309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.2218431309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.526893672 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 276580603 ps |
| CPU time | 1.08 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=526893672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 87.usbdev_fifo_levels.526893672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.3021350377 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 544608469 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3021350377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.3021350377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.1599931358 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 218542875 ps |
| CPU time | 0.93 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599931358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.1599931358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.2025301975 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 156407237 ps |
| CPU time | 0.77 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025301975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 88.usbdev_fifo_levels.2025301975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.2231063973 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 496164278 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2231063973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_t x_rx_disruption.2231063973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.1773820261 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 258242206 ps |
| CPU time | 0.99 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773820261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.1773820261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.4038790503 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 275831252 ps |
| CPU time | 1.03 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4038790503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 89.usbdev_fifo_levels.4038790503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.641358217 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 529316166 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=641358217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_tx _rx_disruption.641358217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.170443535 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 44222818 ps |
| CPU time | 1.09 seconds |
| Started | Oct 09 09:14:13 PM UTC 24 |
| Finished | Oct 09 09:14:15 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=170443535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.170443535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.3062736651 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 9226564546 ps |
| CPU time | 19.02 seconds |
| Started | Oct 09 09:13:47 PM UTC 24 |
| Finished | Oct 09 09:14:08 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062736651 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.3062736651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.3266809552 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 19187695407 ps |
| CPU time | 26.4 seconds |
| Started | Oct 09 09:13:48 PM UTC 24 |
| Finished | Oct 09 09:14:15 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3266809552 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.3266809552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.1704435865 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 31271196155 ps |
| CPU time | 50.45 seconds |
| Started | Oct 09 09:13:48 PM UTC 24 |
| Finished | Oct 09 09:14:40 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704435865 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.1704435865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.1752506199 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 190186375 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:13:48 PM UTC 24 |
| Finished | Oct 09 09:13:50 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752506199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.1752506199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.1288386252 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 158572469 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:13:49 PM UTC 24 |
| Finished | Oct 09 09:13:52 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288386252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.1288386252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.2292031138 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 627718062 ps |
| CPU time | 2.23 seconds |
| Started | Oct 09 09:13:49 PM UTC 24 |
| Finished | Oct 09 09:13:52 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292031138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.2292031138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.4000905814 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 792331349 ps |
| CPU time | 3.97 seconds |
| Started | Oct 09 09:13:51 PM UTC 24 |
| Finished | Oct 09 09:13:56 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000905814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.4000905814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.3752456893 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 41217831242 ps |
| CPU time | 76.81 seconds |
| Started | Oct 09 09:13:51 PM UTC 24 |
| Finished | Oct 09 09:15:10 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752456893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.3752456893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.2768035776 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 829999670 ps |
| CPU time | 8.09 seconds |
| Started | Oct 09 09:13:51 PM UTC 24 |
| Finished | Oct 09 09:14:00 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768035776 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.2768035776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.3113776491 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 885150350 ps |
| CPU time | 4.08 seconds |
| Started | Oct 09 09:13:51 PM UTC 24 |
| Finished | Oct 09 09:13:56 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113776491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.3113776491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.3109506033 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 143997303 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:13:51 PM UTC 24 |
| Finished | Oct 09 09:13:54 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109506033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_disconnected.3109506033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_enable.1153333641 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 43052663 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:13:53 PM UTC 24 |
| Finished | Oct 09 09:13:55 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153333641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_enable.1153333641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.3391898768 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 933502925 ps |
| CPU time | 4.74 seconds |
| Started | Oct 09 09:13:53 PM UTC 24 |
| Finished | Oct 09 09:13:59 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391898768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.3391898768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.4283028892 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 264361063 ps |
| CPU time | 1.94 seconds |
| Started | Oct 09 09:13:53 PM UTC 24 |
| Finished | Oct 09 09:13:57 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283028892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_fifo_levels.4283028892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.2103762661 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 199447661 ps |
| CPU time | 3.37 seconds |
| Started | Oct 09 09:13:54 PM UTC 24 |
| Finished | Oct 09 09:13:58 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2103762661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_fifo_rst.2103762661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.4288248640 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 180688897 ps |
| CPU time | 1.67 seconds |
| Started | Oct 09 09:13:54 PM UTC 24 |
| Finished | Oct 09 09:13:56 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288248640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.4288248640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.170762077 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 140354340 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:13:54 PM UTC 24 |
| Finished | Oct 09 09:13:56 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=170762077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_in_stall.170762077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.312038635 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 196343560 ps |
| CPU time | 1.61 seconds |
| Started | Oct 09 09:13:55 PM UTC 24 |
| Finished | Oct 09 09:13:58 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312038635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_in_trans.312038635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.3428109250 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 2809888537 ps |
| CPU time | 73.54 seconds |
| Started | Oct 09 09:13:54 PM UTC 24 |
| Finished | Oct 09 09:15:09 PM UTC 24 |
| Peak memory | 234916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428109250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.3428109250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.2073046809 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 8920590116 ps |
| CPU time | 62.46 seconds |
| Started | Oct 09 09:13:55 PM UTC 24 |
| Finished | Oct 09 09:14:59 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2073046809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.2073046809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.303866017 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 291006332 ps |
| CPU time | 2.01 seconds |
| Started | Oct 09 09:13:57 PM UTC 24 |
| Finished | Oct 09 09:14:00 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=303866017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_link_in_err.303866017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.1438456597 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 25937474510 ps |
| CPU time | 41.57 seconds |
| Started | Oct 09 09:13:57 PM UTC 24 |
| Finished | Oct 09 09:14:40 PM UTC 24 |
| Peak memory | 218340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1438456597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.1438456597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.2190624590 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 4369005928 ps |
| CPU time | 8.99 seconds |
| Started | Oct 09 09:14:00 PM UTC 24 |
| Finished | Oct 09 09:14:10 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2190624590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.2190624590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.424747320 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 3653627426 ps |
| CPU time | 27.49 seconds |
| Started | Oct 09 09:14:00 PM UTC 24 |
| Finished | Oct 09 09:14:29 PM UTC 24 |
| Peak memory | 230580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=424747320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.424747320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.4077481222 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 2244247624 ps |
| CPU time | 60.38 seconds |
| Started | Oct 09 09:14:00 PM UTC 24 |
| Finished | Oct 09 09:15:02 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4077481222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.4077481222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.829155240 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 243326323 ps |
| CPU time | 1.8 seconds |
| Started | Oct 09 09:14:00 PM UTC 24 |
| Finished | Oct 09 09:14:03 PM UTC 24 |
| Peak memory | 215928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=829155240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.829155240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.382091162 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 182667351 ps |
| CPU time | 1.25 seconds |
| Started | Oct 09 09:14:00 PM UTC 24 |
| Finished | Oct 09 09:14:02 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=382091162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.382091162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.2724243701 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 2372762283 ps |
| CPU time | 62.78 seconds |
| Started | Oct 09 09:14:00 PM UTC 24 |
| Finished | Oct 09 09:15:04 PM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724243701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.2724243701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.1724293664 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 2129291502 ps |
| CPU time | 57.33 seconds |
| Started | Oct 09 09:14:00 PM UTC 24 |
| Finished | Oct 09 09:14:59 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724293664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.1724293664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.3479280837 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 2593927121 ps |
| CPU time | 31.66 seconds |
| Started | Oct 09 09:14:00 PM UTC 24 |
| Finished | Oct 09 09:14:33 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479280837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.3479280837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.1478666581 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 189574362 ps |
| CPU time | 1.68 seconds |
| Started | Oct 09 09:14:00 PM UTC 24 |
| Finished | Oct 09 09:14:03 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478666581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.1478666581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.2498181275 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 178428510 ps |
| CPU time | 1.53 seconds |
| Started | Oct 09 09:14:01 PM UTC 24 |
| Finished | Oct 09 09:14:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2498181275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.2498181275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.3309915948 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 278120614 ps |
| CPU time | 1.91 seconds |
| Started | Oct 09 09:14:02 PM UTC 24 |
| Finished | Oct 09 09:14:05 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3309915948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.3309915948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.420304469 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 153175141 ps |
| CPU time | 1.4 seconds |
| Started | Oct 09 09:14:02 PM UTC 24 |
| Finished | Oct 09 09:14:04 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=420304469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_out_iso.420304469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.3095053402 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 196664125 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:14:06 PM UTC 24 |
| Finished | Oct 09 09:14:09 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3095053402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.3095053402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.80392340 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 217848210 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:14:06 PM UTC 24 |
| Finished | Oct 09 09:14:09 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=80392340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_out_trans_nak.80392340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.238429580 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 151761861 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:14:06 PM UTC 24 |
| Finished | Oct 09 09:14:09 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=238429580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pending_in_trans.238429580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.963591791 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 211874424 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:14:06 PM UTC 24 |
| Finished | Oct 09 09:14:09 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=963591791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.963591791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.3193278561 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 148535691 ps |
| CPU time | 1.21 seconds |
| Started | Oct 09 09:14:06 PM UTC 24 |
| Finished | Oct 09 09:14:09 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3193278561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.3193278561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.1963423149 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 37474670 ps |
| CPU time | 1.05 seconds |
| Started | Oct 09 09:14:06 PM UTC 24 |
| Finished | Oct 09 09:14:09 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963423149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.1963423149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.4152323777 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 11187026071 ps |
| CPU time | 32.52 seconds |
| Started | Oct 09 09:14:06 PM UTC 24 |
| Finished | Oct 09 09:14:41 PM UTC 24 |
| Peak memory | 228256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152323777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.4152323777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.2511463493 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 165570564 ps |
| CPU time | 1.37 seconds |
| Started | Oct 09 09:14:06 PM UTC 24 |
| Finished | Oct 09 09:14:09 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511463493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.2511463493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.3881576497 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 241386819 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:14:06 PM UTC 24 |
| Finished | Oct 09 09:14:09 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881576497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_pkt_sent.3881576497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.1035867172 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 5770800992 ps |
| CPU time | 23.73 seconds |
| Started | Oct 09 09:14:07 PM UTC 24 |
| Finished | Oct 09 09:14:32 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035867172 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.1035867172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.1242825518 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 10895671968 ps |
| CPU time | 77.95 seconds |
| Started | Oct 09 09:14:09 PM UTC 24 |
| Finished | Oct 09 09:15:29 PM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242825518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.1242825518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.2071863896 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 9357344613 ps |
| CPU time | 57.94 seconds |
| Started | Oct 09 09:14:09 PM UTC 24 |
| Finished | Oct 09 09:15:09 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071863896 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.2071863896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.1599417330 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 210304553 ps |
| CPU time | 1.49 seconds |
| Started | Oct 09 09:14:07 PM UTC 24 |
| Finished | Oct 09 09:14:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599417330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_random_length_in_transaction.1599417330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.3380290171 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 175756524 ps |
| CPU time | 1.38 seconds |
| Started | Oct 09 09:14:07 PM UTC 24 |
| Finished | Oct 09 09:14:09 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380290171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.3380290171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.792256222 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 20202429674 ps |
| CPU time | 29.42 seconds |
| Started | Oct 09 09:14:09 PM UTC 24 |
| Finished | Oct 09 09:14:40 PM UTC 24 |
| Peak memory | 217884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=792256222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_resume_link_active.792256222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.2205807986 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 137480930 ps |
| CPU time | 1.42 seconds |
| Started | Oct 09 09:14:09 PM UTC 24 |
| Finished | Oct 09 09:14:12 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205807986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_rx_crc_err.2205807986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.3540920376 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 263429452 ps |
| CPU time | 1.96 seconds |
| Started | Oct 09 09:14:09 PM UTC 24 |
| Finished | Oct 09 09:14:12 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540920376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.3540920376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.3693232390 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 161884201 ps |
| CPU time | 1.41 seconds |
| Started | Oct 09 09:14:11 PM UTC 24 |
| Finished | Oct 09 09:14:14 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3693232390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.3693232390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.1000119493 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 177945343 ps |
| CPU time | 1.44 seconds |
| Started | Oct 09 09:14:11 PM UTC 24 |
| Finished | Oct 09 09:14:14 PM UTC 24 |
| Peak memory | 215508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1000119493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 9.usbdev_setup_trans_ignored.1000119493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.2846335355 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 203723073 ps |
| CPU time | 1.32 seconds |
| Started | Oct 09 09:14:11 PM UTC 24 |
| Finished | Oct 09 09:14:14 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846335355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.2846335355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.2215681263 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 3047156389 ps |
| CPU time | 78.81 seconds |
| Started | Oct 09 09:14:11 PM UTC 24 |
| Finished | Oct 09 09:15:32 PM UTC 24 |
| Peak memory | 230324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215681263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.2215681263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.188588396 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 164302687 ps |
| CPU time | 1.51 seconds |
| Started | Oct 09 09:14:12 PM UTC 24 |
| Finished | Oct 09 09:14:14 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=188588396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.188588396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.1304975039 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 198548998 ps |
| CPU time | 1.7 seconds |
| Started | Oct 09 09:14:12 PM UTC 24 |
| Finished | Oct 09 09:14:14 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304975039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_stall_trans.1304975039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.3923236750 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 1150864374 ps |
| CPU time | 4.6 seconds |
| Started | Oct 09 09:14:12 PM UTC 24 |
| Finished | Oct 09 09:14:18 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3923236750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.3923236750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1599686221 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 2757138933 ps |
| CPU time | 78.98 seconds |
| Started | Oct 09 09:14:12 PM UTC 24 |
| Finished | Oct 09 09:15:33 PM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599686221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.1599686221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.1799726576 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 3323344960 ps |
| CPU time | 68.64 seconds |
| Started | Oct 09 09:14:12 PM UTC 24 |
| Finished | Oct 09 09:15:22 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799726576 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.1799726576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3208964278 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 1026798169 ps |
| CPU time | 25.31 seconds |
| Started | Oct 09 09:13:51 PM UTC 24 |
| Finished | Oct 09 09:14:18 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3208964278 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.3208964278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.2412896540 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 504059187 ps |
| CPU time | 2.31 seconds |
| Started | Oct 09 09:14:12 PM UTC 24 |
| Finished | Oct 09 09:14:15 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2412896540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.2412896540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.325356756 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 197078369 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=325356756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.325356756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.2009880529 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 190436175 ps |
| CPU time | 0.9 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009880529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 90.usbdev_fifo_levels.2009880529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/90.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3441446496 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 450629064 ps |
| CPU time | 1.43 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3441446496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.3441446496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.4211961574 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 546209724 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211961574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.4211961574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.3908608267 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 276792232 ps |
| CPU time | 1.1 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908608267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 91.usbdev_fifo_levels.3908608267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/91.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.2093472669 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 626184018 ps |
| CPU time | 1.59 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2093472669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_t x_rx_disruption.2093472669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.3929082145 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 508819985 ps |
| CPU time | 1.47 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3929082145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.3929082145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.2477303337 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 166077850 ps |
| CPU time | 0.79 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:44 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477303337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 92.usbdev_fifo_levels.2477303337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/92.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1373723041 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 625938554 ps |
| CPU time | 1.62 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1373723041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.1373723041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.826404664 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 588571039 ps |
| CPU time | 1.64 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=826404664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_tx _rx_disruption.826404664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.3525989542 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 166221113 ps |
| CPU time | 0.82 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525989542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.3525989542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.2126294310 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 277328643 ps |
| CPU time | 1.01 seconds |
| Started | Oct 09 09:43:41 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126294310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 94.usbdev_fifo_levels.2126294310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/94.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.3729456135 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 508576938 ps |
| CPU time | 1.48 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3729456135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_t x_rx_disruption.3729456135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.2399287796 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 262174526 ps |
| CPU time | 1.21 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399287796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.2399287796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.1088419653 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 259913573 ps |
| CPU time | 1.02 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088419653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 95.usbdev_fifo_levels.1088419653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.2158576978 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 433696180 ps |
| CPU time | 1.46 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2158576978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.2158576978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.4091219884 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 420612260 ps |
| CPU time | 1.18 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4091219884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.4091219884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.2071867014 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 523959018 ps |
| CPU time | 1.5 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2071867014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_t x_rx_disruption.2071867014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.620931000 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 206008499 ps |
| CPU time | 0.92 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=620931000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.620931000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.2848081436 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 199316681 ps |
| CPU time | 0.85 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848081436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 97.usbdev_fifo_levels.2848081436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.800938966 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 563502166 ps |
| CPU time | 1.55 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:46 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=800938966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_tx _rx_disruption.800938966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.1315061168 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 416619294 ps |
| CPU time | 1.15 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315061168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.1315061168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.3343128995 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 252133691 ps |
| CPU time | 0.97 seconds |
| Started | Oct 09 09:43:42 PM UTC 24 |
| Finished | Oct 09 09:43:45 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343128995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 98.usbdev_fifo_levels.3343128995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.2831770548 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 590748580 ps |
| CPU time | 1.57 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2831770548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.2831770548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.2000573336 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 293292767 ps |
| CPU time | 0.98 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:55 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000573336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 99.usbdev_fifo_levels.2000573336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.478890299 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 478662113 ps |
| CPU time | 1.45 seconds |
| Started | Oct 09 09:44:53 PM UTC 24 |
| Finished | Oct 09 09:44:56 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=478890299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_tx _rx_disruption.478890299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |