Unified Coverage Report :: Group :: tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	3637797	1			T31	1640		T32	1955		T53	1790
values[2]	739441	1			T31	407		T32	550		T53	476
values[3]	103262	1			T31	1		T32	35		T53	2
values[4]	53240	1			T221	311		T102	141		T386	1
values[5]	35549	1			T221	249		T102	98		T384	1
values[6]	26524	1			T221	180		T102	45		T340	7
values[7]	21498	1			T221	108		T102	9		T340	4
values[8]	17936	1			T221	79		T102	3		T340	7
values[9]	16095	1			T221	82		T102	3		T340	11
values[10]	14425	1			T221	58		T102	11		T340	17
values[11]	12868	1			T221	47		T102	6		T340	11
values[12]	12206	1			T221	51		T102	14		T340	5
values[13]	11616	1			T221	35		T102	14		T340	7
values[14]	11308	1			T221	31		T102	6		T340	4
values[15]	10722	1			T221	18		T102	3		T340	9
values[16]	10140	1			T221	21		T102	6		T340	8
values[17]	9666	1			T221	16		T102	8		T340	16
values[18]	9518	1			T221	11		T102	9		T340	17
values[19]	9190	1			T221	16		T102	8		T340	8
values[20]	8886	1			T221	18		T102	5		T340	6
values[21]	8424	1			T221	18		T102	4		T340	6
values[22]	8461	1			T221	12		T102	8		T340	6
values[23]	8276	1			T221	18		T102	5		T340	8
values[24]	8038	1			T221	13		T102	13		T340	5
values[25]	7430	1			T221	18		T102	9		T340	1
values[26]	7068	1			T221	18		T102	6		T340	3
values[27]	6800	1			T221	21		T102	3		T340	1
values[28]	6508	1			T221	17		T102	3		T340	4
values[29]	6412	1			T221	16		T102	3		T340	1
values[30]	5845	1			T221	19		T102	6		T340	3
values[31]	5485	1			T221	18		T102	4		T340	2
values[32]	5253	1			T221	13		T102	8		T605	2
values[33]	4969	1			T221	13		T102	4		T605	2
values[34]	4613	1			T221	12		T102	6		T605	2
values[35]	4374	1			T221	15		T102	2		T605	2
values[36]	4054	1			T221	16		T102	6		T605	2
values[37]	3787	1			T221	14		T102	3		T605	2
values[38]	3600	1			T221	21		T102	5		T605	2
values[39]	3482	1			T221	12		T102	7		T605	2
values[40]	3409	1			T221	19		T102	6		T605	2
values[41]	3359	1			T221	15		T102	4		T605	2
values[42]	3156	1			T221	17		T102	4		T605	2
values[43]	3075	1			T221	22		T102	3		T605	3
values[44]	3038	1			T221	18		T102	8		T605	2
values[45]	3123	1			T221	19		T102	6		T605	2
values[46]	2965	1			T221	17		T102	5		T605	2
values[47]	2855	1			T221	24		T102	3		T605	2
values[48]	2795	1			T221	16		T102	9		T605	2
values[49]	2869	1			T221	19		T102	14		T605	2
values[50]	2741	1			T221	14		T102	6		T605	2
values[51]	2685	1			T221	19		T102	5		T605	2
values[52]	2674	1			T221	22		T102	2		T605	2
values[53]	2710	1			T221	12		T102	4		T605	2
values[54]	2630	1			T221	21		T102	3		T605	2
values[55]	2686	1			T221	16		T102	4		T605	2
values[56]	2604	1			T221	15		T102	4		T605	2
values[57]	2578	1			T221	18		T102	9		T605	2
values[58]	2519	1			T221	18		T102	11		T605	2
values[59]	2455	1			T221	14		T102	7		T605	2
values[60]	2600	1			T221	20		T102	5		T605	2
values[61]	2812	1			T221	26		T102	7		T605	2
values[62]	4604	1			T221	57		T102	8		T605	2
values[63]	16846	1			T221	205		T102	41		T605	51
values[64]	219722	1			T221	702		T102	131		T605	255

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	4674733	1			T31	1316		T32	2164		T53	1827
values[2]	770432	1			T31	363		T32	568		T53	465
values[3]	76266	1			T31	6		T32	106		T53	12
values[4]	13872	1			T31	1		T32	16		T53	2
values[5]	5072	1			T32	3		T221	3		T386	1
values[6]	2960	1			T221	2		T386	1		T384	2
values[7]	2257	1			T221	2		T384	1		T388	1
values[8]	1931	1			T221	4		T387	21		T369	7
values[9]	1723	1			T221	1		T387	15		T369	11
values[10]	1583	1			T221	1		T387	27		T369	10
values[11]	1419	1			T221	3		T387	28		T369	13
values[12]	1343	1			T221	3		T387	28		T369	24
values[13]	1251	1			T221	1		T387	31		T369	15
values[14]	1136	1			T221	2		T387	25		T369	14
values[15]	1034	1			T221	2		T387	26		T369	18
values[16]	946	1			T221	1		T387	35		T369	14
values[17]	860	1			T221	2		T387	22		T369	7
values[18]	825	1			T221	1		T387	15		T369	14
values[19]	785	1			T221	3		T387	14		T369	19
values[20]	780	1			T221	1		T387	10		T369	24
values[21]	850	1			T221	3		T387	15		T369	36
values[22]	801	1			T221	2		T387	12		T369	16
values[23]	683	1			T221	1		T387	8		T369	9
values[24]	699	1			T221	1		T387	5		T369	12
values[25]	614	1			T221	1		T387	6		T369	10
values[26]	634	1			T221	1		T387	9		T369	15
values[27]	617	1			T221	1		T387	17		T369	5
values[28]	621	1			T221	1		T387	18		T369	4
values[29]	564	1			T221	1		T387	6		T369	6
values[30]	533	1			T221	4		T387	6		T369	9
values[31]	494	1			T221	1		T387	4		T369	8
values[32]	551	1			T221	4		T387	2		T369	10
values[33]	565	1			T221	2		T369	18		T502	1
values[34]	563	1			T221	3		T369	18		T502	6
values[35]	512	1			T221	5		T369	16		T502	4
values[36]	488	1			T221	2		T369	20		T502	9
values[37]	473	1			T221	1		T369	16		T502	12
values[38]	450	1			T221	1		T369	18		T502	9
values[39]	428	1			T221	2		T369	5		T502	8
values[40]	441	1			T221	1		T369	4		T502	7
values[41]	459	1			T221	2		T369	9		T502	1
values[42]	450	1			T221	1		T369	5		T502	6
values[43]	470	1			T221	2		T369	3		T502	15
values[44]	442	1			T221	3		T369	7		T502	12
values[45]	421	1			T221	3		T369	4		T502	12
values[46]	418	1			T221	3		T369	7		T502	11
values[47]	428	1			T221	1		T369	3		T502	4
values[48]	402	1			T221	2		T369	3		T502	4
values[49]	430	1			T221	2		T369	4		T502	15
values[50]	404	1			T221	1		T369	4		T502	17
values[51]	381	1			T221	4		T369	4		T502	3
values[52]	379	1			T221	1		T369	4		T502	2
values[53]	384	1			T221	1		T369	3		T743	3
values[54]	371	1			T221	1		T369	5		T743	3
values[55]	348	1			T221	1		T369	7		T743	3
values[56]	376	1			T221	2		T369	10		T743	3
values[57]	381	1			T221	3		T369	14		T743	3
values[58]	366	1			T221	1		T369	7		T743	3
values[59]	347	1			T221	2		T369	5		T743	3
values[60]	381	1			T221	1		T369	6		T743	3
values[61]	414	1			T221	2		T369	3		T743	3
values[62]	704	1			T221	9		T369	16		T743	3
values[63]	3406	1			T221	40		T369	55		T743	3
values[64]	25987	1			T221	75		T369	117		T743	560

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	602284	1			T31	13		T32	21		T53	16
values[2]	2541686	1			T31	1659		T32	677		T53	1597
values[3]	1150207	1			T31	417		T32	1987		T53	473
values[4]	148660	1			T31	1		T32	92		T53	1
values[5]	74092	1			T221	359		T102	139		T386	6
values[6]	48150	1			T221	180		T102	93		T340	45
values[7]	34609	1			T221	155		T102	65		T340	50
values[8]	27385	1			T221	88		T102	24		T340	38
values[9]	23033	1			T221	76		T102	23		T340	36
values[10]	19714	1			T221	68		T102	11		T340	19
values[11]	17792	1			T221	62		T102	16		T340	38
values[12]	16611	1			T221	62		T102	27		T340	31
values[13]	15134	1			T221	49		T102	24		T340	39
values[14]	14103	1			T221	41		T102	23		T340	39
values[15]	13917	1			T221	45		T102	22		T340	24
values[16]	12692	1			T221	26		T102	14		T340	16
values[17]	11973	1			T221	22		T102	7		T340	21
values[18]	11580	1			T221	24		T102	9		T340	26
values[19]	11294	1			T221	23		T102	3		T340	30
values[20]	10855	1			T221	19		T102	5		T340	27
values[21]	10236	1			T221	23		T102	7		T340	21
values[22]	9483	1			T221	24		T102	9		T340	18
values[23]	9458	1			T221	29		T102	7		T340	32
values[24]	9145	1			T221	43		T102	3		T340	27
values[25]	8979	1			T221	43		T102	2		T340	20
values[26]	8402	1			T221	51		T102	4		T340	31
values[27]	7913	1			T221	32		T102	3		T340	46
values[28]	7613	1			T221	24		T102	5		T340	6
values[29]	7193	1			T221	29		T102	10		T340	8
values[30]	6443	1			T221	21		T102	6		T340	11
values[31]	6038	1			T221	13		T102	11		T340	16
values[32]	5782	1			T221	20		T102	3		T340	9
values[33]	5498	1			T221	16		T102	5		T340	4
values[34]	5248	1			T221	26		T102	5		T605	2
values[35]	4790	1			T221	24		T102	6		T605	2
values[36]	4640	1			T221	20		T102	11		T605	2
values[37]	4199	1			T221	23		T102	8		T605	2
values[38]	4168	1			T221	37		T102	12		T605	2
values[39]	3979	1			T221	25		T102	22		T605	2
values[40]	3827	1			T221	24		T102	5		T605	2
values[41]	3731	1			T221	36		T102	6		T605	2
values[42]	3638	1			T221	30		T102	8		T605	2
values[43]	3581	1			T221	23		T102	6		T605	2
values[44]	3569	1			T221	29		T102	5		T605	2
values[45]	3475	1			T221	21		T102	2		T605	2
values[46]	3373	1			T221	23		T102	2		T605	2
values[47]	3146	1			T221	19		T102	2		T605	2
values[48]	3195	1			T221	26		T102	6		T605	2
values[49]	3226	1			T221	31		T102	6		T605	2
values[50]	3163	1			T221	27		T102	4		T605	2
values[51]	3176	1			T221	34		T102	5		T605	2
values[52]	3112	1			T221	17		T102	8		T605	2
values[53]	3077	1			T221	24		T102	10		T605	2
values[54]	3001	1			T221	18		T102	6		T605	2
values[55]	3023	1			T221	23		T102	8		T605	2
values[56]	2894	1			T221	10		T102	4		T605	2
values[57]	2903	1			T221	22		T102	3		T605	2
values[58]	2776	1			T221	15		T102	7		T605	2
values[59]	2781	1			T221	21		T102	6		T605	2
values[60]	2799	1			T221	26		T102	2		T605	2
values[61]	3076	1			T221	23		T102	3		T605	2
values[62]	4391	1			T221	66		T102	4		T605	2
values[63]	19164	1			T221	231		T102	28		T605	10
values[64]	207459	1			T221	429		T102	42		T605	395