SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
98.79 | 98.79 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_flash_ctrl | 99.96 | 99.96 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
99.96 | 99.96 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
99.96 | 99.96 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
94.17 | 89.96 | 92.56 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 135 | 127 | 94.07 |
Total Bits | 2650 | 2618 | 98.79 |
Total Bits 0->1 | 1325 | 1311 | 98.94 |
Total Bits 1->0 | 1325 | 1307 | 98.64 |
Ports | 135 | 127 | 94.07 |
Port Bits | 2650 | 2618 | 98.79 |
Port Bits 0->1 | 1325 | 1311 | 98.94 |
Port Bits 1->0 | 1325 | 1307 | 98.64 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
rst_ni | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
rst_shadowed_ni | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
clk_otp_i | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
rst_otp_ni | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T2,T3 | Yes | T28,T1,T2 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T2,T3 | Yes | T28,T1,T2 | INPUT |
lc_iso_part_sw_rd_en_i[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
lc_iso_part_sw_wr_en_i[3:0] | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T17,T20,T44 | Yes | T17,T18,T20 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T41,T42,T43 | Yes | T41,T42,T43 | INPUT |
lc_nvm_debug_en_i[3:0] | Yes | Yes | T28,T17,T20 | Yes | T28,T17,T18 | INPUT |
core_tl_i.d_ready | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_address[8:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_address[23:9] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[24] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_address[29:25] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_o.a_ready | Yes | Yes | T30,T31,T60 | Yes | T29,T30,T31 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_address[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_address[14:7] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[15] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_address[23:16] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[24] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_address[29:25] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T30,T31,T60 | Yes | T29,T30,T31 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T29,T30,T60 | Yes | T29,T30,T31 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
mem_tl_i.d_ready | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_user.instr_type[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
mem_tl_i.a_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_mask[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_address[19:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_address[28:20] | Unreachable | Unreachable | Unreachable | INPUT | ||
mem_tl_i.a_address[29] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_address[31:30] | Unreachable | Unreachable | Unreachable | INPUT | ||
mem_tl_i.a_source[5:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
mem_tl_i.a_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
mem_tl_i.a_opcode[2:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_i.a_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
mem_tl_o.a_ready | Yes | Yes | T30,T31,T60 | Yes | T29,T30,T31 | OUTPUT |
mem_tl_o.d_error | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
mem_tl_o.d_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
mem_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
mem_tl_o.d_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
mem_tl_o.d_sink | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
mem_tl_o.d_source[5:0] | Yes | Yes | T29,T30,*T31 | Yes | T29,T30,T31 | OUTPUT |
mem_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
mem_tl_o.d_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
mem_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
mem_tl_o.d_opcode[0] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | OUTPUT |
mem_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
mem_tl_o.d_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT |
otp_o.addr_req | Yes | Yes | T17,T18,T19 | Yes | T17,T18,T19 | OUTPUT |
otp_o.data_req | Yes | Yes | T17,T18,T19 | Yes | T17,T18,T19 | OUTPUT |
otp_i.seed_valid | Yes | Yes | T17,T20,T44 | Yes | T17,T18,T19 | INPUT |
otp_i.rand_key[127:0] | Yes | Yes | T17,T18,T19 | Yes | T17,T18,T20 | INPUT |
otp_i.key[127:0] | Yes | Yes | T17,T20,T98 | Yes | T17,T19,T20 | INPUT |
otp_i.addr_ack | Yes | Yes | T17,T18,T19 | Yes | T17,T18,T19 | INPUT |
otp_i.data_ack | Yes | Yes | T17,T18,T19 | Yes | T17,T18,T19 | INPUT |
rma_req_i[3:0] | Yes | Yes | T169,T177 | Yes | T169,T177 | INPUT |
rma_seed_i[31:0] | Yes | Yes | T39,T166,T176 | Yes | T39,T166,T176 | INPUT |
rma_ack_o[3:0] | Yes | Yes | T169,T177 | Yes | T169,T177 | OUTPUT |
pwrmgr_o.flash_idle | Yes | Yes | T44,T170,T106 | Yes | T44,T170,T106 | OUTPUT |
keymgr_o.seeds[0][0] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][2:1] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][3] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][4] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][5] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][6] | Yes | Yes | T168,T392,T393 | Yes | T168,T392,T393 | OUTPUT |
keymgr_o.seeds[0][7] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][8] | Yes | Yes | T168,T394,T395 | Yes | T168,T394,T395 | OUTPUT |
keymgr_o.seeds[0][10:9] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][11] | Yes | Yes | T250 | Yes | T250 | OUTPUT |
keymgr_o.seeds[0][12] | Yes | Yes | T167,T169,T394 | Yes | T167,T169,T394 | OUTPUT |
keymgr_o.seeds[0][13] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][15:14] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][16] | Yes | Yes | T168,T169,T392 | Yes | T168,T169,T392 | OUTPUT |
keymgr_o.seeds[0][18:17] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][19] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][20] | Yes | Yes | T168,T250,T394 | Yes | T168,T250,T394 | OUTPUT |
keymgr_o.seeds[0][21] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][22] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][23] | Yes | Yes | T168,T393 | Yes | T168,T393 | OUTPUT |
keymgr_o.seeds[0][27:24] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][28] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][33:29] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][34] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][35] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][36] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][37] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][38] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][39] | Yes | Yes | T167,T396,T397 | Yes | T167,T396,T397 | OUTPUT |
keymgr_o.seeds[0][40] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][41] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][42] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][43] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][44] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][45] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][46] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][47] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][48] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][52:49] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][53] | Yes | Yes | T169,T396,T397 | Yes | T169,T396,T397 | OUTPUT |
keymgr_o.seeds[0][54] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][55] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][56] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][57] | Yes | Yes | T167,T169,T396 | Yes | T167,T169,T396 | OUTPUT |
keymgr_o.seeds[0][58] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][59] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][60] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[0][61] | Yes | Yes | T396,T397,T250 | Yes | T396,T397,T250 | OUTPUT |
keymgr_o.seeds[0][62] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][63] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][64] | Yes | Yes | T167,T169,T396 | Yes | T167,T169,T396 | OUTPUT |
keymgr_o.seeds[0][65] | Yes | Yes | T396,T397,T395 | Yes | T396,T397,T395 | OUTPUT |
keymgr_o.seeds[0][66] | Yes | Yes | T396,T397,T394 | Yes | T396,T397,T394 | OUTPUT |
keymgr_o.seeds[0][67] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][68] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][69] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][70] | Yes | Yes | T167,T169,T396 | Yes | T167,T169,T396 | OUTPUT |
keymgr_o.seeds[0][71] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][72] | Yes | Yes | T167,T169,T396 | Yes | T167,T169,T396 | OUTPUT |
keymgr_o.seeds[0][74:73] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][75] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][80:76] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][81] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][82] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][83] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][84] | Yes | Yes | T167,T396,T397 | Yes | T167,T396,T397 | OUTPUT |
keymgr_o.seeds[0][85] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][86] | Yes | Yes | T169,T396,T397 | Yes | T169,T396,T397 | OUTPUT |
keymgr_o.seeds[0][87] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][88] | Yes | Yes | T169,T396,T397 | Yes | T169,T396,T397 | OUTPUT |
keymgr_o.seeds[0][89] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][90] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][92:91] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][93] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][94] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][95] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][96] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][97] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][102:98] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][103] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][105:104] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][106] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][107] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][108] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[0][109] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][110] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][111] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][112] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][114:113] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][115] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[0][116] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][119:117] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][120] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][121] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][122] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][123] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][124] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][127:125] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][128] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[0][129] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][134:130] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][135] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][136] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[0][141:137] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][142] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][146:143] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][147] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][148] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][151:149] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][152] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][153] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][154] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][155] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][156] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][157] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][158] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][159] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][160] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][163:161] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][164] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][166:165] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][167] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][169:168] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][170] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][171] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][174:172] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][175] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][176] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][178:177] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][179] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][180] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][181] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][185:182] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][186] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][187] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][190:188] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][191] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][192] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][193] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][194] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][197:195] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][198] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][199] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][200] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][202:201] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][203] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][205:204] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][206] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][208:207] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][209] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][210] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][211] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][212] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][214:213] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][215] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[0][216] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][217] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][219:218] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][220] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][221] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][222] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][223] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][224] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][225] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][227:226] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][228] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][230:229] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][231] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][233:232] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][234] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[0][235] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][236] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][237] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][238] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][239] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][240] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][241] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][242] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][243] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][244] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[0][245] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][246] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][249:247] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][250] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[0][251] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[0][252] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[0][253] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[0][255:254] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][0] | Yes | Yes | T392,T393,T395 | Yes | T392,T393,T395 | OUTPUT |
keymgr_o.seeds[1][1] | Yes | Yes | T396,T392,T395 | Yes | T396,T392,T395 | OUTPUT |
keymgr_o.seeds[1][2] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][3] | Yes | Yes | T167,T169,T397 | Yes | T167,T169,T397 | OUTPUT |
keymgr_o.seeds[1][4] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][6:5] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][7] | Yes | Yes | T397,T393,T395 | Yes | T397,T393,T395 | OUTPUT |
keymgr_o.seeds[1][8] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][9] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][10] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][11] | Yes | Yes | T169,T397,T395 | Yes | T169,T397,T395 | OUTPUT |
keymgr_o.seeds[1][14:12] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][15] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][16] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][17] | Yes | Yes | T167,T392,T393 | Yes | T167,T392,T393 | OUTPUT |
keymgr_o.seeds[1][18] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][19] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][20] | Yes | Yes | T169,T396,T397 | Yes | T169,T396,T397 | OUTPUT |
keymgr_o.seeds[1][21] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][22] | Yes | Yes | T169,T396,T394 | Yes | T169,T396,T394 | OUTPUT |
keymgr_o.seeds[1][23] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][24] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][25] | Yes | Yes | T167,T169,T397 | Yes | T167,T169,T397 | OUTPUT |
keymgr_o.seeds[1][26] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][27] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][28] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][29] | Yes | Yes | T169,T396,T394 | Yes | T169,T396,T394 | OUTPUT |
keymgr_o.seeds[1][30] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][33:31] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][34] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[1][36:35] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][37] | Yes | Yes | T168,T250,T392 | Yes | T168,T250,T392 | OUTPUT |
keymgr_o.seeds[1][38] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][39] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][40] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][41] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][42] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][45:43] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][46] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[1][47] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[1][48] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][49] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][50] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][51] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][52] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][53] | Yes | Yes | T167,T168,T397 | Yes | T167,T168,T397 | OUTPUT |
keymgr_o.seeds[1][54] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][55] | Yes | Yes | T168,T394,T393 | Yes | T168,T394,T393 | OUTPUT |
keymgr_o.seeds[1][56] | Yes | Yes | T168,T169,T394 | Yes | T168,T169,T394 | OUTPUT |
keymgr_o.seeds[1][57] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][58] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][59] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][60] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][61] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][62] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][63] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][64] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][65] | Yes | Yes | T168,T169,T250 | Yes | T168,T169,T250 | OUTPUT |
keymgr_o.seeds[1][66] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][67] | Yes | Yes | T167,T168,T250 | Yes | T167,T168,T250 | OUTPUT |
keymgr_o.seeds[1][71:68] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][72] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][73] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][74] | Yes | Yes | T167,T168,T250 | Yes | T167,T168,T250 | OUTPUT |
keymgr_o.seeds[1][76:75] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][77] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][78] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][79] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][80] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[1][81] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][83:82] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][84] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][86:85] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][87] | Yes | Yes | T168,T169,T250 | Yes | T168,T169,T250 | OUTPUT |
keymgr_o.seeds[1][89:88] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][90] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[1][92:91] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][93] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][94] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][97:95] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][98] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][99] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[1][100] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][101] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][102] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[1][104:103] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][105] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[1][106] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[1][107] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][110:108] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][111] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][113:112] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][114] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][115] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][116] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[1][117] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][118] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][119] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[1][126:120] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][127] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[1][128] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][130:129] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][131] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][132] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][133] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][135:134] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][136] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][140:137] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][141] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][142] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][145:143] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][146] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][148:147] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][149] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][150] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][151] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[1][152] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][153] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][154] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][155] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][156] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][157] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][158] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][159] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[1][161:160] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][162] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[1][164:163] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][165] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][168:166] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][169] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[1][173:170] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][174] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][178:175] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][179] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][185:180] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][186] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][187] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][188] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][189] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][190] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][192:191] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][193] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][194] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][196:195] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][197] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][198] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][199] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][200] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][203:201] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][205:204] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][206] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][207] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[1][208] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][210:209] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][211] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][212] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][214:213] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][216:215] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][217] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[1][219:218] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][220] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][221] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
keymgr_o.seeds[1][222] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][224:223] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][225] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][226] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][227] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][228] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT |
keymgr_o.seeds[1][230:229] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][231] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][234:232] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][235] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][239:236] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][240] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[1][241] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][242] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][243] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][244] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][245] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][247:246] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][248] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][250:249] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][251] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT |
keymgr_o.seeds[1][252] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
keymgr_o.seeds[1][253] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT |
keymgr_o.seeds[1][254] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT |
keymgr_o.seeds[1][255] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT |
cio_tck_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
cio_tms_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
cio_tdi_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
cio_tdo_en_o | No | No | No | OUTPUT | ||
cio_tdo_o | No | No | No | OUTPUT | ||
intr_corr_err_o | Yes | Yes | T18,T257,T262 | Yes | T18,T257,T262 | OUTPUT |
intr_prog_empty_o | Yes | Yes | T18,T161,T263 | Yes | T18,T161,T263 | OUTPUT |
intr_prog_lvl_o | Yes | Yes | T18,T161,T263 | Yes | T18,T161,T263 | OUTPUT |
intr_rd_full_o | Yes | Yes | T18,T161,T263 | Yes | T18,T161,T263 | OUTPUT |
intr_rd_lvl_o | Yes | Yes | T18,T161,T263 | Yes | T18,T161,T263 | OUTPUT |
intr_op_done_o | Yes | Yes | T18,T161,T263 | Yes | T18,T161,T263 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T161,T337,T62 | Yes | T161,T337,T62 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T62,T63,T65 | Yes | T62,T65,T66 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T62,T65,T66 | Yes | T62,T63,T65 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T66 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T62,T63,T66 | Yes | T62,T63,T65 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T62,T167,T168 | Yes | T62,T167,T168 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T161,T337,T62 | Yes | T161,T337,T62 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T62,T167,T168 | Yes | T62,T167,T168 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
fla_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
flash_bist_enable_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
flash_power_down_h_i | Yes | Yes | T30,T31,T60 | Yes | T17,T109,T110 | INPUT |
flash_power_ready_h_i | No | No | Yes | T29,T30,T31 | INPUT | |
flash_test_mode_a_io[1:0] | No | No | Yes | T4,T5,T6 | INOUT | |
flash_test_voltage_h_io | No | No | Yes | T4,T5,T6 | INOUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 128 | 127 | 99.22 |
Total Bits | 2616 | 2615 | 99.96 |
Total Bits 0->1 | 1308 | 1308 | 100.00 |
Total Bits 1->0 | 1308 | 1307 | 99.92 |
Ports | 128 | 127 | 99.22 |
Port Bits | 2616 | 2615 | 99.96 |
Port Bits 0->1 | 1308 | 1308 | 100.00 |
Port Bits 1->0 | 1308 | 1307 | 99.92 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
rst_ni | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
rst_shadowed_ni | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
clk_otp_i | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
rst_otp_ni | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T2,T3 | Yes | T28,T1,T2 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T2,T3 | Yes | T28,T1,T2 | INPUT | |
lc_iso_part_sw_rd_en_i[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
lc_iso_part_sw_wr_en_i[3:0] | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T17,T20,T44 | Yes | T17,T18,T20 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T41,T42,T43 | Yes | T41,T42,T43 | INPUT | |
lc_nvm_debug_en_i[3:0] | Yes | Yes | T28,T17,T20 | Yes | T28,T17,T18 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_address[8:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_address[23:9] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[24] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_address[29:25] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T30,T31,T60 | Yes | T29,T30,T31 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_address[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_address[14:7] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[15] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_address[23:16] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[24] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_address[29:25] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T30,T31,T60 | Yes | T29,T30,T31 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T29,T30,T60 | Yes | T29,T30,T31 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
mem_tl_i.d_ready | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_user.instr_type[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
mem_tl_i.a_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_mask[3:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_address[19:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_address[28:20] | Unreachable | Unreachable | Unreachable | INPUT | |||
mem_tl_i.a_address[29] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_address[31:30] | Unreachable | Unreachable | Unreachable | INPUT | |||
mem_tl_i.a_source[5:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
mem_tl_i.a_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
mem_tl_i.a_opcode[2:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_i.a_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
mem_tl_o.a_ready | Yes | Yes | T30,T31,T60 | Yes | T29,T30,T31 | OUTPUT | |
mem_tl_o.d_error | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
mem_tl_o.d_user.data_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
mem_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
mem_tl_o.d_data[31:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
mem_tl_o.d_sink | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
mem_tl_o.d_source[5:0] | Yes | Yes | T29,T30,*T31 | Yes | T29,T30,T31 | OUTPUT | |
mem_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
mem_tl_o.d_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
mem_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
mem_tl_o.d_opcode[0] | Yes | Yes | *T29,*T30,*T31 | Yes | T29,T30,T31 | OUTPUT | |
mem_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
mem_tl_o.d_valid | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | OUTPUT | |
otp_o.addr_req | Yes | Yes | T17,T18,T19 | Yes | T17,T18,T19 | OUTPUT | |
otp_o.data_req | Yes | Yes | T17,T18,T19 | Yes | T17,T18,T19 | OUTPUT | |
otp_i.seed_valid | Yes | Yes | T17,T20,T44 | Yes | T17,T18,T19 | INPUT | |
otp_i.rand_key[127:0] | Yes | Yes | T17,T18,T19 | Yes | T17,T18,T20 | INPUT | |
otp_i.key[127:0] | Yes | Yes | T17,T20,T98 | Yes | T17,T19,T20 | INPUT | |
otp_i.addr_ack | Yes | Yes | T17,T18,T19 | Yes | T17,T18,T19 | INPUT | |
otp_i.data_ack | Yes | Yes | T17,T18,T19 | Yes | T17,T18,T19 | INPUT | |
rma_req_i[3:0] | Yes | Yes | T169,T177 | Yes | T169,T177 | INPUT | |
rma_seed_i[31:0] | Yes | Yes | T39,T166,T176 | Yes | T39,T166,T176 | INPUT | |
rma_ack_o[3:0] | Yes | Yes | T169,T177 | Yes | T169,T177 | OUTPUT | |
pwrmgr_o.flash_idle | Yes | Yes | T44,T170,T106 | Yes | T44,T170,T106 | OUTPUT | |
keymgr_o.seeds[0][0] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][2:1] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][3] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][4] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][5] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][6] | Yes | Yes | T168,T392,T393 | Yes | T168,T392,T393 | OUTPUT | |
keymgr_o.seeds[0][7] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][8] | Yes | Yes | T168,T394,T395 | Yes | T168,T394,T395 | OUTPUT | |
keymgr_o.seeds[0][10:9] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][11] | Yes | Yes | T250 | Yes | T250 | OUTPUT | |
keymgr_o.seeds[0][12] | Yes | Yes | T167,T169,T394 | Yes | T167,T169,T394 | OUTPUT | |
keymgr_o.seeds[0][13] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][15:14] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][16] | Yes | Yes | T168,T169,T392 | Yes | T168,T169,T392 | OUTPUT | |
keymgr_o.seeds[0][18:17] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][19] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][20] | Yes | Yes | T168,T250,T394 | Yes | T168,T250,T394 | OUTPUT | |
keymgr_o.seeds[0][21] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][22] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][23] | Yes | Yes | T168,T393 | Yes | T168,T393 | OUTPUT | |
keymgr_o.seeds[0][27:24] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][28] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][33:29] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][34] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][35] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][36] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][37] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][38] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][39] | Yes | Yes | T167,T396,T397 | Yes | T167,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][40] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][41] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][42] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][43] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][44] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][45] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][46] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][47] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][48] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][52:49] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][53] | Yes | Yes | T169,T396,T397 | Yes | T169,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][54] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][55] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][56] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][57] | Yes | Yes | T167,T169,T396 | Yes | T167,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][58] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][59] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][60] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][61] | Yes | Yes | T396,T397,T250 | Yes | T396,T397,T250 | OUTPUT | |
keymgr_o.seeds[0][62] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][63] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][64] | Yes | Yes | T167,T169,T396 | Yes | T167,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][65] | Yes | Yes | T396,T397,T395 | Yes | T396,T397,T395 | OUTPUT | |
keymgr_o.seeds[0][66] | Yes | Yes | T396,T397,T394 | Yes | T396,T397,T394 | OUTPUT | |
keymgr_o.seeds[0][67] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][68] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][69] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][70] | Yes | Yes | T167,T169,T396 | Yes | T167,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][71] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][72] | Yes | Yes | T167,T169,T396 | Yes | T167,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][74:73] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][75] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][80:76] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][81] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][82] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][83] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][84] | Yes | Yes | T167,T396,T397 | Yes | T167,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][85] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][86] | Yes | Yes | T169,T396,T397 | Yes | T169,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][87] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][88] | Yes | Yes | T169,T396,T397 | Yes | T169,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][89] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][90] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][92:91] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][93] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][94] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][95] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][96] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][97] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][102:98] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][103] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][105:104] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][106] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][107] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][108] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][109] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][110] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][111] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][112] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][114:113] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][115] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][116] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][119:117] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][120] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][121] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][122] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][123] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][124] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][127:125] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][128] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][129] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][134:130] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][135] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][136] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][141:137] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][142] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][146:143] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][147] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][148] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][151:149] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][152] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][153] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][154] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][155] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][156] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][157] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][158] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][159] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][160] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][163:161] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][164] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][166:165] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][167] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][169:168] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][170] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][171] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][174:172] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][175] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][176] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][178:177] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][179] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][180] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][181] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][185:182] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][186] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][187] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][190:188] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][191] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][192] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][193] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][194] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][197:195] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][198] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][199] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][200] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][202:201] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][203] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][205:204] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][206] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][208:207] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][209] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][210] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][211] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][212] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][214:213] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][215] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][216] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][217] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][219:218] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][220] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][221] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][222] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][223] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][224] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][225] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][227:226] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][228] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][230:229] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][231] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][233:232] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][234] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[0][235] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][236] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][237] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][238] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][239] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][240] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][241] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][242] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][243] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][244] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[0][245] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][246] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][249:247] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][250] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[0][251] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[0][252] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[0][253] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[0][255:254] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][0] | Yes | Yes | T392,T393,T395 | Yes | T392,T393,T395 | OUTPUT | |
keymgr_o.seeds[1][1] | Yes | Yes | T396,T392,T395 | Yes | T396,T392,T395 | OUTPUT | |
keymgr_o.seeds[1][2] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][3] | Yes | Yes | T167,T169,T397 | Yes | T167,T169,T397 | OUTPUT | |
keymgr_o.seeds[1][4] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][6:5] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][7] | Yes | Yes | T397,T393,T395 | Yes | T397,T393,T395 | OUTPUT | |
keymgr_o.seeds[1][8] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][9] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][10] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][11] | Yes | Yes | T169,T397,T395 | Yes | T169,T397,T395 | OUTPUT | |
keymgr_o.seeds[1][14:12] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][15] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][16] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][17] | Yes | Yes | T167,T392,T393 | Yes | T167,T392,T393 | OUTPUT | |
keymgr_o.seeds[1][18] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][19] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][20] | Yes | Yes | T169,T396,T397 | Yes | T169,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][21] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][22] | Yes | Yes | T169,T396,T394 | Yes | T169,T396,T394 | OUTPUT | |
keymgr_o.seeds[1][23] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][24] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][25] | Yes | Yes | T167,T169,T397 | Yes | T167,T169,T397 | OUTPUT | |
keymgr_o.seeds[1][26] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][27] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][28] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][29] | Yes | Yes | T169,T396,T394 | Yes | T169,T396,T394 | OUTPUT | |
keymgr_o.seeds[1][30] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][33:31] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][34] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[1][36:35] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][37] | Yes | Yes | T168,T250,T392 | Yes | T168,T250,T392 | OUTPUT | |
keymgr_o.seeds[1][38] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][39] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][40] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][41] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][42] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][45:43] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][46] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[1][47] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[1][48] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][49] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][50] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][51] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][52] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][53] | Yes | Yes | T167,T168,T397 | Yes | T167,T168,T397 | OUTPUT | |
keymgr_o.seeds[1][54] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][55] | Yes | Yes | T168,T394,T393 | Yes | T168,T394,T393 | OUTPUT | |
keymgr_o.seeds[1][56] | Yes | Yes | T168,T169,T394 | Yes | T168,T169,T394 | OUTPUT | |
keymgr_o.seeds[1][57] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][58] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][59] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][60] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][61] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][62] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][63] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][64] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][65] | Yes | Yes | T168,T169,T250 | Yes | T168,T169,T250 | OUTPUT | |
keymgr_o.seeds[1][66] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][67] | Yes | Yes | T167,T168,T250 | Yes | T167,T168,T250 | OUTPUT | |
keymgr_o.seeds[1][71:68] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][72] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][73] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][74] | Yes | Yes | T167,T168,T250 | Yes | T167,T168,T250 | OUTPUT | |
keymgr_o.seeds[1][76:75] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][77] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][78] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][79] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][80] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[1][81] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][83:82] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][84] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][86:85] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][87] | Yes | Yes | T168,T169,T250 | Yes | T168,T169,T250 | OUTPUT | |
keymgr_o.seeds[1][89:88] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][90] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[1][92:91] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][93] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][94] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][97:95] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][98] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][99] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[1][100] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][101] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][102] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[1][104:103] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][105] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[1][106] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[1][107] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][110:108] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][111] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][113:112] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][114] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][115] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][116] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[1][117] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][118] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][119] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[1][126:120] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][127] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[1][128] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][130:129] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][131] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][132] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][133] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][135:134] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][136] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][140:137] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][141] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][142] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][145:143] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][146] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][148:147] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][149] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][150] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][151] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[1][152] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][153] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][154] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][155] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][156] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][157] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][158] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][159] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[1][161:160] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][162] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[1][164:163] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][165] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][168:166] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][169] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[1][173:170] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][174] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][178:175] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][179] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][185:180] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][186] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][187] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][188] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][189] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][190] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][192:191] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][193] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][194] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][196:195] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][197] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][198] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][199] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][200] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][203:201] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][205:204] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][206] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][207] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[1][208] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][210:209] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][211] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][212] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][214:213] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][216:215] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][217] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[1][219:218] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][220] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][221] | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
keymgr_o.seeds[1][222] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][224:223] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][225] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][226] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][227] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][228] | Yes | Yes | T167,T168,T396 | Yes | T167,T168,T396 | OUTPUT | |
keymgr_o.seeds[1][230:229] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][231] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][234:232] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][235] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][239:236] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][240] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[1][241] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][242] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][243] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][244] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][245] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][247:246] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][248] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][250:249] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][251] | Yes | Yes | T168,T396,T397 | Yes | T168,T396,T397 | OUTPUT | |
keymgr_o.seeds[1][252] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
keymgr_o.seeds[1][253] | Yes | Yes | T44,T170,T171 | Yes | T44,T170,T171 | OUTPUT | |
keymgr_o.seeds[1][254] | Yes | Yes | T168,T169,T396 | Yes | T168,T169,T396 | OUTPUT | |
keymgr_o.seeds[1][255] | Yes | Yes | T17,T18,T20 | Yes | T17,T18,T20 | OUTPUT | |
cio_tck_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
cio_tms_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
cio_tdi_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
cio_tdo_en_o[0:0] | Excluded | Excluded | Excluded | OUTPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV. | ||
cio_tdo_o[0:0] | Excluded | Excluded | Excluded | OUTPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV. | ||
intr_corr_err_o | Yes | Yes | T18,T257,T262 | Yes | T18,T257,T262 | OUTPUT | |
intr_prog_empty_o | Yes | Yes | T18,T161,T263 | Yes | T18,T161,T263 | OUTPUT | |
intr_prog_lvl_o | Yes | Yes | T18,T161,T263 | Yes | T18,T161,T263 | OUTPUT | |
intr_rd_full_o | Yes | Yes | T18,T161,T263 | Yes | T18,T161,T263 | OUTPUT | |
intr_rd_lvl_o | Yes | Yes | T18,T161,T263 | Yes | T18,T161,T263 | OUTPUT | |
intr_op_done_o | Yes | Yes | T18,T161,T263 | Yes | T18,T161,T263 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T161,T337,T62 | Yes | T161,T337,T62 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T62,T63,T65 | Yes | T62,T65,T66 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T62,T65,T66 | Yes | T62,T63,T65 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T66 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T62,T63,T66 | Yes | T62,T63,T65 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T62,T167,T168 | Yes | T62,T167,T168 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T62,T63,T65 | Yes | T62,T63,T65 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T161,T337,T62 | Yes | T161,T337,T62 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T62,T167,T168 | Yes | T62,T167,T168 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T28,T1,T2 | Yes | T28,T1,T2 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T62,T63,T21 | Yes | T62,T63,T21 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV. | ||
fla_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
flash_bist_enable_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
flash_power_down_h_i | Yes | Yes | T30,T31,T60 | Yes | T17,T109,T110 | INPUT | |
flash_power_ready_h_i | No | No | Yes | T29,T30,T31 | INPUT | ||
flash_test_mode_a_io[1:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV. | ||
flash_test_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV. |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |