| T962 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.2637895108 |
|
|
Jan 25 12:25:43 AM PST 24 |
Jan 25 12:32:40 AM PST 24 |
3979482346 ps |
| T124 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.482981876 |
|
|
Jan 25 01:06:14 AM PST 24 |
Jan 25 01:34:03 AM PST 24 |
13389161086 ps |
| T279 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.835186567 |
|
|
Jan 24 11:55:11 PM PST 24 |
Jan 25 12:13:25 AM PST 24 |
5561347032 ps |
| T963 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.2843371552 |
|
|
Jan 25 04:03:10 AM PST 24 |
Jan 25 04:16:58 AM PST 24 |
9755980428 ps |
| T964 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.3350182280 |
|
|
Jan 25 04:47:03 AM PST 24 |
Jan 25 05:12:12 AM PST 24 |
8597271460 ps |
| T965 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.3339921652 |
|
|
Jan 25 01:04:06 AM PST 24 |
Jan 25 01:21:27 AM PST 24 |
6089373936 ps |
| T966 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.2130635402 |
|
|
Jan 25 01:03:09 AM PST 24 |
Jan 25 01:21:40 AM PST 24 |
9222278906 ps |
| T967 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.914068335 |
|
|
Jan 25 12:05:56 AM PST 24 |
Jan 25 02:11:01 AM PST 24 |
22181990344 ps |
| T968 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.2327571473 |
|
|
Jan 25 12:04:46 AM PST 24 |
Jan 25 12:31:20 AM PST 24 |
12628612536 ps |
| T969 |
/workspace/coverage/default/2.chip_sw_aes_entropy.319191433 |
|
|
Jan 25 01:07:28 AM PST 24 |
Jan 25 01:12:34 AM PST 24 |
3259672616 ps |
| T970 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.479076991 |
|
|
Jan 25 12:07:40 AM PST 24 |
Jan 25 12:16:49 AM PST 24 |
8664298026 ps |
| T273 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.2633488548 |
|
|
Jan 25 12:21:53 AM PST 24 |
Jan 25 12:31:47 AM PST 24 |
3710369754 ps |
| T971 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.715152928 |
|
|
Jan 25 01:03:22 AM PST 24 |
Jan 25 01:09:16 AM PST 24 |
3896330684 ps |
| T972 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.224363724 |
|
|
Jan 25 01:45:42 AM PST 24 |
Jan 25 01:51:34 AM PST 24 |
3271716980 ps |
| T682 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.4028830483 |
|
|
Jan 24 11:52:45 PM PST 24 |
Jan 25 12:03:32 AM PST 24 |
5200352858 ps |
| T216 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.3852867886 |
|
|
Jan 25 03:14:44 AM PST 24 |
Jan 25 03:24:22 AM PST 24 |
3676613740 ps |
| T285 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.3506065789 |
|
|
Jan 25 12:52:17 AM PST 24 |
Jan 25 01:07:49 AM PST 24 |
4670525020 ps |
| T973 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.1955368399 |
|
|
Jan 25 01:34:11 AM PST 24 |
Jan 25 02:11:21 AM PST 24 |
8437014472 ps |
| T974 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.350239519 |
|
|
Jan 25 04:34:07 AM PST 24 |
Jan 25 04:40:02 AM PST 24 |
3661750222 ps |
| T975 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.1540251971 |
|
|
Jan 25 01:32:40 AM PST 24 |
Jan 25 01:38:41 AM PST 24 |
2556848520 ps |
| T278 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.1402319741 |
|
|
Jan 25 04:54:51 AM PST 24 |
Jan 25 05:07:37 AM PST 24 |
5541931132 ps |
| T976 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.535490100 |
|
|
Jan 25 12:48:34 AM PST 24 |
Jan 25 01:06:33 AM PST 24 |
5668049992 ps |
| T977 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.3229960979 |
|
|
Jan 25 03:39:24 AM PST 24 |
Jan 25 03:46:48 AM PST 24 |
3119871272 ps |
| T978 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.786022947 |
|
|
Jan 25 12:08:36 AM PST 24 |
Jan 25 12:17:18 AM PST 24 |
5755387170 ps |
| T979 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3935443033 |
|
|
Jan 24 11:55:32 PM PST 24 |
Jan 25 12:07:48 AM PST 24 |
5922469633 ps |
| T980 |
/workspace/coverage/default/0.chip_sw_aes_idle.2147857624 |
|
|
Jan 25 12:03:03 AM PST 24 |
Jan 25 12:07:58 AM PST 24 |
3375884464 ps |
| T981 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.3056100192 |
|
|
Jan 25 12:06:31 AM PST 24 |
Jan 25 12:15:43 AM PST 24 |
3910440468 ps |
| T982 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.4125866876 |
|
|
Jan 25 01:03:59 AM PST 24 |
Jan 25 01:08:28 AM PST 24 |
3133499179 ps |
| T983 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.343066696 |
|
|
Jan 25 12:19:55 AM PST 24 |
Jan 25 12:54:17 AM PST 24 |
9296861872 ps |
| T984 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.1335829538 |
|
|
Jan 25 12:03:37 AM PST 24 |
Jan 25 12:09:44 AM PST 24 |
3138196458 ps |
| T985 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.3781675323 |
|
|
Jan 25 12:20:13 AM PST 24 |
Jan 25 12:25:41 AM PST 24 |
3055438160 ps |
| T602 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.577276974 |
|
|
Jan 25 01:04:20 AM PST 24 |
Jan 25 01:18:10 AM PST 24 |
4843767576 ps |
| T986 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.1841764449 |
|
|
Jan 25 01:04:41 AM PST 24 |
Jan 25 01:14:17 AM PST 24 |
4021986780 ps |
| T987 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.307811091 |
|
|
Jan 25 12:46:10 AM PST 24 |
Jan 25 12:54:18 AM PST 24 |
3975958872 ps |
| T988 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.2953335695 |
|
|
Jan 25 01:07:18 AM PST 24 |
Jan 25 01:11:43 AM PST 24 |
3307163896 ps |
| T989 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.2308509507 |
|
|
Jan 25 01:36:26 AM PST 24 |
Jan 25 01:53:48 AM PST 24 |
5814984568 ps |
| T217 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.2333808583 |
|
|
Jan 25 02:45:40 AM PST 24 |
Jan 25 02:58:49 AM PST 24 |
5404278952 ps |
| T657 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.2738829268 |
|
|
Jan 25 02:38:04 AM PST 24 |
Jan 25 02:47:13 AM PST 24 |
5364450058 ps |
| T990 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.3064416836 |
|
|
Jan 25 03:58:24 AM PST 24 |
Jan 25 04:08:13 AM PST 24 |
5087685836 ps |
| T991 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.1030592652 |
|
|
Jan 24 11:59:29 PM PST 24 |
Jan 25 12:06:48 AM PST 24 |
4383266192 ps |
| T992 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.520765970 |
|
|
Jan 25 12:09:04 AM PST 24 |
Jan 25 12:37:08 AM PST 24 |
13660291860 ps |
| T993 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.799375985 |
|
|
Jan 25 02:10:37 AM PST 24 |
Jan 25 02:46:25 AM PST 24 |
8036228874 ps |
| T726 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.668004394 |
|
|
Jan 25 02:43:03 AM PST 24 |
Jan 25 02:52:10 AM PST 24 |
5320662104 ps |
| T994 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2180918100 |
|
|
Jan 25 02:42:31 AM PST 24 |
Jan 25 02:48:36 AM PST 24 |
5241390615 ps |
| T995 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.3058668796 |
|
|
Jan 25 12:20:32 AM PST 24 |
Jan 25 01:06:33 AM PST 24 |
8449169654 ps |
| T13 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.1902227889 |
|
|
Jan 25 01:17:13 AM PST 24 |
Jan 25 01:24:21 AM PST 24 |
3687215430 ps |
| T996 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.4074798551 |
|
|
Jan 25 06:22:20 AM PST 24 |
Jan 25 06:37:50 AM PST 24 |
5781453505 ps |
| T646 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.2953072101 |
|
|
Jan 25 06:02:13 AM PST 24 |
Jan 25 06:07:33 AM PST 24 |
4071135060 ps |
| T997 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.1130328131 |
|
|
Jan 25 01:33:12 AM PST 24 |
Jan 25 02:10:00 AM PST 24 |
7939331052 ps |
| T998 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.697129867 |
|
|
Jan 25 01:17:32 AM PST 24 |
Jan 25 01:22:47 AM PST 24 |
2647126883 ps |
| T999 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.3136422873 |
|
|
Jan 25 02:44:19 AM PST 24 |
Jan 25 02:48:54 AM PST 24 |
2809435653 ps |
| T1000 |
/workspace/coverage/default/1.rom_keymgr_functest.2308918265 |
|
|
Jan 25 12:44:44 AM PST 24 |
Jan 25 12:54:47 AM PST 24 |
5352828676 ps |
| T1001 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.3969301909 |
|
|
Jan 25 01:34:21 AM PST 24 |
Jan 25 01:55:14 AM PST 24 |
5241017028 ps |
| T1002 |
/workspace/coverage/default/0.chip_sw_entropy_src_fuse_en_fw_read_test.336525993 |
|
|
Jan 25 12:04:42 AM PST 24 |
Jan 25 12:16:13 AM PST 24 |
4749921558 ps |
| T712 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.3313054195 |
|
|
Jan 25 02:04:03 AM PST 24 |
Jan 25 02:17:09 AM PST 24 |
5171168360 ps |
| T697 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.4080276507 |
|
|
Jan 25 01:43:18 AM PST 24 |
Jan 25 01:55:48 AM PST 24 |
6234049686 ps |
| T294 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.4137367982 |
|
|
Jan 25 01:46:51 AM PST 24 |
Jan 25 01:56:28 AM PST 24 |
4566207310 ps |
| T297 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.4033249362 |
|
|
Jan 25 01:02:41 AM PST 24 |
Jan 25 01:13:00 AM PST 24 |
4628780762 ps |
| T154 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.3274366856 |
|
|
Jan 25 12:25:22 AM PST 24 |
Jan 25 12:35:13 AM PST 24 |
4612353951 ps |
| T173 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.125488893 |
|
|
Jan 24 11:56:45 PM PST 24 |
Jan 25 12:03:30 AM PST 24 |
3580479050 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_example_flash.2003049217 |
|
|
Jan 24 11:53:06 PM PST 24 |
Jan 24 11:57:41 PM PST 24 |
2804794700 ps |
| T1004 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.900954927 |
|
|
Jan 25 12:31:14 AM PST 24 |
Jan 25 12:35:18 AM PST 24 |
2680907600 ps |
| T598 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.181332303 |
|
|
Jan 25 01:46:09 AM PST 24 |
Jan 25 01:57:17 AM PST 24 |
5609192962 ps |
| T722 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.794470506 |
|
|
Jan 25 01:45:35 AM PST 24 |
Jan 25 01:54:23 AM PST 24 |
3864697278 ps |
| T1005 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.4212666770 |
|
|
Jan 25 12:19:37 AM PST 24 |
Jan 25 12:46:52 AM PST 24 |
7172300008 ps |
| T205 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.673423855 |
|
|
Jan 25 02:16:03 AM PST 24 |
Jan 25 02:26:23 AM PST 24 |
4734436122 ps |
| T162 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.4026063758 |
|
|
Jan 25 01:15:22 AM PST 24 |
Jan 25 01:25:50 AM PST 24 |
3697589106 ps |
| T192 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.4010780513 |
|
|
Jan 25 12:11:30 AM PST 24 |
Jan 25 12:19:47 AM PST 24 |
4001282432 ps |
| T207 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.2806521508 |
|
|
Jan 25 03:07:21 AM PST 24 |
Jan 25 03:12:23 AM PST 24 |
3135599557 ps |
| T208 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2647387162 |
|
|
Jan 25 02:07:13 AM PST 24 |
Jan 25 02:22:01 AM PST 24 |
8206292350 ps |
| T209 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.649997004 |
|
|
Jan 25 12:12:43 AM PST 24 |
Jan 25 01:42:06 AM PST 24 |
24119798399 ps |
| T210 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.2599182920 |
|
|
Jan 25 12:19:14 AM PST 24 |
Jan 25 12:23:26 AM PST 24 |
2862520253 ps |
| T211 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2373232488 |
|
|
Jan 25 12:22:52 AM PST 24 |
Jan 25 01:07:07 AM PST 24 |
14061057278 ps |
| T212 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.2855951688 |
|
|
Jan 25 12:26:19 AM PST 24 |
Jan 25 12:41:57 AM PST 24 |
7481899712 ps |
| T213 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.4179733122 |
|
|
Jan 25 12:29:21 AM PST 24 |
Jan 25 12:40:01 AM PST 24 |
4443035811 ps |
| T658 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.2876840074 |
|
|
Jan 25 02:03:09 AM PST 24 |
Jan 25 02:10:10 AM PST 24 |
4353881120 ps |
| T122 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.3628800485 |
|
|
Jan 25 12:08:26 AM PST 24 |
Jan 25 12:17:27 AM PST 24 |
4400423440 ps |
| T648 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.522064293 |
|
|
Jan 25 02:18:13 AM PST 24 |
Jan 25 02:31:16 AM PST 24 |
4834111408 ps |
| T262 |
/workspace/coverage/default/2.chip_sw_gpio.2151445542 |
|
|
Jan 25 12:51:31 AM PST 24 |
Jan 25 01:01:44 AM PST 24 |
4547479398 ps |
| T1006 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.3960639956 |
|
|
Jan 25 01:45:59 AM PST 24 |
Jan 25 02:30:51 AM PST 24 |
13841369920 ps |
| T1007 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.248734089 |
|
|
Jan 25 12:30:33 AM PST 24 |
Jan 25 12:36:41 AM PST 24 |
2873455556 ps |
| T71 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.4078832124 |
|
|
Jan 25 12:30:12 AM PST 24 |
Jan 25 12:37:27 AM PST 24 |
3674067104 ps |
| T1008 |
/workspace/coverage/default/2.rom_e2e_static_critical.3805823217 |
|
|
Jan 25 02:26:10 AM PST 24 |
Jan 25 03:10:17 AM PST 24 |
11129761588 ps |
| T1009 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.569396072 |
|
|
Jan 25 01:46:38 AM PST 24 |
Jan 25 01:56:40 AM PST 24 |
3556547528 ps |
| T218 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.1657678029 |
|
|
Jan 25 01:38:36 AM PST 24 |
Jan 25 01:46:44 AM PST 24 |
3511680264 ps |
| T1010 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.1279479874 |
|
|
Jan 25 01:34:44 AM PST 24 |
Jan 25 01:52:21 AM PST 24 |
5075073394 ps |
| T1011 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.4058335839 |
|
|
Jan 25 12:34:11 AM PST 24 |
Jan 25 12:40:38 AM PST 24 |
2950220204 ps |
| T295 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.226695296 |
|
|
Jan 25 02:03:27 AM PST 24 |
Jan 25 02:16:28 AM PST 24 |
4730375128 ps |
| T1012 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.3276890114 |
|
|
Jan 25 01:34:05 AM PST 24 |
Jan 25 01:38:14 AM PST 24 |
2783856302 ps |
| T656 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.1849000813 |
|
|
Jan 25 01:56:36 AM PST 24 |
Jan 25 02:06:08 AM PST 24 |
4037861712 ps |
| T1013 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.2572855417 |
|
|
Jan 25 01:35:53 AM PST 24 |
Jan 25 01:46:29 AM PST 24 |
6201586663 ps |
| T1014 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.2620913978 |
|
|
Jan 25 02:00:00 AM PST 24 |
Jan 25 02:32:11 AM PST 24 |
8565515369 ps |
| T1015 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.532928718 |
|
|
Jan 25 03:56:27 AM PST 24 |
Jan 25 04:09:44 AM PST 24 |
4255812744 ps |
| T1016 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.1982502092 |
|
|
Jan 25 01:18:45 AM PST 24 |
Jan 25 01:26:44 AM PST 24 |
3606880702 ps |
| T1017 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.137173606 |
|
|
Jan 25 01:34:00 AM PST 24 |
Jan 25 01:46:51 AM PST 24 |
10379577310 ps |
| T253 |
/workspace/coverage/default/1.chip_sw_gpio.3042120550 |
|
|
Jan 25 12:25:10 AM PST 24 |
Jan 25 12:34:31 AM PST 24 |
3536521898 ps |
| T1018 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.826313735 |
|
|
Jan 25 01:40:38 AM PST 24 |
Jan 25 01:50:50 AM PST 24 |
5096219016 ps |
| T616 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.78689056 |
|
|
Jan 25 02:20:00 AM PST 24 |
Jan 25 02:30:47 AM PST 24 |
4524468208 ps |
| T1019 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.878580890 |
|
|
Jan 25 12:53:35 AM PST 24 |
Jan 25 01:10:16 AM PST 24 |
10466482828 ps |
| T263 |
/workspace/coverage/default/0.chip_sw_gpio.3582326552 |
|
|
Jan 24 11:56:19 PM PST 24 |
Jan 25 12:04:31 AM PST 24 |
3563642556 ps |
| T1020 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.820673551 |
|
|
Jan 25 01:07:31 AM PST 24 |
Jan 25 01:32:38 AM PST 24 |
6755955756 ps |
| T1021 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1433943474 |
|
|
Jan 25 01:01:48 AM PST 24 |
Jan 25 01:08:31 AM PST 24 |
6255666476 ps |
| T1022 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.1847159200 |
|
|
Jan 25 01:40:28 AM PST 24 |
Jan 25 01:51:18 AM PST 24 |
6545430289 ps |
| T1023 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.3066873564 |
|
|
Jan 25 02:02:05 AM PST 24 |
Jan 25 02:20:09 AM PST 24 |
5403802230 ps |
| T1024 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1874810599 |
|
|
Jan 25 01:16:03 AM PST 24 |
Jan 25 01:26:18 AM PST 24 |
4277185832 ps |
| T363 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.3400445398 |
|
|
Jan 25 12:31:45 AM PST 24 |
Jan 25 12:47:47 AM PST 24 |
4486751165 ps |
| T1025 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.417774792 |
|
|
Jan 25 12:26:58 AM PST 24 |
Jan 25 12:36:31 AM PST 24 |
4702689514 ps |
| T1026 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.225000892 |
|
|
Jan 24 11:54:18 PM PST 24 |
Jan 25 12:11:10 AM PST 24 |
5699097730 ps |
| T1027 |
/workspace/coverage/default/2.chip_sw_entropy_src_fuse_en_fw_read_test.2859844691 |
|
|
Jan 25 01:07:04 AM PST 24 |
Jan 25 01:15:33 AM PST 24 |
4514066730 ps |
| T660 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.2102894583 |
|
|
Jan 25 05:46:36 AM PST 24 |
Jan 25 05:55:19 AM PST 24 |
5090215694 ps |
| T1028 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.3058036535 |
|
|
Jan 25 12:28:02 AM PST 24 |
Jan 25 12:45:46 AM PST 24 |
5840376480 ps |
| T1029 |
/workspace/coverage/default/0.rom_e2e_static_critical.519919737 |
|
|
Jan 25 02:11:57 AM PST 24 |
Jan 25 03:05:02 AM PST 24 |
10261487864 ps |
| T249 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.2849286578 |
|
|
Jan 25 12:54:51 AM PST 24 |
Jan 25 01:23:20 AM PST 24 |
12266943688 ps |
| T170 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.2657459060 |
|
|
Jan 25 12:11:20 AM PST 24 |
Jan 25 12:55:22 AM PST 24 |
23217827019 ps |
| T1030 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2868336520 |
|
|
Jan 25 02:55:45 AM PST 24 |
Jan 25 03:06:24 AM PST 24 |
4297612800 ps |
| T185 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.280597848 |
|
|
Jan 25 02:01:19 AM PST 24 |
Jan 25 02:09:17 AM PST 24 |
4006993636 ps |
| T1031 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.2176334691 |
|
|
Jan 25 03:02:53 AM PST 24 |
Jan 25 03:07:08 AM PST 24 |
2604415748 ps |
| T1032 |
/workspace/coverage/default/1.chip_sw_aes_enc.2033127576 |
|
|
Jan 25 03:03:20 AM PST 24 |
Jan 25 03:07:56 AM PST 24 |
2384506324 ps |
| T1033 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.2247775291 |
|
|
Jan 25 12:49:22 AM PST 24 |
Jan 25 01:01:14 AM PST 24 |
4421647064 ps |
| T1034 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.2368800179 |
|
|
Jan 25 01:32:37 AM PST 24 |
Jan 25 01:39:40 AM PST 24 |
3542035500 ps |
| T1035 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.1978555142 |
|
|
Jan 25 12:27:57 AM PST 24 |
Jan 25 01:48:19 AM PST 24 |
16927561596 ps |
| T708 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.2864193183 |
|
|
Jan 25 03:23:26 AM PST 24 |
Jan 25 03:30:03 AM PST 24 |
3796455826 ps |
| T1036 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.1726920245 |
|
|
Jan 25 12:47:38 AM PST 24 |
Jan 25 12:51:18 AM PST 24 |
3028571202 ps |
| T673 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.482640849 |
|
|
Jan 25 02:04:26 AM PST 24 |
Jan 25 02:17:25 AM PST 24 |
5169699746 ps |
| T699 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.1204305850 |
|
|
Jan 25 02:05:16 AM PST 24 |
Jan 25 02:17:30 AM PST 24 |
5343206144 ps |
| T1037 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.3439013565 |
|
|
Jan 24 11:57:52 PM PST 24 |
Jan 25 12:18:29 AM PST 24 |
11806246602 ps |
| T1038 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.2087174770 |
|
|
Jan 25 04:31:52 AM PST 24 |
Jan 25 05:33:05 AM PST 24 |
20716487441 ps |
| T1039 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.199597244 |
|
|
Jan 25 12:53:31 AM PST 24 |
Jan 25 12:58:08 AM PST 24 |
3086306712 ps |
| T155 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.2578025882 |
|
|
Jan 24 11:56:48 PM PST 24 |
Jan 25 12:08:38 AM PST 24 |
5928861643 ps |
| T1040 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.3660087196 |
|
|
Jan 25 12:01:37 AM PST 24 |
Jan 25 12:12:35 AM PST 24 |
5495972804 ps |
| T1041 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.3918588998 |
|
|
Jan 25 12:28:18 AM PST 24 |
Jan 25 01:43:44 AM PST 24 |
19214179908 ps |
| T1042 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.2596241162 |
|
|
Jan 25 01:40:08 AM PST 24 |
Jan 25 03:11:01 AM PST 24 |
22900395032 ps |
| T1043 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.2669405157 |
|
|
Jan 24 11:58:46 PM PST 24 |
Jan 25 12:04:46 AM PST 24 |
5255043216 ps |
| T617 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.1976195833 |
|
|
Jan 25 01:37:05 AM PST 24 |
Jan 25 01:46:22 AM PST 24 |
5506893490 ps |
| T1044 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.51063945 |
|
|
Jan 25 01:23:29 AM PST 24 |
Jan 25 01:35:53 AM PST 24 |
4358497094 ps |
| T1045 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.1787794639 |
|
|
Jan 25 02:06:48 AM PST 24 |
Jan 25 02:59:00 AM PST 24 |
13519921360 ps |
| T1046 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.203755751 |
|
|
Jan 25 12:41:18 AM PST 24 |
Jan 25 12:45:56 AM PST 24 |
2589328567 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1297859527 |
|
|
Jan 25 12:26:47 AM PST 24 |
Jan 25 12:36:13 AM PST 24 |
4600380792 ps |
| T219 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2792536818 |
|
|
Jan 25 12:13:44 AM PST 24 |
Jan 25 12:25:40 AM PST 24 |
4490878657 ps |
| T612 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.289522877 |
|
|
Jan 25 01:55:06 AM PST 24 |
Jan 25 02:06:41 AM PST 24 |
5126436506 ps |
| T1048 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.1492134648 |
|
|
Jan 25 12:21:08 AM PST 24 |
Jan 25 12:25:09 AM PST 24 |
3084585070 ps |
| T1049 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.1795135943 |
|
|
Jan 25 01:35:25 AM PST 24 |
Jan 25 01:54:17 AM PST 24 |
5000014768 ps |
| T130 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.2058258621 |
|
|
Jan 25 01:54:32 AM PST 24 |
Jan 25 02:05:07 AM PST 24 |
5780248496 ps |
| T1050 |
/workspace/coverage/default/0.chip_sw_example_concurrency.3879280074 |
|
|
Jan 24 11:52:17 PM PST 24 |
Jan 24 11:56:28 PM PST 24 |
2926980590 ps |
| T147 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.941342271 |
|
|
Jan 25 02:27:16 AM PST 24 |
Jan 25 02:30:37 AM PST 24 |
3233850108 ps |
| T1051 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.3724779884 |
|
|
Jan 25 03:17:09 AM PST 24 |
Jan 25 03:26:16 AM PST 24 |
5113463144 ps |
| T254 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.2283858943 |
|
|
Jan 25 04:29:22 AM PST 24 |
Jan 25 04:47:25 AM PST 24 |
6629793720 ps |
| T1052 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.2484531585 |
|
|
Jan 24 11:54:05 PM PST 24 |
Jan 25 12:11:41 AM PST 24 |
6077995132 ps |
| T1053 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.1449933263 |
|
|
Jan 25 01:08:57 AM PST 24 |
Jan 25 01:18:00 AM PST 24 |
4167423516 ps |
| T1054 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.2112115186 |
|
|
Jan 25 01:04:29 AM PST 24 |
Jan 25 02:25:56 AM PST 24 |
18466749679 ps |
| T1055 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.3979039326 |
|
|
Jan 25 01:08:44 AM PST 24 |
Jan 25 01:13:31 AM PST 24 |
2974169478 ps |
| T315 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.3685540633 |
|
|
Jan 25 01:10:34 AM PST 24 |
Jan 25 01:31:34 AM PST 24 |
9763400516 ps |
| T1056 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.1791927179 |
|
|
Jan 25 12:03:08 AM PST 24 |
Jan 25 01:21:55 AM PST 24 |
17542629172 ps |
| T1057 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.711732262 |
|
|
Jan 25 12:46:17 AM PST 24 |
Jan 25 12:52:36 AM PST 24 |
2496205356 ps |
| T1058 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.2374985997 |
|
|
Jan 25 01:17:29 AM PST 24 |
Jan 25 01:24:00 AM PST 24 |
5443648225 ps |
| T1059 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.3570420818 |
|
|
Jan 25 12:39:55 AM PST 24 |
Jan 25 12:53:03 AM PST 24 |
5064141256 ps |
| T1060 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.2781809984 |
|
|
Jan 25 12:21:25 AM PST 24 |
Jan 25 12:26:37 AM PST 24 |
2344366792 ps |
| T330 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.3523762807 |
|
|
Jan 25 12:35:06 AM PST 24 |
Jan 25 12:39:47 AM PST 24 |
2485636158 ps |
| T1061 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.159830918 |
|
|
Jan 25 12:29:26 AM PST 24 |
Jan 25 12:43:02 AM PST 24 |
6556961152 ps |
| T1062 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.2953963953 |
|
|
Jan 24 11:56:25 PM PST 24 |
Jan 25 12:14:49 AM PST 24 |
7879192926 ps |
| T1063 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.2141892878 |
|
|
Jan 25 03:03:28 AM PST 24 |
Jan 25 03:08:20 AM PST 24 |
2988234326 ps |
| T614 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.2874808236 |
|
|
Jan 25 02:03:26 AM PST 24 |
Jan 25 02:11:03 AM PST 24 |
4090494352 ps |
| T1064 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.3123274475 |
|
|
Jan 25 01:33:37 AM PST 24 |
Jan 25 01:38:15 AM PST 24 |
2901782738 ps |
| T583 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.73469694 |
|
|
Jan 24 11:58:00 PM PST 24 |
Jan 25 12:01:01 AM PST 24 |
3987404300 ps |
| T613 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.4146964726 |
|
|
Jan 25 05:05:11 AM PST 24 |
Jan 25 05:11:33 AM PST 24 |
3660704928 ps |
| T638 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.1713758045 |
|
|
Jan 25 02:09:10 AM PST 24 |
Jan 25 02:21:38 AM PST 24 |
5721855040 ps |
| T1065 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3001462368 |
|
|
Jan 25 01:02:39 AM PST 24 |
Jan 25 02:15:56 AM PST 24 |
39169862050 ps |
| T1066 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.1670552536 |
|
|
Jan 25 01:57:35 AM PST 24 |
Jan 25 02:37:38 AM PST 24 |
8690960904 ps |
| T1067 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.373303828 |
|
|
Jan 24 11:56:48 PM PST 24 |
Jan 25 12:01:43 AM PST 24 |
3358272560 ps |
| T1068 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.3840159225 |
|
|
Jan 25 01:18:30 AM PST 24 |
Jan 25 01:57:45 AM PST 24 |
9225712959 ps |
| T1069 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.3383332719 |
|
|
Jan 25 12:42:15 AM PST 24 |
Jan 25 12:48:45 AM PST 24 |
4203049560 ps |
| T1070 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.732979747 |
|
|
Jan 25 12:47:18 AM PST 24 |
Jan 25 01:14:58 AM PST 24 |
8798389488 ps |
| T148 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.4202087311 |
|
|
Jan 25 12:39:45 AM PST 24 |
Jan 25 12:45:01 AM PST 24 |
2655566113 ps |
| T156 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.352124338 |
|
|
Jan 24 11:56:33 PM PST 24 |
Jan 25 12:05:51 AM PST 24 |
4382422159 ps |
| T1071 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.3928848130 |
|
|
Jan 25 12:08:37 AM PST 24 |
Jan 25 12:12:38 AM PST 24 |
3305619034 ps |
| T1072 |
/workspace/coverage/default/1.chip_sw_hmac_enc.993211525 |
|
|
Jan 25 12:31:25 AM PST 24 |
Jan 25 12:37:08 AM PST 24 |
3081815526 ps |
| T1073 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.1507446944 |
|
|
Jan 25 01:07:46 AM PST 24 |
Jan 25 01:50:56 AM PST 24 |
9413271185 ps |
| T1074 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.376041092 |
|
|
Jan 25 03:09:25 AM PST 24 |
Jan 25 03:15:10 AM PST 24 |
3309118640 ps |
| T1075 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.1170535248 |
|
|
Jan 25 01:55:00 AM PST 24 |
Jan 25 02:01:57 AM PST 24 |
3768317914 ps |
| T1076 |
/workspace/coverage/default/2.chip_sw_example_flash.1025309483 |
|
|
Jan 25 12:46:18 AM PST 24 |
Jan 25 12:49:14 AM PST 24 |
2671935352 ps |
| T1077 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.1988471078 |
|
|
Jan 25 12:20:44 AM PST 24 |
Jan 25 01:11:17 AM PST 24 |
9752871405 ps |
| T286 |
/workspace/coverage/default/1.chip_sival_flash_info_access.3971806626 |
|
|
Jan 25 12:21:05 AM PST 24 |
Jan 25 12:28:33 AM PST 24 |
3481060068 ps |
| T1078 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.2244047534 |
|
|
Jan 25 12:19:50 AM PST 24 |
Jan 25 01:05:37 AM PST 24 |
11031130890 ps |
| T1079 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.825084203 |
|
|
Jan 25 01:27:40 AM PST 24 |
Jan 25 01:36:18 AM PST 24 |
4140411928 ps |
| T604 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.3202766743 |
|
|
Jan 25 01:29:25 AM PST 24 |
Jan 25 02:11:28 AM PST 24 |
23304825756 ps |
| T193 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3564303211 |
|
|
Jan 25 12:38:16 AM PST 24 |
Jan 25 12:45:58 AM PST 24 |
4086544842 ps |
| T728 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.3297649333 |
|
|
Jan 25 01:53:54 AM PST 24 |
Jan 25 02:01:26 AM PST 24 |
3921854248 ps |
| T1080 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.2088768230 |
|
|
Jan 25 02:58:36 AM PST 24 |
Jan 25 03:30:27 AM PST 24 |
8781429720 ps |
| T37 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.685150049 |
|
|
Jan 25 01:49:18 AM PST 24 |
Jan 25 01:56:52 AM PST 24 |
4051644516 ps |
| T704 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.1167107040 |
|
|
Jan 25 01:50:37 AM PST 24 |
Jan 25 02:04:53 AM PST 24 |
4900353760 ps |
| T1081 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.592107777 |
|
|
Jan 25 01:57:23 AM PST 24 |
Jan 25 02:08:58 AM PST 24 |
5069221446 ps |
| T1082 |
/workspace/coverage/default/0.chip_sw_aes_entropy.2350086715 |
|
|
Jan 25 12:04:24 AM PST 24 |
Jan 25 12:07:34 AM PST 24 |
2701301776 ps |
| T664 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.3766301830 |
|
|
Jan 25 01:41:38 AM PST 24 |
Jan 25 01:50:19 AM PST 24 |
3856522452 ps |
| T1083 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3789716403 |
|
|
Jan 25 12:41:07 AM PST 24 |
Jan 25 12:48:46 AM PST 24 |
4401798308 ps |
| T331 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.985727221 |
|
|
Jan 25 12:13:32 AM PST 24 |
Jan 25 12:16:21 AM PST 24 |
2504049800 ps |
| T332 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.2425282743 |
|
|
Jan 25 01:17:32 AM PST 24 |
Jan 25 01:22:03 AM PST 24 |
2639235256 ps |
| T280 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.3606912722 |
|
|
Jan 25 12:50:58 AM PST 24 |
Jan 25 01:03:05 AM PST 24 |
4322588224 ps |
| T54 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.2248074238 |
|
|
Jan 24 11:54:45 PM PST 24 |
Jan 25 12:53:11 AM PST 24 |
11984401596 ps |
| T165 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.706665821 |
|
|
Jan 25 12:42:11 AM PST 24 |
Jan 25 02:23:16 AM PST 24 |
18533882080 ps |
| T1084 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.3910802342 |
|
|
Jan 25 01:15:21 AM PST 24 |
Jan 25 01:19:41 AM PST 24 |
2794953833 ps |
| T1085 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.2920743128 |
|
|
Jan 25 01:34:26 AM PST 24 |
Jan 25 01:42:45 AM PST 24 |
6323895896 ps |
| T125 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.971498707 |
|
|
Jan 24 11:57:21 PM PST 24 |
Jan 25 12:00:13 AM PST 24 |
2151244429 ps |
| T1086 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.2522695859 |
|
|
Jan 25 02:06:59 AM PST 24 |
Jan 25 03:03:33 AM PST 24 |
13922408132 ps |
| T1087 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.2822911204 |
|
|
Jan 25 12:22:29 AM PST 24 |
Jan 25 01:16:20 AM PST 24 |
13160967444 ps |
| T725 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.2596838915 |
|
|
Jan 25 01:41:40 AM PST 24 |
Jan 25 01:48:21 AM PST 24 |
3250239544 ps |
| T622 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.1558093425 |
|
|
Jan 25 02:01:39 AM PST 24 |
Jan 25 02:08:44 AM PST 24 |
3670688744 ps |
| T582 |
/workspace/coverage/default/2.chip_tap_straps_dev.123886591 |
|
|
Jan 25 01:23:52 AM PST 24 |
Jan 25 01:52:29 AM PST 24 |
12408983801 ps |
| T1088 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.1707537074 |
|
|
Jan 25 12:47:52 AM PST 24 |
Jan 25 01:30:00 AM PST 24 |
8918673109 ps |
| T1089 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.4222271123 |
|
|
Jan 24 11:59:32 PM PST 24 |
Jan 25 12:41:19 AM PST 24 |
25679597725 ps |
| T580 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.2948521477 |
|
|
Jan 25 12:12:13 AM PST 24 |
Jan 25 12:23:34 AM PST 24 |
6209383744 ps |
| T661 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.171960848 |
|
|
Jan 25 01:56:35 AM PST 24 |
Jan 25 02:03:16 AM PST 24 |
4189878980 ps |
| T623 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.3785677472 |
|
|
Jan 25 02:02:15 AM PST 24 |
Jan 25 02:14:09 AM PST 24 |
5719589336 ps |
| T42 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.417834967 |
|
|
Jan 25 12:10:31 AM PST 24 |
Jan 25 12:16:22 AM PST 24 |
3941932601 ps |
| T1090 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.976793680 |
|
|
Jan 25 12:35:38 AM PST 24 |
Jan 25 12:45:46 AM PST 24 |
4146208010 ps |
| T1091 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.2747621411 |
|
|
Jan 25 12:29:20 AM PST 24 |
Jan 25 12:36:20 AM PST 24 |
3698850674 ps |
| T1092 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1759898887 |
|
|
Jan 25 01:16:18 AM PST 24 |
Jan 25 01:29:20 AM PST 24 |
3822446308 ps |
| T659 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.1882043508 |
|
|
Jan 25 02:57:29 AM PST 24 |
Jan 25 03:09:35 AM PST 24 |
5606317936 ps |
| T695 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2280947734 |
|
|
Jan 25 01:36:49 AM PST 24 |
Jan 25 01:49:50 AM PST 24 |
5212648164 ps |
| T1093 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.46919464 |
|
|
Jan 25 01:57:40 AM PST 24 |
Jan 25 02:33:35 AM PST 24 |
20285520698 ps |
| T1094 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.879023742 |
|
|
Jan 25 01:01:00 AM PST 24 |
Jan 25 01:06:56 AM PST 24 |
3211665656 ps |
| T1095 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.1146674246 |
|
|
Jan 25 02:14:45 AM PST 24 |
Jan 25 02:24:50 AM PST 24 |
5317828312 ps |
| T1096 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.1860450684 |
|
|
Jan 25 12:24:35 AM PST 24 |
Jan 25 12:37:53 AM PST 24 |
6115499905 ps |
| T1097 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.3769431493 |
|
|
Jan 25 01:42:23 AM PST 24 |
Jan 25 01:51:40 AM PST 24 |
6694308796 ps |
| T1098 |
/workspace/coverage/default/0.chip_tap_straps_dev.3823572915 |
|
|
Jan 25 12:24:54 AM PST 24 |
Jan 25 12:27:44 AM PST 24 |
2635094113 ps |
| T706 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.4108165173 |
|
|
Jan 25 02:03:44 AM PST 24 |
Jan 25 02:10:08 AM PST 24 |
3615301680 ps |
| T611 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.823160982 |
|
|
Jan 25 02:21:05 AM PST 24 |
Jan 25 02:28:41 AM PST 24 |
3622558104 ps |
| T1099 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.381872087 |
|
|
Jan 25 12:13:39 AM PST 24 |
Jan 25 12:35:34 AM PST 24 |
7284653907 ps |
| T719 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.2399240760 |
|
|
Jan 25 02:05:46 AM PST 24 |
Jan 25 02:15:35 AM PST 24 |
5588158416 ps |
| T1100 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.2205615843 |
|
|
Jan 25 04:16:46 AM PST 24 |
Jan 25 04:22:59 AM PST 24 |
4711071726 ps |
| T1101 |
/workspace/coverage/default/0.chip_sw_power_idle_load.2686647050 |
|
|
Jan 25 04:27:48 AM PST 24 |
Jan 25 04:38:37 AM PST 24 |
4941634578 ps |
| T1102 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.156433804 |
|
|
Jan 25 03:44:44 AM PST 24 |
Jan 25 04:00:49 AM PST 24 |
5192612983 ps |
| T729 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.1560243320 |
|
|
Jan 25 02:03:16 AM PST 24 |
Jan 25 02:10:36 AM PST 24 |
3245433674 ps |
| T1103 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.2815634011 |
|
|
Jan 25 12:33:30 AM PST 24 |
Jan 25 12:37:27 AM PST 24 |
2640021816 ps |
| T52 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.2441364050 |
|
|
Jan 24 11:54:32 PM PST 24 |
Jan 25 02:29:55 AM PST 24 |
30918029840 ps |
| T227 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.3708850670 |
|
|
Jan 25 12:12:03 AM PST 24 |
Jan 25 12:15:56 AM PST 24 |
2727872484 ps |
| T652 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.2434872195 |
|
|
Jan 25 02:42:53 AM PST 24 |
Jan 25 02:48:57 AM PST 24 |
3436878504 ps |
| T1104 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.1548568323 |
|
|
Jan 25 12:31:08 AM PST 24 |
Jan 25 01:31:25 AM PST 24 |
12040863948 ps |
| T1105 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.2185026371 |
|
|
Jan 25 12:00:43 AM PST 24 |
Jan 25 12:05:43 AM PST 24 |
3178673496 ps |
| T1106 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.2423405130 |
|
|
Jan 25 12:45:46 AM PST 24 |
Jan 25 12:52:05 AM PST 24 |
3349848680 ps |
| T1107 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1507349669 |
|
|
Jan 25 01:19:09 AM PST 24 |
Jan 25 01:37:39 AM PST 24 |
6701090229 ps |
| T1108 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.601259307 |
|
|
Jan 25 01:35:24 AM PST 24 |
Jan 25 02:07:18 AM PST 24 |
7131470125 ps |
| T1109 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.2832306507 |
|
|
Jan 25 12:13:46 AM PST 24 |
Jan 25 12:18:12 AM PST 24 |
3131734594 ps |
| T584 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.940298992 |
|
|
Jan 25 01:22:16 AM PST 24 |
Jan 25 01:24:26 AM PST 24 |
3317182624 ps |
| T1110 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.2929250052 |
|
|
Jan 25 01:59:44 AM PST 24 |
Jan 25 02:28:16 AM PST 24 |
12992659009 ps |
| T1111 |
/workspace/coverage/default/0.rom_raw_unlock.3952296065 |
|
|
Jan 25 12:19:15 AM PST 24 |
Jan 25 01:00:22 AM PST 24 |
15690677378 ps |
| T1112 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.1123894634 |
|
|
Jan 25 02:19:28 AM PST 24 |
Jan 25 02:26:18 AM PST 24 |
3489805190 ps |
| T1113 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.329360883 |
|
|
Jan 25 01:48:52 AM PST 24 |
Jan 25 01:55:14 AM PST 24 |
3592516564 ps |
| T14 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.2690556977 |
|
|
Jan 25 12:21:29 AM PST 24 |
Jan 25 12:29:47 AM PST 24 |
4669247288 ps |
| T1114 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.3195125008 |
|
|
Jan 25 02:05:57 AM PST 24 |
Jan 25 02:23:29 AM PST 24 |
5595681500 ps |
| T1115 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.2603680432 |
|
|
Jan 25 12:19:54 AM PST 24 |
Jan 25 01:23:30 AM PST 24 |
12057212624 ps |