Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts

Module : rv_plic_reg_top
SCORELINECONDTOGGLEFSMBRANCHASSERT
92.37 100.00 69.99 99.50 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_rv_plic_0/rtl/rv_plic_reg_top.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.top_earlgrey.u_rv_plic.u_reg 92.37 100.00 69.99 99.50 100.00

Line Coverage for Module : rv_plic_reg_top
Line No.TotalCoveredPercent
TOTAL15041504100.00
ALWAYS6844100.00
CONT_ASSIGN7711100.00
CONT_ASSIGN8911100.00
CONT_ASSIGN9011100.00
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CONT_ASSIGN11911100.00
CONT_ASSIGN1596311100.00
CONT_ASSIGN1597711100.00
CONT_ASSIGN1601111100.00
CONT_ASSIGN1602511100.00
ALWAYS16031196196100.00
CONT_ASSIGN1622911100.00
ALWAYS1623311100.00
CONT_ASSIGN1643211100.00
CONT_ASSIGN1643411100.00
CONT_ASSIGN1643511100.00
CONT_ASSIGN1643711100.00
CONT_ASSIGN1643811100.00
CONT_ASSIGN1644011100.00
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CONT_ASSIGN1645011100.00
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CONT_ASSIGN1645311100.00
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CONT_ASSIGN1646211100.00
CONT_ASSIGN1646411100.00
CONT_ASSIGN1646511100.00
CONT_ASSIGN1646711100.00
CONT_ASSIGN1646811100.00
CONT_ASSIGN1647011100.00
CONT_ASSIGN1647111100.00
CONT_ASSIGN1647311100.00
CONT_ASSIGN1647411100.00
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CONT_ASSIGN1647711100.00
CONT_ASSIGN1647911100.00
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CONT_ASSIGN1648211100.00
CONT_ASSIGN1648311100.00
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CONT_ASSIGN1658811100.00
CONT_ASSIGN1659011100.00
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CONT_ASSIGN1659411100.00
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CONT_ASSIGN1674011100.00
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CONT_ASSIGN1675011100.00
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CONT_ASSIGN1689011100.00
CONT_ASSIGN1689111100.00
CONT_ASSIGN1689311100.00
CONT_ASSIGN1689411100.00
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CONT_ASSIGN1690311100.00
CONT_ASSIGN1690511100.00
CONT_ASSIGN1690611100.00
CONT_ASSIGN1690811100.00
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CONT_ASSIGN1692911100.00
CONT_ASSIGN1693011100.00
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CONT_ASSIGN1693511100.00
CONT_ASSIGN1693611100.00
CONT_ASSIGN1693811100.00
CONT_ASSIGN1693911100.00
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CONT_ASSIGN1695011100.00
CONT_ASSIGN1695111100.00
CONT_ASSIGN1695311100.00
CONT_ASSIGN1695411100.00
CONT_ASSIGN1695611100.00
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CONT_ASSIGN1695911100.00
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CONT_ASSIGN1702711100.00
CONT_ASSIGN1702911100.00
CONT_ASSIGN1703111100.00
CONT_ASSIGN1703311100.00
CONT_ASSIGN1703411100.00
CONT_ASSIGN1703611100.00
CONT_ASSIGN1703811100.00
CONT_ASSIGN1704011100.00
CONT_ASSIGN1704211100.00
CONT_ASSIGN1704411100.00
CONT_ASSIGN1704611100.00
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CONT_ASSIGN1705011100.00
CONT_ASSIGN1705211100.00
CONT_ASSIGN1705411100.00
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ALWAYS17349196196100.00
ALWAYS17549543543100.00
CONT_ASSIGN1868800
CONT_ASSIGN1869611100.00
CONT_ASSIGN1869711100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_rv_plic_0/rtl/rv_plic_reg_top.sv' or '../src/lowrisc_opentitan_top_earlgrey_rv_plic_0/rtl/rv_plic_reg_top.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
68 1 1
69 1 1
70 1 1
71 1 1
MISSING_ELSE
77 1 1
89 1 1
90 1 1
118 1 1
119 1 1
15963 1 1
15977 1 1
16011 1 1
16025 1 1
16031 1 1
16032 1 1
16033 1 1
16034 1 1
16035 1 1
16036 1 1
16037 1 1
16038 1 1
16039 1 1
16040 1 1
16041 1 1
16042 1 1
16043 1 1
16044 1 1
16045 1 1
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16060 1 1
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16063 1 1
16064 1 1
16065 1 1
16066 1 1
16067 1 1
16068 1 1
16069 1 1
16070 1 1
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16083 1 1
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16191 1 1
16192 1 1
16193 1 1
16194 1 1
16195 1 1
16196 1 1
16197 1 1
16198 1 1
16199 1 1
16200 1 1
16201 1 1
16202 1 1
16203 1 1
16204 1 1
16205 1 1
16206 1 1
16207 1 1
16208 1 1
16209 1 1
16210 1 1
16211 1 1
16212 1 1
16213 1 1
16214 1 1
16215 1 1
16216 1 1
16217 1 1
16218 1 1
16219 1 1
16220 1 1
16221 1 1
16222 1 1
16223 1 1
16224 1 1
16225 1 1
16226 1 1
16229 1 1
16233 1 1
16432 1 1
16434 1 1
16435 1 1
16437 1 1
16438 1 1
16440 1 1
16441 1 1
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16444 1 1
16446 1 1
16447 1 1
16449 1 1
16450 1 1
16452 1 1
16453 1 1
16455 1 1
16456 1 1
16458 1 1
16459 1 1
16461 1 1
16462 1 1
16464 1 1
16465 1 1
16467 1 1
16468 1 1
16470 1 1
16471 1 1
16473 1 1
16474 1 1
16476 1 1
16477 1 1
16479 1 1
16480 1 1
16482 1 1
16483 1 1
16485 1 1
16486 1 1
16488 1 1
16489 1 1
16491 1 1
16492 1 1
16494 1 1
16495 1 1
16497 1 1
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16500 1 1
16501 1 1
16503 1 1
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16506 1 1
16507 1 1
16509 1 1
16510 1 1
16512 1 1
16513 1 1
16515 1 1
16516 1 1
16518 1 1
16519 1 1
16521 1 1
16522 1 1
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16525 1 1
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16528 1 1
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16572 1 1
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16591 1 1
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16594 1 1
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16599 1 1
16600 1 1
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16611 1 1
16612 1 1
16614 1 1
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16621 1 1
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16626 1 1
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16629 1 1
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16650 1 1
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16660 1 1
16662 1 1
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16665 1 1
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16668 1 1
16669 1 1
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16675 1 1
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16680 1 1
16681 1 1
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16686 1 1
16687 1 1
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16690 1 1
16692 1 1
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16695 1 1
16696 1 1
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16699 1 1
16701 1 1
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16705 1 1
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16710 1 1
16711 1 1
16713 1 1
16714 1 1
16716 1 1
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16720 1 1
16722 1 1
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16725 1 1
16726 1 1
16728 1 1
16729 1 1
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16734 1 1
16735 1 1
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16740 1 1
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16746 1 1
16747 1 1
16749 1 1
16750 1 1
16752 1 1
16753 1 1
16755 1 1
16756 1 1
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16761 1 1
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16764 1 1
16765 1 1
16767 1 1
16768 1 1
16770 1 1
16771 1 1
16773 1 1
16774 1 1
16776 1 1
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16780 1 1
16782 1 1
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16785 1 1
16786 1 1
16788 1 1
16789 1 1
16791 1 1
16792 1 1
16794 1 1
16795 1 1
16797 1 1
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16800 1 1
16801 1 1
16803 1 1
16804 1 1
16806 1 1
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16809 1 1
16810 1 1
16812 1 1
16813 1 1
16815 1 1
16816 1 1
16818 1 1
16819 1 1
16821 1 1
16822 1 1
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16825 1 1
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16839 1 1
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16845 1 1
16846 1 1
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16851 1 1
16852 1 1
16854 1 1
16855 1 1
16857 1 1
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16860 1 1
16861 1 1
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16864 1 1
16866 1 1
16867 1 1
16869 1 1
16870 1 1
16872 1 1
16873 1 1
16875 1 1
16876 1 1
16878 1 1
16879 1 1
16881 1 1
16882 1 1
16884 1 1
16885 1 1
16887 1 1
16888 1 1
16890 1 1
16891 1 1
16893 1 1
16894 1 1
16896 1 1
16897 1 1
16899 1 1
16900 1 1
16902 1 1
16903 1 1
16905 1 1
16906 1 1
16908 1 1
16909 1 1
16911 1 1
16912 1 1
16914 1 1
16915 1 1
16917 1 1
16918 1 1
16920 1 1
16921 1 1
16923 1 1
16924 1 1
16926 1 1
16927 1 1
16929 1 1
16930 1 1
16932 1 1
16933 1 1
16935 1 1
16936 1 1
16938 1 1
16939 1 1
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16942 1 1
16944 1 1
16945 1 1
16947 1 1
16948 1 1
16950 1 1
16951 1 1
16953 1 1
16954 1 1
16956 1 1
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16960 1 1
16962 1 1
16963 1 1
16965 1 1
16966 1 1
16968 1 1
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16971 1 1
16973 1 1
16975 1 1
16977 1 1
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16981 1 1
16983 1 1
16985 1 1
16987 1 1
16989 1 1
16991 1 1
16993 1 1
16995 1 1
16997 1 1
16999 1 1
17001 1 1
17003 1 1
17005 1 1
17007 1 1
17009 1 1
17011 1 1
17013 1 1
17015 1 1
17017 1 1
17019 1 1
17021 1 1
17023 1 1
17025 1 1
17027 1 1
17029 1 1
17031 1 1
17033 1 1
17034 1 1
17036 1 1
17038 1 1
17040 1 1
17042 1 1
17044 1 1
17046 1 1
17048 1 1
17050 1 1
17052 1 1
17054 1 1
17056 1 1
17058 1 1
17060 1 1
17062 1 1
17064 1 1
17066 1 1
17068 1 1
17070 1 1
17072 1 1
17074 1 1
17076 1 1
17078 1 1
17080 1 1
17082 1 1
17084 1 1
17086 1 1
17088 1 1
17090 1 1
17092 1 1
17094 1 1
17096 1 1
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17099 1 1
17101 1 1
17103 1 1
17105 1 1
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17109 1 1
17111 1 1
17113 1 1
17115 1 1
17117 1 1
17119 1 1
17121 1 1
17123 1 1
17125 1 1
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17131 1 1
17133 1 1
17135 1 1
17137 1 1
17139 1 1
17141 1 1
17143 1 1
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17151 1 1
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17214 1 1
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17222 1 1
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17231 1 1
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17255 1 1
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17281 1 1
17283 1 1
17285 1 1
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17316 1 1
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17330 1 1
17332 1 1
17333 1 1
17335 1 1
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17340 1 1
17342 1 1
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17345 1 1
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17351 1 1
17352 1 1
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17355 1 1
17356 1 1
17357 1 1
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17360 1 1
17361 1 1
17362 1 1
17363 1 1
17364 1 1
17365 1 1
17366 1 1
17367 1 1
17368 1 1
17369 1 1
17370 1 1
17371 1 1
17372 1 1
17373 1 1
17374 1 1
17375 1 1
17376 1 1
17377 1 1
17378 1 1
17379 1 1
17380 1 1
17381 1 1
17382 1 1
17383 1 1
17384 1 1
17385 1 1
17386 1 1
17387 1 1
17388 1 1
17389 1 1
17390 1 1
17391 1 1
17392 1 1
17393 1 1
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17395 1 1
17396 1 1
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17399 1 1
17400 1 1
17401 1 1
17402 1 1
17403 1 1
17404 1 1
17405 1 1
17406 1 1
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17410 1 1
17411 1 1
17412 1 1
17413 1 1
17414 1 1
17415 1 1
17416 1 1
17417 1 1
17418 1 1
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17420 1 1
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17422 1 1
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17424 1 1
17425 1 1
17426 1 1
17427 1 1
17428 1 1
17429 1 1
17430 1 1
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17432 1 1
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17435 1 1
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17441 1 1
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17445 1 1
17446 1 1
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17448 1 1
17449 1 1
17450 1 1
17451 1 1
17452 1 1
17453 1 1
17454 1 1
17455 1 1
17456 1 1
17457 1 1
17458 1 1
17459 1 1
17460 1 1
17461 1 1
17462 1 1
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17464 1 1
17465 1 1
17466 1 1
17467 1 1
17468 1 1
17469 1 1
17470 1 1
17471 1 1
17472 1 1
17473 1 1
17474 1 1
17475 1 1
17476 1 1
17477 1 1
17478 1 1
17479 1 1
17480 1 1
17481 1 1
17482 1 1
17483 1 1
17484 1 1
17485 1 1
17486 1 1
17487 1 1
17488 1 1
17489 1 1
17490 1 1
17491 1 1
17492 1 1
17493 1 1
17494 1 1
17495 1 1
17496 1 1
17497 1 1
17498 1 1
17499 1 1
17500 1 1
17501 1 1
17502 1 1
17503 1 1
17504 1 1
17505 1 1
17506 1 1
17507 1 1
17508 1 1
17509 1 1
17510 1 1
17511 1 1
17512 1 1
17513 1 1
17514 1 1
17515 1 1
17516 1 1
17517 1 1
17518 1 1
17519 1 1
17520 1 1
17521 1 1
17522 1 1
17523 1 1
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17525 1 1
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17527 1 1
17528 1 1
17529 1 1
17530 1 1
17531 1 1
17532 1 1
17533 1 1
17534 1 1
17535 1 1
17536 1 1
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17538 1 1
17539 1 1
17540 1 1
17541 1 1
17542 1 1
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17544 1 1
17549 1 1
17550 1 1
17552 1 1
17556 1 1
17560 1 1
17564 1 1
17568 1 1
17572 1 1
17576 1 1
17580 1 1
17584 1 1
17588 1 1
17592 1 1
17596 1 1
17600 1 1
17604 1 1
17608 1 1
17612 1 1
17616 1 1
17620 1 1
17624 1 1
17628 1 1
17632 1 1
17636 1 1
17640 1 1
17644 1 1
17648 1 1
17652 1 1
17656 1 1
17660 1 1
17664 1 1
17668 1 1
17672 1 1
17676 1 1
17680 1 1
17684 1 1
17688 1 1
17692 1 1
17696 1 1
17700 1 1
17704 1 1
17708 1 1
17712 1 1
17716 1 1
17720 1 1
17724 1 1
17728 1 1
17732 1 1
17736 1 1
17740 1 1
17744 1 1
17748 1 1
17752 1 1
17756 1 1
17760 1 1
17764 1 1
17768 1 1
17772 1 1
17776 1 1
17780 1 1
17784 1 1
17788 1 1
17792 1 1
17796 1 1
17800 1 1
17804 1 1
17808 1 1
17812 1 1
17816 1 1
17820 1 1
17824 1 1
17828 1 1
17832 1 1
17836 1 1
17840 1 1
17844 1 1
17848 1 1
17852 1 1
17856 1 1
17860 1 1
17864 1 1
17868 1 1
17872 1 1
17876 1 1
17880 1 1
17884 1 1
17888 1 1
17892 1 1
17896 1 1
17900 1 1
17904 1 1
17908 1 1
17912 1 1
17916 1 1
17920 1 1
17924 1 1
17928 1 1
17932 1 1
17936 1 1
17940 1 1
17944 1 1
17948 1 1
17952 1 1
17956 1 1
17960 1 1
17964 1 1
17968 1 1
17972 1 1
17976 1 1
17980 1 1
17984 1 1
17988 1 1
17992 1 1
17996 1 1
18000 1 1
18004 1 1
18008 1 1
18012 1 1
18016 1 1
18020 1 1
18024 1 1
18028 1 1
18032 1 1
18036 1 1
18040 1 1
18044 1 1
18048 1 1
18052 1 1
18056 1 1
18060 1 1
18064 1 1
18068 1 1
18072 1 1
18076 1 1
18080 1 1
18084 1 1
18088 1 1
18092 1 1
18096 1 1
18100 1 1
18104 1 1
18108 1 1
18112 1 1
18116 1 1
18120 1 1
18124 1 1
18128 1 1
18132 1 1
18136 1 1
18140 1 1
18144 1 1
18148 1 1
18152 1 1
18156 1 1
18160 1 1
18164 1 1
18168 1 1
18172 1 1
18176 1 1
18180 1 1
18184 1 1
18188 1 1
18192 1 1
18196 1 1
18200 1 1
18204 1 1
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18212 1 1
18216 1 1
18220 1 1
18224 1 1
18228 1 1
18232 1 1
18236 1 1
18240 1 1
18244 1 1
18248 1 1
18252 1 1
18256 1 1
18260 1 1
18264 1 1
18268 1 1
18269 1 1
18270 1 1
18271 1 1
18272 1 1
18273 1 1
18274 1 1
18275 1 1
18276 1 1
18277 1 1
18278 1 1
18279 1 1
18280 1 1
18281 1 1
18282 1 1
18283 1 1
18284 1 1
18285 1 1
18286 1 1
18287 1 1
18288 1 1
18289 1 1
18290 1 1
18291 1 1
18292 1 1
18293 1 1
18294 1 1
18295 1 1
18296 1 1
18297 1 1
18298 1 1
18299 1 1
18303 1 1
18304 1 1
18305 1 1
18306 1 1
18307 1 1
18308 1 1
18309 1 1
18310 1 1
18311 1 1
18312 1 1
18313 1 1
18314 1 1
18315 1 1
18316 1 1
18317 1 1
18318 1 1
18319 1 1
18320 1 1
18321 1 1
18322 1 1
18323 1 1
18324 1 1
18325 1 1
18326 1 1
18327 1 1
18328 1 1
18329 1 1
18330 1 1
18331 1 1
18332 1 1
18333 1 1
18334 1 1
18338 1 1
18339 1 1
18340 1 1
18341 1 1
18342 1 1
18343 1 1
18344 1 1
18345 1 1
18346 1 1
18347 1 1
18348 1 1
18349 1 1
18350 1 1
18351 1 1
18352 1 1
18353 1 1
18354 1 1
18355 1 1
18356 1 1
18357 1 1
18358 1 1
18359 1 1
18360 1 1
18361 1 1
18362 1 1
18363 1 1
18364 1 1
18365 1 1
18366 1 1
18367 1 1
18368 1 1
18369 1 1
18373 1 1
18374 1 1
18375 1 1
18376 1 1
18377 1 1
18378 1 1
18379 1 1
18380 1 1
18381 1 1
18382 1 1
18383 1 1
18384 1 1
18385 1 1
18386 1 1
18387 1 1
18388 1 1
18389 1 1
18390 1 1
18391 1 1
18392 1 1
18393 1 1
18394 1 1
18395 1 1
18396 1 1
18397 1 1
18398 1 1
18399 1 1
18400 1 1
18401 1 1
18402 1 1
18403 1 1
18404 1 1
18408 1 1
18409 1 1
18410 1 1
18411 1 1
18412 1 1
18413 1 1
18414 1 1
18415 1 1
18416 1 1
18417 1 1
18418 1 1
18419 1 1
18420 1 1
18421 1 1
18422 1 1
18423 1 1
18424 1 1
18425 1 1
18426 1 1
18427 1 1
18428 1 1
18429 1 1
18430 1 1
18431 1 1
18432 1 1
18433 1 1
18434 1 1
18435 1 1
18436 1 1
18437 1 1
18438 1 1
18439 1 1
18443 1 1
18444 1 1
18445 1 1
18446 1 1
18447 1 1
18448 1 1
18449 1 1
18450 1 1
18451 1 1
18452 1 1
18453 1 1
18454 1 1
18455 1 1
18456 1 1
18457 1 1
18458 1 1
18459 1 1
18460 1 1
18461 1 1
18465 1 1
18466 1 1
18467 1 1
18468 1 1
18469 1 1
18470 1 1
18471 1 1
18472 1 1
18473 1 1
18474 1 1
18475 1 1
18476 1 1
18477 1 1
18478 1 1
18479 1 1
18480 1 1
18481 1 1
18482 1 1
18483 1 1
18484 1 1
18485 1 1
18486 1 1
18487 1 1
18488 1 1
18489 1 1
18490 1 1
18491 1 1
18492 1 1
18493 1 1
18494 1 1
18495 1 1
18496 1 1
18500 1 1
18501 1 1
18502 1 1
18503 1 1
18504 1 1
18505 1 1
18506 1 1
18507 1 1
18508 1 1
18509 1 1
18510 1 1
18511 1 1
18512 1 1
18513 1 1
18514 1 1
18515 1 1
18516 1 1
18517 1 1
18518 1 1
18519 1 1
18520 1 1
18521 1 1
18522 1 1
18523 1 1
18524 1 1
18525 1 1
18526 1 1
18527 1 1
18528 1 1
18529 1 1
18530 1 1
18531 1 1
18535 1 1
18536 1 1
18537 1 1
18538 1 1
18539 1 1
18540 1 1
18541 1 1
18542 1 1
18543 1 1
18544 1 1
18545 1 1
18546 1 1
18547 1 1
18548 1 1
18549 1 1
18550 1 1
18551 1 1
18552 1 1
18553 1 1
18554 1 1
18555 1 1
18556 1 1
18557 1 1
18558 1 1
18559 1 1
18560 1 1
18561 1 1
18562 1 1
18563 1 1
18564 1 1
18565 1 1
18566 1 1
18570 1 1
18571 1 1
18572 1 1
18573 1 1
18574 1 1
18575 1 1
18576 1 1
18577 1 1
18578 1 1
18579 1 1
18580 1 1
18581 1 1
18582 1 1
18583 1 1
18584 1 1
18585 1 1
18586 1 1
18587 1 1
18588 1 1
18589 1 1
18590 1 1
18591 1 1
18592 1 1
18593 1 1
18594 1 1
18595 1 1
18596 1 1
18597 1 1
18598 1 1
18599 1 1
18600 1 1
18601 1 1
18605 1 1
18606 1 1
18607 1 1
18608 1 1
18609 1 1
18610 1 1
18611 1 1
18612 1 1
18613 1 1
18614 1 1
18615 1 1
18616 1 1
18617 1 1
18618 1 1
18619 1 1
18620 1 1
18621 1 1
18622 1 1
18623 1 1
18624 1 1
18625 1 1
18626 1 1
18627 1 1
18628 1 1
18629 1 1
18630 1 1
18631 1 1
18632 1 1
18633 1 1
18634 1 1
18635 1 1
18636 1 1
18640 1 1
18641 1 1
18642 1 1
18643 1 1
18644 1 1
18645 1 1
18646 1 1
18647 1 1
18648 1 1
18649 1 1
18650 1 1
18651 1 1
18652 1 1
18653 1 1
18654 1 1
18655 1 1
18656 1 1
18657 1 1
18658 1 1
18662 1 1
18666 1 1
18670 1 1
18674 1 1
18688 unreachable
18696 1 1
18697 1 1


Cond Coverage for Module : rv_plic_reg_top
TotalCoveredPercent
Conditions1953136769.99
Logical1953136769.99
Non-Logical00
Event00

This module contains a very large number of conditions, so the report has been split into multiple pages, by source line number. Click on the line number range in the table below to see the condition coverage for that section of the module.
Line numbersPercent
58-1621798.45
16218-1623344.75
16233-1663971.03
16642-1734375.00

Branch Coverage for Module : rv_plic_reg_top
Line No.TotalCoveredPercent
Branches 201 200 99.50
TERNARY 16229 2 2 100.00
IF 68 3 3 100.00
CASE 17550 196 195 99.49

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_rv_plic_0/rtl/rv_plic_reg_top.sv' or '../src/lowrisc_opentitan_top_earlgrey_rv_plic_0/rtl/rv_plic_reg_top.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 16229 ((reg_re || reg_we)) ?

Branches:
-1-StatusTests
1 Covered T21,T50,T59
0 Covered T1,T2,T3


LineNo. Expression -1-: 68 if ((!rst_ni)) -2-: 70 if ((intg_err || reg_we_err))

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Covered T79,T363,T364
0 0 Covered T1,T2,T3


LineNo. Expression -1-: 17550 case (1'b1)

Branches:
-1-StatusTests
addr_hit[0] Covered T3,T21,T50
addr_hit[1] Covered T295,T332,T333
addr_hit[2] Covered T295,T332,T333
addr_hit[3] Covered T295,T332,T333
addr_hit[4] Covered T295,T332,T333
addr_hit[5] Covered T295,T332,T333
addr_hit[6] Covered T295,T332,T333
addr_hit[7] Covered T295,T332,T333
addr_hit[8] Covered T295,T332,T333
addr_hit[9] Covered T212,T213,T214
addr_hit[10] Covered T212,T213,T214
addr_hit[11] Covered T212,T213,T214
addr_hit[12] Covered T212,T213,T214
addr_hit[13] Covered T212,T213,T214
addr_hit[14] Covered T212,T213,T214
addr_hit[15] Covered T212,T213,T214
addr_hit[16] Covered T212,T213,T214
addr_hit[17] Covered T128,T129,T135
addr_hit[18] Covered T128,T129,T135
addr_hit[19] Covered T128,T129,T135
addr_hit[20] Covered T128,T129,T135
addr_hit[21] Covered T128,T129,T135
addr_hit[22] Covered T128,T129,T135
addr_hit[23] Covered T128,T129,T135
addr_hit[24] Covered T128,T129,T135
addr_hit[25] Covered T13,T135,T315
addr_hit[26] Covered T13,T135,T315
addr_hit[27] Covered T13,T135,T315
addr_hit[28] Covered T13,T135,T315
addr_hit[29] Covered T13,T135,T315
addr_hit[30] Covered T13,T135,T315
addr_hit[31] Covered T13,T135,T315
addr_hit[32] Covered T13,T135,T315
addr_hit[33] Covered T135,T198,T136
addr_hit[34] Covered T135,T198,T136
addr_hit[35] Covered T135,T198,T136
addr_hit[36] Covered T135,T198,T136
addr_hit[37] Covered T135,T198,T136
addr_hit[38] Covered T135,T198,T136
addr_hit[39] Covered T135,T198,T136
addr_hit[40] Covered T135,T198,T136
addr_hit[41] Covered T135,T198,T136
addr_hit[42] Covered T135,T198,T136
addr_hit[43] Covered T135,T198,T136
addr_hit[44] Covered T135,T198,T136
addr_hit[45] Covered T135,T198,T136
addr_hit[46] Covered T135,T198,T136
addr_hit[47] Covered T135,T198,T136
addr_hit[48] Covered T135,T198,T136
addr_hit[49] Covered T135,T198,T136
addr_hit[50] Covered T135,T198,T136
addr_hit[51] Covered T135,T198,T136
addr_hit[52] Covered T135,T198,T136
addr_hit[53] Covered T135,T198,T136
addr_hit[54] Covered T135,T198,T136
addr_hit[55] Covered T135,T198,T136
addr_hit[56] Covered T135,T198,T136
addr_hit[57] Covered T135,T198,T136
addr_hit[58] Covered T135,T198,T136
addr_hit[59] Covered T135,T198,T136
addr_hit[60] Covered T135,T198,T136
addr_hit[61] Covered T135,T198,T136
addr_hit[62] Covered T135,T198,T136
addr_hit[63] Covered T135,T198,T136
addr_hit[64] Covered T135,T198,T136
addr_hit[65] Covered T10,T12,T24
addr_hit[66] Covered T24,T135,T198
addr_hit[67] Covered T24,T135,T198
addr_hit[68] Covered T10,T12,T24
addr_hit[69] Covered T10,T12,T24
addr_hit[70] Covered T24,T135,T198
addr_hit[71] Covered T211,T135,T198
addr_hit[72] Covered T211,T135,T198
addr_hit[73] Covered T211,T135,T198
addr_hit[74] Covered T211,T135,T198
addr_hit[75] Covered T211,T135,T198
addr_hit[76] Covered T211,T135,T198
addr_hit[77] Covered T211,T135,T198
addr_hit[78] Covered T211,T135,T198
addr_hit[79] Covered T135,T198,T136
addr_hit[80] Covered T211,T135,T198
addr_hit[81] Covered T135,T198,T136
addr_hit[82] Covered T135,T198,T136
addr_hit[83] Covered T135,T198,T136
addr_hit[84] Covered T135,T198,T136
addr_hit[85] Covered T135,T198,T136
addr_hit[86] Covered T135,T198,T337
addr_hit[87] Covered T135,T198,T337
addr_hit[88] Covered T135,T198,T337
addr_hit[89] Covered T135,T198,T337
addr_hit[90] Covered T135,T198,T337
addr_hit[91] Covered T135,T198,T337
addr_hit[92] Covered T135,T198,T337
addr_hit[93] Covered T135,T198,T337
addr_hit[94] Covered T135,T198,T136
addr_hit[95] Covered T135,T198,T317
addr_hit[96] Covered T135,T198,T317
addr_hit[97] Covered T135,T198,T317
addr_hit[98] Covered T135,T198,T317
addr_hit[99] Covered T135,T198,T317
addr_hit[100] Covered T135,T198,T317
addr_hit[101] Covered T74,T135,T319
addr_hit[102] Covered T74,T135,T319
addr_hit[103] Covered T74,T135,T319
addr_hit[104] Covered T74,T135,T319
addr_hit[105] Covered T74,T135,T319
addr_hit[106] Covered T74,T135,T319
addr_hit[107] Covered T74,T135,T319
addr_hit[108] Covered T74,T135,T319
addr_hit[109] Covered T135,T198,T136
addr_hit[110] Covered T74,T135,T319
addr_hit[111] Covered T135,T198,T136
addr_hit[112] Covered T135,T198,T136
addr_hit[113] Covered T135,T198,T136
addr_hit[114] Covered T135,T198,T136
addr_hit[115] Covered T135,T198,T136
addr_hit[116] Covered T216,T135,T198
addr_hit[117] Covered T216,T135,T198
addr_hit[118] Covered T135,T198,T136
addr_hit[119] Covered T135,T198,T136
addr_hit[120] Covered T135,T198,T136
addr_hit[121] Covered T21,T62,T63
addr_hit[122] Covered T21,T62,T63
addr_hit[123] Covered T21,T62,T63
addr_hit[124] Covered T21,T62,T63
addr_hit[125] Covered T10,T12,T135
addr_hit[126] Covered T10,T12,T135
addr_hit[127] Covered T135,T198,T136
addr_hit[128] Covered T135,T198,T136
addr_hit[129] Covered T135,T198,T136
addr_hit[130] Covered T135,T198,T136
addr_hit[131] Covered T135,T198,T136
addr_hit[132] Covered T135,T198,T136
addr_hit[133] Covered T135,T198,T136
addr_hit[134] Covered T135,T198,T136
addr_hit[135] Covered T135,T198,T136
addr_hit[136] Covered T135,T198,T136
addr_hit[137] Covered T135,T198,T136
addr_hit[138] Covered T135,T198,T136
addr_hit[139] Covered T135,T198,T136
addr_hit[140] Covered T135,T198,T136
addr_hit[141] Covered T135,T198,T136
addr_hit[142] Covered T135,T198,T136
addr_hit[143] Covered T135,T198,T136
addr_hit[144] Covered T135,T198,T136
addr_hit[145] Covered T135,T198,T136
addr_hit[146] Covered T59,T60,T210
addr_hit[147] Covered T135,T198,T136
addr_hit[148] Covered T100,T135,T198
addr_hit[149] Covered T21,T62,T233
addr_hit[150] Covered T21,T62,T233
addr_hit[151] Covered T98,T135,T198
addr_hit[152] Covered T135,T198,T136
addr_hit[153] Covered T348,T283,T349
addr_hit[154] Covered T348,T283,T349
addr_hit[155] Covered T348,T283,T349
addr_hit[156] Covered T348,T283,T349
addr_hit[157] Covered T348,T283,T349
addr_hit[158] Covered T135,T198,T136
addr_hit[159] Covered T135,T151,T198
addr_hit[160] Covered T135,T151,T198
addr_hit[161] Covered T135,T198,T136
addr_hit[162] Covered T135,T198,T136
addr_hit[163] Covered T135,T198,T136
addr_hit[164] Covered T135,T198,T136
addr_hit[165] Covered T50,T175,T135
addr_hit[166] Covered T135,T198,T136
addr_hit[167] Covered T135,T198,T136
addr_hit[168] Covered T135,T198,T136
addr_hit[169] Covered T135,T198,T136
addr_hit[170] Covered T135,T198,T136
addr_hit[171] Covered T135,T198,T136
addr_hit[172] Covered T135,T198,T136
addr_hit[173] Covered T135,T198,T136
addr_hit[174] Covered T135,T198,T136
addr_hit[175] Covered T135,T198,T136
addr_hit[176] Covered T135,T198,T136
addr_hit[177] Covered T135,T198,T136
addr_hit[178] Covered T135,T198,T136
addr_hit[179] Covered T51
addr_hit[180] Covered T51
addr_hit[181] Covered T51
addr_hit[182] Covered T51
addr_hit[183] Covered T287,T359,T362
addr_hit[184] Covered T51
addr_hit[185] Covered T295,T212,T128
addr_hit[186] Covered T13,T135,T315
addr_hit[187] Covered T211,T10,T12
addr_hit[188] Covered T21,T62,T74
addr_hit[189] Covered T21,T59,T62
addr_hit[190] Covered T50,T175,T135
addr_hit[191] Covered T21,T50,T59
addr_hit[192] Covered T21,T50,T59
addr_hit[193] Covered T51,T229,T230
addr_hit[194] Covered T53,T54,T51
default Not Covered


Assert Coverage for Module : rv_plic_reg_top
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 4 4 100.00 4 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 4 4 100.00 4 100.00




Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
en2addrHit 375370805 39934 0 0
reAfterRv 375370805 39934 0 0
rePulse 375370805 16806 0 0
wePulse 375370805 23128 0 0


en2addrHit
NameAttemptsReal SuccessesFailuresIncomplete
Total 375370805 39934 0 0
T4 161700 0 0 0
T21 252348 44 0 0
T50 152032 12 0 0
T59 162507 8 0 0
T60 0 6 0 0
T62 281040 44 0 0
T63 0 44 0 0
T64 85935 0 0 0
T74 331003 43 0 0
T75 648003 0 0 0
T113 123349 0 0 0
T212 0 45 0 0
T233 0 11 0 0
T295 375513 45 0 0

reAfterRv
NameAttemptsReal SuccessesFailuresIncomplete
Total 375370805 39934 0 0
T4 161700 0 0 0
T21 252348 44 0 0
T50 152032 12 0 0
T59 162507 8 0 0
T60 0 6 0 0
T62 281040 44 0 0
T63 0 44 0 0
T64 85935 0 0 0
T74 331003 43 0 0
T75 648003 0 0 0
T113 123349 0 0 0
T212 0 45 0 0
T233 0 11 0 0
T295 375513 45 0 0

rePulse
NameAttemptsReal SuccessesFailuresIncomplete
Total 375370805 16806 0 0
T4 161700 0 0 0
T21 252348 14 0 0
T50 152032 5 0 0
T59 162507 3 0 0
T60 0 2 0 0
T62 281040 14 0 0
T63 0 14 0 0
T64 85935 0 0 0
T74 331003 17 0 0
T75 648003 0 0 0
T113 123349 0 0 0
T212 0 18 0 0
T233 0 4 0 0
T295 375513 18 0 0

wePulse
NameAttemptsReal SuccessesFailuresIncomplete
Total 375370805 23128 0 0
T4 161700 0 0 0
T21 252348 30 0 0
T50 152032 7 0 0
T59 162507 5 0 0
T60 0 4 0 0
T62 281040 30 0 0
T63 0 30 0 0
T64 85935 0 0 0
T74 331003 26 0 0
T75 648003 0 0 0
T113 123349 0 0 0
T212 0 27 0 0
T233 0 7 0 0
T295 375513 27 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%