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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
86.20 90.98 80.72 90.17 92.41 78.28 84.62


Total test records in report: 959
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T565 /workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.953192404 Feb 04 03:50:40 PM PST 24 Feb 04 03:54:28 PM PST 24 3078860852 ps
T446 /workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.2736478143 Feb 04 04:23:04 PM PST 24 Feb 04 04:28:19 PM PST 24 3491956836 ps
T35 /workspace/coverage/default/1.chip_jtag_mem_access.573026686 Feb 04 03:47:56 PM PST 24 Feb 04 04:13:31 PM PST 24 13443939425 ps
T566 /workspace/coverage/default/2.chip_sw_aes_smoketest.1804168718 Feb 04 04:09:58 PM PST 24 Feb 04 04:13:53 PM PST 24 2847620930 ps
T356 /workspace/coverage/default/97.chip_sw_all_escalation_resets.853675237 Feb 04 04:22:16 PM PST 24 Feb 04 04:32:39 PM PST 24 5494765310 ps
T43 /workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.3804522675 Feb 04 03:43:14 PM PST 24 Feb 04 03:52:06 PM PST 24 4502479710 ps
T484 /workspace/coverage/default/99.chip_sw_all_escalation_resets.3014014054 Feb 04 04:22:37 PM PST 24 Feb 04 04:31:52 PM PST 24 5044342000 ps
T567 /workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.566152159 Feb 04 03:51:38 PM PST 24 Feb 04 04:18:24 PM PST 24 7166354044 ps
T188 /workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.3941728935 Feb 04 03:38:33 PM PST 24 Feb 04 03:41:34 PM PST 24 3961177564 ps
T134 /workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.865133569 Feb 04 03:59:03 PM PST 24 Feb 04 04:07:00 PM PST 24 4578442013 ps
T478 /workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.761083051 Feb 04 04:20:27 PM PST 24 Feb 04 04:26:22 PM PST 24 4436294496 ps
T448 /workspace/coverage/default/90.chip_sw_all_escalation_resets.2821037557 Feb 04 04:22:10 PM PST 24 Feb 04 04:33:20 PM PST 24 5981301982 ps
T293 /workspace/coverage/default/1.chip_sw_power_idle_load.2409651440 Feb 04 03:57:23 PM PST 24 Feb 04 04:09:59 PM PST 24 4144652856 ps
T221 /workspace/coverage/default/49.chip_sw_all_escalation_resets.1182365441 Feb 04 04:18:01 PM PST 24 Feb 04 04:30:31 PM PST 24 5946817680 ps
T271 /workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.907841175 Feb 04 04:01:41 PM PST 24 Feb 04 05:00:32 PM PST 24 16972066976 ps
T272 /workspace/coverage/default/2.chip_sw_aes_idle.1406937752 Feb 04 04:02:35 PM PST 24 Feb 04 04:06:05 PM PST 24 2266286024 ps
T273 /workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.354842079 Feb 04 04:16:17 PM PST 24 Feb 04 04:23:13 PM PST 24 3373404992 ps
T274 /workspace/coverage/default/1.chip_sw_csrng_kat_test.1092243977 Feb 04 03:51:30 PM PST 24 Feb 04 03:55:51 PM PST 24 2564262180 ps
T275 /workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.473580585 Feb 04 03:45:00 PM PST 24 Feb 04 04:16:39 PM PST 24 22405103854 ps
T276 /workspace/coverage/default/0.chip_sival_flash_info_access.96483084 Feb 04 03:41:06 PM PST 24 Feb 04 03:50:46 PM PST 24 5133528782 ps
T277 /workspace/coverage/default/5.chip_sw_lc_ctrl_transition.1345020324 Feb 04 04:11:24 PM PST 24 Feb 04 04:16:53 PM PST 24 6492449551 ps
T278 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2712318422 Feb 04 03:40:52 PM PST 24 Feb 04 03:51:57 PM PST 24 3724736518 ps
T279 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.742614995 Feb 04 03:53:54 PM PST 24 Feb 04 04:03:14 PM PST 24 3546970038 ps
T321 /workspace/coverage/default/0.chip_sw_gpio_smoketest.3505345438 Feb 04 03:43:40 PM PST 24 Feb 04 03:46:21 PM PST 24 2440706135 ps
T56 /workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.3494944702 Feb 04 03:45:58 PM PST 24 Feb 04 03:50:44 PM PST 24 6861417095 ps
T335 /workspace/coverage/default/1.chip_sw_uart_rand_baudrate.1811382554 Feb 04 03:44:45 PM PST 24 Feb 04 03:57:50 PM PST 24 4297324078 ps
T568 /workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.1517294986 Feb 04 03:59:06 PM PST 24 Feb 04 04:17:32 PM PST 24 5996559574 ps
T569 /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.122993620 Feb 04 04:06:21 PM PST 24 Feb 04 04:17:35 PM PST 24 4877947240 ps
T209 /workspace/coverage/default/2.chip_sw_edn_boot_mode.4207832685 Feb 04 04:03:24 PM PST 24 Feb 04 04:11:55 PM PST 24 3286166480 ps
T570 /workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3420682299 Feb 04 04:03:01 PM PST 24 Feb 04 04:58:22 PM PST 24 41375300152 ps
T571 /workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.656006470 Feb 04 03:50:11 PM PST 24 Feb 04 03:56:47 PM PST 24 3504775832 ps
T469 /workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.2793097259 Feb 04 04:22:20 PM PST 24 Feb 04 04:27:12 PM PST 24 3241557520 ps
T189 /workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.793468235 Feb 04 03:58:46 PM PST 24 Feb 04 04:00:58 PM PST 24 3335353090 ps
T572 /workspace/coverage/default/2.rom_e2e_asm_init_prod.2598319407 Feb 04 04:13:09 PM PST 24 Feb 04 04:45:16 PM PST 24 9118010993 ps
T573 /workspace/coverage/default/0.chip_sw_ast_clk_outputs.4163890982 Feb 04 03:42:26 PM PST 24 Feb 04 03:57:49 PM PST 24 5973742120 ps
T574 /workspace/coverage/default/2.chip_sw_kmac_idle.4044308318 Feb 04 04:10:50 PM PST 24 Feb 04 04:14:02 PM PST 24 2867624860 ps
T464 /workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.4181989218 Feb 04 04:18:37 PM PST 24 Feb 04 04:24:22 PM PST 24 4029799868 ps
T575 /workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.1878841822 Feb 04 03:42:01 PM PST 24 Feb 04 03:55:51 PM PST 24 7522166864 ps
T576 /workspace/coverage/default/1.chip_sw_kmac_entropy.1802060493 Feb 04 03:45:35 PM PST 24 Feb 04 03:48:52 PM PST 24 2397956520 ps
T514 /workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.3838490738 Feb 04 04:03:10 PM PST 24 Feb 04 04:08:37 PM PST 24 3468522662 ps
T48 /workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.3630738012 Feb 04 03:42:13 PM PST 24 Feb 04 04:05:30 PM PST 24 20141166494 ps
T577 /workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.3583903124 Feb 04 03:40:51 PM PST 24 Feb 04 04:25:52 PM PST 24 21995800250 ps
T363 /workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.4150881637 Feb 04 04:19:14 PM PST 24 Feb 04 04:26:01 PM PST 24 3290148194 ps
T578 /workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.4158220065 Feb 04 04:01:02 PM PST 24 Feb 04 04:07:38 PM PST 24 3725066500 ps
T579 /workspace/coverage/default/1.chip_sw_otbn_randomness.2841533320 Feb 04 03:49:53 PM PST 24 Feb 04 04:04:09 PM PST 24 5878164264 ps
T400 /workspace/coverage/default/2.chip_sw_edn_auto_mode.1849457746 Feb 04 04:02:35 PM PST 24 Feb 04 04:16:56 PM PST 24 4018635276 ps
T190 /workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.3730274779 Feb 04 03:53:57 PM PST 24 Feb 04 04:05:26 PM PST 24 7457718840 ps
T495 /workspace/coverage/default/69.chip_sw_all_escalation_resets.36418727 Feb 04 04:20:30 PM PST 24 Feb 04 04:29:48 PM PST 24 4499921084 ps
T465 /workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2410323401 Feb 04 04:22:25 PM PST 24 Feb 04 04:28:50 PM PST 24 3118467072 ps
T493 /workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.676223986 Feb 04 04:20:44 PM PST 24 Feb 04 04:27:28 PM PST 24 3587202526 ps
T580 /workspace/coverage/default/4.chip_sw_uart_rand_baudrate.4171640447 Feb 04 04:11:42 PM PST 24 Feb 04 05:13:05 PM PST 24 23459685100 ps
T581 /workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.1349249478 Feb 04 04:00:03 PM PST 24 Feb 04 06:54:25 PM PST 24 58739768443 ps
T304 /workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.4235660441 Feb 04 04:07:02 PM PST 24 Feb 04 04:37:56 PM PST 24 18349024847 ps
T582 /workspace/coverage/default/2.chip_sw_clkmgr_off_peri.3818072260 Feb 04 04:04:49 PM PST 24 Feb 04 04:27:15 PM PST 24 12047586220 ps
T515 /workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.371290509 Feb 04 04:12:38 PM PST 24 Feb 04 04:19:25 PM PST 24 3440868950 ps
T317 /workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.695370210 Feb 04 03:40:21 PM PST 24 Feb 04 03:50:39 PM PST 24 4421719172 ps
T316 /workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.4272842663 Feb 04 03:40:04 PM PST 24 Feb 04 03:55:12 PM PST 24 5786593800 ps
T583 /workspace/coverage/default/1.chip_sw_aes_idle.3543474148 Feb 04 03:50:37 PM PST 24 Feb 04 03:54:04 PM PST 24 2829866688 ps
T584 /workspace/coverage/default/0.chip_sw_power_idle_load.1779641775 Feb 04 03:41:13 PM PST 24 Feb 04 03:51:08 PM PST 24 4466483948 ps
T44 /workspace/coverage/default/2.chip_sw_sleep_pin_retention.4070178426 Feb 04 03:57:48 PM PST 24 Feb 04 04:03:18 PM PST 24 3516781640 ps
T406 /workspace/coverage/default/1.chip_sw_entropy_src_kat_test.970668485 Feb 04 03:51:33 PM PST 24 Feb 04 03:55:00 PM PST 24 2920307880 ps
T407 /workspace/coverage/default/3.chip_sw_uart_tx_rx.3654938455 Feb 04 04:11:22 PM PST 24 Feb 04 04:26:52 PM PST 24 5663125416 ps
T408 /workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2843245620 Feb 04 03:40:59 PM PST 24 Feb 04 03:48:24 PM PST 24 3244819994 ps
T409 /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.3576714280 Feb 04 04:05:01 PM PST 24 Feb 04 04:16:12 PM PST 24 7987010273 ps
T362 /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.4183994292 Feb 04 03:47:38 PM PST 24 Feb 04 03:53:21 PM PST 24 3150854390 ps
T410 /workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.214595664 Feb 04 04:11:30 PM PST 24 Feb 04 04:18:00 PM PST 24 3511028566 ps
T104 /workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3353726872 Feb 04 03:54:44 PM PST 24 Feb 04 04:04:39 PM PST 24 4770686591 ps
T411 /workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.1357105638 Feb 04 03:59:35 PM PST 24 Feb 04 04:31:45 PM PST 24 10900269791 ps
T412 /workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.1281503967 Feb 04 03:53:20 PM PST 24 Feb 04 03:58:43 PM PST 24 2912686611 ps
T585 /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.1961800970 Feb 04 04:00:32 PM PST 24 Feb 04 04:12:06 PM PST 24 6714694600 ps
T194 /workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.315606042 Feb 04 04:08:04 PM PST 24 Feb 04 04:16:48 PM PST 24 4949547050 ps
T69 /workspace/coverage/default/0.chip_tap_straps_testunlock0.3026063130 Feb 04 03:41:10 PM PST 24 Feb 04 03:48:30 PM PST 24 7984284143 ps
T318 /workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.2601453772 Feb 04 03:47:07 PM PST 24 Feb 04 03:50:39 PM PST 24 2864722726 ps
T586 /workspace/coverage/default/2.chip_sw_kmac_mode_cshake.3258535921 Feb 04 04:03:37 PM PST 24 Feb 04 04:07:03 PM PST 24 2961818704 ps
T587 /workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.439777052 Feb 04 03:56:55 PM PST 24 Feb 04 04:02:45 PM PST 24 5574191972 ps
T290 /workspace/coverage/default/51.chip_sw_all_escalation_resets.60864919 Feb 04 04:18:34 PM PST 24 Feb 04 04:32:43 PM PST 24 6089503750 ps
T588 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.3391269450 Feb 04 03:47:35 PM PST 24 Feb 04 04:19:12 PM PST 24 8967606576 ps
T202 /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.3402518688 Feb 04 03:42:04 PM PST 24 Feb 04 03:46:48 PM PST 24 2431361113 ps
T589 /workspace/coverage/default/1.rom_e2e_shutdown_output.2507410912 Feb 04 04:01:09 PM PST 24 Feb 04 04:54:26 PM PST 24 24813402108 ps
T590 /workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.2391319175 Feb 04 03:42:18 PM PST 24 Feb 04 04:01:36 PM PST 24 8093791308 ps
T591 /workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2821832273 Feb 04 03:39:42 PM PST 24 Feb 04 04:10:30 PM PST 24 18064615063 ps
T326 /workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.670480585 Feb 04 03:43:11 PM PST 24 Feb 04 03:50:25 PM PST 24 18550296760 ps
T354 /workspace/coverage/default/0.chip_sw_flash_ctrl_ops.2746233151 Feb 04 03:39:38 PM PST 24 Feb 04 03:55:29 PM PST 24 4784576194 ps
T182 /workspace/coverage/default/62.chip_sw_all_escalation_resets.3741212341 Feb 04 04:19:03 PM PST 24 Feb 04 04:27:46 PM PST 24 5782650008 ps
T192 /workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.1685914863 Feb 04 04:07:37 PM PST 24 Feb 04 04:12:03 PM PST 24 2959623938 ps
T322 /workspace/coverage/default/1.chip_sw_gpio_smoketest.1505850032 Feb 04 03:57:07 PM PST 24 Feb 04 04:01:27 PM PST 24 2110455262 ps
T384 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.2620849893 Feb 04 03:48:30 PM PST 24 Feb 04 04:42:52 PM PST 24 11967218821 ps
T385 /workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.95678510 Feb 04 04:13:54 PM PST 24 Feb 04 04:21:28 PM PST 24 3370829340 ps
T386 /workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.139290690 Feb 04 03:57:59 PM PST 24 Feb 04 04:07:18 PM PST 24 6370209292 ps
T118 /workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.666863129 Feb 04 03:38:36 PM PST 24 Feb 04 03:54:10 PM PST 24 5658540411 ps
T527 /workspace/coverage/default/57.chip_sw_all_escalation_resets.1858973741 Feb 04 04:18:32 PM PST 24 Feb 04 04:29:34 PM PST 24 5266429336 ps
T592 /workspace/coverage/default/1.chip_sw_aes_smoketest.2531731299 Feb 04 03:56:30 PM PST 24 Feb 04 04:01:29 PM PST 24 2548306244 ps
T171 /workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.3001925648 Feb 04 04:10:33 PM PST 24 Feb 04 04:14:43 PM PST 24 2649334568 ps
T593 /workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.867224271 Feb 04 03:53:22 PM PST 24 Feb 04 03:58:46 PM PST 24 2905436264 ps
T594 /workspace/coverage/default/0.chip_sw_inject_scramble_seed.3068589646 Feb 04 03:38:59 PM PST 24 Feb 04 07:22:28 PM PST 24 64715047236 ps
T105 /workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3969225493 Feb 04 03:57:57 PM PST 24 Feb 04 04:09:46 PM PST 24 5667224535 ps
T159 /workspace/coverage/default/52.chip_sw_all_escalation_resets.1938057400 Feb 04 04:18:17 PM PST 24 Feb 04 04:33:06 PM PST 24 5859004988 ps
T259 /workspace/coverage/default/73.chip_sw_all_escalation_resets.792182236 Feb 04 04:21:09 PM PST 24 Feb 04 04:29:42 PM PST 24 5019677488 ps
T260 /workspace/coverage/default/93.chip_sw_all_escalation_resets.4045929358 Feb 04 04:21:27 PM PST 24 Feb 04 04:29:49 PM PST 24 4155354744 ps
T232 /workspace/coverage/default/1.chip_sw_rv_timer_irq.1798635771 Feb 04 03:48:51 PM PST 24 Feb 04 03:52:17 PM PST 24 2304695000 ps
T261 /workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.4175483304 Feb 04 03:45:00 PM PST 24 Feb 04 04:04:11 PM PST 24 5117506226 ps
T262 /workspace/coverage/default/0.rom_e2e_shutdown_output.114655548 Feb 04 03:47:29 PM PST 24 Feb 04 04:38:30 PM PST 24 27080950200 ps
T263 /workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.1131471929 Feb 04 03:51:07 PM PST 24 Feb 04 04:00:02 PM PST 24 4149702246 ps
T264 /workspace/coverage/default/0.chip_sw_example_manufacturer.4072252005 Feb 04 03:38:42 PM PST 24 Feb 04 03:41:52 PM PST 24 2300974486 ps
T265 /workspace/coverage/default/92.chip_sw_all_escalation_resets.50146133 Feb 04 04:22:07 PM PST 24 Feb 04 04:30:15 PM PST 24 4841510964 ps
T595 /workspace/coverage/default/58.chip_sw_all_escalation_resets.1979118309 Feb 04 04:18:35 PM PST 24 Feb 04 04:30:27 PM PST 24 5491929760 ps
T476 /workspace/coverage/default/1.chip_sw_all_escalation_resets.2156442364 Feb 04 03:45:16 PM PST 24 Feb 04 03:54:23 PM PST 24 5140602766 ps
T596 /workspace/coverage/default/4.chip_tap_straps_rma.3761577726 Feb 04 04:10:59 PM PST 24 Feb 04 04:17:08 PM PST 24 3996742167 ps
T597 /workspace/coverage/default/2.chip_sw_clkmgr_jitter.2056142865 Feb 04 04:05:16 PM PST 24 Feb 04 04:08:45 PM PST 24 3045361166 ps
T598 /workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1639033212 Feb 04 03:45:07 PM PST 24 Feb 04 03:56:04 PM PST 24 7088693210 ps
T337 /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.2376073403 Feb 04 03:58:47 PM PST 24 Feb 04 04:14:33 PM PST 24 5492245450 ps
T505 /workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.279001849 Feb 04 04:18:20 PM PST 24 Feb 04 04:24:57 PM PST 24 3651613192 ps
T320 /workspace/coverage/default/1.chip_sw_pattgen_ios.454961615 Feb 04 03:43:52 PM PST 24 Feb 04 03:48:03 PM PST 24 3039621880 ps
T364 /workspace/coverage/default/68.chip_sw_all_escalation_resets.2704022980 Feb 04 04:19:51 PM PST 24 Feb 04 04:31:46 PM PST 24 5697195800 ps
T519 /workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.3230447277 Feb 04 04:19:46 PM PST 24 Feb 04 04:28:15 PM PST 24 3425033684 ps
T528 /workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.2205548241 Feb 04 04:15:45 PM PST 24 Feb 04 04:23:19 PM PST 24 3528246520 ps
T443 /workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.1987669882 Feb 04 03:59:20 PM PST 24 Feb 04 04:13:37 PM PST 24 6069416264 ps
T57 /workspace/coverage/default/2.rom_volatile_raw_unlock.568782827 Feb 04 04:09:39 PM PST 24 Feb 04 04:48:33 PM PST 24 12814431180 ps
T599 /workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.1774637197 Feb 04 03:59:22 PM PST 24 Feb 04 04:04:38 PM PST 24 2523518424 ps
T600 /workspace/coverage/default/0.chip_sw_edn_sw_mode.721517962 Feb 04 03:39:01 PM PST 24 Feb 04 03:56:14 PM PST 24 5816970020 ps
T222 /workspace/coverage/default/4.chip_sw_all_escalation_resets.892169351 Feb 04 04:11:24 PM PST 24 Feb 04 04:21:07 PM PST 24 4488738568 ps
T203 /workspace/coverage/default/1.chip_sw_hmac_enc.3006937424 Feb 04 03:52:08 PM PST 24 Feb 04 03:57:43 PM PST 24 2994195564 ps
T601 /workspace/coverage/default/1.chip_sw_aes_enc.897096927 Feb 04 03:50:12 PM PST 24 Feb 04 03:54:38 PM PST 24 3064904408 ps
T136 /workspace/coverage/default/2.chip_plic_all_irqs_10.1963670236 Feb 04 04:12:13 PM PST 24 Feb 04 04:21:24 PM PST 24 4380099076 ps
T602 /workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.3709272309 Feb 04 03:57:50 PM PST 24 Feb 04 04:22:25 PM PST 24 8908356012 ps
T223 /workspace/coverage/default/14.chip_sw_all_escalation_resets.3966772795 Feb 04 04:19:38 PM PST 24 Feb 04 04:28:48 PM PST 24 5564615250 ps
T603 /workspace/coverage/default/1.chip_tap_straps_prod.2407752590 Feb 04 03:54:41 PM PST 24 Feb 04 03:57:37 PM PST 24 2919265729 ps
T604 /workspace/coverage/default/34.chip_sw_all_escalation_resets.4187925143 Feb 04 04:17:13 PM PST 24 Feb 04 04:27:54 PM PST 24 4150958864 ps
T605 /workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.2872971422 Feb 04 03:39:55 PM PST 24 Feb 04 03:45:09 PM PST 24 6458207859 ps
T606 /workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.4280385970 Feb 04 03:42:07 PM PST 24 Feb 04 04:05:27 PM PST 24 16561387715 ps
T607 /workspace/coverage/default/1.chip_sw_aon_timer_irq.1071986688 Feb 04 03:49:33 PM PST 24 Feb 04 03:58:44 PM PST 24 3625589836 ps
T608 /workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.1945496161 Feb 04 03:39:45 PM PST 24 Feb 04 04:31:08 PM PST 24 13368238139 ps
T609 /workspace/coverage/default/0.rom_keymgr_functest.314728875 Feb 04 03:42:34 PM PST 24 Feb 04 03:49:53 PM PST 24 4796993188 ps
T610 /workspace/coverage/default/0.chip_sw_clkmgr_jitter.2792908948 Feb 04 03:41:18 PM PST 24 Feb 04 03:44:09 PM PST 24 3116644692 ps
T611 /workspace/coverage/default/1.chip_sw_ast_clk_outputs.4013871741 Feb 04 03:54:18 PM PST 24 Feb 04 04:12:07 PM PST 24 6669817300 ps
T612 /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1070293234 Feb 04 04:01:44 PM PST 24 Feb 04 04:24:30 PM PST 24 13129872215 ps
T613 /workspace/coverage/default/2.chip_sw_aes_enc.3767502105 Feb 04 04:03:56 PM PST 24 Feb 04 04:08:06 PM PST 24 2474469770 ps
T502 /workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.2179744779 Feb 04 04:13:40 PM PST 24 Feb 04 04:21:21 PM PST 24 3548141100 ps
T204 /workspace/coverage/default/2.chip_plic_all_irqs_0.2803996446 Feb 04 04:04:19 PM PST 24 Feb 04 04:24:30 PM PST 24 5838738880 ps
T483 /workspace/coverage/default/8.chip_sw_all_escalation_resets.1764431392 Feb 04 04:13:01 PM PST 24 Feb 04 04:23:01 PM PST 24 6343878008 ps
T107 /workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.2362534159 Feb 04 03:40:41 PM PST 24 Feb 04 03:45:22 PM PST 24 3134930102 ps
T174 /workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3942139755 Feb 04 03:41:28 PM PST 24 Feb 04 03:50:47 PM PST 24 5010672667 ps
T614 /workspace/coverage/default/2.chip_sw_hmac_smoketest.3889237467 Feb 04 04:09:47 PM PST 24 Feb 04 04:15:27 PM PST 24 2927332760 ps
T86 /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.496706933 Feb 04 03:40:56 PM PST 24 Feb 04 04:21:09 PM PST 24 23973252408 ps
T217 /workspace/coverage/default/0.chip_sw_otbn_mem_scramble.2229862420 Feb 04 03:41:31 PM PST 24 Feb 04 03:49:32 PM PST 24 3399018422 ps
T615 /workspace/coverage/default/2.chip_sw_keymgr_key_derivation.1642497003 Feb 04 04:02:59 PM PST 24 Feb 04 04:13:59 PM PST 24 5207971840 ps
T616 /workspace/coverage/default/59.chip_sw_all_escalation_resets.90724281 Feb 04 04:19:30 PM PST 24 Feb 04 04:30:34 PM PST 24 4975377136 ps
T617 /workspace/coverage/default/1.chip_sw_kmac_idle.214042553 Feb 04 03:54:17 PM PST 24 Feb 04 03:59:28 PM PST 24 2519342520 ps
T472 /workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.1131890078 Feb 04 04:17:12 PM PST 24 Feb 04 04:24:56 PM PST 24 3671111680 ps
T432 /workspace/coverage/default/9.chip_sw_all_escalation_resets.727950239 Feb 04 04:13:21 PM PST 24 Feb 04 04:22:44 PM PST 24 5767099480 ps
T34 /workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.4279856427 Feb 04 03:55:06 PM PST 24 Feb 04 04:02:44 PM PST 24 4869053496 ps
T477 /workspace/coverage/default/82.chip_sw_all_escalation_resets.2222396194 Feb 04 04:20:56 PM PST 24 Feb 04 04:31:31 PM PST 24 5187348328 ps
T618 /workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.2403463687 Feb 04 03:39:23 PM PST 24 Feb 04 03:47:25 PM PST 24 4604268600 ps
T619 /workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.788115318 Feb 04 03:38:52 PM PST 24 Feb 04 03:43:51 PM PST 24 2652934448 ps
T620 /workspace/coverage/default/1.chip_sw_rv_timer_smoketest.2197170193 Feb 04 03:57:56 PM PST 24 Feb 04 04:02:09 PM PST 24 2754417864 ps
T431 /workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.2218531128 Feb 04 04:19:07 PM PST 24 Feb 04 04:27:55 PM PST 24 3999079408 ps
T621 /workspace/coverage/default/1.chip_tap_straps_dev.1758798599 Feb 04 03:55:45 PM PST 24 Feb 04 04:22:31 PM PST 24 13525171694 ps
T450 /workspace/coverage/default/23.chip_sw_all_escalation_resets.103031026 Feb 04 04:22:33 PM PST 24 Feb 04 04:32:04 PM PST 24 5476527530 ps
T433 /workspace/coverage/default/38.chip_sw_all_escalation_resets.1664600484 Feb 04 04:16:42 PM PST 24 Feb 04 04:25:59 PM PST 24 4855716548 ps
T622 /workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.3507462657 Feb 04 04:02:31 PM PST 24 Feb 04 04:32:54 PM PST 24 6670274740 ps
T623 /workspace/coverage/default/2.chip_sw_rv_timer_irq.2305237245 Feb 04 04:00:52 PM PST 24 Feb 04 04:05:14 PM PST 24 2536575668 ps
T624 /workspace/coverage/default/14.chip_sw_lc_ctrl_transition.2994467345 Feb 04 04:12:46 PM PST 24 Feb 04 04:26:40 PM PST 24 11770358302 ps
T625 /workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.2119886834 Feb 04 03:40:53 PM PST 24 Feb 04 04:08:04 PM PST 24 6825786144 ps
T626 /workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.480723824 Feb 04 03:59:42 PM PST 24 Feb 04 04:45:29 PM PST 24 14485802151 ps
T627 /workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.3125108565 Feb 04 03:50:23 PM PST 24 Feb 04 04:00:20 PM PST 24 4782370354 ps
T628 /workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.930058133 Feb 04 03:43:10 PM PST 24 Feb 04 04:48:35 PM PST 24 18890929256 ps
T629 /workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.3690774181 Feb 04 04:01:56 PM PST 24 Feb 04 04:09:37 PM PST 24 4030864424 ps
T298 /workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.2722827837 Feb 04 03:55:58 PM PST 24 Feb 04 04:07:52 PM PST 24 5330971208 ps
T336 /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.1040553233 Feb 04 03:43:34 PM PST 24 Feb 04 03:57:47 PM PST 24 6102249080 ps
T340 /workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.3590785656 Feb 04 03:40:31 PM PST 24 Feb 04 03:50:53 PM PST 24 4342387604 ps
T630 /workspace/coverage/default/1.chip_sw_example_flash.3940714829 Feb 04 03:44:49 PM PST 24 Feb 04 03:47:41 PM PST 24 2240887196 ps
T49 /workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.2630452543 Feb 04 04:06:55 PM PST 24 Feb 04 04:36:46 PM PST 24 21959087080 ps
T494 /workspace/coverage/default/63.chip_sw_all_escalation_resets.1547423082 Feb 04 04:19:47 PM PST 24 Feb 04 04:29:07 PM PST 24 4631081692 ps
T39 /workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.334381609 Feb 04 04:05:20 PM PST 24 Feb 04 07:33:57 PM PST 24 253992703064 ps
T631 /workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.1800761439 Feb 04 04:00:49 PM PST 24 Feb 04 04:20:58 PM PST 24 8834283613 ps
T632 /workspace/coverage/default/3.chip_tap_straps_prod.408756718 Feb 04 04:09:31 PM PST 24 Feb 04 04:13:00 PM PST 24 2600832340 ps
T633 /workspace/coverage/default/2.chip_sw_example_concurrency.3685175913 Feb 04 03:57:18 PM PST 24 Feb 04 04:00:48 PM PST 24 2514703128 ps
T634 /workspace/coverage/default/0.chip_sw_entropy_src_kat_test.2161686245 Feb 04 03:38:55 PM PST 24 Feb 04 03:42:42 PM PST 24 3219393330 ps
T635 /workspace/coverage/default/1.chip_sw_rv_plic_smoketest.3997036530 Feb 04 03:57:11 PM PST 24 Feb 04 04:01:40 PM PST 24 2956368920 ps
T636 /workspace/coverage/default/0.chip_sw_clkmgr_smoketest.4289031031 Feb 04 03:42:27 PM PST 24 Feb 04 03:45:29 PM PST 24 2410309514 ps
T65 /workspace/coverage/default/3.chip_tap_straps_rma.3879883438 Feb 04 04:10:53 PM PST 24 Feb 04 04:15:01 PM PST 24 3203273499 ps
T475 /workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.3799953929 Feb 04 04:15:23 PM PST 24 Feb 04 04:21:52 PM PST 24 3542721696 ps
T637 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.1969181898 Feb 04 03:55:27 PM PST 24 Feb 04 04:16:50 PM PST 24 14115405240 ps
T454 /workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.328782418 Feb 04 04:16:23 PM PST 24 Feb 04 04:25:22 PM PST 24 4189087044 ps
T303 /workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.1161553144 Feb 04 03:40:21 PM PST 24 Feb 04 04:10:08 PM PST 24 17763111628 ps
T638 /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.3521527468 Feb 04 03:41:41 PM PST 24 Feb 04 03:46:06 PM PST 24 3160469997 ps
T639 /workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.1607490011 Feb 04 03:38:22 PM PST 24 Feb 04 03:46:23 PM PST 24 4939824456 ps
T227 /workspace/coverage/default/3.chip_sw_data_integrity_escalation.2623804368 Feb 04 04:11:00 PM PST 24 Feb 04 04:21:57 PM PST 24 6178487496 ps
T640 /workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.3773341797 Feb 04 03:59:55 PM PST 24 Feb 04 04:23:55 PM PST 24 7249318422 ps
T641 /workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.2581076923 Feb 04 04:10:54 PM PST 24 Feb 04 04:18:53 PM PST 24 7335619636 ps
T642 /workspace/coverage/default/0.chip_sw_lc_ctrl_transition.1547983570 Feb 04 03:38:18 PM PST 24 Feb 04 03:46:10 PM PST 24 5820495908 ps
T643 /workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.450588045 Feb 04 03:41:38 PM PST 24 Feb 04 03:49:36 PM PST 24 4798570976 ps
T644 /workspace/coverage/default/13.chip_sw_lc_ctrl_transition.657135605 Feb 04 04:19:33 PM PST 24 Feb 04 04:33:07 PM PST 24 9874978984 ps
T114 /workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.4006284549 Feb 04 03:55:45 PM PST 24 Feb 04 04:40:04 PM PST 24 15530447010 ps
T58 /workspace/coverage/default/0.chip_sw_sleep_pin_wake.1339992791 Feb 04 03:39:32 PM PST 24 Feb 04 03:47:25 PM PST 24 5993244408 ps
T108 /workspace/coverage/default/0.chip_sw_usbdev_setuprx.959187859 Feb 04 03:38:58 PM PST 24 Feb 04 03:46:22 PM PST 24 4132276678 ps
T645 /workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2648102027 Feb 04 03:39:01 PM PST 24 Feb 04 03:56:54 PM PST 24 5559684050 ps
T646 /workspace/coverage/default/2.rom_e2e_shutdown_output.1120517007 Feb 04 04:13:29 PM PST 24 Feb 04 05:04:39 PM PST 24 27451040932 ps
T8 /workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.2225978534 Feb 04 03:58:10 PM PST 24 Feb 04 04:03:38 PM PST 24 3270773755 ps
T647 /workspace/coverage/default/1.chip_sw_uart_smoketest.1970350695 Feb 04 03:58:02 PM PST 24 Feb 04 04:04:25 PM PST 24 3804916200 ps
T434 /workspace/coverage/default/50.chip_sw_all_escalation_resets.2226483588 Feb 04 04:18:21 PM PST 24 Feb 04 04:24:49 PM PST 24 4439654012 ps
T648 /workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.1904384826 Feb 04 04:11:48 PM PST 24 Feb 04 04:17:49 PM PST 24 2397895852 ps
T649 /workspace/coverage/default/2.chip_sw_flash_crash_alert.1288269280 Feb 04 04:06:45 PM PST 24 Feb 04 04:16:25 PM PST 24 5556713020 ps
T650 /workspace/coverage/default/0.chip_sw_otbn_smoketest.2995312167 Feb 04 03:42:46 PM PST 24 Feb 04 04:02:44 PM PST 24 6171382404 ps
T651 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3674903224 Feb 04 03:41:49 PM PST 24 Feb 04 03:51:55 PM PST 24 4413148786 ps
T441 /workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.2076636104 Feb 04 04:16:42 PM PST 24 Feb 04 04:24:25 PM PST 24 4238386900 ps
T119 /workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.1779818259 Feb 04 04:10:34 PM PST 24 Feb 04 04:23:36 PM PST 24 5768727552 ps
T87 /workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.957077510 Feb 04 04:06:51 PM PST 24 Feb 04 04:14:08 PM PST 24 6604030200 ps
T360 /workspace/coverage/default/2.chip_sw_sensor_ctrl_status.351710710 Feb 04 04:04:39 PM PST 24 Feb 04 04:08:49 PM PST 24 2761693967 ps
T652 /workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.435013604 Feb 04 03:43:43 PM PST 24 Feb 04 04:20:45 PM PST 24 14358721240 ps
T653 /workspace/coverage/default/0.chip_sw_rv_plic_smoketest.1809419572 Feb 04 03:42:50 PM PST 24 Feb 04 03:46:21 PM PST 24 2199206560 ps
T468 /workspace/coverage/default/27.chip_sw_all_escalation_resets.316241143 Feb 04 04:15:45 PM PST 24 Feb 04 04:27:24 PM PST 24 5468147560 ps
T238 /workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.1893748286 Feb 04 04:06:12 PM PST 24 Feb 04 04:34:15 PM PST 24 13002060266 ps
T654 /workspace/coverage/default/2.chip_sw_aes_masking_off.4198283929 Feb 04 04:03:11 PM PST 24 Feb 04 04:08:03 PM PST 24 2837865473 ps
T160 /workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.3309672682 Feb 04 03:41:27 PM PST 24 Feb 04 03:51:45 PM PST 24 4335893054 ps
T383 /workspace/coverage/default/2.chip_sw_gpio_smoketest.1044149089 Feb 04 04:10:11 PM PST 24 Feb 04 04:15:38 PM PST 24 2691009532 ps
T655 /workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.3002960561 Feb 04 03:55:14 PM PST 24 Feb 04 03:59:05 PM PST 24 2617914748 ps
T656 /workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.2822874952 Feb 04 03:43:21 PM PST 24 Feb 04 03:49:28 PM PST 24 5233565460 ps
T115 /workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.814228404 Feb 04 04:07:59 PM PST 24 Feb 04 04:56:14 PM PST 24 16336884629 ps
T398 /workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.740599831 Feb 04 04:06:44 PM PST 24 Feb 04 04:58:47 PM PST 24 24865554476 ps
T657 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2538631494 Feb 04 03:53:47 PM PST 24 Feb 04 04:03:55 PM PST 24 4185911414 ps
T658 /workspace/coverage/default/2.chip_sw_uart_rand_baudrate.3626884520 Feb 04 04:00:20 PM PST 24 Feb 04 04:47:17 PM PST 24 14139452320 ps
T659 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.788394563 Feb 04 03:42:14 PM PST 24 Feb 04 03:53:12 PM PST 24 4825024872 ps
T123 /workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.2591534827 Feb 04 04:11:38 PM PST 24 Feb 04 04:22:29 PM PST 24 6327996814 ps
T660 /workspace/coverage/default/0.chip_sw_kmac_idle.1736562869 Feb 04 03:40:04 PM PST 24 Feb 04 03:43:21 PM PST 24 2788053754 ps
T661 /workspace/coverage/default/3.chip_sw_uart_rand_baudrate.3824346640 Feb 04 04:09:53 PM PST 24 Feb 04 04:51:15 PM PST 24 13213973864 ps
T662 /workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2714315198 Feb 04 04:07:56 PM PST 24 Feb 04 04:28:38 PM PST 24 7770088572 ps
T663 /workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.2166509175 Feb 04 04:10:07 PM PST 24 Feb 04 04:18:04 PM PST 24 4674309320 ps
T664 /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.3571867086 Feb 04 04:06:07 PM PST 24 Feb 04 04:14:35 PM PST 24 5046355182 ps
T665 /workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.1105772583 Feb 04 03:43:22 PM PST 24 Feb 04 06:39:42 PM PST 24 59524575004 ps
T180 /workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.3784908397 Feb 04 03:42:01 PM PST 24 Feb 04 03:43:55 PM PST 24 2296859542 ps
T365 /workspace/coverage/default/19.chip_sw_all_escalation_resets.3178224580 Feb 04 04:14:25 PM PST 24 Feb 04 04:23:50 PM PST 24 4300634740 ps
T666 /workspace/coverage/default/0.chip_sw_aon_timer_smoketest.2321272082 Feb 04 03:45:25 PM PST 24 Feb 04 03:52:48 PM PST 24 3495042240 ps
T667 /workspace/coverage/default/65.chip_sw_all_escalation_resets.3031196860 Feb 04 04:18:53 PM PST 24 Feb 04 04:31:20 PM PST 24 5453381752 ps
T668 /workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2425997102 Feb 04 04:11:08 PM PST 24 Feb 04 04:46:19 PM PST 24 13876101525 ps
T669 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.4139176305 Feb 04 03:41:38 PM PST 24 Feb 04 03:50:05 PM PST 24 4469135964 ps
T670 /workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1576116717 Feb 04 03:49:08 PM PST 24 Feb 04 04:00:01 PM PST 24 7802574560 ps
T671 /workspace/coverage/default/2.chip_sw_alert_handler_escalation.202433702 Feb 04 04:02:42 PM PST 24 Feb 04 04:10:20 PM PST 24 4418317720 ps
T672 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1535205181 Feb 04 03:54:49 PM PST 24 Feb 04 04:04:00 PM PST 24 4727059930 ps
T673 /workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.763034882 Feb 04 04:01:18 PM PST 24 Feb 04 04:11:00 PM PST 24 8443643069 ps
T674 /workspace/coverage/default/0.chip_sw_kmac_smoketest.2486339306 Feb 04 03:42:38 PM PST 24 Feb 04 03:47:33 PM PST 24 2598885274 ps
T343 /workspace/coverage/default/2.chip_sw_gpio.291818235 Feb 04 03:59:30 PM PST 24 Feb 04 04:06:52 PM PST 24 4169820266 ps
T675 /workspace/coverage/default/1.rom_e2e_asm_init_rma.366788198 Feb 04 04:02:39 PM PST 24 Feb 04 04:34:09 PM PST 24 8519066105 ps
T199 /workspace/coverage/default/0.chip_plic_all_irqs_20.2346303344 Feb 04 03:41:43 PM PST 24 Feb 04 03:56:54 PM PST 24 4185260104 ps
T473 /workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.2345431895 Feb 04 04:15:43 PM PST 24 Feb 04 04:22:04 PM PST 24 3700238586 ps
T339 /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.1711276345 Feb 04 04:00:27 PM PST 24 Feb 04 04:17:24 PM PST 24 4739491496 ps
T676 /workspace/coverage/default/2.rom_e2e_asm_init_dev.2925538041 Feb 04 04:12:49 PM PST 24 Feb 04 04:48:58 PM PST 24 8735638304 ps
T218 /workspace/coverage/default/20.chip_sw_all_escalation_resets.174805589 Feb 04 04:13:50 PM PST 24 Feb 04 04:24:47 PM PST 24 4946017828 ps
T677 /workspace/coverage/default/2.chip_sw_csrng_smoketest.2795405439 Feb 04 04:09:43 PM PST 24 Feb 04 04:12:28 PM PST 24 2512427048 ps
T678 /workspace/coverage/default/0.chip_sw_keymgr_key_derivation.1063046040 Feb 04 03:40:29 PM PST 24 Feb 04 03:50:06 PM PST 24 4949418712 ps
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