| T679 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.4238473993 |
|
|
Feb 04 03:48:14 PM PST 24 |
Feb 04 03:52:31 PM PST 24 |
2740155608 ps |
| T680 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.727193092 |
|
|
Feb 04 03:46:18 PM PST 24 |
Feb 04 04:20:17 PM PST 24 |
8409458205 ps |
| T681 |
/workspace/coverage/default/0.chip_tap_straps_prod.3164473641 |
|
|
Feb 04 03:40:48 PM PST 24 |
Feb 04 03:56:06 PM PST 24 |
8542522157 ps |
| T682 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.2528555127 |
|
|
Feb 04 03:53:52 PM PST 24 |
Feb 04 04:34:37 PM PST 24 |
24157246412 ps |
| T683 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.604217112 |
|
|
Feb 04 03:42:07 PM PST 24 |
Feb 04 06:58:47 PM PST 24 |
64742039639 ps |
| T684 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3239654965 |
|
|
Feb 04 03:40:32 PM PST 24 |
Feb 04 03:55:17 PM PST 24 |
7557326417 ps |
| T531 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.2607476524 |
|
|
Feb 04 04:24:44 PM PST 24 |
Feb 04 04:30:50 PM PST 24 |
3964623036 ps |
| T193 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.3678151429 |
|
|
Feb 04 03:41:32 PM PST 24 |
Feb 04 03:45:19 PM PST 24 |
2949625912 ps |
| T145 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.986003989 |
|
|
Feb 04 03:56:04 PM PST 24 |
Feb 04 03:59:09 PM PST 24 |
2861140408 ps |
| T387 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.3789065173 |
|
|
Feb 04 04:16:46 PM PST 24 |
Feb 04 04:23:47 PM PST 24 |
3750207460 ps |
| T388 |
/workspace/coverage/default/2.chip_sw_example_flash.1427733504 |
|
|
Feb 04 03:56:51 PM PST 24 |
Feb 04 03:59:39 PM PST 24 |
2728985576 ps |
| T266 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.2676023172 |
|
|
Feb 04 04:16:33 PM PST 24 |
Feb 04 04:22:52 PM PST 24 |
3852632664 ps |
| T503 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2166213004 |
|
|
Feb 04 04:22:36 PM PST 24 |
Feb 04 04:27:51 PM PST 24 |
3359977872 ps |
| T685 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.2415600881 |
|
|
Feb 04 03:40:58 PM PST 24 |
Feb 04 04:03:18 PM PST 24 |
6518761278 ps |
| T686 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.2275414423 |
|
|
Feb 04 03:54:20 PM PST 24 |
Feb 04 03:58:14 PM PST 24 |
2827110778 ps |
| T687 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.2113015088 |
|
|
Feb 04 03:38:08 PM PST 24 |
Feb 04 03:55:50 PM PST 24 |
6000738351 ps |
| T253 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.1993436721 |
|
|
Feb 04 03:50:09 PM PST 24 |
Feb 04 03:57:55 PM PST 24 |
3330901778 ps |
| T452 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.3355318754 |
|
|
Feb 04 04:21:11 PM PST 24 |
Feb 04 04:26:17 PM PST 24 |
3412003976 ps |
| T688 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.1185783183 |
|
|
Feb 04 03:59:52 PM PST 24 |
Feb 04 04:31:44 PM PST 24 |
8764173188 ps |
| T424 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.3147472856 |
|
|
Feb 04 03:40:13 PM PST 24 |
Feb 04 03:42:39 PM PST 24 |
2801084766 ps |
| T689 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.4019922658 |
|
|
Feb 04 04:05:17 PM PST 24 |
Feb 04 04:17:35 PM PST 24 |
4320959434 ps |
| T690 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.2279518307 |
|
|
Feb 04 04:09:59 PM PST 24 |
Feb 04 04:13:33 PM PST 24 |
3454425704 ps |
| T691 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.2003750132 |
|
|
Feb 04 03:39:53 PM PST 24 |
Feb 04 03:45:12 PM PST 24 |
2932690520 ps |
| T692 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.2514519994 |
|
|
Feb 04 03:48:49 PM PST 24 |
Feb 04 04:34:03 PM PST 24 |
8830578710 ps |
| T693 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.1098441454 |
|
|
Feb 04 04:10:24 PM PST 24 |
Feb 04 04:17:34 PM PST 24 |
3788534891 ps |
| T309 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.2280149485 |
|
|
Feb 04 03:40:08 PM PST 24 |
Feb 04 03:46:46 PM PST 24 |
7478037064 ps |
| T369 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.2429036639 |
|
|
Feb 04 03:57:54 PM PST 24 |
Feb 04 04:04:14 PM PST 24 |
3415458606 ps |
| T694 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.2751992727 |
|
|
Feb 04 03:47:27 PM PST 24 |
Feb 04 04:33:02 PM PST 24 |
10557699125 ps |
| T695 |
/workspace/coverage/default/2.chip_sw_edn_kat.3877474188 |
|
|
Feb 04 04:03:51 PM PST 24 |
Feb 04 04:14:46 PM PST 24 |
3453745632 ps |
| T390 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1935854767 |
|
|
Feb 04 04:07:37 PM PST 24 |
Feb 04 04:16:24 PM PST 24 |
5881891964 ps |
| T696 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.817328460 |
|
|
Feb 04 03:48:30 PM PST 24 |
Feb 04 04:23:26 PM PST 24 |
8346217112 ps |
| T88 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3775237611 |
|
|
Feb 04 03:55:15 PM PST 24 |
Feb 04 04:02:17 PM PST 24 |
6823057024 ps |
| T219 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.2153549593 |
|
|
Feb 04 04:17:33 PM PST 24 |
Feb 04 04:25:54 PM PST 24 |
5376905664 ps |
| T697 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.1440352510 |
|
|
Feb 04 04:13:40 PM PST 24 |
Feb 04 05:14:12 PM PST 24 |
22906988260 ps |
| T420 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.851220357 |
|
|
Feb 04 03:55:27 PM PST 24 |
Feb 04 04:04:49 PM PST 24 |
4852700815 ps |
| T302 |
/workspace/coverage/default/0.chip_sw_flash_init.1587417836 |
|
|
Feb 04 03:38:37 PM PST 24 |
Feb 04 04:10:54 PM PST 24 |
19166818456 ps |
| T508 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.799372075 |
|
|
Feb 04 04:21:51 PM PST 24 |
Feb 04 04:34:06 PM PST 24 |
6208254080 ps |
| T418 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.4261361943 |
|
|
Feb 04 04:02:24 PM PST 24 |
Feb 04 04:14:35 PM PST 24 |
4697242496 ps |
| T305 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.3056095498 |
|
|
Feb 04 03:54:32 PM PST 24 |
Feb 04 04:36:46 PM PST 24 |
24455233577 ps |
| T698 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.1180551500 |
|
|
Feb 04 03:44:16 PM PST 24 |
Feb 04 03:47:31 PM PST 24 |
2511692576 ps |
| T699 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.4007283374 |
|
|
Feb 04 03:45:28 PM PST 24 |
Feb 04 04:07:02 PM PST 24 |
7728490748 ps |
| T700 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.4037021625 |
|
|
Feb 04 04:07:29 PM PST 24 |
Feb 04 04:16:42 PM PST 24 |
5997004400 ps |
| T399 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3749969455 |
|
|
Feb 04 03:57:22 PM PST 24 |
Feb 04 05:03:01 PM PST 24 |
24852096726 ps |
| T701 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.642816500 |
|
|
Feb 04 04:04:05 PM PST 24 |
Feb 04 04:15:20 PM PST 24 |
4792507497 ps |
| T702 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.1084553552 |
|
|
Feb 04 03:59:34 PM PST 24 |
Feb 04 04:03:37 PM PST 24 |
2295626352 ps |
| T703 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.1840926422 |
|
|
Feb 04 03:45:08 PM PST 24 |
Feb 04 04:06:14 PM PST 24 |
6934720342 ps |
| T164 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.172531549 |
|
|
Feb 04 03:52:46 PM PST 24 |
Feb 04 04:02:41 PM PST 24 |
6590723838 ps |
| T704 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.4179201948 |
|
|
Feb 04 03:41:26 PM PST 24 |
Feb 04 03:58:12 PM PST 24 |
5558384050 ps |
| T705 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.185719676 |
|
|
Feb 04 03:48:05 PM PST 24 |
Feb 04 04:18:31 PM PST 24 |
7449596003 ps |
| T425 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.1367439262 |
|
|
Feb 04 03:44:50 PM PST 24 |
Feb 04 03:47:22 PM PST 24 |
2842723564 ps |
| T706 |
/workspace/coverage/default/2.rom_e2e_smoke.1844120924 |
|
|
Feb 04 04:08:57 PM PST 24 |
Feb 04 04:38:33 PM PST 24 |
7906706328 ps |
| T707 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.3401376745 |
|
|
Feb 04 03:57:35 PM PST 24 |
Feb 04 04:04:01 PM PST 24 |
4425077092 ps |
| T708 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.4269698359 |
|
|
Feb 04 03:55:31 PM PST 24 |
Feb 04 03:59:20 PM PST 24 |
2844949466 ps |
| T709 |
/workspace/coverage/default/4.chip_tap_straps_prod.871390197 |
|
|
Feb 04 04:11:28 PM PST 24 |
Feb 04 04:13:46 PM PST 24 |
2480106042 ps |
| T440 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.4227912698 |
|
|
Feb 04 04:20:44 PM PST 24 |
Feb 04 04:28:55 PM PST 24 |
4156665264 ps |
| T161 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.4039827355 |
|
|
Feb 04 03:54:25 PM PST 24 |
Feb 04 04:02:51 PM PST 24 |
4349413360 ps |
| T517 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.3159793205 |
|
|
Feb 04 04:21:31 PM PST 24 |
Feb 04 04:28:20 PM PST 24 |
3897061376 ps |
| T120 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.656926547 |
|
|
Feb 04 03:53:37 PM PST 24 |
Feb 04 04:01:58 PM PST 24 |
5375797374 ps |
| T710 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.2444009224 |
|
|
Feb 04 03:39:45 PM PST 24 |
Feb 04 06:48:04 PM PST 24 |
58507238452 ps |
| T711 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.3115448959 |
|
|
Feb 04 03:41:39 PM PST 24 |
Feb 04 03:47:07 PM PST 24 |
2512095491 ps |
| T352 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.416597378 |
|
|
Feb 04 03:42:28 PM PST 24 |
Feb 04 03:57:52 PM PST 24 |
5900946025 ps |
| T172 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.2943617446 |
|
|
Feb 04 03:53:19 PM PST 24 |
Feb 04 04:05:07 PM PST 24 |
9253487512 ps |
| T435 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.16041625 |
|
|
Feb 04 03:57:59 PM PST 24 |
Feb 04 04:08:44 PM PST 24 |
4577604130 ps |
| T712 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.3056780864 |
|
|
Feb 04 04:00:23 PM PST 24 |
Feb 04 04:34:32 PM PST 24 |
8563204287 ps |
| T713 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.1803269526 |
|
|
Feb 04 04:00:51 PM PST 24 |
Feb 04 04:07:53 PM PST 24 |
5851283651 ps |
| T714 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.3133707731 |
|
|
Feb 04 03:53:46 PM PST 24 |
Feb 04 03:58:36 PM PST 24 |
2366426420 ps |
| T109 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.3114964359 |
|
|
Feb 04 03:38:50 PM PST 24 |
Feb 04 04:34:20 PM PST 24 |
12911302212 ps |
| T715 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2796884064 |
|
|
Feb 04 03:41:13 PM PST 24 |
Feb 04 03:52:58 PM PST 24 |
4303336248 ps |
| T716 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.712947526 |
|
|
Feb 04 03:45:28 PM PST 24 |
Feb 04 04:18:58 PM PST 24 |
12271161509 ps |
| T254 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.377277502 |
|
|
Feb 04 04:02:42 PM PST 24 |
Feb 04 04:10:07 PM PST 24 |
3422319250 ps |
| T717 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.4137256038 |
|
|
Feb 04 03:39:43 PM PST 24 |
Feb 04 03:59:44 PM PST 24 |
8711683924 ps |
| T47 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.6772346 |
|
|
Feb 04 03:44:05 PM PST 24 |
Feb 04 03:52:47 PM PST 24 |
5995637238 ps |
| T121 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1306852549 |
|
|
Feb 04 04:05:14 PM PST 24 |
Feb 04 04:14:14 PM PST 24 |
5328131350 ps |
| T417 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.2339530614 |
|
|
Feb 04 04:10:43 PM PST 24 |
Feb 04 04:20:37 PM PST 24 |
5264716234 ps |
| T718 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.4061463943 |
|
|
Feb 04 03:41:34 PM PST 24 |
Feb 04 04:13:15 PM PST 24 |
14112595171 ps |
| T719 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.2912491090 |
|
|
Feb 04 04:00:24 PM PST 24 |
Feb 04 04:34:14 PM PST 24 |
32720154064 ps |
| T467 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.4014840383 |
|
|
Feb 04 04:16:04 PM PST 24 |
Feb 04 04:22:25 PM PST 24 |
3382687954 ps |
| T720 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.1775233094 |
|
|
Feb 04 04:04:54 PM PST 24 |
Feb 04 04:10:44 PM PST 24 |
2913977396 ps |
| T721 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.101533989 |
|
|
Feb 04 04:04:58 PM PST 24 |
Feb 04 04:13:53 PM PST 24 |
4881551418 ps |
| T512 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.2655974635 |
|
|
Feb 04 04:19:37 PM PST 24 |
Feb 04 04:26:04 PM PST 24 |
3828357440 ps |
| T722 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.1074801095 |
|
|
Feb 04 04:16:32 PM PST 24 |
Feb 04 04:28:37 PM PST 24 |
5337266160 ps |
| T723 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.3619221101 |
|
|
Feb 04 03:41:02 PM PST 24 |
Feb 04 04:36:00 PM PST 24 |
14708478360 ps |
| T404 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1159667138 |
|
|
Feb 04 04:06:25 PM PST 24 |
Feb 04 04:29:59 PM PST 24 |
19139892592 ps |
| T146 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.24407266 |
|
|
Feb 04 03:52:42 PM PST 24 |
Feb 04 04:02:14 PM PST 24 |
9321989393 ps |
| T724 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.1935215924 |
|
|
Feb 04 04:03:54 PM PST 24 |
Feb 04 04:07:58 PM PST 24 |
2593036184 ps |
| T725 |
/workspace/coverage/default/0.rom_e2e_smoke.825843839 |
|
|
Feb 04 03:44:26 PM PST 24 |
Feb 04 04:24:14 PM PST 24 |
8765378780 ps |
| T726 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.970705596 |
|
|
Feb 04 03:43:40 PM PST 24 |
Feb 04 03:49:02 PM PST 24 |
2790071528 ps |
| T727 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.914056244 |
|
|
Feb 04 04:13:32 PM PST 24 |
Feb 04 04:56:08 PM PST 24 |
13380351312 ps |
| T728 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.1259066667 |
|
|
Feb 04 04:06:54 PM PST 24 |
Feb 04 04:19:51 PM PST 24 |
4772113840 ps |
| T513 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.3892172647 |
|
|
Feb 04 04:22:18 PM PST 24 |
Feb 04 04:31:28 PM PST 24 |
5531035064 ps |
| T729 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.3299329418 |
|
|
Feb 04 04:11:24 PM PST 24 |
Feb 04 04:15:02 PM PST 24 |
3582011614 ps |
| T730 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.3816822249 |
|
|
Feb 04 04:11:12 PM PST 24 |
Feb 04 04:27:17 PM PST 24 |
6238935024 ps |
| T731 |
/workspace/coverage/default/2.chip_sw_rv_timer_smoketest.320051107 |
|
|
Feb 04 04:10:06 PM PST 24 |
Feb 04 04:14:57 PM PST 24 |
3432173922 ps |
| T732 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.2184792644 |
|
|
Feb 04 04:05:36 PM PST 24 |
Feb 04 04:16:35 PM PST 24 |
4917214632 ps |
| T255 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.1759334573 |
|
|
Feb 04 04:03:42 PM PST 24 |
Feb 04 04:12:29 PM PST 24 |
4204477451 ps |
| T733 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.3621039815 |
|
|
Feb 04 03:57:55 PM PST 24 |
Feb 04 04:16:11 PM PST 24 |
5859335168 ps |
| T313 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.4153819025 |
|
|
Feb 04 03:44:25 PM PST 24 |
Feb 04 03:54:20 PM PST 24 |
9932467240 ps |
| T734 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.2391385682 |
|
|
Feb 04 03:40:07 PM PST 24 |
Feb 04 03:45:37 PM PST 24 |
3464631880 ps |
| T379 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.395794775 |
|
|
Feb 04 04:22:19 PM PST 24 |
Feb 04 04:29:39 PM PST 24 |
3884666568 ps |
| T510 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.2180007120 |
|
|
Feb 04 04:16:42 PM PST 24 |
Feb 04 04:28:09 PM PST 24 |
6206930806 ps |
| T735 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.4049380058 |
|
|
Feb 04 03:55:23 PM PST 24 |
Feb 04 04:05:38 PM PST 24 |
5261610052 ps |
| T437 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.958908983 |
|
|
Feb 04 04:19:59 PM PST 24 |
Feb 04 04:26:13 PM PST 24 |
3276056858 ps |
| T458 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.1895147235 |
|
|
Feb 04 04:12:59 PM PST 24 |
Feb 04 04:21:07 PM PST 24 |
5389782772 ps |
| T736 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.1141258048 |
|
|
Feb 04 03:46:04 PM PST 24 |
Feb 04 03:55:02 PM PST 24 |
4160041120 ps |
| T351 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.1934005058 |
|
|
Feb 04 03:59:14 PM PST 24 |
Feb 04 04:15:29 PM PST 24 |
4583643074 ps |
| T737 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.1906211646 |
|
|
Feb 04 04:15:29 PM PST 24 |
Feb 04 04:22:34 PM PST 24 |
3718217068 ps |
| T459 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.4183888427 |
|
|
Feb 04 04:18:29 PM PST 24 |
Feb 04 04:24:56 PM PST 24 |
4241890608 ps |
| T738 |
/workspace/coverage/default/0.chip_sw_hmac_enc.2792683797 |
|
|
Feb 04 03:39:33 PM PST 24 |
Feb 04 03:44:13 PM PST 24 |
2862283024 ps |
| T267 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.3451518316 |
|
|
Feb 04 04:21:17 PM PST 24 |
Feb 04 04:28:43 PM PST 24 |
3912823916 ps |
| T739 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.1531059519 |
|
|
Feb 04 04:04:17 PM PST 24 |
Feb 04 04:10:12 PM PST 24 |
3804496562 ps |
| T740 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.2723579198 |
|
|
Feb 04 04:19:43 PM PST 24 |
Feb 04 04:28:49 PM PST 24 |
4534158612 ps |
| T741 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.2212438259 |
|
|
Feb 04 03:52:09 PM PST 24 |
Feb 04 04:00:31 PM PST 24 |
5016854264 ps |
| T323 |
/workspace/coverage/default/2.rom_raw_unlock.210859491 |
|
|
Feb 04 04:10:17 PM PST 24 |
Feb 04 04:40:38 PM PST 24 |
15033236610 ps |
| T742 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2653670912 |
|
|
Feb 04 03:38:30 PM PST 24 |
Feb 04 04:16:22 PM PST 24 |
14182322651 ps |
| T422 |
/workspace/coverage/default/0.chip_tap_straps_dev.1208256165 |
|
|
Feb 04 03:40:06 PM PST 24 |
Feb 04 04:04:56 PM PST 24 |
13123202165 ps |
| T743 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.1127747046 |
|
|
Feb 04 04:09:28 PM PST 24 |
Feb 04 04:16:49 PM PST 24 |
5480441534 ps |
| T744 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3595324929 |
|
|
Feb 04 03:41:41 PM PST 24 |
Feb 04 03:49:53 PM PST 24 |
4383575836 ps |
| T745 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.2763699999 |
|
|
Feb 04 04:06:18 PM PST 24 |
Feb 04 04:13:14 PM PST 24 |
3430443400 ps |
| T746 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.2615316413 |
|
|
Feb 04 03:40:25 PM PST 24 |
Feb 04 03:54:33 PM PST 24 |
7010963720 ps |
| T183 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.4009164711 |
|
|
Feb 04 04:15:13 PM PST 24 |
Feb 04 04:26:53 PM PST 24 |
6179534288 ps |
| T747 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.3558419221 |
|
|
Feb 04 04:19:31 PM PST 24 |
Feb 04 04:59:15 PM PST 24 |
13564991928 ps |
| T748 |
/workspace/coverage/default/2.chip_sival_flash_info_access.1599609317 |
|
|
Feb 04 03:57:40 PM PST 24 |
Feb 04 04:08:48 PM PST 24 |
7257201775 ps |
| T749 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.2161929146 |
|
|
Feb 04 03:43:00 PM PST 24 |
Feb 04 03:56:31 PM PST 24 |
5085174246 ps |
| T750 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.1287542100 |
|
|
Feb 04 04:14:11 PM PST 24 |
Feb 04 04:23:59 PM PST 24 |
6465896910 ps |
| T256 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.4127145469 |
|
|
Feb 04 04:12:31 PM PST 24 |
Feb 04 04:22:10 PM PST 24 |
5225729912 ps |
| T127 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.1884601868 |
|
|
Feb 04 03:40:52 PM PST 24 |
Feb 04 04:53:29 PM PST 24 |
18496165410 ps |
| T751 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.3781893154 |
|
|
Feb 04 04:11:00 PM PST 24 |
Feb 04 04:52:28 PM PST 24 |
13195308639 ps |
| T167 |
/workspace/coverage/default/2.chip_jtag_mem_access.2496729061 |
|
|
Feb 04 03:59:13 PM PST 24 |
Feb 04 04:25:25 PM PST 24 |
13295945356 ps |
| T752 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.97977289 |
|
|
Feb 04 04:09:20 PM PST 24 |
Feb 04 04:13:06 PM PST 24 |
3053808938 ps |
| T753 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.3633758454 |
|
|
Feb 04 03:59:57 PM PST 24 |
Feb 04 04:32:14 PM PST 24 |
8427239016 ps |
| T9 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.42140363 |
|
|
Feb 04 03:45:10 PM PST 24 |
Feb 04 03:49:17 PM PST 24 |
3546567678 ps |
| T754 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.2628466325 |
|
|
Feb 04 04:12:52 PM PST 24 |
Feb 04 04:29:28 PM PST 24 |
8742735997 ps |
| T522 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.3589350163 |
|
|
Feb 04 04:18:29 PM PST 24 |
Feb 04 04:26:37 PM PST 24 |
3700243442 ps |
| T755 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.1618083610 |
|
|
Feb 04 04:05:21 PM PST 24 |
Feb 04 04:16:29 PM PST 24 |
5035537424 ps |
| T401 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.517780120 |
|
|
Feb 04 03:51:26 PM PST 24 |
Feb 04 04:01:11 PM PST 24 |
2658222050 ps |
| T756 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.1095235974 |
|
|
Feb 04 03:44:08 PM PST 24 |
Feb 04 03:48:53 PM PST 24 |
2911118120 ps |
| T757 |
/workspace/coverage/default/1.rom_e2e_smoke.1407422602 |
|
|
Feb 04 03:56:44 PM PST 24 |
Feb 04 04:38:22 PM PST 24 |
8280758706 ps |
| T758 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.2065197319 |
|
|
Feb 04 03:53:09 PM PST 24 |
Feb 04 03:58:52 PM PST 24 |
4501902556 ps |
| T759 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.3886451110 |
|
|
Feb 04 04:13:51 PM PST 24 |
Feb 04 04:27:33 PM PST 24 |
5015073732 ps |
| T760 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.3615659716 |
|
|
Feb 04 04:02:59 PM PST 24 |
Feb 04 04:07:56 PM PST 24 |
3252013246 ps |
| T761 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.2670725271 |
|
|
Feb 04 03:40:02 PM PST 24 |
Feb 04 04:42:58 PM PST 24 |
20792283696 ps |
| T257 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.277799883 |
|
|
Feb 04 04:04:09 PM PST 24 |
Feb 04 04:15:52 PM PST 24 |
5355331954 ps |
| T361 |
/workspace/coverage/default/1.chip_sival_flash_info_access.653779811 |
|
|
Feb 04 03:44:13 PM PST 24 |
Feb 04 03:53:31 PM PST 24 |
6539342451 ps |
| T762 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.3944039602 |
|
|
Feb 04 04:14:46 PM PST 24 |
Feb 04 05:27:11 PM PST 24 |
23551877522 ps |
| T763 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.2951979213 |
|
|
Feb 04 03:41:41 PM PST 24 |
Feb 04 03:46:58 PM PST 24 |
2670856817 ps |
| T764 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.752884861 |
|
|
Feb 04 03:38:59 PM PST 24 |
Feb 04 04:36:25 PM PST 24 |
31636061108 ps |
| T765 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.1221021901 |
|
|
Feb 04 03:53:53 PM PST 24 |
Feb 04 04:02:45 PM PST 24 |
5382134136 ps |
| T766 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.956023265 |
|
|
Feb 04 04:05:46 PM PST 24 |
Feb 04 04:18:30 PM PST 24 |
4379832850 ps |
| T344 |
/workspace/coverage/default/1.chip_sw_gpio.2249460017 |
|
|
Feb 04 03:43:04 PM PST 24 |
Feb 04 03:51:51 PM PST 24 |
4262782804 ps |
| T141 |
/workspace/coverage/default/0.chip_jtag_mem_access.3623462028 |
|
|
Feb 04 03:32:50 PM PST 24 |
Feb 04 03:56:59 PM PST 24 |
13134033969 ps |
| T767 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.371331145 |
|
|
Feb 04 03:46:21 PM PST 24 |
Feb 04 03:55:41 PM PST 24 |
4107806920 ps |
| T768 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.2632595195 |
|
|
Feb 04 03:40:33 PM PST 24 |
Feb 04 03:49:57 PM PST 24 |
6000077808 ps |
| T456 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.2834067674 |
|
|
Feb 04 04:18:59 PM PST 24 |
Feb 04 04:29:14 PM PST 24 |
4456544236 ps |
| T769 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.3777261096 |
|
|
Feb 04 04:03:23 PM PST 24 |
Feb 04 04:07:52 PM PST 24 |
2612896784 ps |
| T520 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.62402985 |
|
|
Feb 04 04:21:09 PM PST 24 |
Feb 04 04:29:42 PM PST 24 |
4632829500 ps |
| T770 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.2321572294 |
|
|
Feb 04 03:47:41 PM PST 24 |
Feb 04 04:29:47 PM PST 24 |
8767672272 ps |
| T470 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.1438874182 |
|
|
Feb 04 04:21:23 PM PST 24 |
Feb 04 04:27:30 PM PST 24 |
4149046090 ps |
| T205 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.306436993 |
|
|
Feb 04 03:53:24 PM PST 24 |
Feb 04 04:16:41 PM PST 24 |
6586430830 ps |
| T457 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.1160957466 |
|
|
Feb 04 04:20:07 PM PST 24 |
Feb 04 04:26:40 PM PST 24 |
3969147868 ps |
| T771 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3228939388 |
|
|
Feb 04 03:40:37 PM PST 24 |
Feb 04 07:04:50 PM PST 24 |
254743848938 ps |
| T239 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.1334059879 |
|
|
Feb 04 03:47:12 PM PST 24 |
Feb 04 03:56:29 PM PST 24 |
5099647428 ps |
| T772 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.3888019905 |
|
|
Feb 04 04:11:40 PM PST 24 |
Feb 04 04:26:56 PM PST 24 |
5565519308 ps |
| T773 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.1754031300 |
|
|
Feb 04 04:10:31 PM PST 24 |
Feb 04 04:18:32 PM PST 24 |
3427431752 ps |
| T774 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.594526562 |
|
|
Feb 04 03:41:28 PM PST 24 |
Feb 04 03:48:55 PM PST 24 |
4854824340 ps |
| T54 |
/workspace/coverage/default/0.chip_sw_alert_test.1498820879 |
|
|
Feb 04 03:39:29 PM PST 24 |
Feb 04 03:44:29 PM PST 24 |
3380753464 ps |
| T775 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.1529538951 |
|
|
Feb 04 03:39:40 PM PST 24 |
Feb 04 03:42:49 PM PST 24 |
3155596616 ps |
| T776 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3068273398 |
|
|
Feb 04 04:06:06 PM PST 24 |
Feb 04 04:16:53 PM PST 24 |
4003533848 ps |
| T777 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.2009402447 |
|
|
Feb 04 04:02:53 PM PST 24 |
Feb 04 04:08:36 PM PST 24 |
2696249030 ps |
| T258 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.2249548213 |
|
|
Feb 04 03:39:48 PM PST 24 |
Feb 04 03:50:09 PM PST 24 |
3971096506 ps |
| T329 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.2387221342 |
|
|
Feb 04 03:38:55 PM PST 24 |
Feb 04 03:44:32 PM PST 24 |
2785535148 ps |
| T521 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.339465816 |
|
|
Feb 04 04:13:21 PM PST 24 |
Feb 04 04:20:04 PM PST 24 |
3727772400 ps |
| T778 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.3823844137 |
|
|
Feb 04 03:57:28 PM PST 24 |
Feb 04 04:02:06 PM PST 24 |
2973770776 ps |
| T779 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.3012821479 |
|
|
Feb 04 04:07:50 PM PST 24 |
Feb 04 04:26:51 PM PST 24 |
4841227904 ps |
| T405 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.735224720 |
|
|
Feb 04 03:40:30 PM PST 24 |
Feb 04 03:47:05 PM PST 24 |
7022278300 ps |
| T51 |
/workspace/coverage/default/1.chip_jtag_csr_rw.779085221 |
|
|
Feb 04 03:47:38 PM PST 24 |
Feb 04 04:28:28 PM PST 24 |
18766766296 ps |
| T780 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.1913680311 |
|
|
Feb 04 03:46:42 PM PST 24 |
Feb 04 04:21:30 PM PST 24 |
7768646889 ps |
| T516 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.3793066223 |
|
|
Feb 04 04:15:33 PM PST 24 |
Feb 04 04:22:57 PM PST 24 |
3294865420 ps |
| T781 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.2452500256 |
|
|
Feb 04 04:12:38 PM PST 24 |
Feb 04 05:13:33 PM PST 24 |
22660659672 ps |
| T124 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2219989735 |
|
|
Feb 04 03:41:49 PM PST 24 |
Feb 04 03:49:53 PM PST 24 |
5272157762 ps |
| T782 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.703713080 |
|
|
Feb 04 03:43:11 PM PST 24 |
Feb 04 04:03:29 PM PST 24 |
11121843664 ps |
| T783 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.441948352 |
|
|
Feb 04 04:12:03 PM PST 24 |
Feb 04 04:54:06 PM PST 24 |
13829309690 ps |
| T784 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.3668068443 |
|
|
Feb 04 03:46:37 PM PST 24 |
Feb 04 04:20:04 PM PST 24 |
8829646012 ps |
| T358 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.3535149740 |
|
|
Feb 04 03:48:38 PM PST 24 |
Feb 04 03:58:15 PM PST 24 |
3853959753 ps |
| T785 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.3890916174 |
|
|
Feb 04 03:43:06 PM PST 24 |
Feb 04 03:51:21 PM PST 24 |
4701132544 ps |
| T419 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.3396566025 |
|
|
Feb 04 03:50:09 PM PST 24 |
Feb 04 04:03:55 PM PST 24 |
5458227104 ps |
| T786 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2384775938 |
|
|
Feb 04 03:40:00 PM PST 24 |
Feb 04 04:05:22 PM PST 24 |
11803172824 ps |
| T787 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.2630468676 |
|
|
Feb 04 04:10:53 PM PST 24 |
Feb 04 04:16:46 PM PST 24 |
2817963364 ps |
| T788 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.2446721495 |
|
|
Feb 04 04:18:30 PM PST 24 |
Feb 04 04:25:21 PM PST 24 |
3644318682 ps |
| T789 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.3362746274 |
|
|
Feb 04 04:12:33 PM PST 24 |
Feb 04 05:18:49 PM PST 24 |
22544831400 ps |
| T790 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.110276773 |
|
|
Feb 04 03:48:53 PM PST 24 |
Feb 04 04:47:50 PM PST 24 |
20721891064 ps |
| T791 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.4006329343 |
|
|
Feb 04 04:05:04 PM PST 24 |
Feb 04 04:33:20 PM PST 24 |
27065081184 ps |
| T451 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.4153579566 |
|
|
Feb 04 04:21:38 PM PST 24 |
Feb 04 04:26:47 PM PST 24 |
3794837030 ps |
| T229 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.1857061395 |
|
|
Feb 04 03:40:24 PM PST 24 |
Feb 04 03:46:16 PM PST 24 |
2858246056 ps |
| T504 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.3682567064 |
|
|
Feb 04 04:17:35 PM PST 24 |
Feb 04 04:28:12 PM PST 24 |
5858098876 ps |
| T55 |
/workspace/coverage/default/1.chip_sw_alert_test.3135421242 |
|
|
Feb 04 03:50:41 PM PST 24 |
Feb 04 03:55:13 PM PST 24 |
2931942932 ps |
| T792 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.833244201 |
|
|
Feb 04 04:00:17 PM PST 24 |
Feb 04 04:05:13 PM PST 24 |
5458144316 ps |
| T165 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.1674545480 |
|
|
Feb 04 04:08:23 PM PST 24 |
Feb 04 04:24:33 PM PST 24 |
10179910265 ps |
| T793 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.526122485 |
|
|
Feb 04 04:12:41 PM PST 24 |
Feb 04 04:42:50 PM PST 24 |
9092281159 ps |
| T794 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.1136383962 |
|
|
Feb 04 03:51:21 PM PST 24 |
Feb 04 04:19:49 PM PST 24 |
7867843096 ps |
| T509 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.2267756180 |
|
|
Feb 04 04:21:05 PM PST 24 |
Feb 04 04:27:32 PM PST 24 |
4144782696 ps |
| T795 |
/workspace/coverage/default/0.chip_sw_aes_entropy.3872629368 |
|
|
Feb 04 03:39:16 PM PST 24 |
Feb 04 03:43:21 PM PST 24 |
2831127728 ps |
| T796 |
/workspace/coverage/default/0.chip_sw_aes_idle.2840295445 |
|
|
Feb 04 03:38:31 PM PST 24 |
Feb 04 03:42:21 PM PST 24 |
2571530088 ps |
| T797 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.965954691 |
|
|
Feb 04 04:12:21 PM PST 24 |
Feb 04 04:25:31 PM PST 24 |
8163564588 ps |
| T798 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.13959659 |
|
|
Feb 04 03:50:40 PM PST 24 |
Feb 04 04:55:22 PM PST 24 |
19220625483 ps |
| T453 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.1202838099 |
|
|
Feb 04 04:25:08 PM PST 24 |
Feb 04 04:36:43 PM PST 24 |
5812302120 ps |
| T799 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.3545622834 |
|
|
Feb 04 03:53:34 PM PST 24 |
Feb 04 04:02:59 PM PST 24 |
5640030335 ps |
| T800 |
/workspace/coverage/default/0.chip_sw_aes_enc.4258800576 |
|
|
Feb 04 03:41:41 PM PST 24 |
Feb 04 03:45:19 PM PST 24 |
2411651400 ps |
| T801 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.1701174570 |
|
|
Feb 04 03:40:43 PM PST 24 |
Feb 04 04:02:21 PM PST 24 |
7774425120 ps |
| T486 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.4120404692 |
|
|
Feb 04 04:13:05 PM PST 24 |
Feb 04 04:19:21 PM PST 24 |
3984125038 ps |
| T802 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.4290951249 |
|
|
Feb 04 03:59:04 PM PST 24 |
Feb 04 04:09:59 PM PST 24 |
4761608863 ps |
| T803 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.1267314617 |
|
|
Feb 04 04:02:27 PM PST 24 |
Feb 04 04:08:05 PM PST 24 |
3178503863 ps |
| T310 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.2556832628 |
|
|
Feb 04 03:49:49 PM PST 24 |
Feb 04 03:57:30 PM PST 24 |
6456444956 ps |
| T149 |
/workspace/coverage/default/2.chip_jtag_csr_rw.875298068 |
|
|
Feb 04 03:59:06 PM PST 24 |
Feb 04 04:35:13 PM PST 24 |
18667193848 ps |
| T804 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.3769306228 |
|
|
Feb 04 03:41:12 PM PST 24 |
Feb 04 03:47:53 PM PST 24 |
3265559860 ps |
| T805 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.833479408 |
|
|
Feb 04 03:39:10 PM PST 24 |
Feb 04 03:47:27 PM PST 24 |
5227502080 ps |
| T471 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.4180442893 |
|
|
Feb 04 04:18:43 PM PST 24 |
Feb 04 04:22:48 PM PST 24 |
3368117420 ps |
| T806 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.648938969 |
|
|
Feb 04 04:11:36 PM PST 24 |
Feb 04 04:22:16 PM PST 24 |
7472933769 ps |
| T807 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.2255643555 |
|
|
Feb 04 03:45:53 PM PST 24 |
Feb 04 03:53:45 PM PST 24 |
5302786744 ps |
| T230 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.2929742802 |
|
|
Feb 04 04:05:07 PM PST 24 |
Feb 04 04:11:26 PM PST 24 |
2680365260 ps |
| T808 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.2428259556 |
|
|
Feb 04 03:49:24 PM PST 24 |
Feb 04 04:46:14 PM PST 24 |
12616462884 ps |
| T809 |
/workspace/coverage/default/0.chip_sw_edn_kat.373652339 |
|
|
Feb 04 03:38:59 PM PST 24 |
Feb 04 03:47:46 PM PST 24 |
3197102970 ps |
| T810 |
/workspace/coverage/default/0.chip_sw_example_concurrency.569485954 |
|
|
Feb 04 03:39:09 PM PST 24 |
Feb 04 03:43:47 PM PST 24 |
2167941324 ps |
| T811 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.380266306 |
|
|
Feb 04 03:57:41 PM PST 24 |
Feb 04 04:12:12 PM PST 24 |
5331176700 ps |
| T812 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.3526795300 |
|
|
Feb 04 03:43:02 PM PST 24 |
Feb 04 03:53:39 PM PST 24 |
6888793862 ps |
| T499 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.1205550520 |
|
|
Feb 04 04:20:39 PM PST 24 |
Feb 04 04:30:37 PM PST 24 |
5167692136 ps |
| T813 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1209984914 |
|
|
Feb 04 03:53:14 PM PST 24 |
Feb 04 04:05:22 PM PST 24 |
5083084818 ps |
| T814 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.721924513 |
|
|
Feb 04 03:41:05 PM PST 24 |
Feb 04 03:51:31 PM PST 24 |
5180894326 ps |
| T77 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.1899992526 |
|
|
Feb 04 04:13:18 PM PST 24 |
Feb 04 04:21:42 PM PST 24 |
5203299004 ps |
| T173 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.3964262178 |
|
|
Feb 04 03:40:52 PM PST 24 |
Feb 04 03:54:12 PM PST 24 |
8340493904 ps |
| T815 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.2927502998 |
|
|
Feb 04 04:07:20 PM PST 24 |
Feb 04 04:11:20 PM PST 24 |
2794444851 ps |
| T324 |
/workspace/coverage/default/1.rom_raw_unlock.1159869506 |
|
|
Feb 04 03:56:53 PM PST 24 |
Feb 04 04:35:13 PM PST 24 |
15767188137 ps |
| T816 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.4229975298 |
|
|
Feb 04 03:50:46 PM PST 24 |
Feb 04 03:55:56 PM PST 24 |
2947866786 ps |
| T240 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.914025615 |
|
|
Feb 04 04:18:48 PM PST 24 |
Feb 04 04:28:04 PM PST 24 |
4330832328 ps |
| T817 |
/workspace/coverage/default/1.rom_e2e_static_critical.3349184625 |
|
|
Feb 04 04:00:23 PM PST 24 |
Feb 04 04:46:30 PM PST 24 |
10666159654 ps |
| T179 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.997924900 |
|
|
Feb 04 03:46:47 PM PST 24 |
Feb 04 03:48:21 PM PST 24 |
2121806125 ps |
| T818 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.3652850925 |
|
|
Feb 04 03:44:19 PM PST 24 |
Feb 04 03:47:45 PM PST 24 |
2793914012 ps |
| T819 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.2084860284 |
|
|
Feb 04 03:40:00 PM PST 24 |
Feb 04 03:42:41 PM PST 24 |
2651013376 ps |
| T820 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.2640866983 |
|
|
Feb 04 03:45:59 PM PST 24 |
Feb 04 04:01:41 PM PST 24 |
13719524810 ps |
| T821 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.1425317475 |
|
|
Feb 04 04:09:38 PM PST 24 |
Feb 04 04:13:44 PM PST 24 |
2654327532 ps |
| T822 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.1123708938 |
|
|
Feb 04 03:54:41 PM PST 24 |
Feb 04 04:01:17 PM PST 24 |
3434289840 ps |
| T823 |
/workspace/coverage/default/2.chip_tap_straps_prod.2115144211 |
|
|
Feb 04 04:05:42 PM PST 24 |
Feb 04 04:08:31 PM PST 24 |
2658313274 ps |
| T824 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.487131731 |
|
|
Feb 04 04:20:11 PM PST 24 |
Feb 04 04:31:46 PM PST 24 |
4991956340 ps |
| T345 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.4124152402 |
|
|
Feb 04 03:42:22 PM PST 24 |
Feb 04 04:15:08 PM PST 24 |
7483937544 ps |
| T496 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.178824363 |
|
|
Feb 04 04:16:38 PM PST 24 |
Feb 04 04:24:51 PM PST 24 |
3460138130 ps |
| T507 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.3350771255 |
|
|
Feb 04 04:20:45 PM PST 24 |
Feb 04 04:28:21 PM PST 24 |
3658264350 ps |
| T825 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2884662840 |
|
|
Feb 04 03:45:20 PM PST 24 |
Feb 04 04:13:33 PM PST 24 |
7065707454 ps |
| T826 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.2384911820 |
|
|
Feb 04 03:41:38 PM PST 24 |
Feb 04 03:52:20 PM PST 24 |
5798238324 ps |
| T827 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.3527588485 |
|
|
Feb 04 04:10:41 PM PST 24 |
Feb 04 04:18:25 PM PST 24 |
4232258565 ps |
| T828 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.2643925648 |
|
|
Feb 04 04:03:45 PM PST 24 |
Feb 04 04:22:57 PM PST 24 |
5645975420 ps |
| T506 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.3036970862 |
|
|
Feb 04 04:21:39 PM PST 24 |
Feb 04 04:27:44 PM PST 24 |
4001183624 ps |