Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_timer_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143030	1			T35	77		T36	36		T37	119
values[2]	10300	1			T35	35		T36	1		T37	4
values[3]	4293	1			T35	10		T258	1		T170	40
values[4]	2452	1			T170	17		T424	4		T359	69
values[5]	1510	1			T170	22		T424	3		T359	33
values[6]	1108	1			T170	11		T424	2		T359	11
values[7]	723	1			T170	2		T424	1		T359	12
values[8]	513	1			T424	2		T359	5		T440	1
values[9]	419	1			T424	3		T359	1		T440	1
values[10]	335	1			T424	3		T440	1		T520	1
values[11]	319	1			T424	4		T440	1		T520	1
values[12]	355	1			T424	3		T440	1		T520	1
values[13]	305	1			T424	2		T440	1		T520	1
values[14]	246	1			T424	4		T440	1		T520	1
values[15]	251	1			T424	3		T440	1		T520	1
values[16]	254	1			T424	7		T440	1		T520	1
values[17]	213	1			T424	1		T440	1		T520	1
values[18]	268	1			T424	1		T440	1		T520	1
values[19]	322	1			T424	5		T440	1		T520	1
values[20]	336	1			T424	3		T440	1		T520	1
values[21]	311	1			T424	3		T440	1		T520	1
values[22]	259	1			T424	1		T440	1		T520	1
values[23]	252	1			T424	3		T440	1		T520	1
values[24]	230	1			T424	1		T440	1		T520	1
values[25]	244	1			T424	1		T440	1		T520	1
values[26]	260	1			T424	4		T440	1		T520	1
values[27]	264	1			T424	4		T440	1		T520	1
values[28]	243	1			T424	3		T440	1		T520	1
values[29]	264	1			T424	4		T440	1		T520	1
values[30]	264	1			T424	1		T440	1		T520	1
values[31]	233	1			T424	5		T440	1		T520	1
values[32]	224	1			T424	3		T440	1		T520	1
values[33]	246	1			T424	3		T440	1		T520	1
values[34]	260	1			T424	2		T440	1		T520	1
values[35]	228	1			T424	7		T440	1		T520	1
values[36]	228	1			T424	9		T440	1		T520	1
values[37]	232	1			T424	4		T440	1		T520	1
values[38]	195	1			T424	2		T440	1		T520	1
values[39]	188	1			T424	2		T440	1		T520	1
values[40]	237	1			T424	6		T440	1		T520	1
values[41]	253	1			T424	4		T440	1		T520	1
values[42]	192	1			T424	3		T440	1		T520	1
values[43]	259	1			T424	2		T440	1		T520	1
values[44]	255	1			T424	2		T440	1		T520	1
values[45]	202	1			T424	4		T440	1		T520	1
values[46]	193	1			T424	2		T440	1		T520	1
values[47]	253	1			T424	3		T440	1		T520	1
values[48]	181	1			T424	2		T440	1		T520	1
values[49]	243	1			T424	1		T440	1		T520	1
values[50]	216	1			T424	3		T440	1		T520	1
values[51]	220	1			T424	1		T440	1		T520	1
values[52]	221	1			T424	1		T440	1		T520	1
values[53]	236	1			T424	2		T440	1		T520	1
values[54]	221	1			T424	4		T440	1		T520	1
values[55]	209	1			T424	3		T440	1		T520	1
values[56]	218	1			T424	2		T440	1		T520	1
values[57]	183	1			T424	1		T440	1		T520	1
values[58]	195	1			T424	2		T440	1		T520	1
values[59]	231	1			T424	4		T440	1		T520	1
values[60]	208	1			T424	2		T440	1		T520	1
values[61]	182	1			T424	3		T440	1		T520	1
values[62]	135	1			T424	1		T440	1		T520	1
values[63]	151	1			T424	3		T440	1		T520	1
values[64]	188	1			T424	6		T440	1		T520	1
values[65]	150	1			T424	3		T440	1		T520	1
values[66]	186	1			T424	2		T440	1		T520	1
values[67]	146	1			T424	1		T440	1		T520	1
values[68]	97	1			T424	1		T440	1		T520	1
values[69]	113	1			T424	2		T440	1		T520	1
values[70]	98	1			T424	2		T440	1		T520	1
values[71]	114	1			T424	4		T440	1		T520	1
values[72]	117	1			T424	8		T440	1		T520	1
values[73]	100	1			T424	6		T440	1		T520	1
values[74]	93	1			T424	3		T440	1		T520	1
values[75]	101	1			T424	8		T440	1		T520	1
values[76]	89	1			T424	9		T440	1		T520	1
values[77]	80	1			T424	4		T440	1		T520	1
values[78]	81	1			T424	8		T440	1		T520	1
values[79]	81	1			T424	5		T440	1		T520	1
values[80]	97	1			T424	4		T440	1		T520	1
values[81]	75	1			T424	5		T440	1		T520	1
values[82]	102	1			T424	20		T440	1		T520	1
values[83]	92	1			T424	11		T440	1		T520	1
values[84]	91	1			T424	16		T440	1		T520	1
values[85]	107	1			T424	16		T440	1		T520	1
values[86]	115	1			T424	9		T440	1		T520	1
values[87]	87	1			T424	13		T440	1		T520	1
values[88]	75	1			T424	5		T440	1		T520	2
values[89]	77	1			T424	4		T440	1		T520	2
values[90]	91	1			T424	3		T440	1		T520	9
values[91]	101	1			T424	6		T440	1		T520	4
values[92]	108	1			T424	9		T440	1		T520	1
values[93]	120	1			T424	1		T440	1		T520	1
values[94]	106	1			T424	4		T440	1		T520	1
values[95]	94	1			T424	6		T440	1		T520	2
values[96]	105	1			T424	6		T440	1		T520	4
values[97]	93	1			T424	3		T440	1		T520	3
values[98]	96	1			T424	6		T440	1		T520	5
values[99]	111	1			T424	4		T440	1		T520	1
values[100]	108	1			T424	10		T440	1		T520	1
values[101]	79	1			T424	2		T440	1		T520	6
values[102]	74	1			T424	1		T440	1		T520	1
values[103]	87	1			T424	4		T440	1		T520	3
values[104]	98	1			T424	5		T440	1		T520	1
values[105]	86	1			T424	4		T440	1		T520	2
values[106]	83	1			T424	3		T440	1		T520	2
values[107]	111	1			T424	3		T440	1		T520	1
values[108]	79	1			T424	3		T440	2		T520	1
values[109]	95	1			T424	3		T440	1		T520	2
values[110]	66	1			T424	1		T440	1		T520	3
values[111]	65	1			T424	2		T440	1		T520	1
values[112]	76	1			T424	3		T440	1		T520	2
values[113]	93	1			T424	4		T440	1		T520	2
values[114]	100	1			T424	1		T440	1		T520	7
values[115]	95	1			T424	9		T440	1		T520	1
values[116]	80	1			T424	6		T440	1		T520	2
values[117]	81	1			T424	2		T440	1		T520	1
values[118]	90	1			T424	5		T440	1		T520	3
values[119]	98	1			T424	1		T440	1		T520	1
values[120]	80	1			T424	3		T440	1		T520	3
values[121]	85	1			T424	1		T440	1		T520	3
values[122]	83	1			T424	2		T440	1		T520	2
values[123]	80	1			T424	3		T440	1		T520	1
values[124]	63	1			T440	1		T520	2		T805	3
values[125]	88	1			T440	2		T520	4		T805	4
values[126]	134	1			T440	4		T520	3		T805	2
values[127]	834	1			T440	29		T520	38		T805	57
values[128]	6930	1			T440	307		T520	334		T805	558