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LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[5].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[5].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[5].q == 2'h2) ? 1'b0 : mio_oe[5])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T16,T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[5].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T16,T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[5].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[5].q == 2'h2) ? 1'b0 : mio_oe[5]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T17,T18 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[5].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T17,T18 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[5].q == 2'h2) ? 1'b0 : mio_oe[5])
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T12 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[5].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T12 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[6].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[6].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[6].q == 2'h2) ? 1'b0 : mio_oe[6])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T16,T12,T17 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[6].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T16,T12,T17 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[6].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[6].q == 2'h2) ? 1'b0 : mio_oe[6]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T16,T17 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[6].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T16,T17 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[6].q == 2'h2) ? 1'b0 : mio_oe[6])
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[6].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[7].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[7].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[7].q == 2'h2) ? 1'b0 : mio_oe[7])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T16,T17,T18 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[7].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T16,T17,T18 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[7].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[7].q == 2'h2) ? 1'b0 : mio_oe[7]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T16,T17,T18 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[7].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T16,T17,T18 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[7].q == 2'h2) ? 1'b0 : mio_oe[7])
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[7].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[8].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[8].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[8].q == 2'h2) ? 1'b0 : mio_oe[8])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[8].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[8].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[8].q == 2'h2) ? 1'b0 : mio_oe[8]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T13 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[8].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T13 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[8].q == 2'h2) ? 1'b0 : mio_oe[8])
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[8].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[9].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[9].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[9].q == 2'h2) ? 1'b0 : mio_oe[9])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T13 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[9].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T13 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[9].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[9].q == 2'h2) ? 1'b0 : mio_oe[9]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[9].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[9].q == 2'h2) ? 1'b0 : mio_oe[9])
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[9].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[10].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[10].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[10].q == 2'h2) ? 1'b0 : mio_oe[10])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[10].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[10].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[10].q == 2'h2) ? 1'b0 : mio_oe[10]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[10].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[10].q == 2'h2) ? 1'b0 : mio_oe[10])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[10].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[11].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[11].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[11].q == 2'h2) ? 1'b0 : mio_oe[11])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[11].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[11].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[11].q == 2'h2) ? 1'b0 : mio_oe[11]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[11].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[11].q == 2'h2) ? 1'b0 : mio_oe[11])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[11].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[12].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[12].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[12].q == 2'h2) ? 1'b0 : mio_oe[12])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[12].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[12].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[12].q == 2'h2) ? 1'b0 : mio_oe[12]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T13 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[12].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T13 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[12].q == 2'h2) ? 1'b0 : mio_oe[12])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[12].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[13].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[13].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[13].q == 2'h2) ? 1'b0 : mio_oe[13])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[13].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[13].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[13].q == 2'h2) ? 1'b0 : mio_oe[13]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T13,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[13].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T13,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[13].q == 2'h2) ? 1'b0 : mio_oe[13])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[13].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[14].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[14].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[14].q == 2'h2) ? 1'b0 : mio_oe[14])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T12,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[14].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T12,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[14].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[14].q == 2'h2) ? 1'b0 : mio_oe[14]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[14].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[14].q == 2'h2) ? 1'b0 : mio_oe[14])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[14].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[15].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[15].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[15].q == 2'h2) ? 1'b0 : mio_oe[15])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[15].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[15].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[15].q == 2'h2) ? 1'b0 : mio_oe[15]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T13 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[15].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T13 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[15].q == 2'h2) ? 1'b0 : mio_oe[15])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T12 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[15].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T12 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[16].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[16].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[16].q == 2'h2) ? 1'b0 : mio_oe[16])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T13,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[16].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T13,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[16].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[16].q == 2'h2) ? 1'b0 : mio_oe[16]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5,T12 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[16].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5,T12 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[16].q == 2'h2) ? 1'b0 : mio_oe[16])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[16].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[17].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[17].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[17].q == 2'h2) ? 1'b0 : mio_oe[17])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[17].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[17].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[17].q == 2'h2) ? 1'b0 : mio_oe[17]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T12,T13 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[17].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T12,T13 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[17].q == 2'h2) ? 1'b0 : mio_oe[17])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[17].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[18].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[18].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[18].q == 2'h2) ? 1'b0 : mio_oe[18])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[18].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[18].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[18].q == 2'h2) ? 1'b0 : mio_oe[18]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[18].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[18].q == 2'h2) ? 1'b0 : mio_oe[18])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[18].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[19].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_oe[19])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[19].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_oe[19]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_oe[19])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[20].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_oe[20])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T12 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T12 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[20].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_oe[20]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_oe[20])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[21].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_oe[21])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[21].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_oe[21]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_oe[21])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[22].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_oe[22])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T12 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T12 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[22].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_oe[22]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_oe[22])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[23].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_oe[23])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[23].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_oe[23]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_oe[23])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[24].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_oe[24])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[24].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_oe[24]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_oe[24])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[25].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_oe[25])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T13,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T13,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[25].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_oe[25]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_oe[25])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[26].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_oe[26])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[26].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_oe[26]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_oe[26])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[27].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_oe[27])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[27].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_oe[27]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_oe[27])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[28].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_oe[28])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T13,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T13,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[28].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_oe[28]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_oe[28])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[29].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_oe[29])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[29].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_oe[29]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_oe[29])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[30].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_oe[30])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[30].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_oe[30]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_oe[30])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[31].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_oe[31])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[31].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_oe[31]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_oe[31])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[32].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_oe[32])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[32].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_oe[32]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_oe[32])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[33].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_oe[33])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T12 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T12 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[33].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_oe[33]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_oe[33])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[34].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_oe[34])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[34].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_oe[34]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_oe[34])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T12,T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T12,T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[35].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_oe[35])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[35].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_oe[35]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T12,T13 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T12,T13 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_oe[35])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[36].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_oe[36])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[36].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_oe[36]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_oe[36])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[37].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'h2) ? 1'b0 : mio_oe[37])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T13,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[37].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T12,T13,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[37].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'h2) ? 1'b0 : mio_oe[37]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[37].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[37].q == 2'h2) ? 1'b0 : mio_oe[37])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[37].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[38].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[38].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_oe[38])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[38].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_oe[38]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4,T5 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_oe[38])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T12,T13 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T12,T13 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[39].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_oe[39])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[39].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_oe[39]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_oe[39])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T12 |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T12 |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[40].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_oe[40])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T12,T6 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T5,T12,T6 |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[40].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_oe[40]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 481
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_oe[40])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 481
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[41].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'h2) ? 1'b0 : mio_oe[41])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T4 |