Unified Coverage Report :: Group :: tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	3771830	1			T72	1330		T73	11		T74	126
values[2]	756869	1			T72	475		T73	12		T74	63
values[3]	110694	1			T72	23		T73	11		T75	1
values[4]	58294	1			T72	1		T73	11		T221	1
values[5]	39538	1			T73	11		T372	14		T367	53
values[6]	29726	1			T73	11		T372	14		T367	41
values[7]	24108	1			T73	11		T372	14		T367	22
values[8]	20536	1			T73	12		T372	14		T367	22
values[9]	17645	1			T73	11		T372	15		T367	17
values[10]	15933	1			T73	11		T372	14		T367	12
values[11]	14736	1			T73	11		T372	14		T367	10
values[12]	13867	1			T73	11		T372	15		T367	20
values[13]	13447	1			T73	11		T372	14		T367	18
values[14]	12819	1			T73	11		T372	14		T367	15
values[15]	12483	1			T73	12		T372	14		T367	11
values[16]	12122	1			T73	11		T372	14		T367	9
values[17]	11657	1			T73	11		T372	14		T367	8
values[18]	11030	1			T73	12		T372	14		T367	10
values[19]	10494	1			T73	11		T372	14		T367	7
values[20]	10315	1			T73	11		T372	14		T367	7
values[21]	9973	1			T73	11		T372	14		T367	4
values[22]	9820	1			T73	11		T372	14		T367	6
values[23]	9427	1			T73	11		T372	14		T367	14
values[24]	8988	1			T73	11		T372	14		T367	20
values[25]	8762	1			T73	12		T372	15		T367	17
values[26]	8326	1			T73	11		T372	14		T367	15
values[27]	8150	1			T73	12		T372	14		T367	15
values[28]	7869	1			T73	11		T372	14		T367	11
values[29]	7356	1			T73	13		T372	14		T367	8
values[30]	6919	1			T73	11		T372	14		T367	16
values[31]	6400	1			T73	11		T372	14		T367	13
values[32]	6019	1			T73	12		T372	14		T367	13
values[33]	5634	1			T73	11		T372	14		T367	17
values[34]	5248	1			T73	11		T372	14		T367	14
values[35]	5012	1			T73	11		T372	14		T367	9
values[36]	4812	1			T73	11		T372	14		T367	7
values[37]	4369	1			T73	12		T372	14		T367	8
values[38]	4090	1			T73	11		T372	14		T367	9
values[39]	3883	1			T73	11		T372	14		T367	15
values[40]	3720	1			T73	11		T372	14		T367	25
values[41]	3694	1			T73	11		T372	15		T367	10
values[42]	3625	1			T73	11		T372	14		T367	11
values[43]	3558	1			T73	11		T372	14		T367	16
values[44]	3392	1			T73	11		T372	14		T367	16
values[45]	3454	1			T73	11		T372	15		T367	36
values[46]	3430	1			T73	11		T372	15		T367	31
values[47]	3240	1			T73	11		T372	14		T367	19
values[48]	3109	1			T73	11		T372	14		T367	6
values[49]	3080	1			T73	11		T372	14		T367	6
values[50]	3058	1			T73	11		T372	16		T367	4
values[51]	3102	1			T73	11		T372	14		T367	4
values[52]	2889	1			T73	11		T372	14		T367	5
values[53]	2854	1			T73	11		T372	15		T367	4
values[54]	2903	1			T73	12		T372	14		T367	4
values[55]	2776	1			T73	11		T372	14		T367	10
values[56]	2785	1			T73	11		T372	15		T367	5
values[57]	2691	1			T73	11		T372	14		T367	13
values[58]	2669	1			T73	11		T372	15		T367	10
values[59]	2649	1			T73	13		T372	14		T367	4
values[60]	2690	1			T73	11		T372	14		T367	10
values[61]	2948	1			T73	11		T372	14		T367	6
values[62]	4594	1			T73	11		T372	14		T367	21
values[63]	18271	1			T73	157		T372	106		T367	74
values[64]	253162	1			T73	1980		T372	2532		T367	173

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	4890170	1			T72	1427		T73	1566		T74	102
values[2]	811845	1			T72	371		T73	447		T74	32
values[3]	77855	1			T72	97		T73	139		T74	2
values[4]	14289	1			T72	28		T73	40		T223	1
values[5]	5638	1			T72	7		T73	13		T372	17
values[6]	3562	1			T72	2		T73	3		T372	5
values[7]	2805	1			T73	3		T372	4		T367	13
values[8]	2215	1			T73	3		T372	3		T367	12
values[9]	1991	1			T73	3		T372	2		T367	11
values[10]	1865	1			T73	2		T372	2		T367	7
values[11]	1743	1			T73	2		T372	2		T367	7
values[12]	1568	1			T73	2		T372	2		T367	4
values[13]	1335	1			T73	2		T372	2		T367	9
values[14]	1261	1			T73	2		T372	2		T367	24
values[15]	1253	1			T73	2		T372	2		T367	19
values[16]	1209	1			T73	2		T372	2		T367	22
values[17]	1085	1			T73	2		T372	2		T367	32
values[18]	1052	1			T73	2		T372	2		T367	35
values[19]	991	1			T73	2		T372	2		T367	30
values[20]	924	1			T73	2		T372	2		T367	8
values[21]	893	1			T73	2		T372	2		T367	4
values[22]	859	1			T73	2		T372	2		T367	2
values[23]	849	1			T73	2		T372	2		T367	6
values[24]	749	1			T73	2		T372	2		T367	7
values[25]	731	1			T73	2		T372	2		T367	4
values[26]	727	1			T73	2		T372	2		T367	2
values[27]	645	1			T73	2		T372	2		T367	1
values[28]	648	1			T73	2		T372	2		T367	1
values[29]	663	1			T73	2		T372	2		T367	1
values[30]	621	1			T73	2		T372	2		T367	1
values[31]	572	1			T73	2		T372	2		T367	3
values[32]	594	1			T73	2		T372	2		T367	1
values[33]	558	1			T73	2		T372	2		T367	1
values[34]	531	1			T73	2		T372	2		T367	1
values[35]	497	1			T73	3		T372	2		T367	1
values[36]	527	1			T73	2		T372	2		T367	1
values[37]	532	1			T73	2		T372	2		T367	3
values[38]	493	1			T73	2		T372	2		T367	4
values[39]	497	1			T73	2		T372	2		T367	3
values[40]	463	1			T73	2		T372	2		T367	4
values[41]	452	1			T73	2		T372	2		T367	2
values[42]	446	1			T73	2		T372	2		T367	3
values[43]	442	1			T73	2		T372	2		T367	4
values[44]	454	1			T73	2		T372	2		T367	1
values[45]	463	1			T73	2		T372	2		T367	1
values[46]	437	1			T73	2		T372	2		T367	1
values[47]	450	1			T73	2		T372	2		T367	1
values[48]	471	1			T73	2		T372	2		T367	1
values[49]	428	1			T73	2		T372	2		T367	5
values[50]	442	1			T73	2		T372	2		T367	3
values[51]	410	1			T73	2		T372	2		T367	2
values[52]	397	1			T73	3		T372	2		T367	1
values[53]	397	1			T73	2		T372	2		T367	1
values[54]	358	1			T73	2		T372	2		T367	1
values[55]	363	1			T73	2		T372	2		T367	4
values[56]	349	1			T73	2		T372	2		T367	1
values[57]	324	1			T73	2		T372	2		T367	1
values[58]	328	1			T73	2		T372	2		T367	2
values[59]	360	1			T73	3		T372	2		T367	1
values[60]	357	1			T73	2		T372	2		T367	1
values[61]	391	1			T73	2		T372	2		T367	3
values[62]	671	1			T73	2		T372	2		T367	4
values[63]	3077	1			T73	42		T372	2		T367	31
values[64]	29545	1			T73	313		T372	429		T367	63

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	623336	1			T72	15		T73	11		T74	1
values[2]	2666217	1			T72	1327		T73	11		T74	66
values[3]	1171904	1			T72	411		T73	12		T74	43
values[4]	152793	1			T72	26		T73	11		T223	21
values[5]	79072	1			T72	1		T73	11		T384	1
values[6]	51057	1			T72	1		T73	11		T372	14
values[7]	37773	1			T73	11		T372	14		T367	82
values[8]	30219	1			T73	11		T372	14		T367	54
values[9]	24825	1			T73	11		T372	14		T367	32
values[10]	22461	1			T73	11		T372	14		T367	31
values[11]	20336	1			T73	11		T372	14		T367	20
values[12]	18527	1			T73	11		T372	14		T367	12
values[13]	17090	1			T73	11		T372	14		T367	12
values[14]	16005	1			T73	11		T372	15		T367	13
values[15]	15435	1			T73	12		T372	14		T367	19
values[16]	14927	1			T73	11		T372	14		T367	22
values[17]	14250	1			T73	11		T372	15		T367	23
values[18]	13635	1			T73	11		T372	14		T367	16
values[19]	13237	1			T73	11		T372	14		T367	9
values[20]	12667	1			T73	11		T372	14		T367	9
values[21]	12264	1			T73	11		T372	14		T367	10
values[22]	11679	1			T73	11		T372	14		T367	10
values[23]	10842	1			T73	11		T372	15		T367	6
values[24]	10429	1			T73	11		T372	14		T367	7
values[25]	10127	1			T73	11		T372	14		T367	12
values[26]	9838	1			T73	11		T372	14		T367	11
values[27]	9101	1			T73	11		T372	14		T367	4
values[28]	8552	1			T73	11		T372	14		T367	5
values[29]	8075	1			T73	11		T372	15		T367	6
values[30]	7638	1			T73	11		T372	14		T367	9
values[31]	7110	1			T73	11		T372	14		T367	7
values[32]	6531	1			T73	11		T372	14		T367	9
values[33]	6078	1			T73	11		T372	14		T367	7
values[34]	5686	1			T73	11		T372	14		T367	11
values[35]	5434	1			T73	11		T372	14		T367	6
values[36]	5072	1			T73	12		T372	14		T367	5
values[37]	4786	1			T73	11		T372	15		T367	9
values[38]	4467	1			T73	11		T372	14		T367	14
values[39]	4468	1			T73	11		T372	14		T367	8
values[40]	4180	1			T73	11		T372	14		T367	11
values[41]	4048	1			T73	11		T372	14		T367	4
values[42]	4061	1			T73	11		T372	14		T367	5
values[43]	3880	1			T73	11		T372	14		T367	6
values[44]	3816	1			T73	11		T372	14		T367	9
values[45]	3775	1			T73	12		T372	14		T367	9
values[46]	3800	1			T73	11		T372	14		T367	5
values[47]	3789	1			T73	11		T372	14		T367	9
values[48]	3643	1			T73	11		T372	15		T367	7
values[49]	3473	1			T73	11		T372	15		T367	11
values[50]	3458	1			T73	11		T372	14		T367	7
values[51]	3415	1			T73	11		T372	14		T367	9
values[52]	3254	1			T73	11		T372	14		T367	11
values[53]	3261	1			T73	11		T372	14		T367	14
values[54]	3231	1			T73	12		T372	15		T367	9
values[55]	3298	1			T73	11		T372	15		T367	8
values[56]	3095	1			T73	11		T372	14		T367	5
values[57]	3086	1			T73	11		T372	16		T367	7
values[58]	3017	1			T73	11		T372	14		T367	10
values[59]	2971	1			T73	11		T372	14		T367	10
values[60]	2976	1			T73	11		T372	14		T367	11
values[61]	3160	1			T73	11		T372	14		T367	8
values[62]	4650	1			T73	12		T372	14		T367	20
values[63]	21453	1			T73	214		T372	189		T367	55
values[64]	238296	1			T73	1791		T372	2328		T367	163