Unified Coverage Report :: Group :: chip_env_pkg::chip_alert_cg_wrap::alert_cg

Group : chip_env_pkg::chip_alert_cg_wrap::alert_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_chip_env_0.1/chip_env_cov.sv

65 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
adc_ctrl_aon_fatal_fault	100.00	1	100	1	64	64
aes_fatal_fault	100.00	1	100	1	64	64
aes_recov_ctrl_update_err	100.00	1	100	1	64	64
aon_timer_aon_fatal_fault	100.00	1	100	1	64	64
clkmgr_aon_fatal_fault	100.00	1	100	1	64	64
clkmgr_aon_recov_fault	100.00	1	100	1	64	64
csrng_fatal_alert	100.00	1	100	1	64	64
csrng_recov_alert	100.00	1	100	1	64	64
edn0_fatal_alert	100.00	1	100	1	64	64
edn0_recov_alert	100.00	1	100	1	64	64
edn1_fatal_alert	100.00	1	100	1	64	64
edn1_recov_alert	100.00	1	100	1	64	64
entropy_src_fatal_alert	100.00	1	100	1	64	64
entropy_src_recov_alert	100.00	1	100	1	64	64
flash_ctrl_fatal_err	100.00	1	100	1	64	64
flash_ctrl_fatal_prim_flash_alert	100.00	1	100	1	64	64
flash_ctrl_fatal_std_err	100.00	1	100	1	64	64
flash_ctrl_recov_err	100.00	1	100	1	64	64
flash_ctrl_recov_prim_flash_alert	100.00	1	100	1	64	64
gpio_fatal_fault	100.00	1	100	1	64	64
hmac_fatal_fault	100.00	1	100	1	64	64
i2c0_fatal_fault	100.00	1	100	1	64	64
i2c1_fatal_fault	100.00	1	100	1	64	64
i2c2_fatal_fault	100.00	1	100	1	64	64
keymgr_fatal_fault_err	100.00	1	100	1	64	64
keymgr_recov_operation_err	100.00	1	100	1	64	64
kmac_fatal_fault_err	100.00	1	100	1	64	64
kmac_recov_operation_err	100.00	1	100	1	64	64
lc_ctrl_fatal_bus_integ_error	100.00	1	100	1	64	64
lc_ctrl_fatal_prog_error	100.00	1	100	1	64	64
lc_ctrl_fatal_state_error	100.00	1	100	1	64	64
otbn_fatal	100.00	1	100	1	64	64
otbn_recov	100.00	1	100	1	64	64
otp_ctrl_fatal_bus_integ_error	100.00	1	100	1	64	64
otp_ctrl_fatal_check_error	100.00	1	100	1	64	64
otp_ctrl_fatal_macro_error	100.00	1	100	1	64	64
otp_ctrl_fatal_prim_otp_alert	100.00	1	100	1	64	64
otp_ctrl_recov_prim_otp_alert	100.00	1	100	1	64	64
pattgen_fatal_fault	100.00	1	100	1	64	64
pinmux_aon_fatal_fault	100.00	1	100	1	64	64
pwm_aon_fatal_fault	100.00	1	100	1	64	64
pwrmgr_aon_fatal_fault	100.00	1	100	1	64	64
rom_ctrl_fatal	100.00	1	100	1	64	64
rstmgr_aon_fatal_cnsty_fault	100.00	1	100	1	64	64
rstmgr_aon_fatal_fault	100.00	1	100	1	64	64
rv_core_ibex_fatal_hw_err	100.00	1	100	1	64	64
rv_core_ibex_fatal_sw_err	100.00	1	100	1	64	64
rv_core_ibex_recov_hw_err	100.00	1	100	1	64	64
rv_core_ibex_recov_sw_err	100.00	1	100	1	64	64
rv_dm_fatal_fault	100.00	1	100	1	64	64
rv_plic_fatal_fault	100.00	1	100	1	64	64
rv_timer_fatal_fault	100.00	1	100	1	64	64
sensor_ctrl_aon_fatal_alert	100.00	1	100	1	64	64
sensor_ctrl_aon_recov_alert	100.00	1	100	1	64	64
spi_device_fatal_fault	100.00	1	100	1	64	64
spi_host0_fatal_fault	100.00	1	100	1	64	64
spi_host1_fatal_fault	100.00	1	100	1	64	64
sram_ctrl_main_fatal_error	100.00	1	100	1	64	64
sram_ctrl_ret_aon_fatal_error	100.00	1	100	1	64	64
sysrst_ctrl_aon_fatal_fault	100.00	1	100	1	64	64
uart0_fatal_fault	100.00	1	100	1	64	64
uart1_fatal_fault	100.00	1	100	1	64	64
uart2_fatal_fault	100.00	1	100	1	64	64
uart3_fatal_fault	100.00	1	100	1	64	64
usbdev_fatal_fault	100.00	1	100	1	64	64

---

Group Instance : adc_ctrl_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance adc_ctrl_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance adc_ctrl_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aes_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aes_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aes_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aes_recov_ctrl_update_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aes_recov_ctrl_update_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aes_recov_ctrl_update_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aon_timer_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aon_timer_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aon_timer_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : clkmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance clkmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance clkmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : clkmgr_aon_recov_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance clkmgr_aon_recov_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance clkmgr_aon_recov_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : csrng_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance csrng_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance csrng_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : csrng_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance csrng_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance csrng_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn0_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn0_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn0_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn0_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn0_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn0_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn1_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn1_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn1_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn1_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn1_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn1_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : entropy_src_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance entropy_src_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance entropy_src_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : entropy_src_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance entropy_src_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance entropy_src_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_prim_flash_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_prim_flash_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_prim_flash_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_std_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_std_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_std_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_recov_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_recov_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_recov_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_recov_prim_flash_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_recov_prim_flash_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_recov_prim_flash_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : gpio_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance gpio_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance gpio_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : hmac_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance hmac_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance hmac_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c2_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c2_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c2_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : keymgr_fatal_fault_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance keymgr_fatal_fault_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance keymgr_fatal_fault_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : keymgr_recov_operation_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance keymgr_recov_operation_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance keymgr_recov_operation_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : kmac_fatal_fault_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance kmac_fatal_fault_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance kmac_fatal_fault_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : kmac_recov_operation_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance kmac_recov_operation_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance kmac_recov_operation_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_bus_integ_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_bus_integ_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_bus_integ_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_prog_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_prog_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_prog_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_state_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_state_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_state_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otbn_fatal

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otbn_fatal

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otbn_fatal

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otbn_recov

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otbn_recov

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otbn_recov

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_bus_integ_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_bus_integ_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_bus_integ_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_check_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_check_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_check_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_macro_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_macro_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_macro_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_prim_otp_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_prim_otp_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_prim_otp_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_recov_prim_otp_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_recov_prim_otp_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_recov_prim_otp_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pattgen_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pattgen_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pattgen_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pinmux_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pinmux_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pinmux_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pwm_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pwm_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pwm_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pwrmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pwrmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pwrmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rom_ctrl_fatal

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rom_ctrl_fatal

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rom_ctrl_fatal

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rstmgr_aon_fatal_cnsty_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rstmgr_aon_fatal_cnsty_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rstmgr_aon_fatal_cnsty_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rstmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rstmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rstmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_fatal_hw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_fatal_hw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_fatal_hw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_fatal_sw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_fatal_sw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_fatal_sw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_recov_hw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_recov_hw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_recov_hw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_recov_sw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_recov_sw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_recov_sw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_dm_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_dm_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_dm_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_plic_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_plic_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_plic_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_timer_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_timer_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_timer_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sensor_ctrl_aon_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sensor_ctrl_aon_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sensor_ctrl_aon_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sensor_ctrl_aon_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sensor_ctrl_aon_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sensor_ctrl_aon_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_device_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_device_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_device_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_host0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_host0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_host0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_host1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_host1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_host1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sram_ctrl_main_fatal_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sram_ctrl_main_fatal_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sram_ctrl_main_fatal_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sram_ctrl_ret_aon_fatal_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sram_ctrl_ret_aon_fatal_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sram_ctrl_ret_aon_fatal_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sysrst_ctrl_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sysrst_ctrl_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sysrst_ctrl_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart2_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart2_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart2_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart3_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart3_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart3_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : usbdev_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance usbdev_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance usbdev_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2549

1

T693

512

T74

1

T82

40

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

118119

1

T32

585

T57

586

T58

1452

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

188

1

T72

1

T74

1

T82

39

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2254

1

T695

519

T82

42

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1235

1

T82

52

T50

1

T751

512

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

814

1

T383

107

T690

104

T74

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

7610

1

T676

1173

T677

1725

T82

44

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

164

1

T82

37

T756

1

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

11738

1

T674

1731

T675

1735

T82

36

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

175

1

T1

2

T72

1

T82

39

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

9956

1

T49

1116

T367

1155

T757

1727

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

168

1

T72

1

T82

38

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5797

1

T72

1

T82

44

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

181

1

T82

51

T50

1

T120

33

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8757

1

T126

357

T72

1

T758

1715

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

12242

1

T204

1727

T117

1

T759

1734

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1899

1

T72

1

T82

48

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

372

1

T2

5

T294

5

T126

10

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

162

1

T82

47

T50

1

T120

25

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1205

1

T281

530

T82

40

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

10993

1

T696

1118

T760

1717

T761

1734

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6044

1

T117

2

T686

517

T224

2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2838

1

T117

1

T72

1

T264

509

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5015

1

T369

815

T117

1

T224

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

9808

1

T130

1730

T207

1088

T72

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

196

1

T223

2

T72

1

T762

2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

112424

1

T32

585

T57

586

T58

1452

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

145

1

T72

1

T82

37

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4193

1

T194

808

T195

821

T82

38

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

188

1

T82

49

T50

1

T120

27

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1821

1

T113

809

T82

45

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1082379

1

T32

585

T57

586

T58

1452

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

178

1

T763

1

T210

1

T82

49

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3103

1

T116

533

T117

1

T408

520

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

53213

1

T32

277

T57

277

T58

688

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1007

1

T113

809

T82

44

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5584

1

T118

813

T119

820

T750

820

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

175

1

T82

36

T50

1

T120

38

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1489

1

T687

510

T82

33

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3652

1

T79

824

T82

43

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2042

1

T694

812

T82

45

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

7801

1

T58

1

T170

816

T121

2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4209

1

T265

1128

T397

1734

T764

1184

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3100

1

T688

818

T689

817

T752

807

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5600

1

T57

810

T94

817

T753

524

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

29921

1

T93

344

T134

338

T226

1721

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8093

1

T234

1735

T82

53

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

111

1

T82

25

T50

1

T120

8

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

252

1

T62

1

T63

1

T117

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1229

1

T82

46

T120

24

T765

23

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

7601

1

T400

1729

T348

1721

T401

1128

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2313

1

T262

517

T74

1

T754

817

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3723

1

T150

112

T339

819

T153

160

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

10678

1

T16

69

T150

69

T17

70

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

668

1

T82

40

T199

517

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1296

1

T117

1

T224

1

T82

38

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4103

1

T102

1

T74

1

T82

49

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1902

1

T226

1722

T74

1

T82

43

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

198

1

T74

1

T82

41

T50

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4971

1

T691

523

T692

524

T755

524

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3651

1

T684

818

T117

2

T347

513

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3679

1

T32

806

T172

530

T117

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1004

1

T117

1

T685

812

T224

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

731

1

T117

1

T224

1

T82

56

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4499

1

T766

888

T82

42

T767

1