SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
82.00 | 82.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 82.19 | 82.19 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
82.19 | 82.19 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
82.19 | 82.19 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
94.74 | 90.68 | 93.54 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 140 | 85.37 |
Total Bits | 11012 | 9030 | 82.00 |
Total Bits 0->1 | 5506 | 4530 | 82.27 |
Total Bits 1->0 | 5506 | 4500 | 81.73 |
Ports | 164 | 140 | 85.37 |
Port Bits | 11012 | 9030 | 82.00 |
Port Bits 0->1 | 5506 | 4530 | 82.27 |
Port Bits 1->0 | 5506 | 4500 | 81.73 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T103,T104,T105 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T69,*T70,*T71 | Yes | T69,T70,T71 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T55,*T72,*T73 | Yes | T55,T72,T73 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T72,T74,T75 | Yes | T72,T74,T75 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T69,T76,T77 | Yes | T69,T70,T76 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T55,*T73,*T106 | Yes | T55,T73,T106 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T69,T71,T76 | Yes | T69,T71,T76 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T107,*T108,*T109 | Yes | T107,T108,T109 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T69,*T70,*T71 | Yes | T69,T70,T71 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T69,*T70,*T71 | Yes | T69,T70,T71 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T55,*T72,*T73 | Yes | T55,T72,T73 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T72,T74,T75 | Yes | T72,T74,T75 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T69,T70,T76 | Yes | T69,T70,T77 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T69,T70,T76 | Yes | T69,T70,T77 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T69,*T76,T77 | Yes | T69,T70,T76 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T110,T111,T112 | Yes | T110,T111,T112 | OUTPUT |
intr_otp_error_o | Yes | Yes | T110,T111,T112 | Yes | T110,T111,T112 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T113,T80,T82 | Yes | T113,T80,T82 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T32,T57,T58 | Yes | T32,T57,T58 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T80,T82,T115 | Yes | T80,T82,T114 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T115 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T116,T117,T80 | Yes | T116,T117,T80 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T80,T118,T119 | Yes | T80,T118,T119 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T80,T82,T50 | Yes | T80,T82,T50 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T80,T82,T114 | Yes | T82,T114,T120 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T82,T114,T120 | Yes | T80,T82,T114 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T113,T80,T82 | Yes | T113,T80,T82 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T32,T57,T58 | Yes | T32,T57,T58 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T116,T117,T80 | Yes | T116,T117,T80 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T80,T118,T119 | Yes | T80,T118,T119 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T80,T82,T50 | Yes | T80,T82,T50 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T100,T101,T121 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[0] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[10:1] | No | No | Yes | T122,T123,T124 | INPUT | |
lc_otp_vendor_test_i.ctrl[11] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[24:12] | No | No | Yes | T123,T124,T122 | INPUT | |
lc_otp_vendor_test_i.ctrl[25] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[28:26] | No | No | Yes | T122,T123,T124 | INPUT | |
lc_otp_vendor_test_i.ctrl[29] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:30] | No | No | Yes | T124,T123 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[8:0] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[9] | No | No | No | INPUT | ||
lc_otp_program_i.count[13:10] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[16:14] | No | No | No | INPUT | ||
lc_otp_program_i.count[18:17] | Yes | Yes | T2,T39,T56 | Yes | T38,T55,T73 | INPUT |
lc_otp_program_i.count[19] | No | No | No | INPUT | ||
lc_otp_program_i.count[28:20] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[29] | No | No | No | INPUT | ||
lc_otp_program_i.count[31:30] | Yes | Yes | T2,T39,T56 | Yes | T38,T55,T113 | INPUT |
lc_otp_program_i.count[32] | No | No | No | INPUT | ||
lc_otp_program_i.count[36:33] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[37] | No | No | No | INPUT | ||
lc_otp_program_i.count[43:38] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[44] | No | No | No | INPUT | ||
lc_otp_program_i.count[48:45] | Yes | Yes | *T2,*T39,*T56 | Yes | T38,T55,T113 | INPUT |
lc_otp_program_i.count[49] | No | No | No | INPUT | ||
lc_otp_program_i.count[52:50] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[53] | No | No | No | INPUT | ||
lc_otp_program_i.count[55:54] | Yes | Yes | T2,T39,T56 | Yes | T38,T55,T113 | INPUT |
lc_otp_program_i.count[57:56] | No | No | No | INPUT | ||
lc_otp_program_i.count[64:58] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[65] | No | No | No | INPUT | ||
lc_otp_program_i.count[75:66] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[76] | No | No | No | INPUT | ||
lc_otp_program_i.count[85:77] | Yes | Yes | *T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT |
lc_otp_program_i.count[86] | No | No | No | INPUT | ||
lc_otp_program_i.count[87] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[88] | No | No | No | INPUT | ||
lc_otp_program_i.count[89] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[91:90] | No | No | No | INPUT | ||
lc_otp_program_i.count[96:92] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[97] | No | No | No | INPUT | ||
lc_otp_program_i.count[98] | Yes | Yes | *T113 | Yes | T113 | INPUT |
lc_otp_program_i.count[99] | No | No | No | INPUT | ||
lc_otp_program_i.count[102:100] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[104:103] | No | No | No | INPUT | ||
lc_otp_program_i.count[118:105] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[119] | No | No | No | INPUT | ||
lc_otp_program_i.count[120] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[121] | No | No | No | INPUT | ||
lc_otp_program_i.count[131:122] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[132] | No | No | No | INPUT | ||
lc_otp_program_i.count[140:133] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[141] | No | No | No | INPUT | ||
lc_otp_program_i.count[151:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[152] | No | No | No | INPUT | ||
lc_otp_program_i.count[154:153] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[155] | No | No | No | INPUT | ||
lc_otp_program_i.count[156] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[157] | No | No | No | INPUT | ||
lc_otp_program_i.count[163:158] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[164] | No | No | No | INPUT | ||
lc_otp_program_i.count[170:165] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[171] | No | No | No | INPUT | ||
lc_otp_program_i.count[175:172] | Yes | Yes | *T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT |
lc_otp_program_i.count[176] | No | No | No | INPUT | ||
lc_otp_program_i.count[180:177] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[182:181] | No | No | No | INPUT | ||
lc_otp_program_i.count[203:183] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[206:204] | No | No | No | INPUT | ||
lc_otp_program_i.count[216:207] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[217] | No | No | No | INPUT | ||
lc_otp_program_i.count[219:218] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[220] | No | No | No | INPUT | ||
lc_otp_program_i.count[225:221] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[226] | No | No | No | INPUT | ||
lc_otp_program_i.count[237:227] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[238] | No | No | No | INPUT | ||
lc_otp_program_i.count[245:239] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[246] | No | No | No | INPUT | ||
lc_otp_program_i.count[248:247] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[249] | No | No | No | INPUT | ||
lc_otp_program_i.count[254:250] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[256:255] | No | No | No | INPUT | ||
lc_otp_program_i.count[257] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[258] | No | No | No | INPUT | ||
lc_otp_program_i.count[269:259] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[270] | No | No | No | INPUT | ||
lc_otp_program_i.count[276:271] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[277] | No | No | No | INPUT | ||
lc_otp_program_i.count[280:278] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[281] | No | No | No | INPUT | ||
lc_otp_program_i.count[282] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[283] | No | No | No | INPUT | ||
lc_otp_program_i.count[291:284] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[292] | No | No | No | INPUT | ||
lc_otp_program_i.count[293] | Yes | Yes | *T113 | Yes | T113 | INPUT |
lc_otp_program_i.count[294] | No | No | No | INPUT | ||
lc_otp_program_i.count[296:295] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[297] | No | No | No | INPUT | ||
lc_otp_program_i.count[302:298] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[303] | No | No | No | INPUT | ||
lc_otp_program_i.count[313:304] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[314] | No | No | No | INPUT | ||
lc_otp_program_i.count[318:315] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[319] | No | No | No | INPUT | ||
lc_otp_program_i.count[327:320] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[329:328] | No | No | No | INPUT | ||
lc_otp_program_i.count[333:330] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[334] | No | No | No | INPUT | ||
lc_otp_program_i.count[338:335] | Yes | Yes | T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT |
lc_otp_program_i.count[339] | No | No | No | INPUT | ||
lc_otp_program_i.count[340] | Yes | Yes | *T113 | Yes | T113 | INPUT |
lc_otp_program_i.count[341] | No | No | No | INPUT | ||
lc_otp_program_i.count[350:342] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[351] | No | No | No | INPUT | ||
lc_otp_program_i.count[358:352] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[359] | No | No | No | INPUT | ||
lc_otp_program_i.count[361:360] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[362] | No | No | No | INPUT | ||
lc_otp_program_i.count[363] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[364] | No | No | No | INPUT | ||
lc_otp_program_i.count[365] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT |
lc_otp_program_i.count[366] | No | No | No | INPUT | ||
lc_otp_program_i.count[370:367] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.count[371] | No | No | No | INPUT | ||
lc_otp_program_i.count[374:372] | Yes | Yes | *T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT |
lc_otp_program_i.count[375] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:376] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[9:0] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[10] | No | No | No | INPUT | ||
lc_otp_program_i.state[24:11] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[25] | No | No | No | INPUT | ||
lc_otp_program_i.state[28:26] | Yes | Yes | T113 | Yes | T113 | INPUT |
lc_otp_program_i.state[29] | No | No | No | INPUT | ||
lc_otp_program_i.state[41:30] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[42] | No | No | No | INPUT | ||
lc_otp_program_i.state[54:43] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[56:55] | No | No | No | INPUT | ||
lc_otp_program_i.state[58:57] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[59] | No | No | No | INPUT | ||
lc_otp_program_i.state[67:60] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[68] | No | No | No | INPUT | ||
lc_otp_program_i.state[99:69] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT |
lc_otp_program_i.state[100] | No | No | No | INPUT | ||
lc_otp_program_i.state[108:101] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[110:109] | No | No | No | INPUT | ||
lc_otp_program_i.state[112:111] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT |
lc_otp_program_i.state[113] | No | No | No | INPUT | ||
lc_otp_program_i.state[116:114] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[117] | No | No | No | INPUT | ||
lc_otp_program_i.state[127:118] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT |
lc_otp_program_i.state[128] | No | No | No | INPUT | ||
lc_otp_program_i.state[138:129] | Yes | Yes | *T113,*T2,*T39 | Yes | T113,T5,T54 | INPUT |
lc_otp_program_i.state[139] | No | No | No | INPUT | ||
lc_otp_program_i.state[145:140] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[146] | No | No | No | INPUT | ||
lc_otp_program_i.state[148:147] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[149] | No | No | No | INPUT | ||
lc_otp_program_i.state[154:150] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[155] | No | No | No | INPUT | ||
lc_otp_program_i.state[159:156] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[160] | No | No | No | INPUT | ||
lc_otp_program_i.state[168:161] | Yes | Yes | *T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT |
lc_otp_program_i.state[169] | No | No | No | INPUT | ||
lc_otp_program_i.state[178:170] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT |
lc_otp_program_i.state[179] | No | No | No | INPUT | ||
lc_otp_program_i.state[188:180] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[189] | No | No | No | INPUT | ||
lc_otp_program_i.state[202:190] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT |
lc_otp_program_i.state[204:203] | No | No | No | INPUT | ||
lc_otp_program_i.state[205] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[206] | No | No | No | INPUT | ||
lc_otp_program_i.state[207] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[209:208] | No | No | No | INPUT | ||
lc_otp_program_i.state[211:210] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[212] | No | No | No | INPUT | ||
lc_otp_program_i.state[215:213] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT |
lc_otp_program_i.state[217:216] | No | No | No | INPUT | ||
lc_otp_program_i.state[221:218] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[222] | No | No | No | INPUT | ||
lc_otp_program_i.state[223] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT |
lc_otp_program_i.state[224] | No | No | No | INPUT | ||
lc_otp_program_i.state[239:225] | Yes | Yes | *T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT |
lc_otp_program_i.state[240] | No | No | No | INPUT | ||
lc_otp_program_i.state[246:241] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[247] | No | No | No | INPUT | ||
lc_otp_program_i.state[248] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T6,T54 | INPUT |
lc_otp_program_i.state[249] | No | No | No | INPUT | ||
lc_otp_program_i.state[250] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[251] | No | No | No | INPUT | ||
lc_otp_program_i.state[257:252] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[258] | No | No | No | INPUT | ||
lc_otp_program_i.state[264:259] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[265] | No | No | No | INPUT | ||
lc_otp_program_i.state[269:266] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[270] | No | No | No | INPUT | ||
lc_otp_program_i.state[275:271] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[276] | No | No | No | INPUT | ||
lc_otp_program_i.state[282:277] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[284:283] | No | No | No | INPUT | ||
lc_otp_program_i.state[294:285] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[295] | No | No | No | INPUT | ||
lc_otp_program_i.state[304:296] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[305] | No | No | No | INPUT | ||
lc_otp_program_i.state[308:306] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT |
lc_otp_program_i.state[309] | No | No | No | INPUT | ||
lc_otp_program_i.state[311:310] | Yes | Yes | T2,T39,T5 | Yes | T5,T6,T54 | INPUT |
lc_otp_program_i.state[312] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:313] | Yes | Yes | T2,T39,T5 | Yes | T5,T6,T54 | INPUT |
lc_otp_program_i.req | Yes | Yes | T5,T56,T54 | Yes | T5,T56,T54 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T5,T56,T54 | Yes | T5,T56,T54 | OUTPUT |
lc_otp_program_o.err | No | No | No | OUTPUT | ||
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T32,T57,T58 | Yes | T32,T57,T58 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T5,T54,T55 | Yes | T5,T56,T54 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T3,T32,T4 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T126,T127,T128 | Yes | T107,T109,T129 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T2,T39 | Yes | T62,T63,T130 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T2,T32 | Yes | T32,T107,T63 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T126,T127,T128 | Yes | T107,T109,T129 | OUTPUT |
otp_lc_data_o.count[8:0] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[9] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[13:10] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[16:14] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[18:17] | Yes | Yes | T2,T39,T56 | Yes | T38,T55,T73 | OUTPUT |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[28:20] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[29] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[31:30] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
otp_lc_data_o.count[32] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[36:33] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[37] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[43:38] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[44] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[48:45] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T3,T32 | OUTPUT |
otp_lc_data_o.count[49] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[52:50] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[53] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[55:54] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
otp_lc_data_o.count[57:56] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[64:58] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[65] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[75:66] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[85:77] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[86] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[87] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[88] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[89] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[91:90] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[96:92] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[97] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[98] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[102:100] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[104:103] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[118:105] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[120] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[131:122] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[140:133] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[151:142] | Yes | Yes | *T5,*T54,*T131 | Yes | T5,T54,T131 | OUTPUT |
otp_lc_data_o.count[152] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[154:153] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[156] | Yes | Yes | *T5,*T131,*T132 | Yes | T5,T54,T131 | OUTPUT |
otp_lc_data_o.count[157] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[163:158] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[164] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[170:165] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[171] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[175:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[176] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[180:177] | Yes | Yes | *T131,*T132,*T133 | Yes | T5,T131,T132 | OUTPUT |
otp_lc_data_o.count[182:181] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[203:183] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[206:204] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[216:207] | Yes | Yes | *T131,*T132,*T133 | Yes | T131,T132,T133 | OUTPUT |
otp_lc_data_o.count[217] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[219:218] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[220] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[225:221] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[237:227] | Yes | Yes | *T131,*T132,*T133 | Yes | T131,T132,T133 | OUTPUT |
otp_lc_data_o.count[238] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[245:239] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[246] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[248:247] | Yes | Yes | *T131,*T132,*T133 | Yes | T131,T132,T133 | OUTPUT |
otp_lc_data_o.count[249] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[254:250] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[256:255] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[257] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[258] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[269:259] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[270] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[276:271] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[280:278] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[282] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[283] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[291:284] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[293] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[294] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[296:295] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[297] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[302:298] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[303] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[313:304] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[314] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[318:315] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[319] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[327:320] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[329:328] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[333:330] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[338:335] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[339] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[340] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[341] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350:342] | Yes | Yes | *T131,*T132,*T133 | Yes | T131,T132,T133 | OUTPUT |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[358:352] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[359] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[361:360] | Yes | Yes | T131,T132,T133 | Yes | T131,T132,T133 | OUTPUT |
otp_lc_data_o.count[362] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[363] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[364] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[365] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[366] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[370:367] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.count[371] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[374:372] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.count[375] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:376] | Yes | Yes | T56,T125,T55 | Yes | T55,T73,T127 | OUTPUT |
otp_lc_data_o.state[9:0] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[10] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[24:11] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[25] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[28:26] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.state[29] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[41:30] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[42] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[54:43] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[56:55] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[58:57] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[59] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[67:60] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[99:69] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T3,T32 | OUTPUT |
otp_lc_data_o.state[100] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[108:101] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[110:109] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[112:111] | Yes | Yes | *T2,*T39,T5 | Yes | T5,T54,T38 | OUTPUT |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[116:114] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT |
otp_lc_data_o.state[117] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[127:118] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | OUTPUT |
otp_lc_data_o.state[128] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[138:129] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.state[139] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[145:140] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[146] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[148:147] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[154:150] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[159:156] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[160] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[168:161] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.state[169] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[178:170] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | OUTPUT |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[188:180] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[202:190] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | OUTPUT |
otp_lc_data_o.state[204:203] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[205] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[206] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[207] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT |
otp_lc_data_o.state[209:208] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[211:210] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT |
otp_lc_data_o.state[212] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[215:213] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
otp_lc_data_o.state[217:216] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[221:218] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT |
otp_lc_data_o.state[222] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[223] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | OUTPUT |
otp_lc_data_o.state[224] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[239:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_lc_data_o.state[240] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[246:241] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[247] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[248] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T6,T54 | OUTPUT |
otp_lc_data_o.state[249] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[250] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[251] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[257:252] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT |
otp_lc_data_o.state[258] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[264:259] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT |
otp_lc_data_o.state[265] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[269:266] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[275:271] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[276] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[282:277] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT |
otp_lc_data_o.state[284:283] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[294:285] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[295] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[304:296] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT |
otp_lc_data_o.state[305] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[308:306] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[311:310] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
otp_lc_data_o.state[312] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:313] | Yes | Yes | T2,T39,T5 | Yes | T5,T6,T54 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T32,T57,T58 | Yes | T32,T57,T58 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T126,T127,T128 | Yes | T107,T109,T129 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T84,T85 | Yes | T62,T63,T101 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T126,T127,T128 | Yes | T107,T109,T129 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T3,T32 | Yes | T3,T32,T4 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T39,T4,T6 | Yes | T39,T4,T6 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T134,T135,T136 | Yes | T134,T135,T136 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T137,T138,T139 | Yes | T137,T138,T139 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T39,T4,T6 | Yes | T39,T4,T6 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T134,T135,T136 | Yes | T134,T135,T136 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T137,T138,T139 | Yes | T137,T138,T139 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T39,T4,T103 | Yes | T39,T4,T103 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T39,T4,T103 | Yes | T39,T4,T103 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T5,T57,T58 | Yes | T39,T84,T5 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[2:1] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[4:3] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[7:5] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[9:8] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[10] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[15:11] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[16] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[19:17] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[22:21] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[23] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[25:24] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[28:26] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[30:29] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[33:31] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[34] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[35] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[36] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[38:37] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[39] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[41:40] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[43:42] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[44] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[48:45] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[50:49] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[58:51] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[61:59] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[63:62] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[68:64] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[71:69] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[72] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[74] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[75] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[78:76] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[79] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[81] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[85:82] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[87:86] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[89:88] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[90] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[91] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[94:92] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[96:95] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[98:97] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[102:99] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[103] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[105:104] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[106] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[109:107] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[110] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[111] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[112] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[113] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[114] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[117:115] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[118] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[119] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[120] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[121] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[123:122] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[124] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[125] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[126] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[127] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[128] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[129] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[132:130] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[135:133] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[140:136] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[142:141] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[144:143] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[147:145] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[150:148] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[153:151] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[154] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[157:155] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[159:158] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[165:160] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[166] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[167] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[169:168] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[170] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[171] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[172] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[174:173] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[176:175] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[177] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[179:178] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[182:180] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[184:183] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[185] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[188:186] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[189] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[194:190] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[195] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[196] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[201:197] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[204:202] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[206:205] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[207] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[209:208] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[210] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[211] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[212] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[214:213] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[215] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[219:216] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[220] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[225:221] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[227:226] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[228] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[229] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[230] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[233:231] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[234] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[235] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[237:236] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[238] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[240:239] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[244:241] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[247:245] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[248] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[251:249] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[252] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[253] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[254] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T2,T32,T39 | Yes | T32,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[48:0] | Yes | Yes | *T3,*T32,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[49] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[50] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[52:51] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[61:53] | Yes | Yes | *T4,*T6,*T38 | Yes | T39,T4,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[62] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63] | Yes | Yes | T3,T32,T5 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T7,T8,T9 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 140 | 87.50 |
Total Bits | 10986 | 9029 | 82.19 |
Total Bits 0->1 | 5493 | 4529 | 82.45 |
Total Bits 1->0 | 5493 | 4500 | 81.92 |
Ports | 160 | 140 | 87.50 |
Port Bits | 10986 | 9029 | 82.19 |
Port Bits 0->1 | 5493 | 4529 | 82.45 |
Port Bits 1->0 | 5493 | 4500 | 81.92 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T103,T104,T105 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T69,*T70,*T71 | Yes | T69,T70,T71 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T55,*T72,*T73 | Yes | T55,T72,T73 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T72,T74,T75 | Yes | T72,T74,T75 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T69,T76,T77 | Yes | T69,T70,T76 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T55,*T73,*T106 | Yes | T55,T73,T106 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T69,T71,T76 | Yes | T69,T71,T76 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T107,*T108,*T109 | Yes | T107,T108,T109 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T69,*T70,*T71 | Yes | T69,T70,T71 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T69,*T70,*T71 | Yes | T69,T70,T71 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T55,*T72,*T73 | Yes | T55,T72,T73 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T72,T74,T75 | Yes | T72,T74,T75 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T69,T70,T76 | Yes | T69,T70,T77 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T69,T70,T76 | Yes | T69,T70,T77 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T69,*T76,T77 | Yes | T69,T70,T76 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T69,T70,T71 | Yes | T69,T70,T71 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T110,T111,T112 | Yes | T110,T111,T112 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T110,T111,T112 | Yes | T110,T111,T112 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T113,T80,T82 | Yes | T113,T80,T82 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T32,T57,T58 | Yes | T32,T57,T58 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T80,T82,T115 | Yes | T80,T82,T114 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T115 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T116,T117,T80 | Yes | T116,T117,T80 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T80,T118,T119 | Yes | T80,T118,T119 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T80,T82,T114 | Yes | T80,T82,T114 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T80,T82,T50 | Yes | T80,T82,T50 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T80,T82,T114 | Yes | T82,T114,T120 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T82,T114,T120 | Yes | T80,T82,T114 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T113,T80,T82 | Yes | T113,T80,T82 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T32,T57,T58 | Yes | T32,T57,T58 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T116,T117,T80 | Yes | T116,T117,T80 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T80,T118,T119 | Yes | T80,T118,T119 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T80,T82,T50 | Yes | T80,T82,T50 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T100,T101,T121 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[0] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[10:1] | No | No | Yes | T122,T123,T124 | INPUT | ||
lc_otp_vendor_test_i.ctrl[11] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[24:12] | No | No | Yes | T123,T124,T122 | INPUT | ||
lc_otp_vendor_test_i.ctrl[25] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[28:26] | No | No | Yes | T122,T123,T124 | INPUT | ||
lc_otp_vendor_test_i.ctrl[29] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:30] | No | No | Yes | T124,T123 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[8:0] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[9] | No | No | No | INPUT | |||
lc_otp_program_i.count[13:10] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[16:14] | No | No | No | INPUT | |||
lc_otp_program_i.count[18:17] | Yes | Yes | T2,T39,T56 | Yes | T38,T55,T73 | INPUT | |
lc_otp_program_i.count[19] | No | No | No | INPUT | |||
lc_otp_program_i.count[28:20] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[29] | No | No | No | INPUT | |||
lc_otp_program_i.count[31:30] | Yes | Yes | T2,T39,T56 | Yes | T38,T55,T113 | INPUT | |
lc_otp_program_i.count[32] | No | No | No | INPUT | |||
lc_otp_program_i.count[36:33] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[37] | No | No | No | INPUT | |||
lc_otp_program_i.count[43:38] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[44] | No | No | No | INPUT | |||
lc_otp_program_i.count[48:45] | Yes | Yes | *T2,*T39,*T56 | Yes | T38,T55,T113 | INPUT | |
lc_otp_program_i.count[49] | No | No | No | INPUT | |||
lc_otp_program_i.count[52:50] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[53] | No | No | No | INPUT | |||
lc_otp_program_i.count[55:54] | Yes | Yes | T2,T39,T56 | Yes | T38,T55,T113 | INPUT | |
lc_otp_program_i.count[57:56] | No | No | No | INPUT | |||
lc_otp_program_i.count[64:58] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[65] | No | No | No | INPUT | |||
lc_otp_program_i.count[75:66] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[76] | No | No | No | INPUT | |||
lc_otp_program_i.count[85:77] | Yes | Yes | *T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT | |
lc_otp_program_i.count[86] | No | No | No | INPUT | |||
lc_otp_program_i.count[87] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[88] | No | No | No | INPUT | |||
lc_otp_program_i.count[89] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[91:90] | No | No | No | INPUT | |||
lc_otp_program_i.count[96:92] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[97] | No | No | No | INPUT | |||
lc_otp_program_i.count[98] | Yes | Yes | *T113 | Yes | T113 | INPUT | |
lc_otp_program_i.count[99] | No | No | No | INPUT | |||
lc_otp_program_i.count[102:100] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[104:103] | No | No | No | INPUT | |||
lc_otp_program_i.count[118:105] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[119] | No | No | No | INPUT | |||
lc_otp_program_i.count[120] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[121] | No | No | No | INPUT | |||
lc_otp_program_i.count[131:122] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[132] | No | No | No | INPUT | |||
lc_otp_program_i.count[140:133] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[141] | No | No | No | INPUT | |||
lc_otp_program_i.count[151:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[152] | No | No | No | INPUT | |||
lc_otp_program_i.count[154:153] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[155] | No | No | No | INPUT | |||
lc_otp_program_i.count[156] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[157] | No | No | No | INPUT | |||
lc_otp_program_i.count[163:158] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[164] | No | No | No | INPUT | |||
lc_otp_program_i.count[170:165] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[171] | No | No | No | INPUT | |||
lc_otp_program_i.count[175:172] | Yes | Yes | *T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT | |
lc_otp_program_i.count[176] | No | No | No | INPUT | |||
lc_otp_program_i.count[180:177] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[182:181] | No | No | No | INPUT | |||
lc_otp_program_i.count[203:183] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[206:204] | No | No | No | INPUT | |||
lc_otp_program_i.count[216:207] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[217] | No | No | No | INPUT | |||
lc_otp_program_i.count[219:218] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[220] | No | No | No | INPUT | |||
lc_otp_program_i.count[225:221] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[226] | No | No | No | INPUT | |||
lc_otp_program_i.count[237:227] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[238] | No | No | No | INPUT | |||
lc_otp_program_i.count[245:239] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[246] | No | No | No | INPUT | |||
lc_otp_program_i.count[248:247] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[249] | No | No | No | INPUT | |||
lc_otp_program_i.count[254:250] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[256:255] | No | No | No | INPUT | |||
lc_otp_program_i.count[257] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[258] | No | No | No | INPUT | |||
lc_otp_program_i.count[269:259] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[270] | No | No | No | INPUT | |||
lc_otp_program_i.count[276:271] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[277] | No | No | No | INPUT | |||
lc_otp_program_i.count[280:278] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[281] | No | No | No | INPUT | |||
lc_otp_program_i.count[282] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[283] | No | No | No | INPUT | |||
lc_otp_program_i.count[291:284] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[292] | No | No | No | INPUT | |||
lc_otp_program_i.count[293] | Yes | Yes | *T113 | Yes | T113 | INPUT | |
lc_otp_program_i.count[294] | No | No | No | INPUT | |||
lc_otp_program_i.count[296:295] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[297] | No | No | No | INPUT | |||
lc_otp_program_i.count[302:298] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[303] | No | No | No | INPUT | |||
lc_otp_program_i.count[313:304] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[314] | No | No | No | INPUT | |||
lc_otp_program_i.count[318:315] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[319] | No | No | No | INPUT | |||
lc_otp_program_i.count[327:320] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[329:328] | No | No | No | INPUT | |||
lc_otp_program_i.count[333:330] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[334] | No | No | No | INPUT | |||
lc_otp_program_i.count[338:335] | Yes | Yes | T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT | |
lc_otp_program_i.count[339] | No | No | No | INPUT | |||
lc_otp_program_i.count[340] | Yes | Yes | *T113 | Yes | T113 | INPUT | |
lc_otp_program_i.count[341] | No | No | No | INPUT | |||
lc_otp_program_i.count[350:342] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[351] | No | No | No | INPUT | |||
lc_otp_program_i.count[358:352] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[359] | No | No | No | INPUT | |||
lc_otp_program_i.count[361:360] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[362] | No | No | No | INPUT | |||
lc_otp_program_i.count[363] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[364] | No | No | No | INPUT | |||
lc_otp_program_i.count[365] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | INPUT | |
lc_otp_program_i.count[366] | No | No | No | INPUT | |||
lc_otp_program_i.count[370:367] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.count[371] | No | No | No | INPUT | |||
lc_otp_program_i.count[374:372] | Yes | Yes | *T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT | |
lc_otp_program_i.count[375] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:376] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[9:0] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[10] | No | No | No | INPUT | |||
lc_otp_program_i.state[24:11] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[25] | No | No | No | INPUT | |||
lc_otp_program_i.state[28:26] | Yes | Yes | T113 | Yes | T113 | INPUT | |
lc_otp_program_i.state[29] | No | No | No | INPUT | |||
lc_otp_program_i.state[41:30] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[42] | No | No | No | INPUT | |||
lc_otp_program_i.state[54:43] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[56:55] | No | No | No | INPUT | |||
lc_otp_program_i.state[58:57] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[59] | No | No | No | INPUT | |||
lc_otp_program_i.state[67:60] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[68] | No | No | No | INPUT | |||
lc_otp_program_i.state[99:69] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT | |
lc_otp_program_i.state[100] | No | No | No | INPUT | |||
lc_otp_program_i.state[108:101] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[110:109] | No | No | No | INPUT | |||
lc_otp_program_i.state[112:111] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT | |
lc_otp_program_i.state[113] | No | No | No | INPUT | |||
lc_otp_program_i.state[116:114] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[117] | No | No | No | INPUT | |||
lc_otp_program_i.state[127:118] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT | |
lc_otp_program_i.state[128] | No | No | No | INPUT | |||
lc_otp_program_i.state[138:129] | Yes | Yes | *T113,*T2,*T39 | Yes | T113,T5,T54 | INPUT | |
lc_otp_program_i.state[139] | No | No | No | INPUT | |||
lc_otp_program_i.state[145:140] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[146] | No | No | No | INPUT | |||
lc_otp_program_i.state[148:147] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[149] | No | No | No | INPUT | |||
lc_otp_program_i.state[154:150] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[155] | No | No | No | INPUT | |||
lc_otp_program_i.state[159:156] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[160] | No | No | No | INPUT | |||
lc_otp_program_i.state[168:161] | Yes | Yes | *T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT | |
lc_otp_program_i.state[169] | No | No | No | INPUT | |||
lc_otp_program_i.state[178:170] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT | |
lc_otp_program_i.state[179] | No | No | No | INPUT | |||
lc_otp_program_i.state[188:180] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[189] | No | No | No | INPUT | |||
lc_otp_program_i.state[202:190] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT | |
lc_otp_program_i.state[204:203] | No | No | No | INPUT | |||
lc_otp_program_i.state[205] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[206] | No | No | No | INPUT | |||
lc_otp_program_i.state[207] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[209:208] | No | No | No | INPUT | |||
lc_otp_program_i.state[211:210] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[212] | No | No | No | INPUT | |||
lc_otp_program_i.state[215:213] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT | |
lc_otp_program_i.state[217:216] | No | No | No | INPUT | |||
lc_otp_program_i.state[221:218] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[222] | No | No | No | INPUT | |||
lc_otp_program_i.state[223] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | INPUT | |
lc_otp_program_i.state[224] | No | No | No | INPUT | |||
lc_otp_program_i.state[239:225] | Yes | Yes | *T113,*T56,*T125 | Yes | T113,T56,T125 | INPUT | |
lc_otp_program_i.state[240] | No | No | No | INPUT | |||
lc_otp_program_i.state[246:241] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[247] | No | No | No | INPUT | |||
lc_otp_program_i.state[248] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T6,T54 | INPUT | |
lc_otp_program_i.state[249] | No | No | No | INPUT | |||
lc_otp_program_i.state[250] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[251] | No | No | No | INPUT | |||
lc_otp_program_i.state[257:252] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[258] | No | No | No | INPUT | |||
lc_otp_program_i.state[264:259] | Yes | Yes | T56,T125,T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[265] | No | No | No | INPUT | |||
lc_otp_program_i.state[269:266] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[270] | No | No | No | INPUT | |||
lc_otp_program_i.state[275:271] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[276] | No | No | No | INPUT | |||
lc_otp_program_i.state[282:277] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[284:283] | No | No | No | INPUT | |||
lc_otp_program_i.state[294:285] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[295] | No | No | No | INPUT | |||
lc_otp_program_i.state[304:296] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[305] | No | No | No | INPUT | |||
lc_otp_program_i.state[308:306] | Yes | Yes | *T56,*T125,*T55 | Yes | T56,T125,T55 | INPUT | |
lc_otp_program_i.state[309] | No | No | No | INPUT | |||
lc_otp_program_i.state[311:310] | Yes | Yes | T2,T39,T5 | Yes | T5,T6,T54 | INPUT | |
lc_otp_program_i.state[312] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:313] | Yes | Yes | T2,T39,T5 | Yes | T5,T6,T54 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T5,T56,T54 | Yes | T5,T56,T54 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T5,T56,T54 | Yes | T5,T56,T54 | OUTPUT | |
lc_otp_program_o.err | No | No | No | OUTPUT | |||
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T32,T57,T58 | Yes | T32,T57,T58 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T5,T54,T55 | Yes | T5,T56,T54 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T3,T32,T4 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T126,T127,T128 | Yes | T107,T109,T129 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T2,T39 | Yes | T62,T63,T130 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T2,T32 | Yes | T32,T107,T63 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T126,T127,T128 | Yes | T107,T109,T129 | OUTPUT | |
otp_lc_data_o.count[8:0] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[9] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[13:10] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[16:14] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[18:17] | Yes | Yes | T2,T39,T56 | Yes | T38,T55,T73 | OUTPUT | |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[28:20] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[29] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[31:30] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
otp_lc_data_o.count[32] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[36:33] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[37] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[43:38] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[44] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[48:45] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T3,T32 | OUTPUT | |
otp_lc_data_o.count[49] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[52:50] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[53] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[55:54] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
otp_lc_data_o.count[57:56] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[64:58] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[65] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[75:66] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[85:77] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[86] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[87] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[88] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[89] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[91:90] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[96:92] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[97] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[98] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[102:100] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[104:103] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[118:105] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[120] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[131:122] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[140:133] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[151:142] | Yes | Yes | *T5,*T54,*T131 | Yes | T5,T54,T131 | OUTPUT | |
otp_lc_data_o.count[152] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[154:153] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[156] | Yes | Yes | *T5,*T131,*T132 | Yes | T5,T54,T131 | OUTPUT | |
otp_lc_data_o.count[157] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[163:158] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[164] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[170:165] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[171] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[175:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[176] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[180:177] | Yes | Yes | *T131,*T132,*T133 | Yes | T5,T131,T132 | OUTPUT | |
otp_lc_data_o.count[182:181] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[203:183] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[206:204] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[216:207] | Yes | Yes | *T131,*T132,*T133 | Yes | T131,T132,T133 | OUTPUT | |
otp_lc_data_o.count[217] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[219:218] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[220] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[225:221] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[237:227] | Yes | Yes | *T131,*T132,*T133 | Yes | T131,T132,T133 | OUTPUT | |
otp_lc_data_o.count[238] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[245:239] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[246] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[248:247] | Yes | Yes | *T131,*T132,*T133 | Yes | T131,T132,T133 | OUTPUT | |
otp_lc_data_o.count[249] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[254:250] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[256:255] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[257] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[258] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[269:259] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[270] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[276:271] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[280:278] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[282] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[283] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[291:284] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[293] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[294] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[296:295] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[297] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[302:298] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[303] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[313:304] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[314] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[318:315] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[319] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[327:320] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[329:328] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[333:330] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[338:335] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[339] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[340] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[341] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350:342] | Yes | Yes | *T131,*T132,*T133 | Yes | T131,T132,T133 | OUTPUT | |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[358:352] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[359] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[361:360] | Yes | Yes | T131,T132,T133 | Yes | T131,T132,T133 | OUTPUT | |
otp_lc_data_o.count[362] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[363] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[364] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[365] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[366] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[370:367] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.count[371] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[374:372] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.count[375] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:376] | Yes | Yes | T56,T125,T55 | Yes | T55,T73,T127 | OUTPUT | |
otp_lc_data_o.state[9:0] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[10] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[24:11] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[25] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[28:26] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.state[29] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[41:30] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[42] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[54:43] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[56:55] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[58:57] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[59] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[67:60] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT | |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[99:69] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T3,T32 | OUTPUT | |
otp_lc_data_o.state[100] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[108:101] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[110:109] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[112:111] | Yes | Yes | *T2,*T39,T5 | Yes | T5,T54,T38 | OUTPUT | |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[116:114] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT | |
otp_lc_data_o.state[117] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[127:118] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | OUTPUT | |
otp_lc_data_o.state[128] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[138:129] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.state[139] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[145:140] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[146] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[148:147] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT | |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[154:150] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[159:156] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[160] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[168:161] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.state[169] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[178:170] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | OUTPUT | |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[188:180] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[202:190] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | OUTPUT | |
otp_lc_data_o.state[204:203] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[205] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[206] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[207] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT | |
otp_lc_data_o.state[209:208] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[211:210] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT | |
otp_lc_data_o.state[212] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[215:213] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
otp_lc_data_o.state[217:216] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[221:218] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT | |
otp_lc_data_o.state[222] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[223] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T54,T38 | OUTPUT | |
otp_lc_data_o.state[224] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[239:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_lc_data_o.state[240] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[246:241] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[247] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[248] | Yes | Yes | *T2,*T39,*T5 | Yes | T5,T6,T54 | OUTPUT | |
otp_lc_data_o.state[249] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[250] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[251] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[257:252] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT | |
otp_lc_data_o.state[258] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[264:259] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT | |
otp_lc_data_o.state[265] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[269:266] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[275:271] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[276] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[282:277] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT | |
otp_lc_data_o.state[284:283] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[294:285] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[295] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[304:296] | Yes | Yes | *T56,*T125,*T55 | Yes | T55,T73,T132 | OUTPUT | |
otp_lc_data_o.state[305] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[308:306] | Yes | Yes | *T3,*T32,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[311:310] | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
otp_lc_data_o.state[312] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:313] | Yes | Yes | T2,T39,T5 | Yes | T5,T6,T54 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T32,T57,T58 | Yes | T32,T57,T58 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T126,T127,T128 | Yes | T107,T109,T129 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T84,T85 | Yes | T62,T63,T101 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T126,T127,T128 | Yes | T107,T109,T129 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T3,T32 | Yes | T3,T32,T4 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T39,T4,T6 | Yes | T39,T4,T6 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T134,T135,T136 | Yes | T134,T135,T136 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T137,T138,T139 | Yes | T137,T138,T139 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T39,T4,T6 | Yes | T39,T4,T6 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T134,T135,T136 | Yes | T134,T135,T136 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T137,T138,T139 | Yes | T137,T138,T139 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T39,T4,T103 | Yes | T39,T4,T103 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T3,T32,T4 | Yes | T1,T3,T32 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T3,T32,T39 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T39 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T39,T4,T103 | Yes | T39,T4,T103 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T5,T57,T58 | Yes | T39,T84,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[2:1] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[4:3] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[7:5] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[9:8] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[10] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[15:11] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[16] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[19:17] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[22:21] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[23] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[25:24] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[28:26] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[30:29] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[33:31] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[34] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[35] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[36] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[38:37] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[39] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[41:40] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[43:42] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[44] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[48:45] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[50:49] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[58:51] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[61:59] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[63:62] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[68:64] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[71:69] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[72] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[74] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[75] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[78:76] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[79] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[81] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[85:82] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[87:86] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[89:88] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[90] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[91] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[94:92] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[96:95] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[98:97] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[102:99] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[103] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[105:104] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[106] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[109:107] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[110] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[111] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[112] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[113] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[114] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[117:115] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[118] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[119] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[120] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[121] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[123:122] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[124] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[125] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[126] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[127] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[128] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[129] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[132:130] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[135:133] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[140:136] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[142:141] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[144:143] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[147:145] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[150:148] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[153:151] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[154] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[157:155] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[159:158] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[165:160] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[166] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[167] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[169:168] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[170] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[171] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[172] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[174:173] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[176:175] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[177] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[179:178] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[182:180] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[184:183] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[185] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[188:186] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[189] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[194:190] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[195] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[196] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[201:197] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[204:202] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[206:205] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[207] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[209:208] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[210] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[211] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[212] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[214:213] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[215] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[219:216] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[220] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[225:221] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[227:226] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[228] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[229] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[230] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[233:231] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[234] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[235] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[237:236] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[238] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[240:239] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[244:241] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[247:245] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[248] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[251:249] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[252] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[253] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[254] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T2,T32,T39 | Yes | T32,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[48:0] | Yes | Yes | *T3,*T32,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[49] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[50] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[52:51] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[61:53] | Yes | Yes | *T4,*T6,*T38 | Yes | T39,T4,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[62] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63] | Yes | Yes | T3,T32,T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T3,T32,T4 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |