SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
82.04 | 82.04 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 82.22 | 82.22 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
82.22 | 82.22 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
82.22 | 82.22 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
94.74 | 90.68 | 93.54 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 140 | 85.37 |
Total Bits | 11012 | 9034 | 82.04 |
Total Bits 0->1 | 5506 | 4531 | 82.29 |
Total Bits 1->0 | 5506 | 4503 | 81.78 |
Ports | 164 | 140 | 85.37 |
Port Bits | 11012 | 9034 | 82.04 |
Port Bits 0->1 | 5506 | 4531 | 82.29 |
Port Bits 1->0 | 5506 | 4503 | 81.78 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T108,T109,T110 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T74,*T75,*T76 | Yes | T74,T75,T76 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T4,*T69,*T47 | Yes | T4,T69,T47 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T69,T47,T24 | Yes | T69,T47,T24 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T74,T75,T76 | Yes | T74,T76,T77 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T4,*T111,*T112 | Yes | T4,T111,T112 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T113,*T45,*T46 | Yes | T113,T46,T4 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T74,*T75,*T76 | Yes | T74,T75,T76 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T74,*T75,*T76 | Yes | T74,T75,T76 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T4,*T69,*T47 | Yes | T4,T69,T47 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T69,T47,T24 | Yes | T69,T47,T24 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T114,T115,T116 | Yes | T114,T115,T116 | OUTPUT |
intr_otp_error_o | Yes | Yes | T114,T115,T116 | Yes | T114,T115,T116 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T57,T78,T117 | Yes | T57,T78,T117 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T78,T117,T80 | Yes | T78,T117,T80 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T78,T117,T80 | Yes | T78,T117,T80 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T3,T32,T64 | Yes | T3,T32,T64 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T78,T80,T81 | Yes | T78,T80,T81 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T78,T80,T81 | Yes | T78,T80,T81 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T57,T118,T78 | Yes | T57,T118,T78 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T78,T80,T81 | Yes | T78,T81,T119 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T78,T81,T119 | Yes | T78,T80,T81 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T64,T57,T78 | Yes | T64,T57,T78 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T78,T117,T80 | Yes | T78,T117,T80 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T78,T117,T80 | Yes | T78,T117,T80 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T57,T78,T80 | Yes | T57,T78,T80 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T78,T80,T81 | Yes | T78,T80,T81 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T78,T80,T81 | Yes | T78,T80,T81 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T57,T78,T117 | Yes | T57,T78,T117 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T3,T32,T64 | Yes | T3,T32,T64 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T57,T118,T78 | Yes | T57,T118,T78 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T64,T57,T78 | Yes | T64,T57,T78 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T57,T78,T80 | Yes | T57,T78,T80 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T120,T121,T122 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[11:0] | No | No | Yes | T123,T124,T45 | INPUT | |
lc_otp_vendor_test_i.ctrl[12] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[14:13] | No | No | Yes | T45,T123 | INPUT | |
lc_otp_vendor_test_i.ctrl[15] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[16] | No | No | Yes | T45,T124 | INPUT | |
lc_otp_vendor_test_i.ctrl[17] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[24:18] | No | No | Yes | T123,T45,T124 | INPUT | |
lc_otp_vendor_test_i.ctrl[26:25] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[27] | No | No | Yes | T123 | INPUT | |
lc_otp_vendor_test_i.ctrl[28] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:29] | No | No | Yes | T45,T123,T124 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[2:0] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[4:3] | No | No | No | INPUT | ||
lc_otp_program_i.count[8:5] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[10:9] | No | No | No | INPUT | ||
lc_otp_program_i.count[16:11] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[17] | No | No | No | INPUT | ||
lc_otp_program_i.count[22:18] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[23] | No | No | No | INPUT | ||
lc_otp_program_i.count[30:24] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT |
lc_otp_program_i.count[31] | No | No | No | INPUT | ||
lc_otp_program_i.count[33:32] | Yes | Yes | T40,T128,T125 | Yes | T40,T129,T130 | INPUT |
lc_otp_program_i.count[35:34] | No | No | No | INPUT | ||
lc_otp_program_i.count[36] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[37] | No | No | No | INPUT | ||
lc_otp_program_i.count[69:38] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[70] | No | No | No | INPUT | ||
lc_otp_program_i.count[71] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[72] | No | No | No | INPUT | ||
lc_otp_program_i.count[84:73] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[85] | No | No | No | INPUT | ||
lc_otp_program_i.count[87:86] | Yes | Yes | *T70,*T42,*T5 | Yes | T5,T40,T131 | INPUT |
lc_otp_program_i.count[88] | No | No | No | INPUT | ||
lc_otp_program_i.count[109:89] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[111:110] | No | No | No | INPUT | ||
lc_otp_program_i.count[112] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[113] | No | No | No | INPUT | ||
lc_otp_program_i.count[118:114] | Yes | Yes | *T70,*T42,*T5 | Yes | T5,T40,T131 | INPUT |
lc_otp_program_i.count[119] | No | No | No | INPUT | ||
lc_otp_program_i.count[123:120] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[124] | No | No | No | INPUT | ||
lc_otp_program_i.count[143:125] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT |
lc_otp_program_i.count[144] | No | No | No | INPUT | ||
lc_otp_program_i.count[155:145] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[156] | No | No | No | INPUT | ||
lc_otp_program_i.count[158:157] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[159] | No | No | No | INPUT | ||
lc_otp_program_i.count[164:160] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[165] | No | No | No | INPUT | ||
lc_otp_program_i.count[168:166] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[169] | No | No | No | INPUT | ||
lc_otp_program_i.count[172:170] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[173] | No | No | No | INPUT | ||
lc_otp_program_i.count[174] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[176:175] | No | No | No | INPUT | ||
lc_otp_program_i.count[187:177] | Yes | Yes | *T127,*T1,*T2 | Yes | T127,T3,T32 | INPUT |
lc_otp_program_i.count[188] | No | No | No | INPUT | ||
lc_otp_program_i.count[195:189] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[196] | No | No | No | INPUT | ||
lc_otp_program_i.count[198:197] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT |
lc_otp_program_i.count[199] | No | No | No | INPUT | ||
lc_otp_program_i.count[205:200] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[207:206] | No | No | No | INPUT | ||
lc_otp_program_i.count[208] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[209] | No | No | No | INPUT | ||
lc_otp_program_i.count[213:210] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[214] | No | No | No | INPUT | ||
lc_otp_program_i.count[217:215] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT |
lc_otp_program_i.count[218] | No | No | No | INPUT | ||
lc_otp_program_i.count[221:219] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[222] | No | No | No | INPUT | ||
lc_otp_program_i.count[223] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[224] | No | No | No | INPUT | ||
lc_otp_program_i.count[231:225] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[233:232] | No | No | No | INPUT | ||
lc_otp_program_i.count[237:234] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[239:238] | No | No | No | INPUT | ||
lc_otp_program_i.count[246:240] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[247] | No | No | No | INPUT | ||
lc_otp_program_i.count[248] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[250:249] | No | No | No | INPUT | ||
lc_otp_program_i.count[254:251] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[255] | No | No | No | INPUT | ||
lc_otp_program_i.count[258:256] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[261:259] | No | No | No | INPUT | ||
lc_otp_program_i.count[277:262] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[278] | No | No | No | INPUT | ||
lc_otp_program_i.count[296:279] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[297] | No | No | No | INPUT | ||
lc_otp_program_i.count[322:298] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[323] | No | No | No | INPUT | ||
lc_otp_program_i.count[338:324] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[339] | No | No | No | INPUT | ||
lc_otp_program_i.count[347:340] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[349:348] | No | No | No | INPUT | ||
lc_otp_program_i.count[361:350] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[362] | No | No | No | INPUT | ||
lc_otp_program_i.count[363] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[364] | No | No | No | INPUT | ||
lc_otp_program_i.count[365] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[366] | No | No | No | INPUT | ||
lc_otp_program_i.count[371:367] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.count[373:372] | No | No | No | INPUT | ||
lc_otp_program_i.count[375:374] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT |
lc_otp_program_i.count[376] | No | No | No | INPUT | ||
lc_otp_program_i.count[378:377] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.count[379] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:380] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[1:0] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[2] | No | No | No | INPUT | ||
lc_otp_program_i.state[7:3] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[8] | No | No | No | INPUT | ||
lc_otp_program_i.state[15:9] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[16] | No | No | No | INPUT | ||
lc_otp_program_i.state[20:17] | Yes | Yes | *T132,*T40,*T128 | Yes | T40,T129,T130 | INPUT |
lc_otp_program_i.state[23:21] | No | No | No | INPUT | ||
lc_otp_program_i.state[32:24] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[34:33] | No | No | No | INPUT | ||
lc_otp_program_i.state[41:35] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[42] | No | No | No | INPUT | ||
lc_otp_program_i.state[56:43] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[58:57] | No | No | No | INPUT | ||
lc_otp_program_i.state[68:59] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[69] | No | No | No | INPUT | ||
lc_otp_program_i.state[71:70] | Yes | Yes | T132,T6,T40 | Yes | T6,T40,T63 | INPUT |
lc_otp_program_i.state[72] | No | No | No | INPUT | ||
lc_otp_program_i.state[73] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[74] | No | No | No | INPUT | ||
lc_otp_program_i.state[76:75] | Yes | Yes | T132,T6,T40 | Yes | T6,T40,T63 | INPUT |
lc_otp_program_i.state[77] | No | No | No | INPUT | ||
lc_otp_program_i.state[82:78] | Yes | Yes | *T127,*T132,*T6 | Yes | T127,T6,T40 | INPUT |
lc_otp_program_i.state[83] | No | No | No | INPUT | ||
lc_otp_program_i.state[89:84] | Yes | Yes | T125,T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[91:90] | No | No | No | INPUT | ||
lc_otp_program_i.state[92] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[93] | No | No | No | INPUT | ||
lc_otp_program_i.state[101:94] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[102] | No | No | No | INPUT | ||
lc_otp_program_i.state[104:103] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT |
lc_otp_program_i.state[105] | No | No | No | INPUT | ||
lc_otp_program_i.state[117:106] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[118] | No | No | No | INPUT | ||
lc_otp_program_i.state[123:119] | Yes | Yes | T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[124] | No | No | No | INPUT | ||
lc_otp_program_i.state[131:125] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | INPUT |
lc_otp_program_i.state[132] | No | No | No | INPUT | ||
lc_otp_program_i.state[138:133] | Yes | Yes | T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[140:139] | No | No | No | INPUT | ||
lc_otp_program_i.state[148:141] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[149] | No | No | No | INPUT | ||
lc_otp_program_i.state[152:150] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[153] | No | No | No | INPUT | ||
lc_otp_program_i.state[164:154] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT |
lc_otp_program_i.state[165] | No | No | No | INPUT | ||
lc_otp_program_i.state[172:166] | Yes | Yes | *T127,*T4,*T132 | Yes | T127,T4,T6 | INPUT |
lc_otp_program_i.state[173] | No | No | No | INPUT | ||
lc_otp_program_i.state[178:174] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | INPUT |
lc_otp_program_i.state[179] | No | No | No | INPUT | ||
lc_otp_program_i.state[183:180] | Yes | Yes | T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[184] | No | No | No | INPUT | ||
lc_otp_program_i.state[186:185] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | INPUT |
lc_otp_program_i.state[187] | No | No | No | INPUT | ||
lc_otp_program_i.state[190:188] | Yes | Yes | T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[191] | No | No | No | INPUT | ||
lc_otp_program_i.state[197:192] | Yes | Yes | *T127,*T4,*T132 | Yes | T127,T4,T6 | INPUT |
lc_otp_program_i.state[198] | No | No | No | INPUT | ||
lc_otp_program_i.state[202:199] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | INPUT |
lc_otp_program_i.state[203] | No | No | No | INPUT | ||
lc_otp_program_i.state[205:204] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[206] | No | No | No | INPUT | ||
lc_otp_program_i.state[209:207] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[210] | No | No | No | INPUT | ||
lc_otp_program_i.state[242:211] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[243] | No | No | No | INPUT | ||
lc_otp_program_i.state[265:244] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT |
lc_otp_program_i.state[266] | No | No | No | INPUT | ||
lc_otp_program_i.state[268:267] | Yes | Yes | T4,T70,T42 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.state[269] | No | No | No | INPUT | ||
lc_otp_program_i.state[278:270] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT |
lc_otp_program_i.state[279] | No | No | No | INPUT | ||
lc_otp_program_i.state[282:280] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[283] | No | No | No | INPUT | ||
lc_otp_program_i.state[287:284] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT |
lc_otp_program_i.state[288] | No | No | No | INPUT | ||
lc_otp_program_i.state[298:289] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT |
lc_otp_program_i.state[299] | No | No | No | INPUT | ||
lc_otp_program_i.state[304:300] | Yes | Yes | *T4,*T70,*T42 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.state[305] | No | No | No | INPUT | ||
lc_otp_program_i.state[317:306] | Yes | Yes | *T127,*T4,*T70 | Yes | T127,T4,T5 | INPUT |
lc_otp_program_i.state[318] | No | No | No | INPUT | ||
lc_otp_program_i.state[319] | Yes | Yes | T4,T70,T42 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.req | Yes | Yes | T4,T6,T63 | Yes | T4,T6,T63 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T4,T6,T63 | Yes | T4,T6,T63 | OUTPUT |
lc_otp_program_o.err | No | No | No | OUTPUT | ||
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T3,T32,T64 | Yes | T3,T32,T64 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T4,T6,T63 | Yes | T4,T6,T63 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T44,T4,T133 | Yes | T83,T85,T60 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T134,T135,T136 | Yes | T113,T137,T138 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T3,T64,T44 | Yes | T2,T3,T83 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T3,T82 | Yes | T3,T44,T46 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T134,T135,T136 | Yes | T113,T137,T138 | OUTPUT |
otp_lc_data_o.count[2:0] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[4:3] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[8:5] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[10:9] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[16:11] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[22:18] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[23] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[30:24] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[33:32] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[35:34] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[36] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[37] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[69:38] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[70] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[71] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[72] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[84:73] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[85] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[87:86] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[88] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[109:89] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[111:110] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[112] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[118:114] | Yes | Yes | *T70,*T42,*T5 | Yes | T5,T40,T131 | OUTPUT |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[123:120] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[124] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[143:125] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.count[144] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[155:145] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[158:157] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[159] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[164:160] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.count[165] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[168:166] | Yes | Yes | *T6,*T140,*T141 | Yes | T6,T140,T141 | OUTPUT |
otp_lc_data_o.count[169] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[172:170] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.count[173] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[174] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[176:175] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[187:177] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.count[188] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[195:189] | Yes | Yes | *T141,*T142,*T143 | Yes | T6,T140,T141 | OUTPUT |
otp_lc_data_o.count[196] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[198:197] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[205:200] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[207:206] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[208] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[209] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[213:210] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[214] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[217:215] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.count[218] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[221:219] | Yes | Yes | *T141,*T142,*T143 | Yes | T141,T142,T143 | OUTPUT |
otp_lc_data_o.count[222] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[223] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[231:225] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[233:232] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[237:234] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.count[239:238] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[246:240] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[247] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[248] | Yes | Yes | *T141,*T142,*T144 | Yes | T141,T142,T144 | OUTPUT |
otp_lc_data_o.count[250:249] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[254:251] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[258:256] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[261:259] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[277:262] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[278] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[296:279] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[297] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[322:298] | Yes | Yes | *T141,*T142,*T144 | Yes | T141,T142,T144 | OUTPUT |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[338:324] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[339] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[347:340] | Yes | Yes | *T141,*T142,*T144 | Yes | T141,T142,T144 | OUTPUT |
otp_lc_data_o.count[349:348] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[361:350] | Yes | Yes | *T141,*T142,*T144 | Yes | T141,T142,T144 | OUTPUT |
otp_lc_data_o.count[362] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[363] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.count[364] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[365] | Yes | Yes | *T141,*T142,*T144 | Yes | T141,T142,T144 | OUTPUT |
otp_lc_data_o.count[366] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[371:367] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[373:372] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[375:374] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.count[376] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[378:377] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:380] | Yes | Yes | T125,T111,T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[1:0] | Yes | Yes | T125,T111,T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[2] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[7:3] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[8] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[15:9] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[16] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[20:17] | Yes | Yes | *T132,*T40,*T128 | Yes | T40,T129,T130 | OUTPUT |
otp_lc_data_o.state[23:21] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[32:24] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[34:33] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[41:35] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[42] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[56:43] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[58:57] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[68:59] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[69] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[71:70] | Yes | Yes | *T132,*T6,*T40 | Yes | T6,T40,T63 | OUTPUT |
otp_lc_data_o.state[72] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[73] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[74] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[76:75] | Yes | Yes | T132,T6,T40 | Yes | T6,T40,T63 | OUTPUT |
otp_lc_data_o.state[77] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[82:78] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[89:84] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[91:90] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[92] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[93] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[101:94] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[102] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[104:103] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.state[105] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[117:106] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[118] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[123:119] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[124] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[131:125] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | OUTPUT |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[138:133] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[140:139] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[148:141] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[152:150] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[164:154] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.state[165] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[172:166] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.state[173] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[178:174] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[183:180] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[184] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[186:185] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | OUTPUT |
otp_lc_data_o.state[187] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[190:188] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[191] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[197:192] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.state[198] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[202:199] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[203] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[205:204] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[206] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[209:207] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[210] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[242:211] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[243] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[265:244] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[268:267] | Yes | Yes | T4,*T70,*T42 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[269] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[278:270] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.state[279] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[282:280] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[283] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[287:284] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.state[288] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[298:289] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT |
otp_lc_data_o.state[299] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[304:300] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[305] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[317:306] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_lc_data_o.state[318] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T3,T32,T64 | Yes | T3,T32,T64 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T134,T135,T136 | Yes | T113,T137,T138 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T64 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T134,T135,T136 | Yes | T113,T137,T138 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T2,T82,T33 | Yes | T33,T64,T46 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T42,T133,T5 | Yes | T42,T133,T5 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T133,T146,T122 | Yes | T133,T146,T122 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T147,T148,T149 | Yes | T147,T148,T149 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T42,T133,T5 | Yes | T42,T133,T5 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T133,T146,T122 | Yes | T133,T146,T122 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T147,T148,T149 | Yes | T147,T148,T149 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T42,T5,T108 | Yes | T42,T5,T108 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T42,T5,T108 | Yes | T42,T5,T108 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T3,T33,T64 | Yes | T1,T3,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[4:1] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[5] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[12:6] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[15:13] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[17:16] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[20:18] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[23:21] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[26:24] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[28:27] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[29] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[30] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[32:31] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[33] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[34] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[35] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[37:36] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[38] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[39] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[40] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[42:41] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[43] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[46:44] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[49:47] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[50] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[51] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[52] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[53] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[55:54] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[56] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[57] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[59:58] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[62:60] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[64:63] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[65] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[66] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[68:67] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[70:69] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[72:71] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[75:74] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[77:76] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[79:78] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[81:80] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[83:82] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[84] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[85] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[88:86] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[91:89] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[92] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[94:93] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[96:95] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[99:97] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[101:100] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[102] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[105:103] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[110:106] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[111] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[114:112] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[117:115] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[119:118] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[120] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[122:121] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[124:123] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[126:125] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[127] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[128] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[129] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[131:130] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[132] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[133] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[135:134] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[137:136] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[138] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[139] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[140] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[145:141] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[147:146] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[148] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[149] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[151:150] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[156:152] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[157] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[158] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[159] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[161:160] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[162] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[163] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[164] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[165] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[166] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[171:167] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[173:172] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[179:174] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[183:180] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[187:184] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[189:188] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[190] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[191] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[193:192] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[195:194] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[198:196] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[200:199] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[203:201] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[206:204] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[208:207] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[211:209] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[214:212] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[215] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[216] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[217] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[225:218] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[228:226] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[229] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[231:230] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[233:232] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[238:234] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[240:239] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[241] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[242] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[243] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[244] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[245] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[246] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[249:247] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[254:250] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T32 | Yes | T32,T64,T150 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[6:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[7] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[21:8] | Yes | Yes | *T42,*T5,*T43 | Yes | T5,T40,T129 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[22] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[24:23] | Yes | Yes | *T42,*T5,*T43 | Yes | T5,T40,T129 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[25] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[28:26] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[29] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[37:30] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[38] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[45:39] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[46] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[49:47] | Yes | Yes | *T42,*T5,*T43 | Yes | T5,T40,T129 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[50] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[55:51] | Yes | Yes | *T42,*T5,*T43 | Yes | T5,T40,T129 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[57:56] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:58] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T7,T8,T9 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 140 | 87.50 |
Total Bits | 10986 | 9033 | 82.22 |
Total Bits 0->1 | 5493 | 4530 | 82.47 |
Total Bits 1->0 | 5493 | 4503 | 81.98 |
Ports | 160 | 140 | 87.50 |
Port Bits | 10986 | 9033 | 82.22 |
Port Bits 0->1 | 5493 | 4530 | 82.47 |
Port Bits 1->0 | 5493 | 4503 | 81.98 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T108,T109,T110 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T74,*T75,*T76 | Yes | T74,T75,T76 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T4,*T69,*T47 | Yes | T4,T69,T47 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T69,T47,T24 | Yes | T69,T47,T24 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T74,T75,T76 | Yes | T74,T76,T77 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T4,*T111,*T112 | Yes | T4,T111,T112 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T113,*T45,*T46 | Yes | T113,T46,T4 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T74,*T75,*T76 | Yes | T74,T75,T76 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T74,*T75,*T76 | Yes | T74,T75,T76 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T4,*T69,*T47 | Yes | T4,T69,T47 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T69,T47,T24 | Yes | T69,T47,T24 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T74,T75,T76 | Yes | T74,T75,T76 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T114,T115,T116 | Yes | T114,T115,T116 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T114,T115,T116 | Yes | T114,T115,T116 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T57,T78,T117 | Yes | T57,T78,T117 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T78,T117,T80 | Yes | T78,T117,T80 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T78,T117,T80 | Yes | T78,T117,T80 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T3,T32,T64 | Yes | T3,T32,T64 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T78,T80,T81 | Yes | T78,T80,T81 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T78,T80,T81 | Yes | T78,T80,T81 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T57,T118,T78 | Yes | T57,T118,T78 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T78,T80,T81 | Yes | T78,T81,T119 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T78,T81,T119 | Yes | T78,T80,T81 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T64,T57,T78 | Yes | T64,T57,T78 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T78,T117,T80 | Yes | T78,T117,T80 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T78,T117,T80 | Yes | T78,T117,T80 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T57,T78,T80 | Yes | T57,T78,T80 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T78,T80,T81 | Yes | T78,T80,T81 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T78,T80,T81 | Yes | T78,T80,T81 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T57,T78,T117 | Yes | T57,T78,T117 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T3,T32,T64 | Yes | T3,T32,T64 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T57,T118,T78 | Yes | T57,T118,T78 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T64,T57,T78 | Yes | T64,T57,T78 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T57,T78,T80 | Yes | T57,T78,T80 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T120,T121,T122 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[11:0] | No | No | Yes | T123,T124,T45 | INPUT | ||
lc_otp_vendor_test_i.ctrl[12] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[14:13] | No | No | Yes | T45,T123 | INPUT | ||
lc_otp_vendor_test_i.ctrl[15] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[16] | No | No | Yes | T45,T124 | INPUT | ||
lc_otp_vendor_test_i.ctrl[17] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[24:18] | No | No | Yes | T123,T45,T124 | INPUT | ||
lc_otp_vendor_test_i.ctrl[26:25] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[27] | No | No | Yes | T123 | INPUT | ||
lc_otp_vendor_test_i.ctrl[28] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:29] | No | No | Yes | T45,T123,T124 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[2:0] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[4:3] | No | No | No | INPUT | |||
lc_otp_program_i.count[8:5] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[10:9] | No | No | No | INPUT | |||
lc_otp_program_i.count[16:11] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[17] | No | No | No | INPUT | |||
lc_otp_program_i.count[22:18] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[23] | No | No | No | INPUT | |||
lc_otp_program_i.count[30:24] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT | |
lc_otp_program_i.count[31] | No | No | No | INPUT | |||
lc_otp_program_i.count[33:32] | Yes | Yes | T40,T128,T125 | Yes | T40,T129,T130 | INPUT | |
lc_otp_program_i.count[35:34] | No | No | No | INPUT | |||
lc_otp_program_i.count[36] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[37] | No | No | No | INPUT | |||
lc_otp_program_i.count[69:38] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[70] | No | No | No | INPUT | |||
lc_otp_program_i.count[71] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[72] | No | No | No | INPUT | |||
lc_otp_program_i.count[84:73] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[85] | No | No | No | INPUT | |||
lc_otp_program_i.count[87:86] | Yes | Yes | *T70,*T42,*T5 | Yes | T5,T40,T131 | INPUT | |
lc_otp_program_i.count[88] | No | No | No | INPUT | |||
lc_otp_program_i.count[109:89] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[111:110] | No | No | No | INPUT | |||
lc_otp_program_i.count[112] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[113] | No | No | No | INPUT | |||
lc_otp_program_i.count[118:114] | Yes | Yes | *T70,*T42,*T5 | Yes | T5,T40,T131 | INPUT | |
lc_otp_program_i.count[119] | No | No | No | INPUT | |||
lc_otp_program_i.count[123:120] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[124] | No | No | No | INPUT | |||
lc_otp_program_i.count[143:125] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT | |
lc_otp_program_i.count[144] | No | No | No | INPUT | |||
lc_otp_program_i.count[155:145] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[156] | No | No | No | INPUT | |||
lc_otp_program_i.count[158:157] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[159] | No | No | No | INPUT | |||
lc_otp_program_i.count[164:160] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[165] | No | No | No | INPUT | |||
lc_otp_program_i.count[168:166] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[169] | No | No | No | INPUT | |||
lc_otp_program_i.count[172:170] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[173] | No | No | No | INPUT | |||
lc_otp_program_i.count[174] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[176:175] | No | No | No | INPUT | |||
lc_otp_program_i.count[187:177] | Yes | Yes | *T127,*T1,*T2 | Yes | T127,T3,T32 | INPUT | |
lc_otp_program_i.count[188] | No | No | No | INPUT | |||
lc_otp_program_i.count[195:189] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[196] | No | No | No | INPUT | |||
lc_otp_program_i.count[198:197] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT | |
lc_otp_program_i.count[199] | No | No | No | INPUT | |||
lc_otp_program_i.count[205:200] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[207:206] | No | No | No | INPUT | |||
lc_otp_program_i.count[208] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[209] | No | No | No | INPUT | |||
lc_otp_program_i.count[213:210] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[214] | No | No | No | INPUT | |||
lc_otp_program_i.count[217:215] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT | |
lc_otp_program_i.count[218] | No | No | No | INPUT | |||
lc_otp_program_i.count[221:219] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[222] | No | No | No | INPUT | |||
lc_otp_program_i.count[223] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[224] | No | No | No | INPUT | |||
lc_otp_program_i.count[231:225] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[233:232] | No | No | No | INPUT | |||
lc_otp_program_i.count[237:234] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[239:238] | No | No | No | INPUT | |||
lc_otp_program_i.count[246:240] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[247] | No | No | No | INPUT | |||
lc_otp_program_i.count[248] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[250:249] | No | No | No | INPUT | |||
lc_otp_program_i.count[254:251] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[255] | No | No | No | INPUT | |||
lc_otp_program_i.count[258:256] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[261:259] | No | No | No | INPUT | |||
lc_otp_program_i.count[277:262] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[278] | No | No | No | INPUT | |||
lc_otp_program_i.count[296:279] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[297] | No | No | No | INPUT | |||
lc_otp_program_i.count[322:298] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[323] | No | No | No | INPUT | |||
lc_otp_program_i.count[338:324] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[339] | No | No | No | INPUT | |||
lc_otp_program_i.count[347:340] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[349:348] | No | No | No | INPUT | |||
lc_otp_program_i.count[361:350] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[362] | No | No | No | INPUT | |||
lc_otp_program_i.count[363] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[364] | No | No | No | INPUT | |||
lc_otp_program_i.count[365] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[366] | No | No | No | INPUT | |||
lc_otp_program_i.count[371:367] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.count[373:372] | No | No | No | INPUT | |||
lc_otp_program_i.count[375:374] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT | |
lc_otp_program_i.count[376] | No | No | No | INPUT | |||
lc_otp_program_i.count[378:377] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.count[379] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:380] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[1:0] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[2] | No | No | No | INPUT | |||
lc_otp_program_i.state[7:3] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[8] | No | No | No | INPUT | |||
lc_otp_program_i.state[15:9] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[16] | No | No | No | INPUT | |||
lc_otp_program_i.state[20:17] | Yes | Yes | *T132,*T40,*T128 | Yes | T40,T129,T130 | INPUT | |
lc_otp_program_i.state[23:21] | No | No | No | INPUT | |||
lc_otp_program_i.state[32:24] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[34:33] | No | No | No | INPUT | |||
lc_otp_program_i.state[41:35] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[42] | No | No | No | INPUT | |||
lc_otp_program_i.state[56:43] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[58:57] | No | No | No | INPUT | |||
lc_otp_program_i.state[68:59] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[69] | No | No | No | INPUT | |||
lc_otp_program_i.state[71:70] | Yes | Yes | T132,T6,T40 | Yes | T6,T40,T63 | INPUT | |
lc_otp_program_i.state[72] | No | No | No | INPUT | |||
lc_otp_program_i.state[73] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[74] | No | No | No | INPUT | |||
lc_otp_program_i.state[76:75] | Yes | Yes | T132,T6,T40 | Yes | T6,T40,T63 | INPUT | |
lc_otp_program_i.state[77] | No | No | No | INPUT | |||
lc_otp_program_i.state[82:78] | Yes | Yes | *T127,*T132,*T6 | Yes | T127,T6,T40 | INPUT | |
lc_otp_program_i.state[83] | No | No | No | INPUT | |||
lc_otp_program_i.state[89:84] | Yes | Yes | T125,T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[91:90] | No | No | No | INPUT | |||
lc_otp_program_i.state[92] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[93] | No | No | No | INPUT | |||
lc_otp_program_i.state[101:94] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[102] | No | No | No | INPUT | |||
lc_otp_program_i.state[104:103] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT | |
lc_otp_program_i.state[105] | No | No | No | INPUT | |||
lc_otp_program_i.state[117:106] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[118] | No | No | No | INPUT | |||
lc_otp_program_i.state[123:119] | Yes | Yes | T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[124] | No | No | No | INPUT | |||
lc_otp_program_i.state[131:125] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | INPUT | |
lc_otp_program_i.state[132] | No | No | No | INPUT | |||
lc_otp_program_i.state[138:133] | Yes | Yes | T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[140:139] | No | No | No | INPUT | |||
lc_otp_program_i.state[148:141] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[149] | No | No | No | INPUT | |||
lc_otp_program_i.state[152:150] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[153] | No | No | No | INPUT | |||
lc_otp_program_i.state[164:154] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT | |
lc_otp_program_i.state[165] | No | No | No | INPUT | |||
lc_otp_program_i.state[172:166] | Yes | Yes | *T127,*T4,*T132 | Yes | T127,T4,T6 | INPUT | |
lc_otp_program_i.state[173] | No | No | No | INPUT | |||
lc_otp_program_i.state[178:174] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | INPUT | |
lc_otp_program_i.state[179] | No | No | No | INPUT | |||
lc_otp_program_i.state[183:180] | Yes | Yes | T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[184] | No | No | No | INPUT | |||
lc_otp_program_i.state[186:185] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | INPUT | |
lc_otp_program_i.state[187] | No | No | No | INPUT | |||
lc_otp_program_i.state[190:188] | Yes | Yes | T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[191] | No | No | No | INPUT | |||
lc_otp_program_i.state[197:192] | Yes | Yes | *T127,*T4,*T132 | Yes | T127,T4,T6 | INPUT | |
lc_otp_program_i.state[198] | No | No | No | INPUT | |||
lc_otp_program_i.state[202:199] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | INPUT | |
lc_otp_program_i.state[203] | No | No | No | INPUT | |||
lc_otp_program_i.state[205:204] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[206] | No | No | No | INPUT | |||
lc_otp_program_i.state[209:207] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[210] | No | No | No | INPUT | |||
lc_otp_program_i.state[242:211] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[243] | No | No | No | INPUT | |||
lc_otp_program_i.state[265:244] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT | |
lc_otp_program_i.state[266] | No | No | No | INPUT | |||
lc_otp_program_i.state[268:267] | Yes | Yes | T4,T70,T42 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.state[269] | No | No | No | INPUT | |||
lc_otp_program_i.state[278:270] | Yes | Yes | *T127,*T125,*T111 | Yes | T127,T125,T111 | INPUT | |
lc_otp_program_i.state[279] | No | No | No | INPUT | |||
lc_otp_program_i.state[282:280] | Yes | Yes | T125,T111,T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[283] | No | No | No | INPUT | |||
lc_otp_program_i.state[287:284] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | INPUT | |
lc_otp_program_i.state[288] | No | No | No | INPUT | |||
lc_otp_program_i.state[298:289] | Yes | Yes | *T125,*T111,*T126 | Yes | T125,T111,T126 | INPUT | |
lc_otp_program_i.state[299] | No | No | No | INPUT | |||
lc_otp_program_i.state[304:300] | Yes | Yes | *T4,*T70,*T42 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.state[305] | No | No | No | INPUT | |||
lc_otp_program_i.state[317:306] | Yes | Yes | *T127,*T4,*T70 | Yes | T127,T4,T5 | INPUT | |
lc_otp_program_i.state[318] | No | No | No | INPUT | |||
lc_otp_program_i.state[319] | Yes | Yes | T4,T70,T42 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T4,T6,T63 | Yes | T4,T6,T63 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T4,T6,T63 | Yes | T4,T6,T63 | OUTPUT | |
lc_otp_program_o.err | No | No | No | OUTPUT | |||
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T3,T32,T64 | Yes | T3,T32,T64 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T4,T6,T63 | Yes | T4,T6,T63 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T44,T4,T133 | Yes | T83,T85,T60 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T134,T135,T136 | Yes | T113,T137,T138 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T3,T64,T44 | Yes | T2,T3,T83 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T3,T82 | Yes | T3,T44,T46 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T134,T135,T136 | Yes | T113,T137,T138 | OUTPUT | |
otp_lc_data_o.count[2:0] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[4:3] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[8:5] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[10:9] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[16:11] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[22:18] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[23] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[30:24] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[33:32] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[35:34] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[36] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[37] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[69:38] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[70] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[71] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[72] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[84:73] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[85] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[87:86] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[88] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[109:89] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[111:110] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[112] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[118:114] | Yes | Yes | *T70,*T42,*T5 | Yes | T5,T40,T131 | OUTPUT | |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[123:120] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[124] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[143:125] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.count[144] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[155:145] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[158:157] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[159] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[164:160] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.count[165] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[168:166] | Yes | Yes | *T6,*T140,*T141 | Yes | T6,T140,T141 | OUTPUT | |
otp_lc_data_o.count[169] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[172:170] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.count[173] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[174] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[176:175] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[187:177] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.count[188] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[195:189] | Yes | Yes | *T141,*T142,*T143 | Yes | T6,T140,T141 | OUTPUT | |
otp_lc_data_o.count[196] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[198:197] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[205:200] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[207:206] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[208] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[209] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[213:210] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[214] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[217:215] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.count[218] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[221:219] | Yes | Yes | *T141,*T142,*T143 | Yes | T141,T142,T143 | OUTPUT | |
otp_lc_data_o.count[222] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[223] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[231:225] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[233:232] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[237:234] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.count[239:238] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[246:240] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[247] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[248] | Yes | Yes | *T141,*T142,*T144 | Yes | T141,T142,T144 | OUTPUT | |
otp_lc_data_o.count[250:249] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[254:251] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[258:256] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[261:259] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[277:262] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[278] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[296:279] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[297] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[322:298] | Yes | Yes | *T141,*T142,*T144 | Yes | T141,T142,T144 | OUTPUT | |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[338:324] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[339] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[347:340] | Yes | Yes | *T141,*T142,*T144 | Yes | T141,T142,T144 | OUTPUT | |
otp_lc_data_o.count[349:348] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[361:350] | Yes | Yes | *T141,*T142,*T144 | Yes | T141,T142,T144 | OUTPUT | |
otp_lc_data_o.count[362] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[363] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.count[364] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[365] | Yes | Yes | *T141,*T142,*T144 | Yes | T141,T142,T144 | OUTPUT | |
otp_lc_data_o.count[366] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[371:367] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[373:372] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[375:374] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.count[376] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[378:377] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:380] | Yes | Yes | T125,T111,T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[1:0] | Yes | Yes | T125,T111,T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[2] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[7:3] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[8] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[15:9] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[16] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[20:17] | Yes | Yes | *T132,*T40,*T128 | Yes | T40,T129,T130 | OUTPUT | |
otp_lc_data_o.state[23:21] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[32:24] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[34:33] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[41:35] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[42] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[56:43] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[58:57] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[68:59] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[69] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[71:70] | Yes | Yes | *T132,*T6,*T40 | Yes | T6,T40,T63 | OUTPUT | |
otp_lc_data_o.state[72] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[73] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[74] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[76:75] | Yes | Yes | T132,T6,T40 | Yes | T6,T40,T63 | OUTPUT | |
otp_lc_data_o.state[77] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[82:78] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[89:84] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[91:90] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[92] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[93] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[101:94] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[102] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[104:103] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.state[105] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[117:106] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[118] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[123:119] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[124] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[131:125] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | OUTPUT | |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[138:133] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[140:139] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[148:141] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[152:150] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[164:154] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.state[165] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[172:166] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.state[173] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[178:174] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[183:180] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[184] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[186:185] | Yes | Yes | *T4,*T132,*T6 | Yes | T4,T6,T40 | OUTPUT | |
otp_lc_data_o.state[187] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[190:188] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[191] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[197:192] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.state[198] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[202:199] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[203] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[205:204] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[206] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[209:207] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[210] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[242:211] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[243] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[265:244] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[268:267] | Yes | Yes | T4,*T70,*T42 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[269] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[278:270] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.state[279] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[282:280] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[283] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[287:284] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.state[288] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[298:289] | Yes | Yes | *T125,*T111,*T126 | Yes | T111,T112,T139 | OUTPUT | |
otp_lc_data_o.state[299] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[304:300] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[305] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[317:306] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_lc_data_o.state[318] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T3,T32,T64 | Yes | T3,T32,T64 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T134,T135,T136 | Yes | T113,T137,T138 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T64 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T134,T135,T136 | Yes | T113,T137,T138 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T2,T82,T33 | Yes | T33,T64,T46 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T42,T133,T5 | Yes | T42,T133,T5 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T133,T146,T122 | Yes | T133,T146,T122 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T147,T148,T149 | Yes | T147,T148,T149 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T42,T133,T5 | Yes | T42,T133,T5 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T133,T146,T122 | Yes | T133,T146,T122 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T147,T148,T149 | Yes | T147,T148,T149 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T42,T5,T108 | Yes | T42,T5,T108 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T3,T32,T82 | Yes | T2,T3,T32 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T33,T145 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T42,T5,T108 | Yes | T42,T5,T108 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T3,T33,T64 | Yes | T1,T3,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[4:1] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[5] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[12:6] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[15:13] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[17:16] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[20:18] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[23:21] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[26:24] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[28:27] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[29] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[30] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[32:31] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[33] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[34] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[35] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[37:36] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[38] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[39] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[40] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[42:41] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[43] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[46:44] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[49:47] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[50] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[51] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[52] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[53] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[55:54] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[56] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[57] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[59:58] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[62:60] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[64:63] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[65] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[66] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[68:67] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[70:69] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[72:71] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[75:74] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[77:76] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[79:78] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[81:80] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[83:82] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[84] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[85] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[88:86] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[91:89] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[92] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[94:93] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[96:95] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[99:97] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[101:100] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[102] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[105:103] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[110:106] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[111] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[114:112] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[117:115] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[119:118] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[120] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[122:121] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[124:123] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[126:125] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[127] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[128] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[129] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[131:130] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[132] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[133] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[135:134] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[137:136] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[138] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[139] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[140] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[145:141] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[147:146] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[148] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[149] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[151:150] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[156:152] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[157] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[158] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[159] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[161:160] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[162] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[163] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[164] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[165] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[166] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[171:167] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[173:172] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[179:174] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[183:180] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[187:184] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[189:188] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[190] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[191] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[193:192] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[195:194] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[198:196] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[200:199] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[203:201] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[206:204] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[208:207] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[211:209] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[214:212] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[215] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[216] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[217] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[225:218] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[228:226] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[229] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[231:230] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[233:232] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[238:234] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[240:239] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[241] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[242] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[243] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[244] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[245] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[246] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[249:247] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[254:250] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T32 | Yes | T32,T64,T150 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[6:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[7] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[21:8] | Yes | Yes | *T42,*T5,*T43 | Yes | T5,T40,T129 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[22] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[24:23] | Yes | Yes | *T42,*T5,*T43 | Yes | T5,T40,T129 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[25] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[28:26] | Yes | Yes | *T3,*T32,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[29] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[37:30] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[38] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[45:39] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[46] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[49:47] | Yes | Yes | *T42,*T5,*T43 | Yes | T5,T40,T129 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[50] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[55:51] | Yes | Yes | *T42,*T5,*T43 | Yes | T5,T40,T129 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[57:56] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:58] | Yes | Yes | T1,T2,T3 | Yes | T3,T32,T33 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T3,T32,T33 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |