Port Details
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i |
Yes |
Yes |
T1,T2,T3 |
Yes |
T1,T2,T3 |
INPUT |
rst_ni |
Yes |
Yes |
T1,T3,T4 |
Yes |
T1,T2,T3 |
INPUT |
clk_aon_i |
Yes |
Yes |
T1,T2,T3 |
Yes |
T1,T2,T3 |
INPUT |
rst_aon_ni |
Yes |
Yes |
T1,T3,T4 |
Yes |
T1,T2,T3 |
INPUT |
tl_i.d_ready |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_i.a_user.data_intg[6:0] |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_i.a_user.cmd_intg[6:0] |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_i.a_user.instr_type[0] |
Yes |
Yes |
*T1,*T16,*T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_i.a_user.instr_type[2:1] |
No |
No |
|
No |
|
INPUT |
tl_i.a_user.instr_type[3] |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_i.a_user.rsvd[4:0] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_data[31:0] |
Yes |
Yes |
T1,T16,T17 |
Yes |
T1,T16,T17 |
INPUT |
tl_i.a_mask[3:0] |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_i.a_address[1:0] |
No |
No |
|
No |
|
INPUT |
tl_i.a_address[11:2] |
Yes |
Yes |
*T16,*T90,*T84 |
Yes |
T16,T90,T84 |
INPUT |
tl_i.a_address[16:12] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_address[17] |
Yes |
Yes |
*T1,*T16,*T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_i.a_address[19:18] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_address[21:20] |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_i.a_address[29:22] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_address[30] |
Yes |
Yes |
*T1,*T16,*T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_i.a_address[31] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_source[0] |
No |
No |
|
No |
|
INPUT |
tl_i.a_source[1] |
Yes |
Yes |
*T16,*T90,*T84 |
Yes |
T16,T90,T84 |
INPUT |
tl_i.a_source[5:2] |
No |
No |
|
No |
|
INPUT |
tl_i.a_source[7:6] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_size[0] |
No |
No |
|
No |
|
INPUT |
tl_i.a_size[1] |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_i.a_param[2:0] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_opcode[1:0] |
No |
No |
|
No |
|
INPUT |
tl_i.a_opcode[2] |
Yes |
Yes |
T16,T90,T84 |
Yes |
T16,T90,T84 |
INPUT |
tl_i.a_valid |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
INPUT |
tl_o.a_ready |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
OUTPUT |
tl_o.d_error |
No |
No |
|
No |
|
OUTPUT |
tl_o.d_user.data_intg[6:0] |
Yes |
Yes |
T16,T90,T84 |
Yes |
T16,T90,T84 |
OUTPUT |
tl_o.d_user.rsp_intg[1:0] |
Yes |
Yes |
T16,T90,T84 |
Yes |
T16,T90,T84 |
OUTPUT |
tl_o.d_user.rsp_intg[3:2] |
No |
No |
|
No |
|
OUTPUT |
tl_o.d_user.rsp_intg[5:4] |
Yes |
Yes |
T1,T90,T84 |
Yes |
T1,T16,T90 |
OUTPUT |
tl_o.d_user.rsp_intg[6] |
No |
No |
|
No |
|
OUTPUT |
tl_o.d_data[31:0] |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
OUTPUT |
tl_o.d_sink |
No |
No |
|
No |
|
OUTPUT |
tl_o.d_source[0] |
No |
No |
|
No |
|
OUTPUT |
tl_o.d_source[1] |
Yes |
Yes |
*T16,*T90,*T84 |
Yes |
T16,T90,T84 |
OUTPUT |
tl_o.d_source[5:2] |
No |
No |
|
No |
|
OUTPUT |
tl_o.d_source[7:6] |
Unreachable |
Unreachable |
|
Unreachable |
|
OUTPUT |
tl_o.d_size[0] |
No |
No |
|
No |
|
OUTPUT |
tl_o.d_size[1] |
Yes |
Yes |
T1,T90,T84 |
Yes |
T1,T16,T90 |
OUTPUT |
tl_o.d_param[2:0] |
Unreachable |
Unreachable |
|
Unreachable |
|
OUTPUT |
tl_o.d_opcode[0] |
Yes |
Yes |
*T1,*T16,*T90 |
Yes |
T1,T16,T90 |
OUTPUT |
tl_o.d_opcode[2:1] |
Unreachable |
Unreachable |
|
Unreachable |
|
OUTPUT |
tl_o.d_valid |
Yes |
Yes |
T1,T16,T90 |
Yes |
T1,T16,T90 |
OUTPUT |
alert_rx_i[0].ack_n |
Yes |
Yes |
T1,T2,T3 |
Yes |
T1,T2,T3 |
INPUT |
alert_rx_i[0].ack_p |
Yes |
Yes |
T173,T54,T55 |
Yes |
T173,T54,T55 |
INPUT |
alert_rx_i[0].ping_n |
Yes |
Yes |
T173,T54,T55 |
Yes |
T173,T54,T55 |
INPUT |
alert_rx_i[0].ping_p |
Yes |
Yes |
T173,T54,T55 |
Yes |
T173,T54,T55 |
INPUT |
alert_tx_o[0].alert_n |
Yes |
Yes |
T1,T2,T3 |
Yes |
T1,T2,T3 |
OUTPUT |
alert_tx_o[0].alert_p |
Yes |
Yes |
T173,T54,T55 |
Yes |
T173,T54,T55 |
OUTPUT |
cio_usb_dp_i |
Yes |
Yes |
T16,T7,T8 |
Yes |
T16,T8,T123 |
INPUT |
cio_usb_dn_i |
Yes |
Yes |
T16,T123,T21 |
Yes |
T16,T8,T123 |
INPUT |
usb_rx_d_i |
Yes |
Yes |
T16,T123,T21 |
Yes |
T16,T123,T21 |
INPUT |
cio_usb_dp_o |
Yes |
Yes |
T1,T16,T17 |
Yes |
T1,T16,T17 |
OUTPUT |
cio_usb_dp_en_o |
Yes |
Yes |
T21,T22,T23 |
Yes |
T21,T22,T23 |
OUTPUT |
cio_usb_dn_o |
Yes |
Yes |
T16,T123,T21 |
Yes |
T16,T123,T174 |
OUTPUT |
cio_usb_dn_en_o |
Yes |
Yes |
T21,T22,T23 |
Yes |
T21,T22,T23 |
OUTPUT |
usb_tx_se0_o |
Yes |
Yes |
T21,T22,T23 |
Yes |
T21,T22,T23 |
OUTPUT |
usb_tx_d_o |
Yes |
Yes |
T1,T16,T17 |
Yes |
T1,T16,T17 |
OUTPUT |
cio_sense_i |
Yes |
Yes |
T42,T124,T27 |
Yes |
T16,T42,T123 |
INPUT |
usb_dp_pullup_o |
Yes |
Yes |
T1,T16,T17 |
Yes |
T1,T16,T17 |
OUTPUT |
usb_dn_pullup_o |
Yes |
Yes |
T16,T123,T124 |
Yes |
T16,T123,T124 |
OUTPUT |
usb_rx_enable_o |
Yes |
Yes |
T124 |
Yes |
T16,T123,T21 |
OUTPUT |
usb_tx_use_d_se0_o |
No |
No |
|
No |
|
OUTPUT |
usb_aon_suspend_req_o |
Yes |
Yes |
T1,T16,T17 |
Yes |
T1,T16,T17 |
OUTPUT |
usb_aon_wake_ack_o |
Yes |
Yes |
T1,T16,T17 |
Yes |
T1,T16,T17 |
OUTPUT |
usb_aon_bus_reset_i |
Yes |
Yes |
T16 |
Yes |
T16 |
INPUT |
usb_aon_sense_lost_i |
Yes |
Yes |
T1,T17,T65 |
Yes |
T1,T17,T65 |
INPUT |
usb_aon_bus_not_idle_i |
Yes |
Yes |
T1,T17,T65 |
Yes |
T1,T17,T65 |
INPUT |
usb_aon_wake_detect_active_i |
Yes |
Yes |
T1,T16,T17 |
Yes |
T1,T16,T17 |
INPUT |
usb_ref_val_o |
Yes |
Yes |
T21,T22,T23 |
Yes |
T21,T22,T23 |
OUTPUT |
usb_ref_pulse_o |
Yes |
Yes |
T21,T22,T23 |
Yes |
T21,T22,T23 |
OUTPUT |
ram_cfg_i.rf_cfg.cfg[3:0] |
No |
No |
|
No |
|
INPUT |
ram_cfg_i.rf_cfg.cfg_en |
No |
No |
|
No |
|
INPUT |
ram_cfg_i.ram_cfg.cfg[3:0] |
No |
No |
|
No |
|
INPUT |
ram_cfg_i.ram_cfg.cfg_en |
No |
No |
|
No |
|
INPUT |
intr_pkt_received_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_pkt_sent_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_powered_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_disconnected_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_host_lost_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_link_reset_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_link_suspend_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_link_resume_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_av_out_empty_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_rx_full_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_av_overflow_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_link_in_err_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_link_out_err_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_rx_crc_err_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_rx_pid_err_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_rx_bitstuff_err_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_frame_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |
intr_av_setup_empty_o |
Yes |
Yes |
T175,T176,T177 |
Yes |
T175,T176,T177 |
OUTPUT |