Unified Coverage Report :: Group :: chip_env_pkg::chip_alert_cg_wrap::alert_cg

Group : chip_env_pkg::chip_alert_cg_wrap::alert_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_chip_env_0.1/chip_env_cov.sv

65 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
adc_ctrl_aon_fatal_fault	100.00	1	100	1	64	64
aes_fatal_fault	100.00	1	100	1	64	64
aes_recov_ctrl_update_err	100.00	1	100	1	64	64
aon_timer_aon_fatal_fault	100.00	1	100	1	64	64
clkmgr_aon_fatal_fault	100.00	1	100	1	64	64
clkmgr_aon_recov_fault	100.00	1	100	1	64	64
csrng_fatal_alert	100.00	1	100	1	64	64
csrng_recov_alert	100.00	1	100	1	64	64
edn0_fatal_alert	100.00	1	100	1	64	64
edn0_recov_alert	100.00	1	100	1	64	64
edn1_fatal_alert	100.00	1	100	1	64	64
edn1_recov_alert	100.00	1	100	1	64	64
entropy_src_fatal_alert	100.00	1	100	1	64	64
entropy_src_recov_alert	100.00	1	100	1	64	64
flash_ctrl_fatal_err	100.00	1	100	1	64	64
flash_ctrl_fatal_prim_flash_alert	100.00	1	100	1	64	64
flash_ctrl_fatal_std_err	100.00	1	100	1	64	64
flash_ctrl_recov_err	100.00	1	100	1	64	64
flash_ctrl_recov_prim_flash_alert	100.00	1	100	1	64	64
gpio_fatal_fault	100.00	1	100	1	64	64
hmac_fatal_fault	100.00	1	100	1	64	64
i2c0_fatal_fault	100.00	1	100	1	64	64
i2c1_fatal_fault	100.00	1	100	1	64	64
i2c2_fatal_fault	100.00	1	100	1	64	64
keymgr_fatal_fault_err	100.00	1	100	1	64	64
keymgr_recov_operation_err	100.00	1	100	1	64	64
kmac_fatal_fault_err	100.00	1	100	1	64	64
kmac_recov_operation_err	100.00	1	100	1	64	64
lc_ctrl_fatal_bus_integ_error	100.00	1	100	1	64	64
lc_ctrl_fatal_prog_error	100.00	1	100	1	64	64
lc_ctrl_fatal_state_error	100.00	1	100	1	64	64
otbn_fatal	100.00	1	100	1	64	64
otbn_recov	100.00	1	100	1	64	64
otp_ctrl_fatal_bus_integ_error	100.00	1	100	1	64	64
otp_ctrl_fatal_check_error	100.00	1	100	1	64	64
otp_ctrl_fatal_macro_error	100.00	1	100	1	64	64
otp_ctrl_fatal_prim_otp_alert	100.00	1	100	1	64	64
otp_ctrl_recov_prim_otp_alert	100.00	1	100	1	64	64
pattgen_fatal_fault	100.00	1	100	1	64	64
pinmux_aon_fatal_fault	100.00	1	100	1	64	64
pwm_aon_fatal_fault	100.00	1	100	1	64	64
pwrmgr_aon_fatal_fault	100.00	1	100	1	64	64
rom_ctrl_fatal	100.00	1	100	1	64	64
rstmgr_aon_fatal_cnsty_fault	100.00	1	100	1	64	64
rstmgr_aon_fatal_fault	100.00	1	100	1	64	64
rv_core_ibex_fatal_hw_err	100.00	1	100	1	64	64
rv_core_ibex_fatal_sw_err	100.00	1	100	1	64	64
rv_core_ibex_recov_hw_err	100.00	1	100	1	64	64
rv_core_ibex_recov_sw_err	100.00	1	100	1	64	64
rv_dm_fatal_fault	100.00	1	100	1	64	64
rv_plic_fatal_fault	100.00	1	100	1	64	64
rv_timer_fatal_fault	100.00	1	100	1	64	64
sensor_ctrl_aon_fatal_alert	100.00	1	100	1	64	64
sensor_ctrl_aon_recov_alert	100.00	1	100	1	64	64
spi_device_fatal_fault	100.00	1	100	1	64	64
spi_host0_fatal_fault	100.00	1	100	1	64	64
spi_host1_fatal_fault	100.00	1	100	1	64	64
sram_ctrl_main_fatal_error	100.00	1	100	1	64	64
sram_ctrl_ret_aon_fatal_error	100.00	1	100	1	64	64
sysrst_ctrl_aon_fatal_fault	100.00	1	100	1	64	64
uart0_fatal_fault	100.00	1	100	1	64	64
uart1_fatal_fault	100.00	1	100	1	64	64
uart2_fatal_fault	100.00	1	100	1	64	64
uart3_fatal_fault	100.00	1	100	1	64	64
usbdev_fatal_fault	100.00	1	100	1	64	64

---

Group Instance : adc_ctrl_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance adc_ctrl_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance adc_ctrl_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aes_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aes_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aes_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aes_recov_ctrl_update_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aes_recov_ctrl_update_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aes_recov_ctrl_update_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aon_timer_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aon_timer_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aon_timer_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : clkmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance clkmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance clkmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : clkmgr_aon_recov_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance clkmgr_aon_recov_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance clkmgr_aon_recov_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : csrng_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance csrng_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance csrng_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : csrng_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance csrng_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance csrng_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn0_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn0_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn0_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn0_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn0_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn0_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn1_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn1_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn1_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn1_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn1_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn1_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : entropy_src_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance entropy_src_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance entropy_src_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : entropy_src_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance entropy_src_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance entropy_src_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_prim_flash_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_prim_flash_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_prim_flash_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_std_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_std_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_std_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_recov_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_recov_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_recov_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_recov_prim_flash_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_recov_prim_flash_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_recov_prim_flash_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : gpio_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance gpio_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance gpio_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : hmac_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance hmac_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance hmac_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c2_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c2_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c2_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : keymgr_fatal_fault_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance keymgr_fatal_fault_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance keymgr_fatal_fault_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : keymgr_recov_operation_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance keymgr_recov_operation_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance keymgr_recov_operation_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : kmac_fatal_fault_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance kmac_fatal_fault_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance kmac_fatal_fault_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : kmac_recov_operation_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance kmac_recov_operation_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance kmac_recov_operation_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_bus_integ_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_bus_integ_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_bus_integ_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_prog_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_prog_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_prog_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_state_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_state_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_state_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otbn_fatal

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otbn_fatal

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otbn_fatal

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otbn_recov

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otbn_recov

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otbn_recov

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_bus_integ_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_bus_integ_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_bus_integ_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_check_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_check_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_check_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_macro_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_macro_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_macro_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_prim_otp_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_prim_otp_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_prim_otp_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_recov_prim_otp_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_recov_prim_otp_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_recov_prim_otp_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pattgen_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pattgen_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pattgen_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pinmux_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pinmux_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pinmux_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pwm_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pwm_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pwm_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pwrmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pwrmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pwrmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rom_ctrl_fatal

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rom_ctrl_fatal

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rom_ctrl_fatal

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rstmgr_aon_fatal_cnsty_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rstmgr_aon_fatal_cnsty_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rstmgr_aon_fatal_cnsty_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rstmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rstmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rstmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_fatal_hw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_fatal_hw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_fatal_hw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_fatal_sw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_fatal_sw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_fatal_sw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_recov_hw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_recov_hw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_recov_hw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_recov_sw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_recov_sw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_recov_sw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_dm_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_dm_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_dm_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_plic_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_plic_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_plic_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_timer_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_timer_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_timer_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sensor_ctrl_aon_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sensor_ctrl_aon_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sensor_ctrl_aon_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sensor_ctrl_aon_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sensor_ctrl_aon_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sensor_ctrl_aon_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_device_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_device_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_device_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_host0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_host0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_host0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_host1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_host1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_host1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sram_ctrl_main_fatal_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sram_ctrl_main_fatal_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sram_ctrl_main_fatal_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sram_ctrl_ret_aon_fatal_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sram_ctrl_ret_aon_fatal_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sram_ctrl_ret_aon_fatal_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sysrst_ctrl_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sysrst_ctrl_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sysrst_ctrl_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart2_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart2_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart2_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart3_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart3_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart3_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : usbdev_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance usbdev_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance usbdev_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2518

1

T64

1

T113

518

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

121449

1

T2

1712

T34

585

T71

2889

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

150

1

T64

1

T65

1

T66

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2606

1

T64

1

T65

1

T688

815

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4450

1

T64

1

T65

1

T686

809

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

780

1

T684

102

T685

105

T64

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5159

1

T273

1726

T64

1

T669

1089

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

187

1

T386

1

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4165

1

T64

1

T65

1

T313

1712

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

171

1

T386

1

T64

1

T659

2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5842

1

T64

1

T287

1721

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

177

1

T64

1

T65

1

T66

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1883

1

T64

1

T65

1

T66

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

171

1

T64

1

T65

1

T66

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8816

1

T64

1

T65

1

T227

480

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5922

1

T64

1

T65

1

T722

1127

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5330

1

T64

1

T65

1

T234

1724

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

378

1

T64

1

T426

2

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

154

1

T64

1

T65

1

T66

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2320

1

T64

1

T65

1

T66

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3633

1

T64

1

T312

1720

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3377

1

T152

2

T64

1

T105

810

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6109

1

T152

1

T64

1

T114

817

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1805

1

T152

1

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5834

1

T64

1

T65

1

T209

1733

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

212

1

T64

1

T169

2

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

120256

1

T2

1712

T34

1716

T71

2889

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

196

1

T64

1

T65

1

T66

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5005

1

T291

515

T64

1

T292

815

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

170

1

T64

1

T65

1

T66

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

7492

1

T2

809

T64

1

T290

809

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1393539

1

T2

1712

T34

585

T71

2889

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

187

1

T64

1

T112

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2542

1

T152

1

T64

1

T158

527

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

54783

1

T2

809

T34

275

T71

1361

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

985

1

T64

1

T65

1

T155

808

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2008

1

T160

512

T64

1

T161

524

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

161

1

T64

1

T65

1

T66

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

716

1

T64

1

T65

1

T719

526

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4740

1

T64

1

T87

820

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2826

1

T53

1

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6480

1

T4

1455

T71

2

T311

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

7050

1

T64

1

T406

1718

T409

1719

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2649

1

T53

1

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3147

1

T53

1

T64

1

T683

819

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

39506

1

T91

310

T178

795

T64

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6747

1

T53

1

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

127

1

T53

1

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

257

1

T152

1

T53

2

T64

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

7005

1

T314

1128

T206

1731

T720

1117

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6975

1

T64

1

T65

1

T410

1715

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4392

1

T64

1

T65

1

T682

529

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4628

1

T186

813

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

12106

1

T64

1

T111

676

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2625

1

T64

1

T65

1

T721

809

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5569

1

T152

2

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3192

1

T340

838

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3621

1

T64

1

T65

1

T235

1738

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

167

1

T64

1

T65

1

T66

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1746

1

T64

1

T65

1

T687

524

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6348

1

T152

2

T64

1

T100

523

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5005

1

T152

1

T64

1

T332

811

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4444

1

T152

1

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1509

1

T152

1

T64

1

T65

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3635

1

T64

1

T65

1

T379

1308