| T667 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.2247668524 |
|
|
Apr 21 03:12:39 PM PDT 24 |
Apr 21 03:20:10 PM PDT 24 |
4344266050 ps |
| T445 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3204529704 |
|
|
Apr 21 02:58:11 PM PDT 24 |
Apr 21 02:59:47 PM PDT 24 |
2008203744 ps |
| T668 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.2618883234 |
|
|
Apr 21 03:27:57 PM PDT 24 |
Apr 21 03:32:44 PM PDT 24 |
3065779100 ps |
| T389 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.4047578457 |
|
|
Apr 21 03:34:45 PM PDT 24 |
Apr 21 03:41:53 PM PDT 24 |
4445731720 ps |
| T669 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.1508384791 |
|
|
Apr 21 03:31:09 PM PDT 24 |
Apr 21 03:38:27 PM PDT 24 |
6695865840 ps |
| T670 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.196256123 |
|
|
Apr 21 03:14:17 PM PDT 24 |
Apr 21 03:28:46 PM PDT 24 |
10280874183 ps |
| T456 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.3236702013 |
|
|
Apr 21 03:35:21 PM PDT 24 |
Apr 21 03:46:17 PM PDT 24 |
6331888534 ps |
| T51 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.1060736336 |
|
|
Apr 21 03:15:03 PM PDT 24 |
Apr 21 03:22:22 PM PDT 24 |
3513411764 ps |
| T116 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.4113387443 |
|
|
Apr 21 03:13:31 PM PDT 24 |
Apr 21 03:21:10 PM PDT 24 |
7646464150 ps |
| T195 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.763381801 |
|
|
Apr 21 02:59:26 PM PDT 24 |
Apr 21 03:19:01 PM PDT 24 |
8018419752 ps |
| T201 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.1523439571 |
|
|
Apr 21 03:24:14 PM PDT 24 |
Apr 21 03:53:06 PM PDT 24 |
8152348368 ps |
| T447 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.995957770 |
|
|
Apr 21 03:06:41 PM PDT 24 |
Apr 21 03:12:24 PM PDT 24 |
5610704346 ps |
| T448 |
/workspace/coverage/default/0.chip_sw_aes_entropy.3180362797 |
|
|
Apr 21 02:58:33 PM PDT 24 |
Apr 21 03:03:20 PM PDT 24 |
3730814138 ps |
| T449 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.2941340902 |
|
|
Apr 21 03:17:47 PM PDT 24 |
Apr 21 03:22:52 PM PDT 24 |
2823900868 ps |
| T450 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.3698542793 |
|
|
Apr 21 03:35:04 PM PDT 24 |
Apr 21 03:43:42 PM PDT 24 |
4323488586 ps |
| T451 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.562510405 |
|
|
Apr 21 03:33:02 PM PDT 24 |
Apr 21 03:39:31 PM PDT 24 |
3723855102 ps |
| T452 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.2424414968 |
|
|
Apr 21 03:29:42 PM PDT 24 |
Apr 21 04:13:34 PM PDT 24 |
9965489620 ps |
| T671 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.117841555 |
|
|
Apr 21 03:15:44 PM PDT 24 |
Apr 21 03:32:22 PM PDT 24 |
7008078605 ps |
| T672 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1606191086 |
|
|
Apr 21 03:11:47 PM PDT 24 |
Apr 21 04:16:28 PM PDT 24 |
32626714760 ps |
| T673 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.2433663598 |
|
|
Apr 21 03:32:52 PM PDT 24 |
Apr 21 03:45:04 PM PDT 24 |
9372448653 ps |
| T674 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.3326929185 |
|
|
Apr 21 02:59:36 PM PDT 24 |
Apr 21 03:03:35 PM PDT 24 |
3129081320 ps |
| T675 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.1611759312 |
|
|
Apr 21 03:10:53 PM PDT 24 |
Apr 21 08:22:46 PM PDT 24 |
79958039480 ps |
| T518 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.2937135272 |
|
|
Apr 21 03:38:30 PM PDT 24 |
Apr 21 03:45:25 PM PDT 24 |
3360985034 ps |
| T676 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.646811398 |
|
|
Apr 21 03:36:11 PM PDT 24 |
Apr 21 03:45:24 PM PDT 24 |
4926046750 ps |
| T299 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.2886912217 |
|
|
Apr 21 03:31:25 PM PDT 24 |
Apr 21 03:41:41 PM PDT 24 |
4591198576 ps |
| T40 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.3860312430 |
|
|
Apr 21 03:10:12 PM PDT 24 |
Apr 21 08:07:22 PM PDT 24 |
79578393617 ps |
| T384 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.218521011 |
|
|
Apr 21 03:35:03 PM PDT 24 |
Apr 21 03:45:31 PM PDT 24 |
4352034648 ps |
| T390 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.497171815 |
|
|
Apr 21 02:58:56 PM PDT 24 |
Apr 21 03:08:50 PM PDT 24 |
5452689220 ps |
| T183 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3159801805 |
|
|
Apr 21 03:22:41 PM PDT 24 |
Apr 21 03:32:24 PM PDT 24 |
6968135335 ps |
| T391 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.2266571086 |
|
|
Apr 21 03:00:43 PM PDT 24 |
Apr 21 03:16:04 PM PDT 24 |
7778520460 ps |
| T250 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.3695337942 |
|
|
Apr 21 03:22:46 PM PDT 24 |
Apr 21 03:45:08 PM PDT 24 |
5716696160 ps |
| T264 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.2093123417 |
|
|
Apr 21 02:57:00 PM PDT 24 |
Apr 21 03:03:10 PM PDT 24 |
4838119720 ps |
| T392 |
/workspace/coverage/default/2.chip_sw_hmac_enc.1888128049 |
|
|
Apr 21 03:26:20 PM PDT 24 |
Apr 21 03:31:41 PM PDT 24 |
3412570196 ps |
| T393 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.1157923026 |
|
|
Apr 21 03:32:33 PM PDT 24 |
Apr 21 03:50:01 PM PDT 24 |
12634274749 ps |
| T394 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.178996048 |
|
|
Apr 21 02:59:56 PM PDT 24 |
Apr 21 03:03:26 PM PDT 24 |
3075560240 ps |
| T395 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.1945128478 |
|
|
Apr 21 03:33:13 PM PDT 24 |
Apr 21 03:39:51 PM PDT 24 |
3784111000 ps |
| T677 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.372837259 |
|
|
Apr 21 03:34:19 PM PDT 24 |
Apr 21 03:41:31 PM PDT 24 |
3836247368 ps |
| T311 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.3086343644 |
|
|
Apr 21 03:36:27 PM PDT 24 |
Apr 21 03:49:34 PM PDT 24 |
5762463640 ps |
| T247 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.3073761197 |
|
|
Apr 21 03:18:21 PM PDT 24 |
Apr 21 03:30:28 PM PDT 24 |
5276596584 ps |
| T678 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.1434485638 |
|
|
Apr 21 03:20:10 PM PDT 24 |
Apr 21 03:55:54 PM PDT 24 |
30109775290 ps |
| T89 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.3057313398 |
|
|
Apr 21 03:35:49 PM PDT 24 |
Apr 21 03:40:40 PM PDT 24 |
3557385132 ps |
| T679 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.527428239 |
|
|
Apr 21 03:16:51 PM PDT 24 |
Apr 21 03:21:17 PM PDT 24 |
2763333568 ps |
| T680 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.348321309 |
|
|
Apr 21 03:19:39 PM PDT 24 |
Apr 21 03:37:23 PM PDT 24 |
11672184045 ps |
| T681 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.3217419802 |
|
|
Apr 21 03:38:40 PM PDT 24 |
Apr 21 03:47:13 PM PDT 24 |
6097350640 ps |
| T446 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.534681929 |
|
|
Apr 21 02:57:46 PM PDT 24 |
Apr 21 02:59:16 PM PDT 24 |
2229012163 ps |
| T682 |
/workspace/coverage/default/0.rom_keymgr_functest.1963676497 |
|
|
Apr 21 03:05:53 PM PDT 24 |
Apr 21 03:13:26 PM PDT 24 |
3536926030 ps |
| T683 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.679844100 |
|
|
Apr 21 03:27:35 PM PDT 24 |
Apr 21 03:32:14 PM PDT 24 |
3516849786 ps |
| T307 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.4008346528 |
|
|
Apr 21 03:11:16 PM PDT 24 |
Apr 21 03:19:06 PM PDT 24 |
3274864180 ps |
| T684 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.1453672225 |
|
|
Apr 21 03:23:49 PM PDT 24 |
Apr 21 03:41:30 PM PDT 24 |
5436660420 ps |
| T371 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.3247372408 |
|
|
Apr 21 03:11:28 PM PDT 24 |
Apr 21 03:19:39 PM PDT 24 |
4709501762 ps |
| T685 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.672096463 |
|
|
Apr 21 03:11:39 PM PDT 24 |
Apr 21 03:21:29 PM PDT 24 |
7772781348 ps |
| T686 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.4173872771 |
|
|
Apr 21 03:15:07 PM PDT 24 |
Apr 21 03:45:34 PM PDT 24 |
19395560021 ps |
| T463 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.4261132067 |
|
|
Apr 21 03:33:26 PM PDT 24 |
Apr 21 03:40:47 PM PDT 24 |
4757624850 ps |
| T687 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.3703373144 |
|
|
Apr 21 03:07:28 PM PDT 24 |
Apr 21 03:10:28 PM PDT 24 |
2817223312 ps |
| T688 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.1541309126 |
|
|
Apr 21 03:17:21 PM PDT 24 |
Apr 21 03:20:28 PM PDT 24 |
2911604468 ps |
| T689 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.277826696 |
|
|
Apr 21 03:07:53 PM PDT 24 |
Apr 21 03:11:06 PM PDT 24 |
2326075000 ps |
| T57 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.2737255307 |
|
|
Apr 21 03:26:37 PM PDT 24 |
Apr 21 03:50:02 PM PDT 24 |
17502393308 ps |
| T314 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.312238720 |
|
|
Apr 21 03:03:04 PM PDT 24 |
Apr 21 03:06:45 PM PDT 24 |
2221777887 ps |
| T690 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.2044548834 |
|
|
Apr 21 03:35:21 PM PDT 24 |
Apr 21 03:45:29 PM PDT 24 |
5744136150 ps |
| T691 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.2269347751 |
|
|
Apr 21 02:59:40 PM PDT 24 |
Apr 21 03:06:02 PM PDT 24 |
3700695272 ps |
| T692 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2065989243 |
|
|
Apr 21 03:15:30 PM PDT 24 |
Apr 21 03:20:30 PM PDT 24 |
3157280441 ps |
| T693 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.3370670558 |
|
|
Apr 21 03:38:04 PM PDT 24 |
Apr 21 03:44:25 PM PDT 24 |
3333037840 ps |
| T190 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.3928773423 |
|
|
Apr 21 03:24:04 PM PDT 24 |
Apr 21 03:44:19 PM PDT 24 |
11677065340 ps |
| T694 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.1994220028 |
|
|
Apr 21 03:27:17 PM PDT 24 |
Apr 21 03:40:02 PM PDT 24 |
4462692472 ps |
| T151 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.1969715703 |
|
|
Apr 21 03:13:57 PM PDT 24 |
Apr 21 03:26:00 PM PDT 24 |
3751524144 ps |
| T242 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.1434721170 |
|
|
Apr 21 02:57:47 PM PDT 24 |
Apr 21 03:05:45 PM PDT 24 |
3575196742 ps |
| T695 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.2483907508 |
|
|
Apr 21 03:08:53 PM PDT 24 |
Apr 21 03:14:25 PM PDT 24 |
3248748600 ps |
| T248 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.1376265423 |
|
|
Apr 21 03:20:07 PM PDT 24 |
Apr 21 03:27:50 PM PDT 24 |
4043659012 ps |
| T209 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.777406063 |
|
|
Apr 21 02:58:41 PM PDT 24 |
Apr 21 06:17:41 PM PDT 24 |
57691283057 ps |
| T696 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.396658785 |
|
|
Apr 21 02:58:53 PM PDT 24 |
Apr 21 03:12:41 PM PDT 24 |
4722623446 ps |
| T8 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.2847785930 |
|
|
Apr 21 02:56:30 PM PDT 24 |
Apr 21 03:00:15 PM PDT 24 |
2806248264 ps |
| T697 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.1402767943 |
|
|
Apr 21 03:13:19 PM PDT 24 |
Apr 21 03:17:31 PM PDT 24 |
3206007186 ps |
| T152 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.281705314 |
|
|
Apr 21 03:25:11 PM PDT 24 |
Apr 21 03:35:04 PM PDT 24 |
3840325950 ps |
| T213 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.3067306219 |
|
|
Apr 21 03:01:21 PM PDT 24 |
Apr 21 03:28:14 PM PDT 24 |
12148106476 ps |
| T698 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.922893175 |
|
|
Apr 21 03:13:14 PM PDT 24 |
Apr 21 03:21:14 PM PDT 24 |
3969992248 ps |
| T699 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.19075258 |
|
|
Apr 21 03:26:02 PM PDT 24 |
Apr 21 03:35:50 PM PDT 24 |
4738643350 ps |
| T700 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.744747055 |
|
|
Apr 21 03:13:30 PM PDT 24 |
Apr 21 03:19:03 PM PDT 24 |
4402361052 ps |
| T701 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.3926007865 |
|
|
Apr 21 03:38:01 PM PDT 24 |
Apr 21 03:47:04 PM PDT 24 |
4855109500 ps |
| T702 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.1170262920 |
|
|
Apr 21 03:23:23 PM PDT 24 |
Apr 21 04:16:11 PM PDT 24 |
11411327074 ps |
| T703 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.356247010 |
|
|
Apr 21 03:18:43 PM PDT 24 |
Apr 21 03:43:26 PM PDT 24 |
7702549130 ps |
| T138 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.1002074150 |
|
|
Apr 21 03:31:13 PM PDT 24 |
Apr 21 03:47:47 PM PDT 24 |
7685415000 ps |
| T505 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.2255197820 |
|
|
Apr 21 03:36:18 PM PDT 24 |
Apr 21 03:45:52 PM PDT 24 |
4640715040 ps |
| T704 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.2742034569 |
|
|
Apr 21 03:16:44 PM PDT 24 |
Apr 21 03:21:13 PM PDT 24 |
3328433032 ps |
| T705 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2523489450 |
|
|
Apr 21 03:01:09 PM PDT 24 |
Apr 21 03:11:52 PM PDT 24 |
4456799880 ps |
| T706 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.1925791911 |
|
|
Apr 21 03:10:04 PM PDT 24 |
Apr 21 03:17:54 PM PDT 24 |
5175726820 ps |
| T506 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.395107997 |
|
|
Apr 21 03:37:10 PM PDT 24 |
Apr 21 03:44:22 PM PDT 24 |
3903054200 ps |
| T707 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.1581736831 |
|
|
Apr 21 02:58:36 PM PDT 24 |
Apr 21 03:05:39 PM PDT 24 |
2855813019 ps |
| T708 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.3229053354 |
|
|
Apr 21 02:58:23 PM PDT 24 |
Apr 21 04:34:25 PM PDT 24 |
46837923327 ps |
| T709 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.476198522 |
|
|
Apr 21 03:19:20 PM PDT 24 |
Apr 21 03:40:07 PM PDT 24 |
7250379424 ps |
| T710 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.3648361411 |
|
|
Apr 21 03:25:26 PM PDT 24 |
Apr 21 03:34:27 PM PDT 24 |
5678365890 ps |
| T711 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.45504432 |
|
|
Apr 21 03:07:54 PM PDT 24 |
Apr 21 03:22:28 PM PDT 24 |
5677438064 ps |
| T9 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.2546821896 |
|
|
Apr 21 03:18:43 PM PDT 24 |
Apr 21 03:32:23 PM PDT 24 |
6059947729 ps |
| T712 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2031002043 |
|
|
Apr 21 03:02:07 PM PDT 24 |
Apr 21 03:09:22 PM PDT 24 |
4572187203 ps |
| T713 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.2137555859 |
|
|
Apr 21 03:35:15 PM PDT 24 |
Apr 21 03:41:46 PM PDT 24 |
3720275814 ps |
| T714 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.78999189 |
|
|
Apr 21 03:31:21 PM PDT 24 |
Apr 21 04:02:32 PM PDT 24 |
9147553938 ps |
| T321 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.758885393 |
|
|
Apr 21 03:12:59 PM PDT 24 |
Apr 21 04:17:47 PM PDT 24 |
11881505102 ps |
| T55 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.1711870501 |
|
|
Apr 21 03:19:30 PM PDT 24 |
Apr 21 03:24:58 PM PDT 24 |
4082846440 ps |
| T715 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.3026746138 |
|
|
Apr 21 02:58:12 PM PDT 24 |
Apr 21 03:00:10 PM PDT 24 |
3348281370 ps |
| T716 |
/workspace/coverage/default/3.chip_tap_straps_prod.3197374272 |
|
|
Apr 21 03:29:08 PM PDT 24 |
Apr 21 03:31:27 PM PDT 24 |
2793092131 ps |
| T717 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.2303008984 |
|
|
Apr 21 03:24:32 PM PDT 24 |
Apr 21 03:38:05 PM PDT 24 |
5280959336 ps |
| T718 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.167675542 |
|
|
Apr 21 03:15:31 PM PDT 24 |
Apr 21 03:26:16 PM PDT 24 |
3562336840 ps |
| T719 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.4207211079 |
|
|
Apr 21 03:25:03 PM PDT 24 |
Apr 21 03:39:03 PM PDT 24 |
6574688640 ps |
| T720 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.4018531900 |
|
|
Apr 21 03:08:23 PM PDT 24 |
Apr 21 03:20:03 PM PDT 24 |
5020649488 ps |
| T721 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.370230644 |
|
|
Apr 21 03:16:23 PM PDT 24 |
Apr 21 03:38:01 PM PDT 24 |
5864229064 ps |
| T722 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.832687115 |
|
|
Apr 21 03:28:34 PM PDT 24 |
Apr 21 03:41:20 PM PDT 24 |
5216741740 ps |
| T385 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.2873754566 |
|
|
Apr 21 03:32:13 PM PDT 24 |
Apr 21 03:38:03 PM PDT 24 |
3109711254 ps |
| T723 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.3434689054 |
|
|
Apr 21 02:57:18 PM PDT 24 |
Apr 21 06:37:09 PM PDT 24 |
63558001259 ps |
| T485 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.362648822 |
|
|
Apr 21 03:36:47 PM PDT 24 |
Apr 21 03:46:14 PM PDT 24 |
4718535270 ps |
| T52 |
/workspace/coverage/default/2.chip_jtag_csr_rw.229721189 |
|
|
Apr 21 03:19:05 PM PDT 24 |
Apr 21 04:00:03 PM PDT 24 |
18813234034 ps |
| T424 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.71418645 |
|
|
Apr 21 03:35:37 PM PDT 24 |
Apr 21 03:42:07 PM PDT 24 |
3383917880 ps |
| T425 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.1414519294 |
|
|
Apr 21 03:04:40 PM PDT 24 |
Apr 21 03:14:18 PM PDT 24 |
3319103272 ps |
| T426 |
/workspace/coverage/default/0.chip_sw_kmac_idle.602835210 |
|
|
Apr 21 03:02:18 PM PDT 24 |
Apr 21 03:05:46 PM PDT 24 |
2586953788 ps |
| T427 |
/workspace/coverage/default/0.chip_sw_example_concurrency.1392906636 |
|
|
Apr 21 02:58:22 PM PDT 24 |
Apr 21 03:03:28 PM PDT 24 |
3348351452 ps |
| T428 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.4075913658 |
|
|
Apr 21 03:39:08 PM PDT 24 |
Apr 21 03:48:13 PM PDT 24 |
5162622424 ps |
| T429 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.1785987024 |
|
|
Apr 21 03:20:24 PM PDT 24 |
Apr 21 03:57:03 PM PDT 24 |
13387969721 ps |
| T406 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.147909737 |
|
|
Apr 21 03:27:02 PM PDT 24 |
Apr 21 04:37:42 PM PDT 24 |
24758449559 ps |
| T430 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.2335132033 |
|
|
Apr 21 02:58:24 PM PDT 24 |
Apr 21 03:01:49 PM PDT 24 |
2727153944 ps |
| T431 |
/workspace/coverage/default/2.chip_sw_aes_entropy.445334532 |
|
|
Apr 21 03:22:55 PM PDT 24 |
Apr 21 03:27:02 PM PDT 24 |
2883497784 ps |
| T724 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.907867090 |
|
|
Apr 21 03:00:29 PM PDT 24 |
Apr 21 03:03:46 PM PDT 24 |
2802665640 ps |
| T725 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.199814585 |
|
|
Apr 21 03:18:59 PM PDT 24 |
Apr 21 03:44:02 PM PDT 24 |
7979091384 ps |
| T726 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.3017626332 |
|
|
Apr 21 03:29:49 PM PDT 24 |
Apr 21 03:41:33 PM PDT 24 |
4873702600 ps |
| T500 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.2956022499 |
|
|
Apr 21 03:35:31 PM PDT 24 |
Apr 21 03:41:38 PM PDT 24 |
3817685304 ps |
| T727 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.1971810213 |
|
|
Apr 21 03:29:54 PM PDT 24 |
Apr 21 03:43:11 PM PDT 24 |
5548054448 ps |
| T414 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.603595318 |
|
|
Apr 21 03:36:16 PM PDT 24 |
Apr 21 03:47:11 PM PDT 24 |
5771124344 ps |
| T728 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.2918119999 |
|
|
Apr 21 03:38:29 PM PDT 24 |
Apr 21 03:49:50 PM PDT 24 |
5756613860 ps |
| T729 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.4193004797 |
|
|
Apr 21 02:58:59 PM PDT 24 |
Apr 21 03:16:46 PM PDT 24 |
6810713242 ps |
| T282 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.788636508 |
|
|
Apr 21 03:25:18 PM PDT 24 |
Apr 21 03:29:29 PM PDT 24 |
3186983510 ps |
| T522 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.1951831567 |
|
|
Apr 21 03:21:44 PM PDT 24 |
Apr 21 03:29:28 PM PDT 24 |
3847926792 ps |
| T730 |
/workspace/coverage/default/0.chip_sw_example_rom.3256720907 |
|
|
Apr 21 02:55:21 PM PDT 24 |
Apr 21 02:57:00 PM PDT 24 |
2134737050 ps |
| T731 |
/workspace/coverage/default/2.chip_sw_aes_idle.1806431188 |
|
|
Apr 21 03:21:59 PM PDT 24 |
Apr 21 03:25:07 PM PDT 24 |
2981085510 ps |
| T732 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.1437431595 |
|
|
Apr 21 02:59:46 PM PDT 24 |
Apr 21 03:15:47 PM PDT 24 |
6235453870 ps |
| T347 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.2017018052 |
|
|
Apr 21 03:08:13 PM PDT 24 |
Apr 21 03:20:25 PM PDT 24 |
4307313420 ps |
| T733 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.3737574808 |
|
|
Apr 21 03:04:58 PM PDT 24 |
Apr 21 03:10:45 PM PDT 24 |
3508698860 ps |
| T734 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.2483821126 |
|
|
Apr 21 03:00:03 PM PDT 24 |
Apr 21 03:04:32 PM PDT 24 |
3286281178 ps |
| T735 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.1132426878 |
|
|
Apr 21 03:19:44 PM PDT 24 |
Apr 21 03:34:42 PM PDT 24 |
8973225244 ps |
| T736 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.870775452 |
|
|
Apr 21 03:13:03 PM PDT 24 |
Apr 21 03:17:46 PM PDT 24 |
2412454760 ps |
| T496 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2741768420 |
|
|
Apr 21 03:29:51 PM PDT 24 |
Apr 21 03:40:29 PM PDT 24 |
4981150924 ps |
| T737 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.3230473333 |
|
|
Apr 21 03:05:38 PM PDT 24 |
Apr 21 03:09:31 PM PDT 24 |
2318336950 ps |
| T738 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.672264371 |
|
|
Apr 21 03:25:58 PM PDT 24 |
Apr 21 03:30:07 PM PDT 24 |
2980487178 ps |
| T739 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1961568219 |
|
|
Apr 21 03:26:34 PM PDT 24 |
Apr 21 03:37:20 PM PDT 24 |
4304044264 ps |
| T336 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.30951003 |
|
|
Apr 21 03:07:49 PM PDT 24 |
Apr 21 03:12:22 PM PDT 24 |
2499610028 ps |
| T362 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.2783603214 |
|
|
Apr 21 03:21:15 PM PDT 24 |
Apr 21 03:26:41 PM PDT 24 |
3725045264 ps |
| T740 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.2286478416 |
|
|
Apr 21 03:05:51 PM PDT 24 |
Apr 21 03:10:54 PM PDT 24 |
4940527228 ps |
| T41 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.1963301362 |
|
|
Apr 21 03:08:16 PM PDT 24 |
Apr 21 08:05:16 PM PDT 24 |
79376392364 ps |
| T375 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.2704594666 |
|
|
Apr 21 02:58:00 PM PDT 24 |
Apr 21 03:10:48 PM PDT 24 |
5459634376 ps |
| T741 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.63258598 |
|
|
Apr 21 03:16:54 PM PDT 24 |
Apr 21 03:28:45 PM PDT 24 |
10500772632 ps |
| T742 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.500133107 |
|
|
Apr 21 03:00:02 PM PDT 24 |
Apr 21 03:22:08 PM PDT 24 |
10896612127 ps |
| T743 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.2927190125 |
|
|
Apr 21 03:39:34 PM PDT 24 |
Apr 21 03:46:53 PM PDT 24 |
3529126824 ps |
| T744 |
/workspace/coverage/default/1.chip_sw_example_concurrency.3376573291 |
|
|
Apr 21 03:08:07 PM PDT 24 |
Apr 21 03:11:47 PM PDT 24 |
2874206336 ps |
| T525 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.1265147139 |
|
|
Apr 21 03:32:57 PM PDT 24 |
Apr 21 03:45:19 PM PDT 24 |
5003691700 ps |
| T745 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.4095785396 |
|
|
Apr 21 03:35:13 PM PDT 24 |
Apr 21 03:44:16 PM PDT 24 |
3989489946 ps |
| T498 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.2484376604 |
|
|
Apr 21 03:34:15 PM PDT 24 |
Apr 21 03:45:14 PM PDT 24 |
4216527336 ps |
| T746 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.3061393375 |
|
|
Apr 21 03:32:11 PM PDT 24 |
Apr 21 03:45:28 PM PDT 24 |
5363974382 ps |
| T747 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.597143296 |
|
|
Apr 21 03:13:06 PM PDT 24 |
Apr 21 03:17:49 PM PDT 24 |
2626267098 ps |
| T748 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2107019671 |
|
|
Apr 21 03:01:56 PM PDT 24 |
Apr 21 03:13:01 PM PDT 24 |
4343889304 ps |
| T471 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.1560942380 |
|
|
Apr 21 03:37:34 PM PDT 24 |
Apr 21 03:45:12 PM PDT 24 |
3629572556 ps |
| T749 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.3019059842 |
|
|
Apr 21 03:38:23 PM PDT 24 |
Apr 21 03:45:04 PM PDT 24 |
3604008146 ps |
| T521 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.3129646662 |
|
|
Apr 21 03:40:31 PM PDT 24 |
Apr 21 03:47:09 PM PDT 24 |
3333572768 ps |
| T442 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.1727327462 |
|
|
Apr 21 03:15:20 PM PDT 24 |
Apr 21 03:24:22 PM PDT 24 |
5281377750 ps |
| T750 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.3867245662 |
|
|
Apr 21 03:24:16 PM PDT 24 |
Apr 21 03:32:27 PM PDT 24 |
3785137070 ps |
| T751 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.2660726672 |
|
|
Apr 21 03:28:45 PM PDT 24 |
Apr 21 03:52:50 PM PDT 24 |
5873112840 ps |
| T752 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.1795505777 |
|
|
Apr 21 02:56:57 PM PDT 24 |
Apr 21 03:01:27 PM PDT 24 |
3114809445 ps |
| T218 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.470754193 |
|
|
Apr 21 02:58:10 PM PDT 24 |
Apr 21 03:00:06 PM PDT 24 |
2441736820 ps |
| T192 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.2117643946 |
|
|
Apr 21 03:16:09 PM PDT 24 |
Apr 21 03:35:45 PM PDT 24 |
5918177832 ps |
| T753 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.76948156 |
|
|
Apr 21 03:28:33 PM PDT 24 |
Apr 21 03:31:43 PM PDT 24 |
2255586120 ps |
| T494 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.2742028176 |
|
|
Apr 21 03:41:00 PM PDT 24 |
Apr 21 03:50:43 PM PDT 24 |
5228139250 ps |
| T754 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.2533965367 |
|
|
Apr 21 03:33:19 PM PDT 24 |
Apr 21 03:52:54 PM PDT 24 |
9984369038 ps |
| T755 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.1787330681 |
|
|
Apr 21 03:03:38 PM PDT 24 |
Apr 21 03:09:12 PM PDT 24 |
2601811620 ps |
| T756 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1204460080 |
|
|
Apr 21 03:27:58 PM PDT 24 |
Apr 21 03:40:19 PM PDT 24 |
5161315864 ps |
| T365 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.4091256022 |
|
|
Apr 21 03:19:05 PM PDT 24 |
Apr 21 03:30:33 PM PDT 24 |
4308531900 ps |
| T103 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.1710043085 |
|
|
Apr 21 03:00:34 PM PDT 24 |
Apr 21 03:07:06 PM PDT 24 |
7270935384 ps |
| T502 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.4225130689 |
|
|
Apr 21 03:37:46 PM PDT 24 |
Apr 21 03:49:28 PM PDT 24 |
4304230240 ps |
| T104 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.901788421 |
|
|
Apr 21 03:26:38 PM PDT 24 |
Apr 21 04:00:26 PM PDT 24 |
23759556904 ps |
| T757 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.594376182 |
|
|
Apr 21 03:16:51 PM PDT 24 |
Apr 21 03:22:35 PM PDT 24 |
3482592152 ps |
| T758 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.3069320862 |
|
|
Apr 21 03:20:33 PM PDT 24 |
Apr 21 08:18:32 PM PDT 24 |
79094640435 ps |
| T415 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.806689640 |
|
|
Apr 21 03:34:45 PM PDT 24 |
Apr 21 03:43:08 PM PDT 24 |
3252150920 ps |
| T475 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.939633325 |
|
|
Apr 21 03:36:32 PM PDT 24 |
Apr 21 03:45:51 PM PDT 24 |
6086502510 ps |
| T355 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.1184025649 |
|
|
Apr 21 03:15:19 PM PDT 24 |
Apr 21 03:19:42 PM PDT 24 |
2805854279 ps |
| T759 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.2154680449 |
|
|
Apr 21 03:16:51 PM PDT 24 |
Apr 21 03:54:15 PM PDT 24 |
9420198520 ps |
| T760 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.1975607683 |
|
|
Apr 21 03:12:14 PM PDT 24 |
Apr 21 04:28:34 PM PDT 24 |
19145056032 ps |
| T761 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.684539300 |
|
|
Apr 21 03:31:18 PM PDT 24 |
Apr 21 03:41:28 PM PDT 24 |
3940834914 ps |
| T762 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.2733116133 |
|
|
Apr 21 03:28:46 PM PDT 24 |
Apr 21 03:35:12 PM PDT 24 |
2884928620 ps |
| T763 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.1010094348 |
|
|
Apr 21 03:09:32 PM PDT 24 |
Apr 21 03:27:11 PM PDT 24 |
6576411978 ps |
| T513 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.3662154319 |
|
|
Apr 21 03:40:20 PM PDT 24 |
Apr 21 03:54:48 PM PDT 24 |
5301034500 ps |
| T764 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.2321557762 |
|
|
Apr 21 03:19:08 PM PDT 24 |
Apr 21 03:24:41 PM PDT 24 |
3414533912 ps |
| T765 |
/workspace/coverage/default/0.chip_sw_edn_kat.1078294611 |
|
|
Apr 21 02:58:53 PM PDT 24 |
Apr 21 03:10:14 PM PDT 24 |
2917527360 ps |
| T419 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.3531434642 |
|
|
Apr 21 03:01:59 PM PDT 24 |
Apr 21 03:28:21 PM PDT 24 |
16733647416 ps |
| T766 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.325235750 |
|
|
Apr 21 03:35:20 PM PDT 24 |
Apr 21 03:46:09 PM PDT 24 |
4623706200 ps |
| T459 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.3060272586 |
|
|
Apr 21 03:33:19 PM PDT 24 |
Apr 21 03:42:04 PM PDT 24 |
5015136000 ps |
| T767 |
/workspace/coverage/default/1.chip_sw_example_flash.2280571349 |
|
|
Apr 21 03:06:34 PM PDT 24 |
Apr 21 03:09:22 PM PDT 24 |
2854985576 ps |
| T90 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.471877108 |
|
|
Apr 21 03:37:42 PM PDT 24 |
Apr 21 03:47:22 PM PDT 24 |
4997085160 ps |
| T768 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.433719047 |
|
|
Apr 21 03:20:05 PM PDT 24 |
Apr 21 03:28:39 PM PDT 24 |
4730790424 ps |
| T769 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.3828418253 |
|
|
Apr 21 03:38:56 PM PDT 24 |
Apr 21 03:50:25 PM PDT 24 |
5388235800 ps |
| T770 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.1044854931 |
|
|
Apr 21 03:34:15 PM PDT 24 |
Apr 21 03:50:30 PM PDT 24 |
9483247099 ps |
| T771 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.3428140864 |
|
|
Apr 21 03:35:15 PM PDT 24 |
Apr 21 03:42:03 PM PDT 24 |
3358825950 ps |
| T318 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.3454245288 |
|
|
Apr 21 03:13:22 PM PDT 24 |
Apr 21 03:26:49 PM PDT 24 |
9489448395 ps |
| T312 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.3062506010 |
|
|
Apr 21 03:37:51 PM PDT 24 |
Apr 21 03:48:46 PM PDT 24 |
5623100478 ps |
| T772 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.3173674991 |
|
|
Apr 21 03:19:45 PM PDT 24 |
Apr 21 04:50:48 PM PDT 24 |
50543065650 ps |
| T773 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.2078104701 |
|
|
Apr 21 03:25:59 PM PDT 24 |
Apr 21 04:20:18 PM PDT 24 |
25013034777 ps |
| T774 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1912147193 |
|
|
Apr 21 03:16:20 PM PDT 24 |
Apr 21 03:24:25 PM PDT 24 |
4264979706 ps |
| T510 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.3695235304 |
|
|
Apr 21 03:37:07 PM PDT 24 |
Apr 21 03:44:31 PM PDT 24 |
3543689932 ps |
| T775 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.4207036070 |
|
|
Apr 21 03:11:19 PM PDT 24 |
Apr 21 03:39:19 PM PDT 24 |
21702498680 ps |
| T776 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.1094303318 |
|
|
Apr 21 03:18:10 PM PDT 24 |
Apr 21 03:21:32 PM PDT 24 |
2692358696 ps |
| T251 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.3533875810 |
|
|
Apr 21 03:07:29 PM PDT 24 |
Apr 21 03:18:45 PM PDT 24 |
4511952790 ps |
| T777 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.101083331 |
|
|
Apr 21 03:18:52 PM PDT 24 |
Apr 21 03:24:06 PM PDT 24 |
2423632344 ps |
| T778 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.1532850854 |
|
|
Apr 21 03:00:55 PM PDT 24 |
Apr 21 03:03:43 PM PDT 24 |
2012562419 ps |
| T779 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.1142247712 |
|
|
Apr 21 03:34:27 PM PDT 24 |
Apr 21 04:02:52 PM PDT 24 |
8133139624 ps |
| T780 |
/workspace/coverage/default/2.chip_sw_example_flash.1269924078 |
|
|
Apr 21 03:18:57 PM PDT 24 |
Apr 21 03:23:04 PM PDT 24 |
3069070300 ps |
| T781 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.1860470637 |
|
|
Apr 21 03:21:56 PM PDT 24 |
Apr 21 03:32:21 PM PDT 24 |
5178194936 ps |
| T291 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.1223210167 |
|
|
Apr 21 03:35:24 PM PDT 24 |
Apr 21 03:46:16 PM PDT 24 |
5840491644 ps |
| T322 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.700909765 |
|
|
Apr 21 03:23:59 PM PDT 24 |
Apr 21 04:32:27 PM PDT 24 |
12676487012 ps |
| T782 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.474635273 |
|
|
Apr 21 03:21:26 PM PDT 24 |
Apr 21 03:24:37 PM PDT 24 |
2773892000 ps |
| T783 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.1926809934 |
|
|
Apr 21 03:25:17 PM PDT 24 |
Apr 21 03:30:54 PM PDT 24 |
3714379700 ps |
| T784 |
/workspace/coverage/default/0.chip_sw_example_flash.2281951618 |
|
|
Apr 21 02:55:59 PM PDT 24 |
Apr 21 02:59:11 PM PDT 24 |
2781520902 ps |
| T785 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.2215343849 |
|
|
Apr 21 03:03:55 PM PDT 24 |
Apr 21 03:10:46 PM PDT 24 |
4255586403 ps |
| T786 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.3605164623 |
|
|
Apr 21 03:30:41 PM PDT 24 |
Apr 21 03:41:58 PM PDT 24 |
4020018945 ps |
| T787 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.728224177 |
|
|
Apr 21 03:37:29 PM PDT 24 |
Apr 21 03:48:41 PM PDT 24 |
5180596250 ps |
| T184 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.2948184275 |
|
|
Apr 21 02:59:17 PM PDT 24 |
Apr 21 03:09:33 PM PDT 24 |
6618108725 ps |
| T146 |
/workspace/coverage/default/0.chip_jtag_csr_rw.659062609 |
|
|
Apr 21 02:53:38 PM PDT 24 |
Apr 21 03:12:37 PM PDT 24 |
12246242080 ps |
| T788 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.552684593 |
|
|
Apr 21 03:33:05 PM PDT 24 |
Apr 21 03:37:44 PM PDT 24 |
3005159330 ps |
| T63 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.3012944570 |
|
|
Apr 21 03:06:43 PM PDT 24 |
Apr 21 03:14:45 PM PDT 24 |
5530790824 ps |
| T477 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.2140836739 |
|
|
Apr 21 02:56:17 PM PDT 24 |
Apr 21 03:06:23 PM PDT 24 |
4760769194 ps |
| T54 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.3289390763 |
|
|
Apr 21 03:18:19 PM PDT 24 |
Apr 21 03:23:32 PM PDT 24 |
3136101148 ps |
| T493 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.3762349734 |
|
|
Apr 21 03:38:38 PM PDT 24 |
Apr 21 03:45:02 PM PDT 24 |
3075034500 ps |
| T222 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.935477401 |
|
|
Apr 21 02:58:19 PM PDT 24 |
Apr 21 03:09:52 PM PDT 24 |
5455156518 ps |
| T789 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.1223409875 |
|
|
Apr 21 02:59:10 PM PDT 24 |
Apr 21 03:09:29 PM PDT 24 |
5709729704 ps |
| T790 |
/workspace/coverage/default/2.rom_keymgr_functest.217828422 |
|
|
Apr 21 03:29:22 PM PDT 24 |
Apr 21 03:37:25 PM PDT 24 |
4908526060 ps |
| T791 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3787444069 |
|
|
Apr 21 03:25:01 PM PDT 24 |
Apr 21 03:35:41 PM PDT 24 |
4303473932 ps |
| T792 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.283862078 |
|
|
Apr 21 03:01:25 PM PDT 24 |
Apr 21 03:10:06 PM PDT 24 |
5081828604 ps |
| T793 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.996675589 |
|
|
Apr 21 02:58:37 PM PDT 24 |
Apr 21 03:05:16 PM PDT 24 |
4943232140 ps |
| T216 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.4124510067 |
|
|
Apr 21 03:22:17 PM PDT 24 |
Apr 21 03:27:17 PM PDT 24 |
2832970531 ps |
| T794 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.4013104485 |
|
|
Apr 21 02:58:30 PM PDT 24 |
Apr 21 03:42:56 PM PDT 24 |
32572615279 ps |
| T795 |
/workspace/coverage/default/0.chip_tap_straps_prod.1138044014 |
|
|
Apr 21 03:01:46 PM PDT 24 |
Apr 21 03:32:05 PM PDT 24 |
15058707954 ps |
| T416 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.3061389633 |
|
|
Apr 21 03:32:48 PM PDT 24 |
Apr 21 03:43:21 PM PDT 24 |
5418014042 ps |
| T796 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.3864126994 |
|
|
Apr 21 03:16:42 PM PDT 24 |
Apr 21 03:21:52 PM PDT 24 |
2924918836 ps |
| T797 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.3243881181 |
|
|
Apr 21 03:07:02 PM PDT 24 |
Apr 21 03:15:59 PM PDT 24 |
4254108272 ps |
| T798 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.440316804 |
|
|
Apr 21 03:04:59 PM PDT 24 |
Apr 21 03:09:39 PM PDT 24 |
2980767486 ps |
| T799 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.1635588854 |
|
|
Apr 21 03:03:10 PM PDT 24 |
Apr 21 03:10:10 PM PDT 24 |
3504067384 ps |
| T800 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.1626436170 |
|
|
Apr 21 02:59:34 PM PDT 24 |
Apr 21 03:02:48 PM PDT 24 |
2926606928 ps |
| T801 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.2432664230 |
|
|
Apr 21 03:26:13 PM PDT 24 |
Apr 21 03:34:06 PM PDT 24 |
5063930440 ps |
| T802 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.2419462906 |
|
|
Apr 21 03:11:18 PM PDT 24 |
Apr 21 03:21:04 PM PDT 24 |
6017083672 ps |
| T803 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.2375706772 |
|
|
Apr 21 03:12:38 PM PDT 24 |
Apr 21 03:44:52 PM PDT 24 |
8929824460 ps |
| T804 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.4267496448 |
|
|
Apr 21 03:21:39 PM PDT 24 |
Apr 21 03:38:46 PM PDT 24 |
5808693670 ps |
| T196 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3272876906 |
|
|
Apr 21 03:14:13 PM PDT 24 |
Apr 21 03:27:46 PM PDT 24 |
4328912830 ps |
| T243 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.1901477118 |
|
|
Apr 21 03:07:14 PM PDT 24 |
Apr 21 03:19:06 PM PDT 24 |
4498280498 ps |
| T805 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3150536443 |
|
|
Apr 21 03:27:53 PM PDT 24 |
Apr 21 03:36:01 PM PDT 24 |
4805423138 ps |
| T453 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.2070497064 |
|
|
Apr 21 03:23:02 PM PDT 24 |
Apr 21 03:38:15 PM PDT 24 |
4250784000 ps |
| T806 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.2513978419 |
|
|
Apr 21 03:05:15 PM PDT 24 |
Apr 21 03:10:46 PM PDT 24 |
3257630728 ps |
| T363 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.1343410950 |
|
|
Apr 21 02:59:09 PM PDT 24 |
Apr 21 03:06:42 PM PDT 24 |
3966978604 ps |
| T807 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.3426239800 |
|
|
Apr 21 02:58:39 PM PDT 24 |
Apr 21 03:19:07 PM PDT 24 |
9656224562 ps |