Unified Coverage Report :: Group :: chip_env_pkg::chip_alert_cg_wrap::alert_cg

Group : chip_env_pkg::chip_alert_cg_wrap::alert_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_chip_env_0.1/chip_env_cov.sv

65 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
adc_ctrl_aon_fatal_fault	100.00	1	100	1	64	64
aes_fatal_fault	100.00	1	100	1	64	64
aes_recov_ctrl_update_err	100.00	1	100	1	64	64
aon_timer_aon_fatal_fault	100.00	1	100	1	64	64
clkmgr_aon_fatal_fault	100.00	1	100	1	64	64
clkmgr_aon_recov_fault	100.00	1	100	1	64	64
csrng_fatal_alert	100.00	1	100	1	64	64
csrng_recov_alert	100.00	1	100	1	64	64
edn0_fatal_alert	100.00	1	100	1	64	64
edn0_recov_alert	100.00	1	100	1	64	64
edn1_fatal_alert	100.00	1	100	1	64	64
edn1_recov_alert	100.00	1	100	1	64	64
entropy_src_fatal_alert	100.00	1	100	1	64	64
entropy_src_recov_alert	100.00	1	100	1	64	64
flash_ctrl_fatal_err	100.00	1	100	1	64	64
flash_ctrl_fatal_prim_flash_alert	100.00	1	100	1	64	64
flash_ctrl_fatal_std_err	100.00	1	100	1	64	64
flash_ctrl_recov_err	100.00	1	100	1	64	64
flash_ctrl_recov_prim_flash_alert	100.00	1	100	1	64	64
gpio_fatal_fault	100.00	1	100	1	64	64
hmac_fatal_fault	100.00	1	100	1	64	64
i2c0_fatal_fault	100.00	1	100	1	64	64
i2c1_fatal_fault	100.00	1	100	1	64	64
i2c2_fatal_fault	100.00	1	100	1	64	64
keymgr_fatal_fault_err	100.00	1	100	1	64	64
keymgr_recov_operation_err	100.00	1	100	1	64	64
kmac_fatal_fault_err	100.00	1	100	1	64	64
kmac_recov_operation_err	100.00	1	100	1	64	64
lc_ctrl_fatal_bus_integ_error	100.00	1	100	1	64	64
lc_ctrl_fatal_prog_error	100.00	1	100	1	64	64
lc_ctrl_fatal_state_error	100.00	1	100	1	64	64
otbn_fatal	100.00	1	100	1	64	64
otbn_recov	100.00	1	100	1	64	64
otp_ctrl_fatal_bus_integ_error	100.00	1	100	1	64	64
otp_ctrl_fatal_check_error	100.00	1	100	1	64	64
otp_ctrl_fatal_macro_error	100.00	1	100	1	64	64
otp_ctrl_fatal_prim_otp_alert	100.00	1	100	1	64	64
otp_ctrl_recov_prim_otp_alert	100.00	1	100	1	64	64
pattgen_fatal_fault	100.00	1	100	1	64	64
pinmux_aon_fatal_fault	100.00	1	100	1	64	64
pwm_aon_fatal_fault	100.00	1	100	1	64	64
pwrmgr_aon_fatal_fault	100.00	1	100	1	64	64
rom_ctrl_fatal	100.00	1	100	1	64	64
rstmgr_aon_fatal_cnsty_fault	100.00	1	100	1	64	64
rstmgr_aon_fatal_fault	100.00	1	100	1	64	64
rv_core_ibex_fatal_hw_err	100.00	1	100	1	64	64
rv_core_ibex_fatal_sw_err	100.00	1	100	1	64	64
rv_core_ibex_recov_hw_err	100.00	1	100	1	64	64
rv_core_ibex_recov_sw_err	100.00	1	100	1	64	64
rv_dm_fatal_fault	100.00	1	100	1	64	64
rv_plic_fatal_fault	100.00	1	100	1	64	64
rv_timer_fatal_fault	100.00	1	100	1	64	64
sensor_ctrl_aon_fatal_alert	100.00	1	100	1	64	64
sensor_ctrl_aon_recov_alert	100.00	1	100	1	64	64
spi_device_fatal_fault	100.00	1	100	1	64	64
spi_host0_fatal_fault	100.00	1	100	1	64	64
spi_host1_fatal_fault	100.00	1	100	1	64	64
sram_ctrl_main_fatal_error	100.00	1	100	1	64	64
sram_ctrl_ret_aon_fatal_error	100.00	1	100	1	64	64
sysrst_ctrl_aon_fatal_fault	100.00	1	100	1	64	64
uart0_fatal_fault	100.00	1	100	1	64	64
uart1_fatal_fault	100.00	1	100	1	64	64
uart2_fatal_fault	100.00	1	100	1	64	64
uart3_fatal_fault	100.00	1	100	1	64	64
usbdev_fatal_fault	100.00	1	100	1	64	64

---

Group Instance : adc_ctrl_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance adc_ctrl_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance adc_ctrl_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aes_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aes_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aes_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aes_recov_ctrl_update_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aes_recov_ctrl_update_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aes_recov_ctrl_update_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aon_timer_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aon_timer_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aon_timer_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : clkmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance clkmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance clkmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : clkmgr_aon_recov_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance clkmgr_aon_recov_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance clkmgr_aon_recov_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : csrng_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance csrng_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance csrng_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : csrng_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance csrng_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance csrng_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn0_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn0_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn0_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn0_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn0_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn0_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn1_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn1_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn1_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn1_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn1_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn1_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : entropy_src_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance entropy_src_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance entropy_src_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : entropy_src_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance entropy_src_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance entropy_src_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_prim_flash_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_prim_flash_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_prim_flash_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_std_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_std_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_std_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_recov_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_recov_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_recov_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_recov_prim_flash_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_recov_prim_flash_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_recov_prim_flash_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : gpio_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance gpio_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance gpio_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : hmac_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance hmac_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance hmac_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c2_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c2_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c2_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : keymgr_fatal_fault_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance keymgr_fatal_fault_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance keymgr_fatal_fault_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : keymgr_recov_operation_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance keymgr_recov_operation_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance keymgr_recov_operation_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : kmac_fatal_fault_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance kmac_fatal_fault_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance kmac_fatal_fault_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : kmac_recov_operation_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance kmac_recov_operation_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance kmac_recov_operation_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_bus_integ_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_bus_integ_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_bus_integ_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_prog_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_prog_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_prog_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_state_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_state_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_state_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otbn_fatal

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otbn_fatal

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otbn_fatal

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otbn_recov

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otbn_recov

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otbn_recov

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_bus_integ_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_bus_integ_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_bus_integ_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_check_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_check_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_check_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_macro_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_macro_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_macro_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_prim_otp_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_prim_otp_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_prim_otp_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_recov_prim_otp_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_recov_prim_otp_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_recov_prim_otp_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pattgen_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pattgen_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pattgen_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pinmux_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pinmux_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pinmux_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pwm_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pwm_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pwm_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pwrmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pwrmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pwrmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rom_ctrl_fatal

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rom_ctrl_fatal

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rom_ctrl_fatal

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rstmgr_aon_fatal_cnsty_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rstmgr_aon_fatal_cnsty_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rstmgr_aon_fatal_cnsty_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rstmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rstmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rstmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_fatal_hw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_fatal_hw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_fatal_hw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_fatal_sw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_fatal_sw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_fatal_sw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_recov_hw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_recov_hw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_recov_hw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_recov_sw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_recov_sw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_recov_sw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_dm_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_dm_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_dm_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_plic_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_plic_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_plic_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_timer_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_timer_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_timer_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sensor_ctrl_aon_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sensor_ctrl_aon_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sensor_ctrl_aon_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sensor_ctrl_aon_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sensor_ctrl_aon_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sensor_ctrl_aon_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_device_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_device_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_device_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_host0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_host0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_host0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_host1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_host1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_host1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sram_ctrl_main_fatal_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sram_ctrl_main_fatal_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sram_ctrl_main_fatal_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sram_ctrl_ret_aon_fatal_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sram_ctrl_ret_aon_fatal_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sram_ctrl_ret_aon_fatal_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sysrst_ctrl_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sysrst_ctrl_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sysrst_ctrl_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart2_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart2_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart2_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart3_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart3_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart3_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : usbdev_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance usbdev_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance usbdev_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4998

1

T87

38

T62

1

T88

43

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

115103

1

T31

585

T32

584

T70

603

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

168

1

T87

30

T62

1

T88

51

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4489

1

T2

529

T87

36

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2856

1

T173

811

T87

33

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

785

1

T87

35

T62

1

T88

36

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

9952

1

T31

1716

T87

41

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

166

1

T87

33

T62

1

T88

36

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8215

1

T616

1193

T87

41

T265

1104

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

161

1

T87

20

T17

1

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

9415

1

T87

32

T371

1194

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

157

1

T87

28

T62

1

T88

33

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5465

1

T66

1072

T87

31

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

161

1

T87

32

T17

1

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8781

1

T87

39

T17

1

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

7652

1

T87

44

T17

1

T266

1157

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8760

1

T87

37

T17

1

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

391

1

T91

2

T121

2

T247

36

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

168

1

T87

39

T17

1

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4155

1

T87

28

T62

1

T63

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2980

1

T87

44

T62

1

T88

44

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1526

1

T87

46

T17

1

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2592

1

T87

48

T62

1

T88

32

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1507

1

T87

42

T62

1

T63

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4165

1

T87

27

T62

1

T63

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

191

1

T87

40

T62

1

T88

35

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

113988

1

T31

585

T32

1714

T70

603

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

161

1

T87

41

T62

1

T63

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2509

1

T282

1

T87

45

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

190

1

T87

43

T62

1

T88

43

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4258

1

T160

812

T87

41

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1388438

1

T31

585

T32

584

T70

603

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

172

1

T87

40

T62

1

T155

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1530

1

T87

33

T62

1

T88

48

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

52339

1

T31

278

T32

277

T70

285

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1021

1

T160

812

T87

53

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3108

1

T87

33

T62

1

T63

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

193

1

T87

41

T62

1

T88

34

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1021

1

T87

44

T62

1

T63

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2556

1

T87

29

T62

1

T63

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3662

1

T87

34

T111

809

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8426

1

T245

495

T87

23

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

7680

1

T177

1721

T87

47

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2607

1

T87

32

T62

1

T338

815

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1530

1

T87

48

T62

1

T275

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

41874

1

T179

357

T87

14

T222

2847

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

9262

1

T87

39

T62

1

T88

28

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

116

1

T87

15

T62

1

T88

17

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

248

1

T87

33

T62

1

T74

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

10378

1

T164

1101

T87

38

T626

1102

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

11013

1

T87

29

T62

1

T283

1172

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2817

1

T70

821

T87

25

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3795

1

T87

37

T62

1

T135

147

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

19226

1

T87

37

T62

1

T134

1180

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3104

1

T87

41

T109

812

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4691

1

T87

42

T62

1

T88

38

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3662

1

T87

47

T62

1

T274

1303

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1894

1

T87

31

T62

1

T88

36

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

187

1

T87

36

T62

1

T88

36

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4205

1

T87

34

T62

1

T272

509

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2327

1

T87

38

T62

1

T88

52

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2010

1

T87

32

T62

1

T88

41

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3697

1

T87

46

T17

1

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6397

1

T87

35

T17

1

T62

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

7101

1

T87

39

T17

1

T62

1