SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.78 | 84.78 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 84.97 | 84.97 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.97 | 84.97 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.97 | 84.97 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
95.46 | 92.83 | 93.54 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 141 | 85.98 |
Total Bits | 11012 | 9336 | 84.78 |
Total Bits 0->1 | 5506 | 4670 | 84.82 |
Total Bits 1->0 | 5506 | 4666 | 84.74 |
Ports | 164 | 141 | 85.98 |
Port Bits | 11012 | 9336 | 84.78 |
Port Bits 0->1 | 5506 | 4670 | 84.82 |
Port Bits 1->0 | 5506 | 4666 | 84.74 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T1,T113,T115 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T70,*T71,*T72 | Yes | T70,T71,T72 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T73,*T74,*T75 | Yes | T73,T74,T75 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T70,T71,T72 | Yes | T70,T71,T72 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T70,T71,T78 | Yes | T70,T71,T78 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T70,T71,T78 | Yes | T70,T71,T78 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T147,*T148,*T149 | Yes | T147,T148,T149 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T70,T71,T72 | Yes | T70,T71,T78 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T4,*T44,*T150 | Yes | T4,T44,T150 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T70,*T71,*T72 | Yes | T70,T71,T72 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T70,*T72,*T78 | Yes | T70,T72,T78 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T73,*T74,*T75 | Yes | T73,T74,T75 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T70,T71,T72 | Yes | T70,T71,T72 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T30,T31,T32 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T30,T31,T32 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T70,T78,T151 | Yes | T70,T72,T78 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T152,T153,T154 | Yes | T152,T153,T154 | OUTPUT |
intr_otp_error_o | Yes | Yes | T152,T153,T154 | Yes | T152,T153,T154 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T55,T56,T155 | Yes | T55,T56,T155 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T30,T32,T61 | Yes | T30,T32,T61 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T156,T55,T157 | Yes | T156,T55,T157 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T157,T81,T82 | Yes | T157,T81,T82 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T157,T81,T82 | Yes | T157,T81,T82 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T55,T56,T81 | Yes | T55,T56,T81 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T55,T56,T81 | Yes | T55,T56,T81 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T55,T56,T155 | Yes | T55,T56,T155 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T30,T32,T61 | Yes | T30,T32,T61 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T156,T55,T157 | Yes | T156,T55,T157 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T55,T56,T81 | Yes | T55,T56,T81 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T55,T56,T81 | Yes | T55,T56,T81 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T20,T122,T123 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[31:0] | Yes | Yes | T158 | Yes | T159,T160,T158 | INPUT |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[2:0] | Yes | Yes | T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[3] | No | No | No | INPUT | ||
lc_otp_program_i.count[15:4] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[17:16] | No | No | No | INPUT | ||
lc_otp_program_i.count[20:18] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[21] | No | No | No | INPUT | ||
lc_otp_program_i.count[23:22] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[24] | No | No | No | INPUT | ||
lc_otp_program_i.count[38:25] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.count[39] | No | No | No | INPUT | ||
lc_otp_program_i.count[47:40] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[48] | No | No | No | INPUT | ||
lc_otp_program_i.count[68:49] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.count[69] | No | No | No | INPUT | ||
lc_otp_program_i.count[91:70] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[92] | No | No | No | INPUT | ||
lc_otp_program_i.count[93] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[94] | No | No | No | INPUT | ||
lc_otp_program_i.count[97:95] | Yes | Yes | T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.count[98] | No | No | No | INPUT | ||
lc_otp_program_i.count[116:99] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.count[118:117] | No | No | No | INPUT | ||
lc_otp_program_i.count[120:119] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[121] | No | No | No | INPUT | ||
lc_otp_program_i.count[123:122] | Yes | Yes | T42,T4,T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.count[124] | No | No | No | INPUT | ||
lc_otp_program_i.count[128:125] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[129] | No | No | No | INPUT | ||
lc_otp_program_i.count[134:130] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[135] | No | No | No | INPUT | ||
lc_otp_program_i.count[137:136] | Yes | Yes | T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.count[139:138] | No | No | No | INPUT | ||
lc_otp_program_i.count[140] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[141] | No | No | No | INPUT | ||
lc_otp_program_i.count[150:142] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[151] | No | No | No | INPUT | ||
lc_otp_program_i.count[153:152] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[154] | No | No | No | INPUT | ||
lc_otp_program_i.count[161:155] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[162] | No | No | No | INPUT | ||
lc_otp_program_i.count[169:163] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[170] | No | No | No | INPUT | ||
lc_otp_program_i.count[177:171] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[178] | No | No | No | INPUT | ||
lc_otp_program_i.count[186:179] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[187] | No | No | No | INPUT | ||
lc_otp_program_i.count[190:188] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[191] | No | No | No | INPUT | ||
lc_otp_program_i.count[193:192] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[195:194] | No | No | No | INPUT | ||
lc_otp_program_i.count[198:196] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[199] | No | No | No | INPUT | ||
lc_otp_program_i.count[216:200] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[217] | No | No | No | INPUT | ||
lc_otp_program_i.count[218] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[219] | No | No | No | INPUT | ||
lc_otp_program_i.count[222:220] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[223] | No | No | No | INPUT | ||
lc_otp_program_i.count[229:224] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[230] | No | No | No | INPUT | ||
lc_otp_program_i.count[232:231] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[233] | No | No | No | INPUT | ||
lc_otp_program_i.count[235:234] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[236] | No | No | No | INPUT | ||
lc_otp_program_i.count[247:237] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[248] | No | No | No | INPUT | ||
lc_otp_program_i.count[263:249] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[264] | No | No | No | INPUT | ||
lc_otp_program_i.count[267:265] | Yes | Yes | T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[268] | No | No | No | INPUT | ||
lc_otp_program_i.count[282:269] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[284:283] | No | No | No | INPUT | ||
lc_otp_program_i.count[287:285] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[288] | No | No | No | INPUT | ||
lc_otp_program_i.count[291:289] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[292] | No | No | No | INPUT | ||
lc_otp_program_i.count[302:293] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[303] | No | No | No | INPUT | ||
lc_otp_program_i.count[315:304] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.count[317:316] | No | No | No | INPUT | ||
lc_otp_program_i.count[320:318] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[321] | No | No | No | INPUT | ||
lc_otp_program_i.count[326:322] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[327] | No | No | No | INPUT | ||
lc_otp_program_i.count[333:328] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.count[334] | No | No | No | INPUT | ||
lc_otp_program_i.count[345:335] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[347:346] | No | No | No | INPUT | ||
lc_otp_program_i.count[354:348] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[356:355] | No | No | No | INPUT | ||
lc_otp_program_i.count[358:357] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.count[359] | No | No | No | INPUT | ||
lc_otp_program_i.count[371:360] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[372] | No | No | No | INPUT | ||
lc_otp_program_i.count[380:373] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.count[381] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:382] | Yes | Yes | T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.state[7:0] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.state[8] | No | No | No | INPUT | ||
lc_otp_program_i.state[16:9] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.state[17] | No | No | No | INPUT | ||
lc_otp_program_i.state[21:18] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.state[22] | No | No | No | INPUT | ||
lc_otp_program_i.state[24:23] | Yes | Yes | T61,T155,T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.state[26:25] | No | No | No | INPUT | ||
lc_otp_program_i.state[43:27] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.state[44] | No | No | No | INPUT | ||
lc_otp_program_i.state[49:45] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.state[50] | No | No | No | INPUT | ||
lc_otp_program_i.state[53:51] | Yes | Yes | T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[54] | No | No | No | INPUT | ||
lc_otp_program_i.state[63:55] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.state[64] | No | No | No | INPUT | ||
lc_otp_program_i.state[67:65] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.state[68] | No | No | No | INPUT | ||
lc_otp_program_i.state[69] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.state[70] | No | No | No | INPUT | ||
lc_otp_program_i.state[71] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.state[72] | No | No | No | INPUT | ||
lc_otp_program_i.state[80:73] | Yes | Yes | *T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[81] | No | No | No | INPUT | ||
lc_otp_program_i.state[82] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.state[83] | No | No | No | INPUT | ||
lc_otp_program_i.state[87:84] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.state[88] | No | No | No | INPUT | ||
lc_otp_program_i.state[93:89] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.state[94] | No | No | No | INPUT | ||
lc_otp_program_i.state[103:95] | Yes | Yes | *T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[105:104] | No | No | No | INPUT | ||
lc_otp_program_i.state[118:106] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.state[119] | No | No | No | INPUT | ||
lc_otp_program_i.state[130:120] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.state[131] | No | No | No | INPUT | ||
lc_otp_program_i.state[137:132] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.state[138] | No | No | No | INPUT | ||
lc_otp_program_i.state[142:139] | Yes | Yes | *T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[143] | No | No | No | INPUT | ||
lc_otp_program_i.state[145:144] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[146] | No | No | No | INPUT | ||
lc_otp_program_i.state[151:147] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.state[152] | No | No | No | INPUT | ||
lc_otp_program_i.state[155:153] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.state[156] | No | No | No | INPUT | ||
lc_otp_program_i.state[163:157] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.state[164] | No | No | No | INPUT | ||
lc_otp_program_i.state[165] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.state[166] | No | No | No | INPUT | ||
lc_otp_program_i.state[168:167] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.state[169] | No | No | No | INPUT | ||
lc_otp_program_i.state[171:170] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.state[172] | No | No | No | INPUT | ||
lc_otp_program_i.state[178:173] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[179] | No | No | No | INPUT | ||
lc_otp_program_i.state[183:180] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[184] | No | No | No | INPUT | ||
lc_otp_program_i.state[186:185] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.state[187] | No | No | No | INPUT | ||
lc_otp_program_i.state[201:188] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.state[202] | No | No | No | INPUT | ||
lc_otp_program_i.state[203] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.state[205:204] | No | No | No | INPUT | ||
lc_otp_program_i.state[216:206] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[217] | No | No | No | INPUT | ||
lc_otp_program_i.state[220:218] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[221] | No | No | No | INPUT | ||
lc_otp_program_i.state[231:222] | Yes | Yes | *T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[232] | No | No | No | INPUT | ||
lc_otp_program_i.state[237:233] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.state[238] | No | No | No | INPUT | ||
lc_otp_program_i.state[247:239] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.state[248] | No | No | No | INPUT | ||
lc_otp_program_i.state[254:249] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.state[255] | No | No | No | INPUT | ||
lc_otp_program_i.state[260:256] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[261] | No | No | No | INPUT | ||
lc_otp_program_i.state[262] | Yes | Yes | *T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[263] | No | No | No | INPUT | ||
lc_otp_program_i.state[266:264] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.state[267] | No | No | No | INPUT | ||
lc_otp_program_i.state[271:268] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.state[272] | No | No | No | INPUT | ||
lc_otp_program_i.state[275:273] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT |
lc_otp_program_i.state[276] | No | No | No | INPUT | ||
lc_otp_program_i.state[281:277] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT |
lc_otp_program_i.state[282] | No | No | No | INPUT | ||
lc_otp_program_i.state[283] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT |
lc_otp_program_i.state[284] | No | No | No | INPUT | ||
lc_otp_program_i.state[296:285] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.state[297] | No | No | No | INPUT | ||
lc_otp_program_i.state[302:298] | Yes | Yes | T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.state[303] | No | No | No | INPUT | ||
lc_otp_program_i.state[308:304] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT |
lc_otp_program_i.state[309] | No | No | No | INPUT | ||
lc_otp_program_i.state[311:310] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT |
lc_otp_program_i.state[312] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:313] | Yes | Yes | T61,T42,T4 | Yes | T61,T4,T6 | INPUT |
lc_otp_program_i.req | Yes | Yes | T4,T60,T5 | Yes | T4,T60,T5 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T4,T60,T5 | Yes | T4,T60,T5 | OUTPUT |
lc_otp_program_o.err | No | No | No | OUTPUT | ||
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T30,T32,T61 | Yes | T30,T32,T61 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T60,T5 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T30,T32,T61 | Yes | T1,T3,T84 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T4,T6,T163 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T2,T3 | Yes | T31,T32,T61 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T31,T32,T19 | Yes | T2,T84,T31 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T4,T6,T163 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[2:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[3] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[15:4] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[17:16] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[20:18] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[21] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[23:22] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[24] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[38:25] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[39] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[47:40] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[48] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[68:49] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[69] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[91:70] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[93] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[94] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[97:95] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.count[98] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[116:99] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[118:117] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[120:119] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[123:122] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[124] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[128:125] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[129] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[134:130] | Yes | Yes | *T5,*T164,*T165 | Yes | T5,T164,T165 | OUTPUT |
otp_lc_data_o.count[135] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[137:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.count[139:138] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[140] | Yes | Yes | *T5,*T164,*T165 | Yes | T5,T164,T165 | OUTPUT |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[150:142] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[151] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[153:152] | Yes | Yes | *T5,*T165,*T166 | Yes | T5,T164,T165 | OUTPUT |
otp_lc_data_o.count[154] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[161:155] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[162] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[169:163] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.count[170] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[177:171] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[186:179] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[187] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[190:188] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T165,T166 | OUTPUT |
otp_lc_data_o.count[191] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[193:192] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[195:194] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[198:196] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T167,T168 | OUTPUT |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[216:200] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[217] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[218] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[219] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[222:220] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.count[223] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[229:224] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T167,T168 | OUTPUT |
otp_lc_data_o.count[230] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[232:231] | Yes | Yes | T4,T60,T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[233] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[235:234] | Yes | Yes | T4,T60,T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[236] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[247:237] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[248] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[263:249] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[264] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[267:265] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[268] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[282:269] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[284:283] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[287:285] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[288] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[291:289] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[302:293] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[303] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[315:304] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[317:316] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[320:318] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[321] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[326:322] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T167,T168 | OUTPUT |
otp_lc_data_o.count[327] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[333:328] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[345:335] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[347:346] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[354:348] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[356:355] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[358:357] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.count[359] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[371:360] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T167,T168 | OUTPUT |
otp_lc_data_o.count[372] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[380:373] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T167,T168 | OUTPUT |
otp_lc_data_o.count[381] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:382] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[7:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.state[8] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[16:9] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[21:18] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[24:23] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.state[26:25] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[43:27] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[44] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[49:45] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.state[50] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[53:51] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[54] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[63:55] | Yes | Yes | T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[64] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[67:65] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[69] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.state[70] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[71] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[72] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[80:73] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[81] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[82] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[87:84] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[88] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[93:89] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[94] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[103:95] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[105:104] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[118:106] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[119] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[130:120] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.state[131] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[137:132] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[138] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[142:139] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[143] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[145:144] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[146] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[151:147] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[152] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[155:153] | Yes | Yes | T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[163:157] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[164] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[165] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[166] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[168:167] | Yes | Yes | T4,T60,T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[169] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[171:170] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[178:173] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[183:180] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[184] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[186:185] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[187] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[201:188] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[202] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[203] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[205:204] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[216:206] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[217] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[220:218] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[221] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[231:222] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[232] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[237:233] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[238] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[247:239] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.state[248] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[254:249] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[255] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[260:256] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[261] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[262] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[263] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[266:264] | Yes | Yes | T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[267] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[271:268] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[272] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[275:273] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[276] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[281:277] | Yes | Yes | *T5,*T161,*T167 | Yes | T5,T161,T124 | OUTPUT |
otp_lc_data_o.state[282] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[283] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_lc_data_o.state[284] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[296:285] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[297] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[302:298] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[303] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[308:304] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[311:310] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT |
otp_lc_data_o.state[312] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:313] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T30,T32,T61 | Yes | T30,T32,T61 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T4,T6,T163 | Yes | T4,T6,T161 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T61,T4,T44 | Yes | T85,T61,T169 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T4,T6,T163 | Yes | T4,T6,T161 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T2,T30,T31 | Yes | T30,T31,T61 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T118,T170,T171 | Yes | T118,T170,T171 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T118,T172,T170 | Yes | T118,T172,T170 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T173,T174,T175 | Yes | T173,T174,T175 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T118,T170,T171 | Yes | T118,T170,T171 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T118,T172,T170 | Yes | T118,T172,T170 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T174,T176,T177 | Yes | T174,T176,T177 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T1,T113,T115 | Yes | T1,T113,T115 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T1,T113,T115 | Yes | T1,T113,T115 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T30,T31,T19 | Yes | T1,T3,T84 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[54:0] | Yes | Yes | *T178,*T1,*T2 | Yes | T178,T30,T31 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[55] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[79:56] | Yes | Yes | *T163,*T178,*T179 | Yes | T163,T178,T179 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[96:81] | Yes | Yes | *T124,*T173,*T180 | Yes | T124,T173,T180 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[97] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[140:98] | Yes | Yes | *T124,*T173,*T180 | Yes | T124,T173,T180 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[141] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[159:142] | Yes | Yes | *T163,*T178,*T179 | Yes | T163,T178,T179 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[160] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[203:161] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[204] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[240:205] | Yes | Yes | *T178,*T179,*T1 | Yes | T178,T179,T30 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[241] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:242] | Yes | Yes | T179,T124,T173 | Yes | T179,T124,T173 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T3,T30,T31 | Yes | T30,T31,T19 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T30,T31,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T30,T31,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T30,T31,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[1:0] | Yes | Yes | *T124,*T163,*T180 | Yes | T124,T163,T180 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[2] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[50:3] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[51] | No | No | Yes | T181,T182,T183 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[60:52] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[61] | No | No | Yes | T181,T182,T183 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:62] | Yes | Yes | T173,T175,T184 | Yes | T173,T185,T175 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T7,T8,T9 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 141 | 88.12 |
Total Bits | 10986 | 9335 | 84.97 |
Total Bits 0->1 | 5493 | 4669 | 85.00 |
Total Bits 1->0 | 5493 | 4666 | 84.94 |
Ports | 160 | 141 | 88.12 |
Port Bits | 10986 | 9335 | 84.97 |
Port Bits 0->1 | 5493 | 4669 | 85.00 |
Port Bits 1->0 | 5493 | 4666 | 84.94 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T1,T113,T115 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T70,*T71,*T72 | Yes | T70,T71,T72 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T73,*T74,*T75 | Yes | T73,T74,T75 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T70,T71,T72 | Yes | T70,T71,T72 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T70,T71,T78 | Yes | T70,T71,T78 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T70,T71,T78 | Yes | T70,T71,T78 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T147,*T148,*T149 | Yes | T147,T148,T149 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T70,T71,T72 | Yes | T70,T71,T78 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T4,*T44,*T150 | Yes | T4,T44,T150 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T70,*T71,*T72 | Yes | T70,T71,T72 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T70,*T72,*T78 | Yes | T70,T72,T78 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T73,*T74,*T75 | Yes | T73,T74,T75 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T70,T71,T72 | Yes | T70,T71,T72 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T30,T31,T32 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T30,T31,T32 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T70,T78,T151 | Yes | T70,T72,T78 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T70,T72,T78 | Yes | T70,T72,T78 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T152,T153,T154 | Yes | T152,T153,T154 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T152,T153,T154 | Yes | T152,T153,T154 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T55,T56,T155 | Yes | T55,T56,T155 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T30,T32,T61 | Yes | T30,T32,T61 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T156,T55,T157 | Yes | T156,T55,T157 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T157,T81,T82 | Yes | T157,T81,T82 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T157,T81,T82 | Yes | T157,T81,T82 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T55,T56,T81 | Yes | T55,T56,T81 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T55,T56,T81 | Yes | T55,T56,T81 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T55,T56,T155 | Yes | T55,T56,T155 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T30,T32,T61 | Yes | T30,T32,T61 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T156,T55,T157 | Yes | T156,T55,T157 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T55,T56,T81 | Yes | T55,T56,T81 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T55,T56,T81 | Yes | T55,T56,T81 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T20,T122,T123 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[31:0] | Yes | Yes | T158 | Yes | T159,T160,T158 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[2:0] | Yes | Yes | T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[3] | No | No | No | INPUT | |||
lc_otp_program_i.count[15:4] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[17:16] | No | No | No | INPUT | |||
lc_otp_program_i.count[20:18] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[21] | No | No | No | INPUT | |||
lc_otp_program_i.count[23:22] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[24] | No | No | No | INPUT | |||
lc_otp_program_i.count[38:25] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.count[39] | No | No | No | INPUT | |||
lc_otp_program_i.count[47:40] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[48] | No | No | No | INPUT | |||
lc_otp_program_i.count[68:49] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.count[69] | No | No | No | INPUT | |||
lc_otp_program_i.count[91:70] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[92] | No | No | No | INPUT | |||
lc_otp_program_i.count[93] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[94] | No | No | No | INPUT | |||
lc_otp_program_i.count[97:95] | Yes | Yes | T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.count[98] | No | No | No | INPUT | |||
lc_otp_program_i.count[116:99] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.count[118:117] | No | No | No | INPUT | |||
lc_otp_program_i.count[120:119] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[121] | No | No | No | INPUT | |||
lc_otp_program_i.count[123:122] | Yes | Yes | T42,T4,T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.count[124] | No | No | No | INPUT | |||
lc_otp_program_i.count[128:125] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[129] | No | No | No | INPUT | |||
lc_otp_program_i.count[134:130] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[135] | No | No | No | INPUT | |||
lc_otp_program_i.count[137:136] | Yes | Yes | T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.count[139:138] | No | No | No | INPUT | |||
lc_otp_program_i.count[140] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[141] | No | No | No | INPUT | |||
lc_otp_program_i.count[150:142] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[151] | No | No | No | INPUT | |||
lc_otp_program_i.count[153:152] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[154] | No | No | No | INPUT | |||
lc_otp_program_i.count[161:155] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[162] | No | No | No | INPUT | |||
lc_otp_program_i.count[169:163] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[170] | No | No | No | INPUT | |||
lc_otp_program_i.count[177:171] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[178] | No | No | No | INPUT | |||
lc_otp_program_i.count[186:179] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[187] | No | No | No | INPUT | |||
lc_otp_program_i.count[190:188] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[191] | No | No | No | INPUT | |||
lc_otp_program_i.count[193:192] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[195:194] | No | No | No | INPUT | |||
lc_otp_program_i.count[198:196] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[199] | No | No | No | INPUT | |||
lc_otp_program_i.count[216:200] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[217] | No | No | No | INPUT | |||
lc_otp_program_i.count[218] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[219] | No | No | No | INPUT | |||
lc_otp_program_i.count[222:220] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[223] | No | No | No | INPUT | |||
lc_otp_program_i.count[229:224] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[230] | No | No | No | INPUT | |||
lc_otp_program_i.count[232:231] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[233] | No | No | No | INPUT | |||
lc_otp_program_i.count[235:234] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[236] | No | No | No | INPUT | |||
lc_otp_program_i.count[247:237] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[248] | No | No | No | INPUT | |||
lc_otp_program_i.count[263:249] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[264] | No | No | No | INPUT | |||
lc_otp_program_i.count[267:265] | Yes | Yes | T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[268] | No | No | No | INPUT | |||
lc_otp_program_i.count[282:269] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[284:283] | No | No | No | INPUT | |||
lc_otp_program_i.count[287:285] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[288] | No | No | No | INPUT | |||
lc_otp_program_i.count[291:289] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[292] | No | No | No | INPUT | |||
lc_otp_program_i.count[302:293] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[303] | No | No | No | INPUT | |||
lc_otp_program_i.count[315:304] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.count[317:316] | No | No | No | INPUT | |||
lc_otp_program_i.count[320:318] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[321] | No | No | No | INPUT | |||
lc_otp_program_i.count[326:322] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[327] | No | No | No | INPUT | |||
lc_otp_program_i.count[333:328] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.count[334] | No | No | No | INPUT | |||
lc_otp_program_i.count[345:335] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[347:346] | No | No | No | INPUT | |||
lc_otp_program_i.count[354:348] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[356:355] | No | No | No | INPUT | |||
lc_otp_program_i.count[358:357] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.count[359] | No | No | No | INPUT | |||
lc_otp_program_i.count[371:360] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[372] | No | No | No | INPUT | |||
lc_otp_program_i.count[380:373] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.count[381] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:382] | Yes | Yes | T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.state[7:0] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.state[8] | No | No | No | INPUT | |||
lc_otp_program_i.state[16:9] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.state[17] | No | No | No | INPUT | |||
lc_otp_program_i.state[21:18] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.state[22] | No | No | No | INPUT | |||
lc_otp_program_i.state[24:23] | Yes | Yes | T61,T155,T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.state[26:25] | No | No | No | INPUT | |||
lc_otp_program_i.state[43:27] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.state[44] | No | No | No | INPUT | |||
lc_otp_program_i.state[49:45] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.state[50] | No | No | No | INPUT | |||
lc_otp_program_i.state[53:51] | Yes | Yes | T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[54] | No | No | No | INPUT | |||
lc_otp_program_i.state[63:55] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.state[64] | No | No | No | INPUT | |||
lc_otp_program_i.state[67:65] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.state[68] | No | No | No | INPUT | |||
lc_otp_program_i.state[69] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.state[70] | No | No | No | INPUT | |||
lc_otp_program_i.state[71] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.state[72] | No | No | No | INPUT | |||
lc_otp_program_i.state[80:73] | Yes | Yes | *T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[81] | No | No | No | INPUT | |||
lc_otp_program_i.state[82] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.state[83] | No | No | No | INPUT | |||
lc_otp_program_i.state[87:84] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.state[88] | No | No | No | INPUT | |||
lc_otp_program_i.state[93:89] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.state[94] | No | No | No | INPUT | |||
lc_otp_program_i.state[103:95] | Yes | Yes | *T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[105:104] | No | No | No | INPUT | |||
lc_otp_program_i.state[118:106] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.state[119] | No | No | No | INPUT | |||
lc_otp_program_i.state[130:120] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.state[131] | No | No | No | INPUT | |||
lc_otp_program_i.state[137:132] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.state[138] | No | No | No | INPUT | |||
lc_otp_program_i.state[142:139] | Yes | Yes | *T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[143] | No | No | No | INPUT | |||
lc_otp_program_i.state[145:144] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[146] | No | No | No | INPUT | |||
lc_otp_program_i.state[151:147] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.state[152] | No | No | No | INPUT | |||
lc_otp_program_i.state[155:153] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.state[156] | No | No | No | INPUT | |||
lc_otp_program_i.state[163:157] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.state[164] | No | No | No | INPUT | |||
lc_otp_program_i.state[165] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.state[166] | No | No | No | INPUT | |||
lc_otp_program_i.state[168:167] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.state[169] | No | No | No | INPUT | |||
lc_otp_program_i.state[171:170] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.state[172] | No | No | No | INPUT | |||
lc_otp_program_i.state[178:173] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[179] | No | No | No | INPUT | |||
lc_otp_program_i.state[183:180] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[184] | No | No | No | INPUT | |||
lc_otp_program_i.state[186:185] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.state[187] | No | No | No | INPUT | |||
lc_otp_program_i.state[201:188] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.state[202] | No | No | No | INPUT | |||
lc_otp_program_i.state[203] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.state[205:204] | No | No | No | INPUT | |||
lc_otp_program_i.state[216:206] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[217] | No | No | No | INPUT | |||
lc_otp_program_i.state[220:218] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[221] | No | No | No | INPUT | |||
lc_otp_program_i.state[231:222] | Yes | Yes | *T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[232] | No | No | No | INPUT | |||
lc_otp_program_i.state[237:233] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.state[238] | No | No | No | INPUT | |||
lc_otp_program_i.state[247:239] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.state[248] | No | No | No | INPUT | |||
lc_otp_program_i.state[254:249] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.state[255] | No | No | No | INPUT | |||
lc_otp_program_i.state[260:256] | Yes | Yes | *T61,*T42,T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[261] | No | No | No | INPUT | |||
lc_otp_program_i.state[262] | Yes | Yes | *T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[263] | No | No | No | INPUT | |||
lc_otp_program_i.state[266:264] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.state[267] | No | No | No | INPUT | |||
lc_otp_program_i.state[271:268] | Yes | Yes | *T61,T4,T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.state[272] | No | No | No | INPUT | |||
lc_otp_program_i.state[275:273] | Yes | Yes | *T61,*T4,*T60 | Yes | T61,T4,T60 | INPUT | |
lc_otp_program_i.state[276] | No | No | No | INPUT | |||
lc_otp_program_i.state[281:277] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | INPUT | |
lc_otp_program_i.state[282] | No | No | No | INPUT | |||
lc_otp_program_i.state[283] | Yes | Yes | *T61,*T155,*T162 | Yes | T61,T155,T162 | INPUT | |
lc_otp_program_i.state[284] | No | No | No | INPUT | |||
lc_otp_program_i.state[296:285] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.state[297] | No | No | No | INPUT | |||
lc_otp_program_i.state[302:298] | Yes | Yes | T61,*T42,*T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.state[303] | No | No | No | INPUT | |||
lc_otp_program_i.state[308:304] | Yes | Yes | T4,T60,T6 | Yes | T4,T60,T6 | INPUT | |
lc_otp_program_i.state[309] | No | No | No | INPUT | |||
lc_otp_program_i.state[311:310] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | INPUT | |
lc_otp_program_i.state[312] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:313] | Yes | Yes | T61,T42,T4 | Yes | T61,T4,T6 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T4,T60,T5 | Yes | T4,T60,T5 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T4,T60,T5 | Yes | T4,T60,T5 | OUTPUT | |
lc_otp_program_o.err | No | No | No | OUTPUT | |||
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T30,T32,T61 | Yes | T30,T32,T61 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T60,T5 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T30,T32,T61 | Yes | T1,T3,T84 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T4,T6,T163 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T2,T3 | Yes | T31,T32,T61 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T31,T32,T19 | Yes | T2,T84,T31 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T4,T6,T163 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[2:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[3] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[15:4] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[17:16] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[20:18] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[21] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[23:22] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[24] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[38:25] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[39] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[47:40] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[48] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[68:49] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[69] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[91:70] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[93] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[94] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[97:95] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.count[98] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[116:99] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[118:117] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[120:119] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[123:122] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[124] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[128:125] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[129] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[134:130] | Yes | Yes | *T5,*T164,*T165 | Yes | T5,T164,T165 | OUTPUT | |
otp_lc_data_o.count[135] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[137:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.count[139:138] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[140] | Yes | Yes | *T5,*T164,*T165 | Yes | T5,T164,T165 | OUTPUT | |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[150:142] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[151] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[153:152] | Yes | Yes | *T5,*T165,*T166 | Yes | T5,T164,T165 | OUTPUT | |
otp_lc_data_o.count[154] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[161:155] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[162] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[169:163] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.count[170] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[177:171] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[186:179] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[187] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[190:188] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T165,T166 | OUTPUT | |
otp_lc_data_o.count[191] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[193:192] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[195:194] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[198:196] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T167,T168 | OUTPUT | |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[216:200] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[217] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[218] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[219] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[222:220] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.count[223] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[229:224] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T167,T168 | OUTPUT | |
otp_lc_data_o.count[230] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[232:231] | Yes | Yes | T4,T60,T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[233] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[235:234] | Yes | Yes | T4,T60,T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[236] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[247:237] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[248] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[263:249] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[264] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[267:265] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[268] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[282:269] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[284:283] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[287:285] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[288] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[291:289] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[302:293] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[303] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[315:304] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[317:316] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[320:318] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[321] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[326:322] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T167,T168 | OUTPUT | |
otp_lc_data_o.count[327] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[333:328] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[345:335] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[347:346] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[354:348] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[356:355] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[358:357] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.count[359] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[371:360] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T167,T168 | OUTPUT | |
otp_lc_data_o.count[372] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[380:373] | Yes | Yes | *T5,*T167,*T168 | Yes | T5,T167,T168 | OUTPUT | |
otp_lc_data_o.count[381] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:382] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[7:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.state[8] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[16:9] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[21:18] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[24:23] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.state[26:25] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[43:27] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[44] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[49:45] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.state[50] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[53:51] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[54] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[63:55] | Yes | Yes | T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[64] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[67:65] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[69] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.state[70] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[71] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[72] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[80:73] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[81] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[82] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[87:84] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[88] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[93:89] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[94] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[103:95] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[105:104] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[118:106] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[119] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[130:120] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.state[131] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[137:132] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[138] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[142:139] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[143] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[145:144] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[146] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[151:147] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[152] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[155:153] | Yes | Yes | T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[163:157] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[164] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[165] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[166] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[168:167] | Yes | Yes | T4,T60,T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[169] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[171:170] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[178:173] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[183:180] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[184] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[186:185] | Yes | Yes | *T42,T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[187] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[201:188] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[202] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[203] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[205:204] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[216:206] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[217] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[220:218] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[221] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[231:222] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[232] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[237:233] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[238] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[247:239] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.state[248] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[254:249] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[255] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[260:256] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[261] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[262] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[263] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[266:264] | Yes | Yes | T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[267] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[271:268] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[272] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[275:273] | Yes | Yes | *T30,*T31,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[276] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[281:277] | Yes | Yes | *T5,*T161,*T167 | Yes | T5,T161,T124 | OUTPUT | |
otp_lc_data_o.state[282] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[283] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_lc_data_o.state[284] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[296:285] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[297] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[302:298] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[303] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[308:304] | Yes | Yes | *T4,*T60,*T6 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[311:310] | Yes | Yes | *T42,*T4,*T150 | Yes | T4,T6,T161 | OUTPUT | |
otp_lc_data_o.state[312] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:313] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T30,T32,T61 | Yes | T30,T32,T61 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T4,T6,T163 | Yes | T4,T6,T161 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T61,T4,T44 | Yes | T85,T61,T169 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T4,T6,T163 | Yes | T4,T6,T161 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T2,T30,T31 | Yes | T30,T31,T61 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T118,T170,T171 | Yes | T118,T170,T171 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T118,T172,T170 | Yes | T118,T172,T170 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T173,T174,T175 | Yes | T173,T174,T175 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T118,T170,T171 | Yes | T118,T170,T171 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T118,T172,T170 | Yes | T118,T172,T170 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T174,T176,T177 | Yes | T174,T176,T177 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T1,T113,T115 | Yes | T1,T113,T115 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T3,T85 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T1,T113,T115 | Yes | T1,T113,T115 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T30,T31,T19 | Yes | T1,T3,T84 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[54:0] | Yes | Yes | *T178,*T1,*T2 | Yes | T178,T30,T31 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[55] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[79:56] | Yes | Yes | *T163,*T178,*T179 | Yes | T163,T178,T179 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[96:81] | Yes | Yes | *T124,*T173,*T180 | Yes | T124,T173,T180 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[97] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[140:98] | Yes | Yes | *T124,*T173,*T180 | Yes | T124,T173,T180 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[141] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[159:142] | Yes | Yes | *T163,*T178,*T179 | Yes | T163,T178,T179 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[160] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[203:161] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[204] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[240:205] | Yes | Yes | *T178,*T179,*T1 | Yes | T178,T179,T30 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[241] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:242] | Yes | Yes | T179,T124,T173 | Yes | T179,T124,T173 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T3,T30,T31 | Yes | T30,T31,T19 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[1:0] | Yes | Yes | *T124,*T163,*T180 | Yes | T124,T163,T180 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[2] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[50:3] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[51] | No | No | Yes | T181,T182,T183 | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[60:52] | Yes | Yes | *T1,*T2,*T3 | Yes | T30,T31,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[61] | No | No | Yes | T181,T182,T183 | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:62] | Yes | Yes | T173,T175,T184 | Yes | T173,T185,T175 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T30,T31,T32 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |