Unified Coverage Report :: Group :: chip_env_pkg::chip_alert_cg_wrap::alert_cg

Group : chip_env_pkg::chip_alert_cg_wrap::alert_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_chip_env_0.1/chip_env_cov.sv

65 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
adc_ctrl_aon_fatal_fault	100.00	1	100	1	64	64
aes_fatal_fault	100.00	1	100	1	64	64
aes_recov_ctrl_update_err	100.00	1	100	1	64	64
aon_timer_aon_fatal_fault	100.00	1	100	1	64	64
clkmgr_aon_fatal_fault	100.00	1	100	1	64	64
clkmgr_aon_recov_fault	100.00	1	100	1	64	64
csrng_fatal_alert	100.00	1	100	1	64	64
csrng_recov_alert	100.00	1	100	1	64	64
edn0_fatal_alert	100.00	1	100	1	64	64
edn0_recov_alert	100.00	1	100	1	64	64
edn1_fatal_alert	100.00	1	100	1	64	64
edn1_recov_alert	100.00	1	100	1	64	64
entropy_src_fatal_alert	100.00	1	100	1	64	64
entropy_src_recov_alert	100.00	1	100	1	64	64
flash_ctrl_fatal_err	100.00	1	100	1	64	64
flash_ctrl_fatal_prim_flash_alert	100.00	1	100	1	64	64
flash_ctrl_fatal_std_err	100.00	1	100	1	64	64
flash_ctrl_recov_err	100.00	1	100	1	64	64
flash_ctrl_recov_prim_flash_alert	100.00	1	100	1	64	64
gpio_fatal_fault	100.00	1	100	1	64	64
hmac_fatal_fault	100.00	1	100	1	64	64
i2c0_fatal_fault	100.00	1	100	1	64	64
i2c1_fatal_fault	100.00	1	100	1	64	64
i2c2_fatal_fault	100.00	1	100	1	64	64
keymgr_fatal_fault_err	100.00	1	100	1	64	64
keymgr_recov_operation_err	100.00	1	100	1	64	64
kmac_fatal_fault_err	100.00	1	100	1	64	64
kmac_recov_operation_err	100.00	1	100	1	64	64
lc_ctrl_fatal_bus_integ_error	100.00	1	100	1	64	64
lc_ctrl_fatal_prog_error	100.00	1	100	1	64	64
lc_ctrl_fatal_state_error	100.00	1	100	1	64	64
otbn_fatal	100.00	1	100	1	64	64
otbn_recov	100.00	1	100	1	64	64
otp_ctrl_fatal_bus_integ_error	100.00	1	100	1	64	64
otp_ctrl_fatal_check_error	100.00	1	100	1	64	64
otp_ctrl_fatal_macro_error	100.00	1	100	1	64	64
otp_ctrl_fatal_prim_otp_alert	100.00	1	100	1	64	64
otp_ctrl_recov_prim_otp_alert	100.00	1	100	1	64	64
pattgen_fatal_fault	100.00	1	100	1	64	64
pinmux_aon_fatal_fault	100.00	1	100	1	64	64
pwm_aon_fatal_fault	100.00	1	100	1	64	64
pwrmgr_aon_fatal_fault	100.00	1	100	1	64	64
rom_ctrl_fatal	100.00	1	100	1	64	64
rstmgr_aon_fatal_cnsty_fault	100.00	1	100	1	64	64
rstmgr_aon_fatal_fault	100.00	1	100	1	64	64
rv_core_ibex_fatal_hw_err	100.00	1	100	1	64	64
rv_core_ibex_fatal_sw_err	100.00	1	100	1	64	64
rv_core_ibex_recov_hw_err	100.00	1	100	1	64	64
rv_core_ibex_recov_sw_err	100.00	1	100	1	64	64
rv_dm_fatal_fault	100.00	1	100	1	64	64
rv_plic_fatal_fault	100.00	1	100	1	64	64
rv_timer_fatal_fault	100.00	1	100	1	64	64
sensor_ctrl_aon_fatal_alert	100.00	1	100	1	64	64
sensor_ctrl_aon_recov_alert	100.00	1	100	1	64	64
spi_device_fatal_fault	100.00	1	100	1	64	64
spi_host0_fatal_fault	100.00	1	100	1	64	64
spi_host1_fatal_fault	100.00	1	100	1	64	64
sram_ctrl_main_fatal_error	100.00	1	100	1	64	64
sram_ctrl_ret_aon_fatal_error	100.00	1	100	1	64	64
sysrst_ctrl_aon_fatal_fault	100.00	1	100	1	64	64
uart0_fatal_fault	100.00	1	100	1	64	64
uart1_fatal_fault	100.00	1	100	1	64	64
uart2_fatal_fault	100.00	1	100	1	64	64
uart3_fatal_fault	100.00	1	100	1	64	64
usbdev_fatal_fault	100.00	1	100	1	64	64

---

Group Instance : adc_ctrl_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance adc_ctrl_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance adc_ctrl_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aes_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aes_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aes_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aes_recov_ctrl_update_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aes_recov_ctrl_update_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aes_recov_ctrl_update_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aon_timer_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aon_timer_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aon_timer_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : clkmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance clkmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance clkmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : clkmgr_aon_recov_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance clkmgr_aon_recov_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance clkmgr_aon_recov_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : csrng_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance csrng_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance csrng_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : csrng_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance csrng_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance csrng_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn0_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn0_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn0_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn0_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn0_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn0_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn1_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn1_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn1_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn1_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn1_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn1_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : entropy_src_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance entropy_src_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance entropy_src_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : entropy_src_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance entropy_src_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance entropy_src_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_prim_flash_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_prim_flash_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_prim_flash_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_std_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_std_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_std_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_recov_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_recov_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_recov_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_recov_prim_flash_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_recov_prim_flash_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_recov_prim_flash_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : gpio_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance gpio_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance gpio_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : hmac_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance hmac_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance hmac_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c2_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c2_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c2_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : keymgr_fatal_fault_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance keymgr_fatal_fault_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance keymgr_fatal_fault_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : keymgr_recov_operation_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance keymgr_recov_operation_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance keymgr_recov_operation_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : kmac_fatal_fault_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance kmac_fatal_fault_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance kmac_fatal_fault_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : kmac_recov_operation_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance kmac_recov_operation_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance kmac_recov_operation_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_bus_integ_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_bus_integ_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_bus_integ_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_prog_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_prog_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_prog_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_state_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_state_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_state_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otbn_fatal

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otbn_fatal

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otbn_fatal

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otbn_recov

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otbn_recov

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otbn_recov

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_bus_integ_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_bus_integ_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_bus_integ_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_check_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_check_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_check_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_macro_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_macro_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_macro_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_prim_otp_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_prim_otp_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_prim_otp_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_recov_prim_otp_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_recov_prim_otp_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_recov_prim_otp_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pattgen_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pattgen_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pattgen_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pinmux_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pinmux_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pinmux_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pwm_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pwm_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pwm_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pwrmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pwrmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pwrmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rom_ctrl_fatal

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rom_ctrl_fatal

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rom_ctrl_fatal

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rstmgr_aon_fatal_cnsty_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rstmgr_aon_fatal_cnsty_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rstmgr_aon_fatal_cnsty_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rstmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rstmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rstmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_fatal_hw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_fatal_hw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_fatal_hw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_fatal_sw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_fatal_sw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_fatal_sw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_recov_hw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_recov_hw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_recov_hw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_recov_sw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_recov_sw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_recov_sw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_dm_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_dm_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_dm_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_plic_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_plic_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_plic_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_timer_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_timer_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_timer_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sensor_ctrl_aon_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sensor_ctrl_aon_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sensor_ctrl_aon_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sensor_ctrl_aon_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sensor_ctrl_aon_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sensor_ctrl_aon_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_device_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_device_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_device_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_host0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_host0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_host0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_host1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_host1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_host1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sram_ctrl_main_fatal_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sram_ctrl_main_fatal_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sram_ctrl_main_fatal_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sram_ctrl_ret_aon_fatal_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sram_ctrl_ret_aon_fatal_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sram_ctrl_ret_aon_fatal_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sysrst_ctrl_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sysrst_ctrl_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sysrst_ctrl_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart2_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart2_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart2_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart3_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart3_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart3_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : usbdev_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance usbdev_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance usbdev_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5844

1

T77

53

T241

510

T726

531

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

111392

1

T3

601

T77

65

T60

590

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

175

1

T77

36

T79

43

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2084

1

T77

47

T361

813

T712

525

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2611

1

T77

44

T79

29

T733

532

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

816

1

T77

43

T683

104

T248

102

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1916

1

T77

37

T79

30

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

184

1

T77

44

T79

31

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5938

1

T77

55

T668

1713

T79

38

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

218

1

T77

52

T667

2

T79

44

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6478

1

T77

40

T254

1716

T744

1729

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

165

1

T77

34

T79

36

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4312

1

T77

37

T350

1

T79

43

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

191

1

T77

43

T79

31

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

7355

1

T77

46

T311

1713

T164

362

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6519

1

T77

38

T79

37

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3622

1

T77

32

T79

20

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

392

1

T77

54

T103

36

T161

5

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

193

1

T77

55

T79

41

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3215

1

T3

817

T77

51

T79

40

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3011

1

T77

53

T217

1

T79

34

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3431

1

T77

51

T217

2

T729

823

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2082

1

T77

55

T217

1

T218

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4130

1

T77

50

T217

1

T717

525

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8254

1

T77

47

T211

1187

T79

39

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

195

1

T77

42

T79

39

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

113766

1

T3

601

T55

1198

T77

44

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

187

1

T77

44

T79

33

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6674

1

T77

51

T245

534

T692

818

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

240

1

T77

57

T79

38

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4286

1

T77

61

T193

816

T158

815

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1390021

1

T3

601

T83

1093

T77

54

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

197

1

T77

46

T348

1

T79

38

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4824

1

T77

62

T60

814

T217

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

51116

1

T3

283

T77

43

T60

279

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1033

1

T77

58

T79

40

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2349

1

T77

52

T151

521

T79

36

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

216

1

T77

47

T79

43

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5010

1

T77

57

T681

522

T732

505

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1531

1

T77

42

T79

37

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1547

1

T77

43

T258

820

T48

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8593

1

T59

522

T77

36

T118

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1393

1

T77

64

T79

41

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3135

1

T77

53

T48

1

T79

38

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2066

1

T77

44

T682

820

T79

37

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

36722

1

T82

233

T85

269

T77

21

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

9299

1

T77

48

T79

41

T684

1712

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

153

1

T77

24

T48

1

T79

28

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

283

1

T77

42

T217

1

T48

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5781

1

T77

41

T256

1075

T321

1714

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5322

1

T77

56

T283

1101

T218

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1525

1

T77

43

T387

506

T79

30

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5781

1

T77

56

T128

49

T320

813

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

16509

1

T77

65

T128

34

T16

70

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2872

1

T77

58

T287

520

T79

32

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

10094

1

T77

41

T373

1090

T217

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4060

1

T77

53

T278

852

T745

1305

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3670

1

T77

48

T213

1734

T79

45

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

221

1

T77

61

T79

33

T56

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4033

1

T77

55

T246

532

T739

811

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2688

1

T77

48

T330

812

T217

2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4756

1

T77

50

T281

510

T741

816

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2298

1

T77

48

T344

516

T217

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3915

1

T77

41

T362

813

T742

518

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5765

1

T77

50

T243

1306

T359

1302