Unified Coverage Report :: Group :: tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	3619843	1			T54	113		T55	973		T56	49
values[2]	727234	1			T54	76		T55	78		T56	19
values[3]	102617	1			T54	2		T59	856		T103	21
values[4]	54129	1			T59	445		T226	1		T497	136
values[5]	37017	1			T59	221		T226	5		T497	77
values[6]	27403	1			T59	194		T226	4		T497	77
values[7]	22072	1			T59	141		T226	1		T497	93
values[8]	18530	1			T59	131		T226	3		T497	126
values[9]	16687	1			T59	112		T226	3		T497	98
values[10]	14464	1			T59	76		T226	1		T497	57
values[11]	13437	1			T59	51		T226	2		T497	46
values[12]	12903	1			T59	33		T226	3		T497	55
values[13]	12299	1			T59	39		T226	5		T497	75
values[14]	11706	1			T59	51		T226	1		T497	59
values[15]	11278	1			T59	37		T226	1		T497	55
values[16]	10908	1			T59	10		T226	1		T497	55
values[17]	10225	1			T59	12		T226	3		T497	105
values[18]	9604	1			T59	10		T226	2		T497	89
values[19]	9561	1			T59	9		T226	1		T497	63
values[20]	9424	1			T59	7		T226	1		T497	60
values[21]	9296	1			T59	7		T226	3		T497	103
values[22]	8879	1			T59	12		T226	7		T497	89
values[23]	8492	1			T59	27		T226	7		T497	48
values[24]	8525	1			T59	17		T226	4		T497	34
values[25]	8206	1			T59	14		T226	2		T497	68
values[26]	7830	1			T59	7		T226	2		T497	69
values[27]	7483	1			T59	8		T226	4		T497	43
values[28]	6919	1			T59	8		T226	6		T497	38
values[29]	6463	1			T59	3		T226	2		T497	34
values[30]	6126	1			T59	6		T226	1		T497	36
values[31]	5626	1			T59	5		T226	1		T497	26
values[32]	5249	1			T59	4		T226	1		T497	17
values[33]	4977	1			T59	8		T226	2		T497	14
values[34]	4651	1			T59	5		T226	1		T497	15
values[35]	4408	1			T59	3		T226	3		T497	7
values[36]	4311	1			T59	3		T226	2		T497	12
values[37]	4096	1			T59	5		T226	1		T497	5
values[38]	3927	1			T59	12		T226	2		T497	12
values[39]	3583	1			T59	15		T226	1		T497	19
values[40]	3463	1			T59	7		T226	2		T497	5
values[41]	3340	1			T59	3		T226	1		T497	9
values[42]	3350	1			T59	4		T226	2		T497	7
values[43]	3277	1			T59	4		T226	1		T497	5
values[44]	3244	1			T59	11		T226	1		T497	5
values[45]	3132	1			T59	9		T226	1		T497	9
values[46]	3042	1			T59	4		T226	3		T497	9
values[47]	3047	1			T59	4		T226	2		T497	5
values[48]	3031	1			T59	3		T226	3		T497	4
values[49]	2937	1			T59	2		T226	2		T497	5
values[50]	2915	1			T59	7		T226	2		T497	2
values[51]	2831	1			T59	4		T226	3		T497	13
values[52]	2796	1			T59	2		T226	3		T497	3
values[53]	2757	1			T59	2		T226	2		T497	3
values[54]	2768	1			T59	2		T226	4		T497	8
values[55]	2734	1			T59	2		T226	4		T497	5
values[56]	2573	1			T59	4		T226	1		T497	8
values[57]	2487	1			T59	2		T226	1		T497	5
values[58]	2499	1			T59	3		T226	3		T497	2
values[59]	2470	1			T59	6		T226	4		T497	4
values[60]	2536	1			T59	11		T226	5		T497	5
values[61]	2827	1			T59	11		T226	5		T493	1
values[62]	4348	1			T59	13		T226	5		T493	1
values[63]	17811	1			T59	34		T226	17		T493	4
values[64]	236509	1			T59	73		T226	40		T493	174

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	4701370	1			T54	148		T55	916		T56	113
values[2]	768404	1			T54	35		T55	51		T56	28
values[3]	74732	1			T54	6		T55	1		T56	3
values[4]	13838	1			T59	72		T103	8		T497	3
values[5]	5414	1			T59	40		T497	1		T403	1
values[6]	3315	1			T59	37		T493	1		T514	74
values[7]	2484	1			T59	26		T493	1		T514	68
values[8]	2128	1			T59	18		T493	1		T514	51
values[9]	1886	1			T59	23		T493	1		T514	31
values[10]	1702	1			T59	38		T493	1		T514	15
values[11]	1460	1			T59	42		T493	3		T514	14
values[12]	1437	1			T59	49		T493	1		T514	8
values[13]	1397	1			T59	37		T493	3		T514	13
values[14]	1260	1			T59	49		T493	2		T514	1
values[15]	1126	1			T59	45		T493	2		T514	1
values[16]	1126	1			T59	51		T493	4		T514	2
values[17]	1063	1			T59	49		T493	1		T494	1
values[18]	944	1			T59	20		T493	1		T494	1
values[19]	827	1			T59	17		T493	1		T494	1
values[20]	764	1			T59	11		T493	3		T494	1
values[21]	679	1			T59	10		T493	1		T494	1
values[22]	692	1			T59	9		T493	2		T494	1
values[23]	717	1			T59	8		T493	1		T494	1
values[24]	728	1			T59	14		T493	2		T494	1
values[25]	739	1			T59	14		T493	2		T494	1
values[26]	636	1			T59	9		T493	2		T494	1
values[27]	615	1			T59	12		T493	1		T494	1
values[28]	545	1			T59	14		T493	3		T494	1
values[29]	532	1			T59	12		T493	1		T494	1
values[30]	549	1			T59	16		T493	1		T494	1
values[31]	522	1			T59	12		T493	2		T494	1
values[32]	513	1			T59	7		T493	5		T494	1
values[33]	542	1			T59	10		T493	3		T494	1
values[34]	493	1			T59	7		T493	4		T494	1
values[35]	465	1			T59	7		T493	2		T494	1
values[36]	481	1			T59	6		T493	3		T494	1
values[37]	492	1			T59	6		T493	2		T494	1
values[38]	489	1			T59	5		T493	1		T494	1
values[39]	478	1			T59	13		T493	5		T494	1
values[40]	495	1			T59	15		T493	3		T494	1
values[41]	460	1			T59	7		T493	4		T494	1
values[42]	451	1			T59	5		T493	1		T494	1
values[43]	415	1			T59	4		T493	3		T494	1
values[44]	398	1			T59	5		T493	4		T494	1
values[45]	369	1			T59	3		T493	2		T494	1
values[46]	375	1			T59	4		T493	1		T494	1
values[47]	406	1			T59	3		T493	1		T494	1
values[48]	392	1			T59	4		T493	1		T494	1
values[49]	387	1			T59	3		T493	1		T494	1
values[50]	425	1			T59	6		T493	3		T494	1
values[51]	380	1			T59	3		T493	3		T494	1
values[52]	346	1			T59	6		T493	1		T494	1
values[53]	376	1			T59	5		T493	1		T494	1
values[54]	376	1			T59	2		T493	1		T494	1
values[55]	407	1			T59	3		T493	2		T494	1
values[56]	375	1			T59	7		T493	4		T494	1
values[57]	385	1			T59	4		T493	1		T494	1
values[58]	382	1			T59	2		T493	3		T494	1
values[59]	363	1			T59	1		T493	1		T494	1
values[60]	359	1			T59	2		T493	1		T494	1
values[61]	398	1			T59	2		T493	1		T494	1
values[62]	657	1			T59	3		T493	1		T494	1
values[63]	2970	1			T59	3		T493	9		T494	16
values[64]	24509	1			T59	3		T493	149		T494	191

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	610252	1			T54	1		T55	33		T56	2
values[2]	2505290	1			T54	41		T55	335		T56	99
values[3]	1151772	1			T54	123		T55	640		T56	44
values[4]	146388	1			T54	4		T55	4		T56	2
values[5]	74522	1			T59	449		T103	2		T226	2
values[6]	48210	1			T59	280		T226	1		T497	102
values[7]	34700	1			T59	185		T226	1		T497	93
values[8]	27160	1			T59	156		T226	2		T497	73
values[9]	22671	1			T59	169		T226	1		T497	71
values[10]	20556	1			T59	170		T226	3		T497	73
values[11]	18718	1			T59	131		T226	3		T497	78
values[12]	17436	1			T59	112		T226	4		T497	104
values[13]	16471	1			T59	90		T226	3		T497	135
values[14]	15353	1			T59	57		T226	4		T497	98
values[15]	14502	1			T59	63		T226	1		T497	94
values[16]	13990	1			T59	58		T226	4		T497	76
values[17]	13405	1			T59	55		T226	2		T497	95
values[18]	12681	1			T59	61		T226	3		T497	100
values[19]	12085	1			T59	49		T226	3		T497	83
values[20]	11475	1			T59	36		T226	5		T497	81
values[21]	10632	1			T59	18		T226	6		T497	84
values[22]	10094	1			T59	35		T226	2		T497	95
values[23]	9699	1			T59	32		T226	3		T497	69
values[24]	9693	1			T59	27		T226	1		T497	53
values[25]	9123	1			T59	27		T226	5		T497	68
values[26]	8775	1			T59	14		T226	2		T497	47
values[27]	8341	1			T59	8		T226	1		T497	36
values[28]	7706	1			T59	15		T226	2		T497	72
values[29]	6981	1			T59	8		T226	2		T497	59
values[30]	6750	1			T59	5		T226	3		T497	30
values[31]	6558	1			T59	8		T226	2		T497	34
values[32]	5929	1			T59	8		T226	3		T497	16
values[33]	5524	1			T59	21		T226	1		T497	28
values[34]	5233	1			T59	11		T226	1		T497	16
values[35]	4877	1			T59	13		T226	2		T497	17
values[36]	4777	1			T59	20		T226	1		T497	4
values[37]	4438	1			T59	27		T226	1		T497	8
values[38]	4295	1			T59	16		T226	1		T497	8
values[39]	4027	1			T59	12		T226	1		T497	5
values[40]	4008	1			T59	7		T226	2		T497	8
values[41]	3753	1			T59	8		T226	5		T497	4
values[42]	3703	1			T59	12		T226	4		T497	1
values[43]	3617	1			T59	6		T226	4		T497	4
values[44]	3641	1			T59	6		T226	1		T497	2
values[45]	3559	1			T59	15		T226	1		T497	4
values[46]	3413	1			T59	10		T226	2		T497	3
values[47]	3323	1			T59	9		T226	2		T493	2
values[48]	3325	1			T59	8		T226	1		T493	3
values[49]	3234	1			T59	8		T226	3		T493	7
values[50]	3126	1			T59	6		T226	1		T493	2
values[51]	3146	1			T59	7		T226	2		T493	6
values[52]	3152	1			T59	10		T226	1		T493	7
values[53]	3076	1			T59	14		T226	1		T493	10
values[54]	3055	1			T59	8		T226	1		T493	4
values[55]	3074	1			T59	11		T226	2		T493	3
values[56]	2970	1			T59	9		T226	1		T493	4
values[57]	2851	1			T59	7		T226	1		T493	2
values[58]	2831	1			T59	13		T226	6		T493	7
values[59]	2841	1			T59	5		T226	3		T493	5
values[60]	2852	1			T59	6		T226	2		T493	5
values[61]	3053	1			T59	6		T226	2		T493	1
values[62]	4252	1			T59	5		T226	13		T493	6
values[63]	19262	1			T59	24		T226	49		T493	1
values[64]	224459	1			T59	44		T226	55		T493	118