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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
86.45 90.84 80.16 89.65 91.87 81.31 84.87


Total test records in report: 988
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T434 /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.2675338274 Jun 22 07:30:34 PM PDT 24 Jun 22 08:31:34 PM PDT 24 15406764808 ps
T213 /workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.3517587500 Jun 22 07:15:58 PM PDT 24 Jun 22 07:17:54 PM PDT 24 2494306341 ps
T435 /workspace/coverage/default/1.rom_e2e_asm_init_prod_end.1863975132 Jun 22 07:30:59 PM PDT 24 Jun 22 08:40:31 PM PDT 24 16318376738 ps
T436 /workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.676843232 Jun 22 07:11:31 PM PDT 24 Jun 22 07:57:31 PM PDT 24 22843488943 ps
T340 /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.359553950 Jun 22 07:12:25 PM PDT 24 Jun 22 07:18:05 PM PDT 24 3895202008 ps
T437 /workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2760890069 Jun 22 07:16:35 PM PDT 24 Jun 22 08:08:04 PM PDT 24 12123268276 ps
T392 /workspace/coverage/default/0.chip_sw_aon_timer_irq.1547674749 Jun 22 07:12:19 PM PDT 24 Jun 22 07:19:18 PM PDT 24 4196459070 ps
T666 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1050898396 Jun 22 07:25:31 PM PDT 24 Jun 22 07:33:50 PM PDT 24 5131181948 ps
T51 /workspace/coverage/default/0.chip_sw_usbdev_pincfg.173826221 Jun 22 07:11:29 PM PDT 24 Jun 22 09:19:59 PM PDT 24 31601600214 ps
T253 /workspace/coverage/default/1.chip_sw_inject_scramble_seed.547656827 Jun 22 07:19:30 PM PDT 24 Jun 22 10:34:30 PM PDT 24 63637692151 ps
T259 /workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.2651003808 Jun 22 07:21:29 PM PDT 24 Jun 22 07:26:08 PM PDT 24 2632351454 ps
T209 /workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.45442845 Jun 22 07:17:03 PM PDT 24 Jun 22 10:30:58 PM PDT 24 59829121052 ps
T522 /workspace/coverage/default/97.chip_sw_all_escalation_resets.43138854 Jun 22 07:49:11 PM PDT 24 Jun 22 08:00:50 PM PDT 24 6729753016 ps
T179 /workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.1325852410 Jun 22 07:31:06 PM PDT 24 Jun 22 07:50:30 PM PDT 24 5757886440 ps
T23 /workspace/coverage/default/0.rom_e2e_jtag_inject_rma.204412778 Jun 22 07:13:48 PM PDT 24 Jun 22 08:14:08 PM PDT 24 28688301674 ps
T466 /workspace/coverage/default/24.chip_sw_all_escalation_resets.2561219051 Jun 22 07:42:36 PM PDT 24 Jun 22 07:53:36 PM PDT 24 5442908464 ps
T667 /workspace/coverage/default/1.chip_sw_aon_timer_smoketest.2523401610 Jun 22 07:27:46 PM PDT 24 Jun 22 07:32:24 PM PDT 24 3301790328 ps
T668 /workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.332125423 Jun 22 07:23:49 PM PDT 24 Jun 22 07:32:06 PM PDT 24 3606319182 ps
T669 /workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.94086801 Jun 22 07:15:41 PM PDT 24 Jun 22 08:14:18 PM PDT 24 19999639002 ps
T670 /workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.3347086007 Jun 22 07:13:02 PM PDT 24 Jun 22 07:18:10 PM PDT 24 2610088544 ps
T491 /workspace/coverage/default/62.chip_sw_all_escalation_resets.2916697236 Jun 22 07:46:45 PM PDT 24 Jun 22 07:56:40 PM PDT 24 5238508230 ps
T671 /workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.1253201423 Jun 22 07:41:02 PM PDT 24 Jun 22 08:13:09 PM PDT 24 10728260008 ps
T672 /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.740987718 Jun 22 07:19:14 PM PDT 24 Jun 22 07:23:16 PM PDT 24 2698485763 ps
T673 /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.1238179830 Jun 22 07:12:56 PM PDT 24 Jun 22 08:34:15 PM PDT 24 28559954126 ps
T121 /workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.682369504 Jun 22 07:28:33 PM PDT 24 Jun 22 07:36:57 PM PDT 24 3488321330 ps
T674 /workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.2104600602 Jun 22 07:48:11 PM PDT 24 Jun 22 07:55:46 PM PDT 24 3967011620 ps
T675 /workspace/coverage/default/0.chip_sw_uart_rand_baudrate.2184671187 Jun 22 07:12:14 PM PDT 24 Jun 22 07:41:10 PM PDT 24 8617311000 ps
T343 /workspace/coverage/default/28.chip_sw_all_escalation_resets.1107110507 Jun 22 07:45:58 PM PDT 24 Jun 22 07:59:19 PM PDT 24 5767533342 ps
T676 /workspace/coverage/default/0.chip_sw_edn_kat.2236064585 Jun 22 07:13:25 PM PDT 24 Jun 22 07:26:26 PM PDT 24 2845062132 ps
T268 /workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.2488807207 Jun 22 07:20:24 PM PDT 24 Jun 22 07:29:21 PM PDT 24 5427297840 ps
T24 /workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2326782886 Jun 22 07:34:14 PM PDT 24 Jun 22 07:43:01 PM PDT 24 4040758056 ps
T677 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.3656906687 Jun 22 07:16:39 PM PDT 24 Jun 22 08:10:09 PM PDT 24 12130994060 ps
T678 /workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.957868900 Jun 22 07:11:34 PM PDT 24 Jun 22 07:35:30 PM PDT 24 9555563596 ps
T679 /workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3441817687 Jun 22 07:12:51 PM PDT 24 Jun 22 07:22:58 PM PDT 24 5115688953 ps
T315 /workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.1732188509 Jun 22 07:35:49 PM PDT 24 Jun 22 07:40:08 PM PDT 24 3332753662 ps
T331 /workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.1717113809 Jun 22 07:32:34 PM PDT 24 Jun 22 08:13:39 PM PDT 24 12484267000 ps
T680 /workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.2044553235 Jun 22 07:31:27 PM PDT 24 Jun 22 07:44:30 PM PDT 24 6868959252 ps
T155 /workspace/coverage/default/0.chip_sw_usbdev_config_host.1720924244 Jun 22 07:11:30 PM PDT 24 Jun 22 07:45:55 PM PDT 24 8191746794 ps
T332 /workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.3601119448 Jun 22 07:14:26 PM PDT 24 Jun 22 08:01:14 PM PDT 24 12059429720 ps
T681 /workspace/coverage/default/2.chip_sw_example_flash.3382928895 Jun 22 07:28:19 PM PDT 24 Jun 22 07:31:54 PM PDT 24 2663525016 ps
T682 /workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.647297184 Jun 22 07:19:25 PM PDT 24 Jun 22 07:31:31 PM PDT 24 5415993960 ps
T683 /workspace/coverage/default/3.chip_tap_straps_dev.3463959428 Jun 22 07:40:08 PM PDT 24 Jun 22 07:45:55 PM PDT 24 4404473023 ps
T684 /workspace/coverage/default/1.chip_sw_entropy_src_smoketest.2533360606 Jun 22 07:27:16 PM PDT 24 Jun 22 07:36:24 PM PDT 24 3682190008 ps
T488 /workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.2154268759 Jun 22 07:42:04 PM PDT 24 Jun 22 07:49:53 PM PDT 24 3763223912 ps
T685 /workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.3982540547 Jun 22 07:14:25 PM PDT 24 Jun 22 07:22:53 PM PDT 24 3427100650 ps
T686 /workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.1909011751 Jun 22 07:21:26 PM PDT 24 Jun 22 07:46:34 PM PDT 24 7301341820 ps
T478 /workspace/coverage/default/34.chip_sw_all_escalation_resets.173362741 Jun 22 07:44:30 PM PDT 24 Jun 22 07:54:36 PM PDT 24 5794984330 ps
T687 /workspace/coverage/default/0.chip_sw_rv_timer_irq.3862873616 Jun 22 07:11:43 PM PDT 24 Jun 22 07:15:09 PM PDT 24 2873866284 ps
T482 /workspace/coverage/default/13.chip_sw_all_escalation_resets.1614259893 Jun 22 07:45:07 PM PDT 24 Jun 22 07:56:04 PM PDT 24 4464228880 ps
T688 /workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.990610663 Jun 22 07:16:09 PM PDT 24 Jun 22 07:30:05 PM PDT 24 6035753852 ps
T501 /workspace/coverage/default/40.chip_sw_all_escalation_resets.408599795 Jun 22 07:44:33 PM PDT 24 Jun 22 07:58:42 PM PDT 24 5328920600 ps
T689 /workspace/coverage/default/16.chip_sw_uart_rand_baudrate.2486007278 Jun 22 07:44:27 PM PDT 24 Jun 22 07:54:30 PM PDT 24 4032486152 ps
T690 /workspace/coverage/default/1.chip_sw_flash_ctrl_access.841433194 Jun 22 07:18:12 PM PDT 24 Jun 22 07:36:52 PM PDT 24 5448984800 ps
T344 /workspace/coverage/default/7.chip_sw_all_escalation_resets.1675844783 Jun 22 07:39:50 PM PDT 24 Jun 22 07:53:19 PM PDT 24 5719733350 ps
T691 /workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3516635289 Jun 22 07:43:59 PM PDT 24 Jun 22 07:51:05 PM PDT 24 3443513280 ps
T692 /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.693504373 Jun 22 07:31:01 PM PDT 24 Jun 22 07:35:51 PM PDT 24 5591854812 ps
T191 /workspace/coverage/default/0.chip_plic_all_irqs_20.4250605534 Jun 22 07:14:34 PM PDT 24 Jun 22 07:25:36 PM PDT 24 4964834340 ps
T693 /workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.4105720064 Jun 22 07:12:54 PM PDT 24 Jun 22 07:23:19 PM PDT 24 7505881074 ps
T276 /workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.344141089 Jun 22 07:47:19 PM PDT 24 Jun 22 07:53:20 PM PDT 24 3898042660 ps
T694 /workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.1980272275 Jun 22 07:33:14 PM PDT 24 Jun 22 07:46:48 PM PDT 24 7112861036 ps
T519 /workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.535771132 Jun 22 07:48:45 PM PDT 24 Jun 22 07:55:54 PM PDT 24 3602946076 ps
T695 /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.340660178 Jun 22 07:31:03 PM PDT 24 Jun 22 08:35:57 PM PDT 24 16244769110 ps
T696 /workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.2328364874 Jun 22 07:21:12 PM PDT 24 Jun 22 10:55:32 PM PDT 24 78589611706 ps
T514 /workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.1210146454 Jun 22 07:44:23 PM PDT 24 Jun 22 07:51:52 PM PDT 24 3977513656 ps
T697 /workspace/coverage/default/4.chip_tap_straps_dev.2998826574 Jun 22 07:39:28 PM PDT 24 Jun 22 08:06:19 PM PDT 24 17412665929 ps
T698 /workspace/coverage/default/1.chip_sw_aes_masking_off.939727299 Jun 22 07:18:29 PM PDT 24 Jun 22 07:23:55 PM PDT 24 2724168248 ps
T699 /workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.156928636 Jun 22 07:17:58 PM PDT 24 Jun 22 08:29:01 PM PDT 24 14791271646 ps
T700 /workspace/coverage/default/0.chip_sw_clkmgr_off_peri.1766503973 Jun 22 07:13:11 PM PDT 24 Jun 22 07:36:39 PM PDT 24 10234614560 ps
T701 /workspace/coverage/default/2.chip_sw_edn_kat.815856505 Jun 22 07:38:26 PM PDT 24 Jun 22 07:51:37 PM PDT 24 3767193800 ps
T702 /workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.990261947 Jun 22 07:40:12 PM PDT 24 Jun 22 08:39:59 PM PDT 24 18010163854 ps
T379 /workspace/coverage/default/1.chip_sw_entropy_src_csrng.3136094265 Jun 22 07:20:56 PM PDT 24 Jun 22 07:43:32 PM PDT 24 6081550056 ps
T703 /workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.151528682 Jun 22 07:11:27 PM PDT 24 Jun 22 07:19:55 PM PDT 24 4081334160 ps
T704 /workspace/coverage/default/2.chip_sw_aon_timer_smoketest.551123339 Jun 22 07:37:56 PM PDT 24 Jun 22 07:43:20 PM PDT 24 3138240902 ps
T471 /workspace/coverage/default/15.chip_sw_all_escalation_resets.351062921 Jun 22 07:45:12 PM PDT 24 Jun 22 07:53:29 PM PDT 24 4981803880 ps
T705 /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1177705155 Jun 22 07:34:21 PM PDT 24 Jun 22 07:47:12 PM PDT 24 4487969640 ps
T706 /workspace/coverage/default/0.chip_sw_kmac_entropy.1412063579 Jun 22 07:11:17 PM PDT 24 Jun 22 07:15:01 PM PDT 24 3057087246 ps
T707 /workspace/coverage/default/4.chip_tap_straps_testunlock0.1992493704 Jun 22 07:38:23 PM PDT 24 Jun 22 07:50:57 PM PDT 24 8154882721 ps
T708 /workspace/coverage/default/1.chip_sw_kmac_app_rom.1660289615 Jun 22 07:23:45 PM PDT 24 Jun 22 07:28:30 PM PDT 24 3237996952 ps
T709 /workspace/coverage/default/19.chip_sw_uart_rand_baudrate.3915363481 Jun 22 07:42:16 PM PDT 24 Jun 22 08:08:38 PM PDT 24 8203923768 ps
T710 /workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.3682136395 Jun 22 07:37:30 PM PDT 24 Jun 22 07:41:48 PM PDT 24 2159474320 ps
T711 /workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.3167646250 Jun 22 07:35:08 PM PDT 24 Jun 22 07:38:44 PM PDT 24 2981690217 ps
T712 /workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.756009070 Jun 22 07:31:40 PM PDT 24 Jun 22 08:23:05 PM PDT 24 20751315002 ps
T713 /workspace/coverage/default/1.chip_sw_rstmgr_smoketest.4235341040 Jun 22 07:29:00 PM PDT 24 Jun 22 07:32:43 PM PDT 24 3099665392 ps
T68 /workspace/coverage/default/2.chip_sw_spi_device_tpm.844686171 Jun 22 07:30:47 PM PDT 24 Jun 22 07:39:24 PM PDT 24 4283754525 ps
T714 /workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.4026477026 Jun 22 07:16:34 PM PDT 24 Jun 22 07:28:26 PM PDT 24 6422109648 ps
T715 /workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.1017592653 Jun 22 07:46:31 PM PDT 24 Jun 22 07:53:16 PM PDT 24 4238501794 ps
T31 /workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.3364699060 Jun 22 07:31:14 PM PDT 24 Jun 22 07:55:36 PM PDT 24 13214072964 ps
T459 /workspace/coverage/default/37.chip_sw_all_escalation_resets.3949746694 Jun 22 07:44:33 PM PDT 24 Jun 22 07:52:22 PM PDT 24 4765917380 ps
T35 /workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.3569185857 Jun 22 07:15:33 PM PDT 24 Jun 22 07:19:41 PM PDT 24 2424262435 ps
T716 /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.1670572285 Jun 22 07:13:56 PM PDT 24 Jun 22 07:26:30 PM PDT 24 10116321526 ps
T717 /workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.4123279117 Jun 22 07:12:00 PM PDT 24 Jun 22 07:47:27 PM PDT 24 33748028050 ps
T182 /workspace/coverage/default/2.chip_plic_all_irqs_0.3269295836 Jun 22 07:35:14 PM PDT 24 Jun 22 07:53:46 PM PDT 24 6280096176 ps
T718 /workspace/coverage/default/4.chip_sw_uart_tx_rx.2616610009 Jun 22 07:39:18 PM PDT 24 Jun 22 07:51:26 PM PDT 24 4885350168 ps
T516 /workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.1025242838 Jun 22 07:46:09 PM PDT 24 Jun 22 07:52:36 PM PDT 24 3466487976 ps
T719 /workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.3100989354 Jun 22 07:21:18 PM PDT 24 Jun 22 07:53:32 PM PDT 24 8984249760 ps
T483 /workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.978995203 Jun 22 07:48:41 PM PDT 24 Jun 22 07:54:35 PM PDT 24 3427738200 ps
T510 /workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.4157831527 Jun 22 07:50:22 PM PDT 24 Jun 22 07:58:03 PM PDT 24 4439028240 ps
T720 /workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.2362066629 Jun 22 07:16:48 PM PDT 24 Jun 22 07:46:46 PM PDT 24 11637038404 ps
T96 /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.2686566449 Jun 22 07:34:47 PM PDT 24 Jun 22 08:06:25 PM PDT 24 25762646980 ps
T721 /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.3638274551 Jun 22 07:13:06 PM PDT 24 Jun 22 07:23:03 PM PDT 24 6677800608 ps
T722 /workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.676528141 Jun 22 07:29:56 PM PDT 24 Jun 22 07:34:53 PM PDT 24 3477407327 ps
T308 /workspace/coverage/default/53.chip_sw_all_escalation_resets.3750643153 Jun 22 07:46:52 PM PDT 24 Jun 22 08:00:07 PM PDT 24 5372208808 ps
T64 /workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1128452429 Jun 22 07:18:28 PM PDT 24 Jun 22 07:27:27 PM PDT 24 6527693504 ps
T723 /workspace/coverage/default/17.chip_sw_uart_rand_baudrate.438458601 Jun 22 07:42:41 PM PDT 24 Jun 22 07:50:42 PM PDT 24 3693956916 ps
T724 /workspace/coverage/default/0.chip_sw_hmac_enc_idle.3001775695 Jun 22 07:21:30 PM PDT 24 Jun 22 07:26:07 PM PDT 24 2862322720 ps
T725 /workspace/coverage/default/2.chip_sw_kmac_entropy.3891850767 Jun 22 07:32:16 PM PDT 24 Jun 22 07:37:18 PM PDT 24 3305026866 ps
T143 /workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.2326943036 Jun 22 07:20:00 PM PDT 24 Jun 22 07:31:28 PM PDT 24 5695456800 ps
T726 /workspace/coverage/default/2.chip_sw_rstmgr_smoketest.595818162 Jun 22 07:38:21 PM PDT 24 Jun 22 07:41:37 PM PDT 24 2412646888 ps
T727 /workspace/coverage/default/2.chip_sw_rv_timer_irq.1019185728 Jun 22 07:34:07 PM PDT 24 Jun 22 07:40:18 PM PDT 24 3046806986 ps
T728 /workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.124219685 Jun 22 07:42:19 PM PDT 24 Jun 22 08:34:49 PM PDT 24 15520089842 ps
T729 /workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3004614134 Jun 22 07:25:22 PM PDT 24 Jun 22 07:49:03 PM PDT 24 7951338271 ps
T730 /workspace/coverage/default/2.chip_sw_flash_crash_alert.2380247569 Jun 22 07:35:24 PM PDT 24 Jun 22 07:46:37 PM PDT 24 4873847502 ps
T731 /workspace/coverage/default/0.chip_sw_plic_sw_irq.2658768468 Jun 22 07:16:40 PM PDT 24 Jun 22 07:22:48 PM PDT 24 2930553560 ps
T86 /workspace/coverage/default/80.chip_sw_all_escalation_resets.173539410 Jun 22 07:47:11 PM PDT 24 Jun 22 07:55:08 PM PDT 24 4754130608 ps
T732 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3398583936 Jun 22 07:24:42 PM PDT 24 Jun 22 07:35:12 PM PDT 24 3674772352 ps
T390 /workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.4100457639 Jun 22 07:36:20 PM PDT 24 Jun 22 07:47:28 PM PDT 24 4054833616 ps
T316 /workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.3963992297 Jun 22 07:11:02 PM PDT 24 Jun 22 07:14:54 PM PDT 24 3176484529 ps
T398 /workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.279371508 Jun 22 07:11:49 PM PDT 24 Jun 22 07:18:09 PM PDT 24 4779911810 ps
T733 /workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3476974390 Jun 22 07:28:58 PM PDT 24 Jun 22 07:51:17 PM PDT 24 8681190951 ps
T460 /workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.3227557118 Jun 22 07:47:35 PM PDT 24 Jun 22 07:55:15 PM PDT 24 3256266404 ps
T345 /workspace/coverage/default/98.chip_sw_all_escalation_resets.1196362162 Jun 22 07:51:11 PM PDT 24 Jun 22 08:00:15 PM PDT 24 5740894680 ps
T734 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.867702656 Jun 22 07:19:03 PM PDT 24 Jun 22 08:22:11 PM PDT 24 15981222162 ps
T735 /workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.313870017 Jun 22 07:27:49 PM PDT 24 Jun 22 07:36:07 PM PDT 24 6238980352 ps
T736 /workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.5036046 Jun 22 07:31:14 PM PDT 24 Jun 22 08:18:26 PM PDT 24 11636800451 ps
T737 /workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.4028559502 Jun 22 07:17:20 PM PDT 24 Jun 22 08:29:06 PM PDT 24 25015159166 ps
T738 /workspace/coverage/default/2.rom_e2e_asm_init_rma.3410118983 Jun 22 07:42:33 PM PDT 24 Jun 22 08:52:45 PM PDT 24 15912667232 ps
T739 /workspace/coverage/default/2.chip_sw_kmac_app_rom.1922380497 Jun 22 07:32:49 PM PDT 24 Jun 22 07:37:13 PM PDT 24 3035528720 ps
T503 /workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.3962167909 Jun 22 07:41:06 PM PDT 24 Jun 22 07:47:25 PM PDT 24 3755339360 ps
T740 /workspace/coverage/default/2.chip_sw_inject_scramble_seed.337941193 Jun 22 07:28:29 PM PDT 24 Jun 22 10:34:32 PM PDT 24 63544234610 ps
T741 /workspace/coverage/default/1.chip_sival_flash_info_access.948505536 Jun 22 07:16:45 PM PDT 24 Jun 22 07:22:21 PM PDT 24 3406285806 ps
T512 /workspace/coverage/default/43.chip_sw_all_escalation_resets.210745066 Jun 22 07:44:19 PM PDT 24 Jun 22 07:54:55 PM PDT 24 5619932280 ps
T742 /workspace/coverage/default/2.chip_sw_kmac_idle.3370468867 Jun 22 07:33:00 PM PDT 24 Jun 22 07:36:26 PM PDT 24 2179114504 ps
T82 /workspace/coverage/default/0.chip_sw_alert_handler_entropy.2407509407 Jun 22 07:14:10 PM PDT 24 Jun 22 07:20:48 PM PDT 24 4076800491 ps
T743 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.788019466 Jun 22 07:23:41 PM PDT 24 Jun 22 07:33:16 PM PDT 24 3559054870 ps
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T745 /workspace/coverage/default/2.chip_sw_aes_entropy.237820777 Jun 22 07:35:23 PM PDT 24 Jun 22 07:40:00 PM PDT 24 2871967056 ps
T746 /workspace/coverage/default/0.chip_sw_hmac_multistream.1868036948 Jun 22 07:14:06 PM PDT 24 Jun 22 07:37:53 PM PDT 24 6066597072 ps
T108 /workspace/coverage/default/2.chip_jtag_csr_rw.2999338214 Jun 22 07:27:39 PM PDT 24 Jun 22 07:32:35 PM PDT 24 4386819464 ps
T747 /workspace/coverage/default/1.chip_sw_edn_kat.2287893306 Jun 22 07:20:51 PM PDT 24 Jun 22 07:31:09 PM PDT 24 2942743800 ps
T748 /workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.2517724074 Jun 22 07:11:52 PM PDT 24 Jun 22 07:21:06 PM PDT 24 4244127636 ps
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T749 /workspace/coverage/default/2.chip_sw_hmac_oneshot.3070388522 Jun 22 07:35:28 PM PDT 24 Jun 22 07:40:58 PM PDT 24 2559426512 ps
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T751 /workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.3831925146 Jun 22 07:14:50 PM PDT 24 Jun 22 07:46:10 PM PDT 24 7945644183 ps
T526 /workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.1009227384 Jun 22 07:44:59 PM PDT 24 Jun 22 07:50:58 PM PDT 24 3947380884 ps
T752 /workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.2686993329 Jun 22 07:46:50 PM PDT 24 Jun 22 07:54:28 PM PDT 24 4321254700 ps
T753 /workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.1800209486 Jun 22 07:32:21 PM PDT 24 Jun 22 07:36:41 PM PDT 24 2824716507 ps
T477 /workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.3603224551 Jun 22 07:42:02 PM PDT 24 Jun 22 07:48:18 PM PDT 24 3188192290 ps
T754 /workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.553985383 Jun 22 07:13:29 PM PDT 24 Jun 22 08:03:43 PM PDT 24 32249343023 ps
T755 /workspace/coverage/default/1.chip_sw_hmac_enc_idle.3948576475 Jun 22 07:22:51 PM PDT 24 Jun 22 07:29:26 PM PDT 24 2768339312 ps
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T757 /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1441802437 Jun 22 07:12:43 PM PDT 24 Jun 22 07:20:02 PM PDT 24 6833078648 ps
T758 /workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3328236820 Jun 22 07:19:20 PM PDT 24 Jun 22 10:36:37 PM PDT 24 255894459106 ps
T456 /workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.4125956543 Jun 22 07:44:41 PM PDT 24 Jun 22 07:52:14 PM PDT 24 3596677368 ps
T759 /workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.1104297830 Jun 22 07:22:34 PM PDT 24 Jun 22 07:31:00 PM PDT 24 5937579288 ps
T65 /workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3929829328 Jun 22 07:17:14 PM PDT 24 Jun 22 07:23:42 PM PDT 24 5911407464 ps
T760 /workspace/coverage/default/8.chip_sw_all_escalation_resets.1223644338 Jun 22 07:42:26 PM PDT 24 Jun 22 07:52:31 PM PDT 24 5226442166 ps
T761 /workspace/coverage/default/57.chip_sw_all_escalation_resets.178487295 Jun 22 07:48:10 PM PDT 24 Jun 22 07:58:07 PM PDT 24 4794627200 ps
T473 /workspace/coverage/default/55.chip_sw_all_escalation_resets.588911981 Jun 22 07:46:56 PM PDT 24 Jun 22 07:58:31 PM PDT 24 5721640012 ps
T762 /workspace/coverage/default/0.chip_sw_kmac_idle.2397690338 Jun 22 07:14:20 PM PDT 24 Jun 22 07:18:13 PM PDT 24 2625847748 ps
T763 /workspace/coverage/default/1.chip_sw_data_integrity_escalation.4100787018 Jun 22 07:14:37 PM PDT 24 Jun 22 07:26:20 PM PDT 24 5091672004 ps
T764 /workspace/coverage/default/2.chip_sw_aes_enc.3102279812 Jun 22 07:31:50 PM PDT 24 Jun 22 07:36:30 PM PDT 24 2218448392 ps
T278 /workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.2096372282 Jun 22 07:17:20 PM PDT 24 Jun 22 07:26:52 PM PDT 24 5458095430 ps
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T766 /workspace/coverage/default/1.chip_sw_all_escalation_resets.2247361463 Jun 22 07:14:52 PM PDT 24 Jun 22 07:24:12 PM PDT 24 4929449112 ps
T381 /workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.283093921 Jun 22 07:34:52 PM PDT 24 Jun 22 07:42:30 PM PDT 24 4605588532 ps
T767 /workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.883403156 Jun 22 07:19:58 PM PDT 24 Jun 22 08:27:47 PM PDT 24 18559047155 ps
T768 /workspace/coverage/default/2.rom_e2e_asm_init_dev.2763567717 Jun 22 07:40:41 PM PDT 24 Jun 22 08:35:54 PM PDT 24 15611544479 ps
T531 /workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.3799469479 Jun 22 07:46:41 PM PDT 24 Jun 22 07:53:21 PM PDT 24 3280820640 ps
T769 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.792146513 Jun 22 07:19:29 PM PDT 24 Jun 22 08:15:10 PM PDT 24 11286675034 ps
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T481 /workspace/coverage/default/22.chip_sw_all_escalation_resets.438258772 Jun 22 07:43:02 PM PDT 24 Jun 22 07:51:16 PM PDT 24 5110179800 ps
T260 /workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.3939212097 Jun 22 07:17:50 PM PDT 24 Jun 22 07:27:24 PM PDT 24 4332523504 ps
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T11 /workspace/coverage/default/1.chip_sw_sleep_pin_retention.4211546498 Jun 22 07:15:28 PM PDT 24 Jun 22 07:20:38 PM PDT 24 2830212820 ps
T12 /workspace/coverage/default/0.chip_sw_sleep_pin_retention.1025182018 Jun 22 07:16:57 PM PDT 24 Jun 22 07:23:06 PM PDT 24 3896780642 ps
T777 /workspace/coverage/default/0.chip_sw_otbn_mem_scramble.230640460 Jun 22 07:13:10 PM PDT 24 Jun 22 07:23:52 PM PDT 24 3726969294 ps
T284 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.466365670 Jun 22 07:22:22 PM PDT 24 Jun 22 09:05:25 PM PDT 24 23567376644 ps
T778 /workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.1548672952 Jun 22 07:39:43 PM PDT 24 Jun 22 08:27:14 PM PDT 24 13946043000 ps
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T780 /workspace/coverage/default/0.chip_sw_aes_entropy.1612281308 Jun 22 07:12:53 PM PDT 24 Jun 22 07:19:17 PM PDT 24 2558493188 ps
T781 /workspace/coverage/default/2.rom_e2e_static_critical.212174193 Jun 22 07:46:06 PM PDT 24 Jun 22 08:59:37 PM PDT 24 16818827520 ps
T782 /workspace/coverage/default/5.chip_sw_uart_rand_baudrate.1740785892 Jun 22 07:41:07 PM PDT 24 Jun 22 08:02:00 PM PDT 24 8192159686 ps
T783 /workspace/coverage/default/1.chip_sw_kmac_entropy.2323310135 Jun 22 07:16:01 PM PDT 24 Jun 22 07:20:51 PM PDT 24 2424575812 ps
T784 /workspace/coverage/default/1.chip_sw_hmac_smoketest.1267893489 Jun 22 07:27:37 PM PDT 24 Jun 22 07:33:11 PM PDT 24 3007035400 ps
T785 /workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.183952249 Jun 22 07:34:02 PM PDT 24 Jun 22 07:46:05 PM PDT 24 4794429532 ps
T786 /workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.130676288 Jun 22 07:11:13 PM PDT 24 Jun 22 07:16:11 PM PDT 24 2734464186 ps
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T788 /workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.232080868 Jun 22 07:32:36 PM PDT 24 Jun 22 08:06:28 PM PDT 24 10469464618 ps
T789 /workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3583953355 Jun 22 07:31:51 PM PDT 24 Jun 22 07:46:17 PM PDT 24 6845263080 ps
T465 /workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.2435684462 Jun 22 07:40:52 PM PDT 24 Jun 22 07:48:23 PM PDT 24 4140895938 ps
T790 /workspace/coverage/default/3.chip_tap_straps_prod.3995915734 Jun 22 07:38:44 PM PDT 24 Jun 22 07:41:07 PM PDT 24 2765708162 ps
T457 /workspace/coverage/default/35.chip_sw_all_escalation_resets.3321332410 Jun 22 07:43:17 PM PDT 24 Jun 22 07:52:09 PM PDT 24 4564019422 ps
T791 /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.3639672584 Jun 22 07:12:28 PM PDT 24 Jun 22 07:29:40 PM PDT 24 5731872416 ps
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T16 /workspace/coverage/default/1.chip_sw_sleep_pin_wake.3240839939 Jun 22 07:16:43 PM PDT 24 Jun 22 07:22:41 PM PDT 24 5677663402 ps
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T426 /workspace/coverage/default/1.chip_sw_edn_boot_mode.237448470 Jun 22 07:19:43 PM PDT 24 Jun 22 07:29:07 PM PDT 24 2902090744 ps
T122 /workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.2329929109 Jun 22 07:15:43 PM PDT 24 Jun 22 07:23:06 PM PDT 24 3647162242 ps
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T795 /workspace/coverage/default/1.chip_sw_otbn_randomness.1777585617 Jun 22 07:17:08 PM PDT 24 Jun 22 07:34:26 PM PDT 24 6157014744 ps
T796 /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.2824068466 Jun 22 07:13:14 PM PDT 24 Jun 22 07:33:58 PM PDT 24 8147636560 ps
T797 /workspace/coverage/default/1.rom_e2e_asm_init_prod.1032043041 Jun 22 07:32:07 PM PDT 24 Jun 22 08:42:54 PM PDT 24 16419302107 ps
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T799 /workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.3416812934 Jun 22 07:45:39 PM PDT 24 Jun 22 07:51:18 PM PDT 24 3850840180 ps
T467 /workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.2426765449 Jun 22 07:46:10 PM PDT 24 Jun 22 07:52:51 PM PDT 24 3701221678 ps
T800 /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.1110515365 Jun 22 07:11:52 PM PDT 24 Jun 22 07:38:46 PM PDT 24 9713303787 ps
T801 /workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.3043274546 Jun 22 07:44:21 PM PDT 24 Jun 22 07:51:10 PM PDT 24 3104696064 ps
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T803 /workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.431925436 Jun 22 07:46:20 PM PDT 24 Jun 22 07:52:10 PM PDT 24 3978451100 ps
T496 /workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.522223037 Jun 22 07:44:02 PM PDT 24 Jun 22 07:50:53 PM PDT 24 3769557160 ps
T804 /workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.346480518 Jun 22 07:18:14 PM PDT 24 Jun 22 08:06:54 PM PDT 24 20651834919 ps
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T60 /workspace/coverage/default/2.chip_sw_spi_host_tx_rx.1954416871 Jun 22 07:29:01 PM PDT 24 Jun 22 07:33:03 PM PDT 24 2875568576 ps
T807 /workspace/coverage/default/1.chip_sw_edn_auto_mode.2980634788 Jun 22 07:20:45 PM PDT 24 Jun 22 07:30:58 PM PDT 24 3218841412 ps
T808 /workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.3174877627 Jun 22 07:19:20 PM PDT 24 Jun 22 07:23:04 PM PDT 24 2452330724 ps
T809 /workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.3387174251 Jun 22 07:17:39 PM PDT 24 Jun 22 07:19:20 PM PDT 24 2133914518 ps
T810 /workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.3082700941 Jun 22 07:17:18 PM PDT 24 Jun 22 07:37:10 PM PDT 24 8967894280 ps
T388 /workspace/coverage/default/0.chip_sw_flash_ctrl_ops.133318887 Jun 22 07:12:08 PM PDT 24 Jun 22 07:22:08 PM PDT 24 4091070024 ps
T811 /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1661797394 Jun 22 07:33:45 PM PDT 24 Jun 22 07:42:03 PM PDT 24 5027925154 ps
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T502 /workspace/coverage/default/88.chip_sw_all_escalation_resets.3704275921 Jun 22 07:51:15 PM PDT 24 Jun 22 08:00:28 PM PDT 24 4968056636 ps
T812 /workspace/coverage/default/2.chip_sival_flash_info_access.4157581746 Jun 22 07:28:31 PM PDT 24 Jun 22 07:32:40 PM PDT 24 2776786648 ps
T52 /workspace/coverage/default/0.chip_sw_gpio.1322546172 Jun 22 07:13:27 PM PDT 24 Jun 22 07:23:21 PM PDT 24 3971216988 ps
T813 /workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.2637597869 Jun 22 07:13:28 PM PDT 24 Jun 22 10:22:56 PM PDT 24 59084379770 ps
T486 /workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.2569198090 Jun 22 07:47:01 PM PDT 24 Jun 22 07:54:51 PM PDT 24 3961381450 ps
T359 /workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.2679191881 Jun 22 07:22:20 PM PDT 24 Jun 22 07:35:26 PM PDT 24 8640238952 ps
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T815 /workspace/coverage/default/2.chip_sw_clkmgr_jitter.1023343568 Jun 22 07:33:57 PM PDT 24 Jun 22 07:38:27 PM PDT 24 2652921808 ps
T816 /workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.902278760 Jun 22 07:10:36 PM PDT 24 Jun 22 07:14:59 PM PDT 24 3694433814 ps
T235 /workspace/coverage/default/1.chip_sw_flash_rma_unlocked.3284709763 Jun 22 07:14:01 PM PDT 24 Jun 22 08:41:45 PM PDT 24 43326082570 ps
T817 /workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.2389558400 Jun 22 07:38:55 PM PDT 24 Jun 22 07:45:22 PM PDT 24 5589430804 ps
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T279 /workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.809269921 Jun 22 07:12:44 PM PDT 24 Jun 22 07:22:00 PM PDT 24 5037588600 ps
T819 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1169725643 Jun 22 07:13:53 PM PDT 24 Jun 22 07:25:29 PM PDT 24 3692028796 ps
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T309 /workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.3852206414 Jun 22 07:45:43 PM PDT 24 Jun 22 07:52:35 PM PDT 24 4060578126 ps
T400 /workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.46303765 Jun 22 07:42:20 PM PDT 24 Jun 22 07:48:48 PM PDT 24 4026813752 ps
T821 /workspace/coverage/default/0.chip_sw_example_rom.366141824 Jun 22 07:10:34 PM PDT 24 Jun 22 07:12:26 PM PDT 24 2283269240 ps
T822 /workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1823908798 Jun 22 07:27:50 PM PDT 24 Jun 22 07:39:28 PM PDT 24 3818388889 ps
T823 /workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.4067974439 Jun 22 07:41:34 PM PDT 24 Jun 22 07:44:26 PM PDT 24 2141090014 ps
T824 /workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.61216497 Jun 22 07:16:36 PM PDT 24 Jun 22 07:41:13 PM PDT 24 7622728156 ps
T825 /workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.1751109003 Jun 22 07:11:52 PM PDT 24 Jun 22 07:37:29 PM PDT 24 8375823344 ps
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