| SCORE |
LINE |
COND |
TOGGLE |
FSM |
BRANCH |
ASSERT |
GROUP |
|
| TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | NAME |
| 40.70 |
40.70 |
44.72 |
44.72 |
42.98 |
42.98 |
31.95 |
31.95 |
|
|
57.88 |
57.88 |
59.44 |
59.44 |
7.24 |
7.24 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.3289029646 |
| 51.52 |
10.82 |
46.12 |
1.40 |
45.56 |
2.59 |
39.18 |
7.23 |
|
|
59.67 |
1.79 |
59.62 |
0.17 |
58.99 |
51.75 |
/workspace/coverage/default/2.chip_sw_alert_test.3863493111 |
| 60.14 |
8.61 |
61.65 |
15.53 |
58.08 |
12.51 |
44.36 |
5.18 |
|
|
74.00 |
14.33 |
59.79 |
0.17 |
62.94 |
3.95 |
/workspace/coverage/default/0.chip_jtag_csr_rw.2430730927 |
| 64.89 |
4.75 |
70.91 |
9.27 |
62.97 |
4.89 |
48.44 |
4.07 |
|
|
76.23 |
2.23 |
64.34 |
4.55 |
66.45 |
3.51 |
/workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.839652438 |
| 68.17 |
3.28 |
76.27 |
5.36 |
69.97 |
7.00 |
48.93 |
0.49 |
|
|
82.91 |
6.68 |
64.51 |
0.17 |
66.45 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.1619221658 |
| 70.94 |
2.77 |
76.27 |
0.00 |
69.97 |
0.00 |
65.55 |
16.62 |
|
|
82.91 |
0.00 |
64.51 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.1777825978 |
| 72.61 |
1.67 |
80.06 |
3.79 |
72.19 |
2.22 |
66.89 |
1.34 |
|
|
85.58 |
2.67 |
64.51 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.1206542637 |
| 73.81 |
1.20 |
80.06 |
0.00 |
72.19 |
0.00 |
74.06 |
7.17 |
|
|
85.58 |
0.00 |
64.51 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.2593924836 |
| 74.98 |
1.17 |
81.17 |
1.10 |
73.12 |
0.93 |
74.30 |
0.24 |
|
|
86.67 |
1.09 |
68.18 |
3.67 |
66.45 |
0.00 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.2896684530 |
| 75.99 |
1.01 |
82.16 |
1.00 |
73.65 |
0.53 |
74.40 |
0.10 |
|
|
87.24 |
0.57 |
72.03 |
3.85 |
66.45 |
0.00 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.686914957 |
| 76.82 |
0.84 |
83.67 |
1.51 |
74.75 |
1.09 |
75.52 |
1.12 |
|
|
88.53 |
1.30 |
72.03 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.2123780394 |
| 77.51 |
0.68 |
84.24 |
0.57 |
75.38 |
0.64 |
75.72 |
0.20 |
|
|
89.12 |
0.58 |
74.13 |
2.10 |
66.45 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.4211546498 |
| 78.18 |
0.67 |
85.62 |
1.38 |
75.92 |
0.54 |
77.37 |
1.65 |
|
|
89.41 |
0.29 |
74.30 |
0.17 |
66.45 |
0.00 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.2556419899 |
| 78.78 |
0.60 |
85.63 |
0.01 |
75.93 |
0.01 |
80.94 |
3.57 |
|
|
89.41 |
0.00 |
74.30 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.3669528301 |
| 79.25 |
0.48 |
85.90 |
0.27 |
76.20 |
0.28 |
80.94 |
0.00 |
|
|
89.64 |
0.23 |
76.40 |
2.10 |
66.45 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.3722002482 |
| 79.73 |
0.48 |
86.18 |
0.28 |
76.47 |
0.26 |
80.94 |
0.00 |
|
|
89.86 |
0.22 |
78.50 |
2.10 |
66.45 |
0.00 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.1011830256 |
| 80.15 |
0.42 |
87.34 |
1.15 |
76.71 |
0.24 |
81.19 |
0.25 |
|
|
90.02 |
0.16 |
79.20 |
0.70 |
66.45 |
0.00 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.3394681143 |
| 80.54 |
0.39 |
87.46 |
0.12 |
76.79 |
0.09 |
83.17 |
1.98 |
|
|
90.19 |
0.17 |
79.20 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.1460098948 |
| 80.86 |
0.32 |
88.11 |
0.65 |
77.25 |
0.45 |
83.56 |
0.39 |
|
|
90.59 |
0.41 |
79.20 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.2810925370 |
| 81.16 |
0.30 |
88.62 |
0.51 |
77.71 |
0.47 |
83.96 |
0.39 |
|
|
91.03 |
0.44 |
79.20 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.3098510114 |
| 81.46 |
0.29 |
88.66 |
0.03 |
77.72 |
0.01 |
83.96 |
0.01 |
|
|
91.05 |
0.02 |
79.37 |
0.17 |
67.98 |
1.54 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.809269921 |
| 81.71 |
0.26 |
88.66 |
0.00 |
77.72 |
0.00 |
84.62 |
0.66 |
|
|
91.05 |
0.00 |
79.37 |
0.00 |
68.86 |
0.88 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.2461108602 |
| 81.91 |
0.20 |
88.87 |
0.21 |
78.13 |
0.41 |
85.12 |
0.50 |
|
|
91.11 |
0.06 |
79.37 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/1.chip_jtag_csr_rw.962746717 |
| 82.10 |
0.19 |
88.97 |
0.10 |
78.21 |
0.08 |
85.15 |
0.02 |
|
|
91.18 |
0.07 |
80.24 |
0.87 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.1685969540 |
| 82.25 |
0.15 |
89.23 |
0.27 |
78.34 |
0.13 |
85.16 |
0.01 |
|
|
91.26 |
0.08 |
80.42 |
0.17 |
69.08 |
0.22 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.3564858855 |
| 82.40 |
0.15 |
89.44 |
0.21 |
78.66 |
0.32 |
85.52 |
0.36 |
|
|
91.26 |
0.00 |
80.42 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3120827919 |
| 82.53 |
0.13 |
89.50 |
0.06 |
79.00 |
0.34 |
85.53 |
0.02 |
|
|
91.64 |
0.38 |
80.42 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.3569185857 |
| 82.65 |
0.12 |
89.77 |
0.26 |
79.03 |
0.03 |
85.61 |
0.07 |
|
|
91.64 |
0.00 |
80.77 |
0.35 |
69.08 |
0.00 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.908738970 |
| 82.74 |
0.10 |
89.79 |
0.02 |
79.06 |
0.03 |
85.92 |
0.32 |
|
|
91.67 |
0.02 |
80.94 |
0.17 |
69.08 |
0.00 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.3547279794 |
| 82.83 |
0.09 |
89.79 |
0.00 |
79.06 |
0.00 |
86.45 |
0.53 |
|
|
91.67 |
0.00 |
80.94 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3627609657 |
| 82.92 |
0.09 |
89.79 |
0.00 |
79.06 |
0.00 |
86.97 |
0.52 |
|
|
91.67 |
0.00 |
80.94 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.3347582661 |
| 82.99 |
0.07 |
89.80 |
0.01 |
79.08 |
0.01 |
86.97 |
0.00 |
|
|
91.69 |
0.02 |
81.12 |
0.17 |
69.30 |
0.22 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.46303765 |
| 83.06 |
0.07 |
89.80 |
0.01 |
79.09 |
0.01 |
86.98 |
0.01 |
|
|
91.70 |
0.01 |
81.29 |
0.17 |
69.52 |
0.22 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.3253793528 |
| 83.13 |
0.07 |
89.81 |
0.01 |
79.10 |
0.01 |
86.99 |
0.01 |
|
|
91.71 |
0.01 |
81.47 |
0.17 |
69.74 |
0.22 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.1107110507 |
| 83.20 |
0.07 |
89.81 |
0.00 |
79.10 |
0.00 |
87.40 |
0.41 |
|
|
91.71 |
0.00 |
81.47 |
0.00 |
69.74 |
0.00 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.639699513 |
| 83.27 |
0.07 |
89.81 |
0.00 |
79.13 |
0.02 |
87.52 |
0.12 |
|
|
91.73 |
0.02 |
81.47 |
0.00 |
69.96 |
0.22 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.1400239529 |
| 83.32 |
0.05 |
89.84 |
0.03 |
79.14 |
0.01 |
87.57 |
0.05 |
|
|
91.74 |
0.01 |
81.47 |
0.00 |
70.18 |
0.22 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.3517496026 |
| 83.36 |
0.04 |
89.86 |
0.01 |
79.15 |
0.01 |
87.58 |
0.01 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
70.39 |
0.22 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.3268282460 |
| 83.40 |
0.04 |
89.88 |
0.03 |
79.17 |
0.02 |
87.75 |
0.18 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
70.39 |
0.00 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.917647266 |
| 83.44 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.76 |
0.01 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
70.61 |
0.22 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.1805147246 |
| 83.48 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.76 |
0.01 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
70.83 |
0.22 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.2723275003 |
| 83.51 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.01 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
71.05 |
0.22 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.1446616823 |
| 83.55 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
71.27 |
0.22 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.1399943937 |
| 83.59 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
71.49 |
0.22 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.465545715 |
| 83.62 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
71.71 |
0.22 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.275158628 |
| 83.66 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
71.93 |
0.22 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.2247361463 |
| 83.70 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
72.15 |
0.22 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.2259875728 |
| 83.73 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
72.37 |
0.22 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.86611686 |
| 83.77 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
72.59 |
0.22 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.3337079313 |
| 83.81 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
72.81 |
0.22 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.942356740 |
| 83.84 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
73.03 |
0.22 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.1444842124 |
| 83.88 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
73.25 |
0.22 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.1040834580 |
| 83.91 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
73.46 |
0.22 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.764411260 |
| 83.95 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
73.68 |
0.22 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.351062921 |
| 83.99 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
73.90 |
0.22 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.1025242838 |
| 84.02 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
74.12 |
0.22 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.374429788 |
| 84.06 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
74.34 |
0.22 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.3135032895 |
| 84.10 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
74.56 |
0.22 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3757562259 |
| 84.13 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
74.78 |
0.22 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.1275248996 |
| 84.17 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
75.00 |
0.22 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.438258772 |
| 84.21 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
75.22 |
0.22 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.656468008 |
| 84.24 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
75.44 |
0.22 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.668703656 |
| 84.28 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
75.66 |
0.22 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.3603224551 |
| 84.32 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
75.88 |
0.22 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.2561219051 |
| 84.35 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
76.10 |
0.22 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.3852206414 |
| 84.39 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
76.32 |
0.22 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.282920556 |
| 84.43 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
76.54 |
0.22 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.1980164194 |
| 84.46 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
76.75 |
0.22 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.4067628462 |
| 84.50 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
76.97 |
0.22 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.1713285508 |
| 84.54 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
77.19 |
0.22 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.1577037914 |
| 84.57 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
77.41 |
0.22 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.921328139 |
| 84.61 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
77.63 |
0.22 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.1392578089 |
| 84.65 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
77.85 |
0.22 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.3043274546 |
| 84.68 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
78.07 |
0.22 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.3321332410 |
| 84.72 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
78.29 |
0.22 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.4200421267 |
| 84.76 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
78.51 |
0.22 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.3710273094 |
| 84.79 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
78.73 |
0.22 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.607586136 |
| 84.83 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
78.95 |
0.22 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.522223037 |
| 84.86 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
79.17 |
0.22 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.275945336 |
| 84.90 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
79.39 |
0.22 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.408599795 |
| 84.94 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
79.61 |
0.22 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2688342500 |
| 84.97 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
79.82 |
0.22 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.2439237954 |
| 85.01 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
80.04 |
0.22 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.210745066 |
| 85.05 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
80.26 |
0.22 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.2416967092 |
| 85.08 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
80.48 |
0.22 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.154732511 |
| 85.12 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
80.70 |
0.22 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.1005188107 |
| 85.16 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
80.92 |
0.22 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.93024533 |
| 85.19 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
81.14 |
0.22 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.1100766046 |
| 85.23 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
81.36 |
0.22 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.3136132461 |
| 85.27 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
81.58 |
0.22 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.2435684462 |
| 85.30 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
81.80 |
0.22 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.3310821208 |
| 85.34 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
82.02 |
0.22 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.2505487777 |
| 85.38 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
82.24 |
0.22 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.1499730586 |
| 85.41 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
82.46 |
0.22 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.539664195 |
| 85.45 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
82.68 |
0.22 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.3962167909 |
| 85.49 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
82.89 |
0.22 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.3639255779 |
| 85.52 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
83.11 |
0.22 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.2770561711 |
| 85.56 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
83.33 |
0.22 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.1302260157 |
| 85.60 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
83.55 |
0.22 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.874007585 |
| 85.63 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
83.77 |
0.22 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.2322263125 |
| 85.67 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
83.99 |
0.22 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.3145381133 |
| 85.71 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
84.21 |
0.22 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.4273733908 |
| 85.74 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
84.43 |
0.22 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.2123242072 |
| 85.78 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
84.65 |
0.22 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.874146576 |
| 85.82 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.77 |
0.00 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
84.87 |
0.22 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.3640708934 |
| 85.85 |
0.04 |
89.88 |
0.00 |
79.17 |
0.00 |
87.98 |
0.22 |
|
|
91.74 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.148216418 |
| 85.89 |
0.03 |
89.91 |
0.03 |
79.20 |
0.04 |
88.10 |
0.12 |
|
|
91.76 |
0.02 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.1480340270 |
| 85.91 |
0.03 |
89.91 |
0.00 |
79.38 |
0.17 |
88.10 |
0.00 |
|
|
91.76 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.3269295836 |
| 85.94 |
0.03 |
89.91 |
0.00 |
79.38 |
0.00 |
88.27 |
0.17 |
|
|
91.76 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.4179447607 |
| 85.97 |
0.03 |
89.98 |
0.06 |
79.40 |
0.03 |
88.28 |
0.01 |
|
|
91.80 |
0.05 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.1589471591 |
| 85.99 |
0.03 |
89.98 |
0.00 |
79.40 |
0.00 |
88.44 |
0.15 |
|
|
91.80 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.3724068554 |
| 86.02 |
0.03 |
90.05 |
0.07 |
79.40 |
0.00 |
88.51 |
0.07 |
|
|
91.81 |
0.01 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_tap_straps_rma.889624872 |
| 86.04 |
0.02 |
90.09 |
0.04 |
79.42 |
0.02 |
88.59 |
0.08 |
|
|
91.82 |
0.01 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.3325197656 |
| 86.07 |
0.02 |
90.09 |
0.00 |
79.53 |
0.11 |
88.61 |
0.02 |
|
|
91.82 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.1381702973 |
| 86.08 |
0.02 |
90.09 |
0.01 |
79.63 |
0.10 |
88.61 |
0.00 |
|
|
91.83 |
0.01 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2831289365 |
| 86.10 |
0.02 |
90.10 |
0.01 |
79.67 |
0.04 |
88.67 |
0.05 |
|
|
91.83 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3682888081 |
| 86.12 |
0.02 |
90.10 |
0.00 |
79.67 |
0.00 |
88.77 |
0.10 |
|
|
91.83 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.1732044071 |
| 86.13 |
0.02 |
90.17 |
0.07 |
79.68 |
0.01 |
88.78 |
0.02 |
|
|
91.83 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.4192956201 |
| 86.15 |
0.02 |
90.17 |
0.00 |
79.68 |
0.00 |
88.88 |
0.10 |
|
|
91.83 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.3285324357 |
| 86.16 |
0.02 |
90.17 |
0.00 |
79.77 |
0.10 |
88.88 |
0.00 |
|
|
91.83 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.2781443933 |
| 86.18 |
0.01 |
90.17 |
0.00 |
79.77 |
0.00 |
88.97 |
0.09 |
|
|
91.83 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_init.2136490791 |
| 86.19 |
0.01 |
90.17 |
0.00 |
79.77 |
0.00 |
89.05 |
0.08 |
|
|
91.83 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.3284709763 |
| 86.20 |
0.01 |
90.17 |
0.00 |
79.85 |
0.07 |
89.05 |
0.00 |
|
|
91.83 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.4250605534 |
| 86.22 |
0.01 |
90.17 |
0.00 |
79.87 |
0.02 |
89.10 |
0.05 |
|
|
91.83 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_gpio.1322546172 |
| 86.23 |
0.01 |
90.17 |
0.01 |
79.90 |
0.03 |
89.13 |
0.03 |
|
|
91.83 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.3740294612 |
| 86.24 |
0.01 |
90.19 |
0.02 |
79.91 |
0.01 |
89.13 |
0.01 |
|
|
91.84 |
0.02 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.2218522617 |
| 86.24 |
0.01 |
90.19 |
0.00 |
79.91 |
0.00 |
89.19 |
0.05 |
|
|
91.84 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_jtag_csr_rw.2999338214 |
| 86.25 |
0.01 |
90.20 |
0.01 |
79.93 |
0.02 |
89.20 |
0.01 |
|
|
91.85 |
0.01 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.2617831608 |
| 86.26 |
0.01 |
90.20 |
0.00 |
79.97 |
0.05 |
89.20 |
0.00 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.614472215 |
| 86.27 |
0.01 |
90.20 |
0.00 |
79.97 |
0.00 |
89.24 |
0.04 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.88209362 |
| 86.27 |
0.01 |
90.20 |
0.00 |
79.97 |
0.00 |
89.28 |
0.04 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.3439549891 |
| 86.28 |
0.01 |
90.20 |
0.00 |
79.97 |
0.00 |
89.32 |
0.04 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.2283202177 |
| 86.29 |
0.01 |
90.23 |
0.03 |
79.98 |
0.01 |
89.32 |
0.00 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.3089267814 |
| 86.29 |
0.01 |
90.24 |
0.01 |
80.00 |
0.02 |
89.33 |
0.01 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.2517724074 |
| 86.30 |
0.01 |
90.24 |
0.00 |
80.00 |
0.00 |
89.37 |
0.04 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.4062270586 |
| 86.30 |
0.01 |
90.24 |
0.00 |
80.02 |
0.02 |
89.38 |
0.01 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.435872257 |
| 86.31 |
0.01 |
90.24 |
0.00 |
80.05 |
0.03 |
89.38 |
0.00 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2595058910 |
| 86.31 |
0.01 |
90.24 |
0.00 |
80.05 |
0.00 |
89.41 |
0.03 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.770028442 |
| 86.32 |
0.01 |
90.24 |
0.00 |
80.05 |
0.00 |
89.43 |
0.02 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.1136865866 |
| 86.32 |
0.01 |
90.24 |
0.00 |
80.05 |
0.00 |
89.45 |
0.02 |
|
|
91.85 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.2500699634 |
| 86.33 |
0.01 |
90.24 |
0.00 |
80.06 |
0.01 |
89.45 |
0.00 |
|
|
91.86 |
0.01 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.3697859476 |
| 86.33 |
0.01 |
90.24 |
0.00 |
80.06 |
0.00 |
89.47 |
0.02 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.2488807207 |
| 86.33 |
0.01 |
90.24 |
0.00 |
80.08 |
0.02 |
89.47 |
0.00 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.569099486 |
| 86.33 |
0.01 |
90.24 |
0.00 |
80.08 |
0.00 |
89.49 |
0.02 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.1912711960 |
| 86.34 |
0.01 |
90.24 |
0.00 |
80.09 |
0.01 |
89.49 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.334751250 |
| 86.34 |
0.01 |
90.25 |
0.01 |
80.10 |
0.01 |
89.50 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.578457108 |
| 86.34 |
0.01 |
90.25 |
0.00 |
80.11 |
0.01 |
89.50 |
0.00 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.2108748396 |
| 86.34 |
0.01 |
90.25 |
0.00 |
80.11 |
0.00 |
89.51 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_jtag_mem_access.930641290 |
| 86.35 |
0.01 |
90.25 |
0.00 |
80.11 |
0.00 |
89.52 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.2391348797 |
| 86.35 |
0.01 |
90.25 |
0.00 |
80.11 |
0.00 |
89.54 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.2672904268 |
| 86.35 |
0.01 |
90.26 |
0.01 |
80.11 |
0.00 |
89.54 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.3797042511 |
| 86.35 |
0.01 |
90.26 |
0.01 |
80.11 |
0.00 |
89.54 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.2922746190 |
| 86.35 |
0.01 |
90.26 |
0.00 |
80.12 |
0.01 |
89.54 |
0.00 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.2357096179 |
| 86.36 |
0.01 |
90.26 |
0.00 |
80.13 |
0.01 |
89.54 |
0.00 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.279371508 |
| 86.36 |
0.01 |
90.26 |
0.00 |
80.13 |
0.00 |
89.55 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.2820400535 |
| 86.36 |
0.01 |
90.26 |
0.00 |
80.13 |
0.00 |
89.56 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.1412063579 |
| 86.36 |
0.01 |
90.26 |
0.00 |
80.13 |
0.00 |
89.57 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.1434337017 |
| 86.36 |
0.01 |
90.26 |
0.00 |
80.13 |
0.00 |
89.58 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.308371860 |
| 86.36 |
0.01 |
90.26 |
0.00 |
80.13 |
0.00 |
89.59 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.3517587500 |
| 86.37 |
0.01 |
90.26 |
0.00 |
80.13 |
0.00 |
89.60 |
0.01 |
|
|
91.86 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1611831928 |
| 86.37 |
0.01 |
90.26 |
0.00 |
80.13 |
0.00 |
89.60 |
0.00 |
|
|
91.87 |
0.01 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_tap_straps_dev.2779916233 |
| 86.37 |
0.01 |
90.26 |
0.00 |
80.14 |
0.01 |
89.60 |
0.00 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.1249429530 |
| 86.37 |
0.01 |
90.26 |
0.00 |
80.15 |
0.01 |
89.60 |
0.00 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.2277513479 |
| 86.37 |
0.01 |
90.26 |
0.00 |
80.15 |
0.01 |
89.60 |
0.00 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_gpio.982579630 |
| 86.37 |
0.01 |
90.26 |
0.00 |
80.15 |
0.00 |
89.61 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2163732744 |
| 86.37 |
0.01 |
90.26 |
0.00 |
80.15 |
0.00 |
89.61 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3877858713 |
| 86.37 |
0.01 |
90.26 |
0.00 |
80.15 |
0.00 |
89.62 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.1389750369 |
| 86.37 |
0.01 |
90.27 |
0.01 |
80.15 |
0.00 |
89.62 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.3750398650 |
| 86.38 |
0.01 |
90.27 |
0.00 |
80.15 |
0.00 |
89.63 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_hmac_enc.1798298477 |
| 86.38 |
0.01 |
90.27 |
0.00 |
80.15 |
0.00 |
89.63 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.4028559502 |
| 86.38 |
0.01 |
90.27 |
0.00 |
80.16 |
0.01 |
89.63 |
0.00 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.3254874658 |
| 86.38 |
0.01 |
90.27 |
0.00 |
80.16 |
0.00 |
89.64 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.3200370105 |
| 86.38 |
0.01 |
90.27 |
0.00 |
80.16 |
0.00 |
89.64 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.3601119448 |
| 86.38 |
0.01 |
90.27 |
0.00 |
80.16 |
0.00 |
89.64 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.230640460 |
| 86.38 |
0.01 |
90.27 |
0.00 |
80.16 |
0.00 |
89.64 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.1694989312 |
| 86.38 |
0.01 |
90.27 |
0.00 |
80.16 |
0.00 |
89.65 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.2679191881 |
| 86.38 |
0.01 |
90.27 |
0.00 |
80.16 |
0.00 |
89.65 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.173826221 |
| 86.38 |
0.01 |
90.27 |
0.00 |
80.16 |
0.00 |
89.65 |
0.01 |
|
|
91.87 |
0.00 |
81.47 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.3777330511 |
| Name |
| /workspace/coverage/default/0.chip_plic_all_irqs_10.1998471681 |
| /workspace/coverage/default/0.chip_sival_flash_info_access.1482050520 |
| /workspace/coverage/default/0.chip_sw_aes_enc.130223505 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.2745034558 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.1741269789 |
| /workspace/coverage/default/0.chip_sw_aes_entropy.1612281308 |
| /workspace/coverage/default/0.chip_sw_aes_idle.43449602 |
| /workspace/coverage/default/0.chip_sw_aes_masking_off.2150781215 |
| /workspace/coverage/default/0.chip_sw_aes_smoketest.3890747280 |
| /workspace/coverage/default/0.chip_sw_alert_handler_entropy.2407509407 |
| /workspace/coverage/default/0.chip_sw_alert_handler_escalation.3629157905 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.2590527515 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.3840889521 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.1751109003 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.1701220491 |
| /workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.608926804 |
| /workspace/coverage/default/0.chip_sw_alert_test.2746579405 |
| /workspace/coverage/default/0.chip_sw_aon_timer_irq.1547674749 |
| /workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.4105720064 |
| /workspace/coverage/default/0.chip_sw_aon_timer_smoketest.1320488970 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.1136093163 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.350294449 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2226069461 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1169725643 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.514755227 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.4202468659 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2929132581 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.596408359 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter.1592595629 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.3982540547 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.3347086007 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.1309412041 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.3516273665 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.2115743495 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.271440692 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_peri.1766503973 |
| /workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.1442473845 |
| /workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.2215505696 |
| /workspace/coverage/default/0.chip_sw_clkmgr_smoketest.369223350 |
| /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.2591888830 |
| /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.1238179830 |
| /workspace/coverage/default/0.chip_sw_csrng_kat_test.100592262 |
| /workspace/coverage/default/0.chip_sw_csrng_smoketest.1209988792 |
| /workspace/coverage/default/0.chip_sw_data_integrity_escalation.878936375 |
| /workspace/coverage/default/0.chip_sw_edn_auto_mode.1694354855 |
| /workspace/coverage/default/0.chip_sw_edn_entropy_reqs.1294972288 |
| /workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.84904707 |
| /workspace/coverage/default/0.chip_sw_edn_kat.2236064585 |
| /workspace/coverage/default/0.chip_sw_edn_sw_mode.702277390 |
| /workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.4146318640 |
| /workspace/coverage/default/0.chip_sw_entropy_src_kat_test.3464479634 |
| /workspace/coverage/default/0.chip_sw_entropy_src_smoketest.4202826978 |
| /workspace/coverage/default/0.chip_sw_example_concurrency.536798635 |
| /workspace/coverage/default/0.chip_sw_example_flash.2407637171 |
| /workspace/coverage/default/0.chip_sw_example_manufacturer.145730520 |
| /workspace/coverage/default/0.chip_sw_example_rom.366141824 |
| /workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.2637597869 |
| /workspace/coverage/default/0.chip_sw_flash_crash_alert.2569010161 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access.1259741455 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.3639672584 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1658046502 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.1383283383 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2433374947 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.1591713792 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.1260141693 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_ops.133318887 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.2594448227 |
| /workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.2923990669 |
| /workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.3723002167 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_idle.3001775695 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.222259600 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.740987718 |
| /workspace/coverage/default/0.chip_sw_hmac_multistream.1868036948 |
| /workspace/coverage/default/0.chip_sw_hmac_oneshot.901209400 |
| /workspace/coverage/default/0.chip_sw_hmac_smoketest.4174595218 |
| /workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.2319703256 |
| /workspace/coverage/default/0.chip_sw_inject_scramble_seed.144099286 |
| /workspace/coverage/default/0.chip_sw_keymgr_key_derivation.2135233509 |
| /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.1110515365 |
| /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.3944099102 |
| /workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.2948707166 |
| /workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.537995270 |
| /workspace/coverage/default/0.chip_sw_kmac_idle.2397690338 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_cshake.2495904582 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_kmac.4012338 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.130676288 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3894848491 |
| /workspace/coverage/default/0.chip_sw_kmac_smoketest.1347620586 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.2058399235 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.2776429282 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.902278760 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.4213339885 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_transition.4086954878 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.371404529 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.4201059109 |
| /workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.844600040 |
| /workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.3444547570 |
| /workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.1857330271 |
| /workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.4123279117 |
| /workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.77522811 |
| /workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.3000304512 |
| /workspace/coverage/default/0.chip_sw_otbn_randomness.72871739 |
| /workspace/coverage/default/0.chip_sw_otbn_smoketest.2022064065 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.2242715979 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.3100605275 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.46979905 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.3843243256 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.1188758792 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.2824068466 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1320977336 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.3719404024 |
| /workspace/coverage/default/0.chip_sw_plic_sw_irq.2658768468 |
| /workspace/coverage/default/0.chip_sw_power_idle_load.3987759037 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.2131560467 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.676843232 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.347916327 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.2896903398 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.1670572285 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1441802437 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.635834438 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.957868900 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.997391457 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.894592995 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1380752202 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.359553950 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.3291215686 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.3638274551 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.1977353191 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.1416683795 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.1984217682 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.4026477026 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.151528682 |
| /workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.578518803 |
| /workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.2346803140 |
| /workspace/coverage/default/0.chip_sw_rstmgr_smoketest.4264590012 |
| /workspace/coverage/default/0.chip_sw_rstmgr_sw_req.1539882378 |
| /workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.1943380925 |
| /workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.722537296 |
| /workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.3963992297 |
| /workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.1799211188 |
| /workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.2620623947 |
| /workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.256397909 |
| /workspace/coverage/default/0.chip_sw_rv_plic_smoketest.1973682062 |
| /workspace/coverage/default/0.chip_sw_rv_timer_irq.3862873616 |
| /workspace/coverage/default/0.chip_sw_rv_timer_smoketest.2745925119 |
| /workspace/coverage/default/0.chip_sw_sensor_ctrl_status.1644363250 |
| /workspace/coverage/default/0.chip_sw_sleep_pin_retention.1025182018 |
| /workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.951638349 |
| /workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.3581491744 |
| /workspace/coverage/default/0.chip_sw_spi_device_pass_through.1161741269 |
| /workspace/coverage/default/0.chip_sw_spi_host_tx_rx.3788364107 |
| /workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.3699270660 |
| /workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3441817687 |
| /workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.230235671 |
| /workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.94086801 |
| /workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.2898815206 |
| /workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.2651003808 |
| /workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.813646409 |
| /workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1128452429 |
| /workspace/coverage/default/0.chip_sw_uart_rand_baudrate.2184671187 |
| /workspace/coverage/default/0.chip_sw_uart_smoketest.1400273256 |
| /workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.219936160 |
| /workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1334279676 |
| /workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.3704257977 |
| /workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.4111460798 |
| /workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.194644515 |
| /workspace/coverage/default/0.chip_sw_usbdev_config_host.1720924244 |
| /workspace/coverage/default/0.chip_sw_usbdev_dpi.1410448802 |
| /workspace/coverage/default/0.chip_sw_usbdev_pullup.2807088866 |
| /workspace/coverage/default/0.chip_sw_usbdev_stream.671627075 |
| /workspace/coverage/default/0.chip_sw_usbdev_vbus.3958228786 |
| /workspace/coverage/default/0.chip_tap_straps_prod.2265334238 |
| /workspace/coverage/default/0.chip_tap_straps_rma.1492843045 |
| /workspace/coverage/default/0.chip_tap_straps_testunlock0.2373297314 |
| /workspace/coverage/default/0.rom_e2e_asm_init_dev.3232515251 |
| /workspace/coverage/default/0.rom_e2e_asm_init_prod.3066165280 |
| /workspace/coverage/default/0.rom_e2e_asm_init_prod_end.3982996637 |
| /workspace/coverage/default/0.rom_e2e_asm_init_rma.3221438864 |
| /workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2760890069 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.1895258702 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.3256393232 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.1005356202 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.466365670 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.1486754860 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.867702656 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.2468513726 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.792146513 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.750714156 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.1958631522 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.2041878959 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.3444067288 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.3656906687 |
| /workspace/coverage/default/0.rom_e2e_jtag_inject_rma.204412778 |
| /workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.553985383 |
| /workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.829376540 |
| /workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.235900855 |
| /workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.156928636 |
| /workspace/coverage/default/0.rom_e2e_smoke.346197754 |
| /workspace/coverage/default/0.rom_e2e_static_critical.4119033125 |
| /workspace/coverage/default/0.rom_keymgr_functest.903302199 |
| /workspace/coverage/default/0.rom_volatile_raw_unlock.3029281421 |
| /workspace/coverage/default/1.chip_jtag_mem_access.3978406 |
| /workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.2536254650 |
| /workspace/coverage/default/1.chip_sival_flash_info_access.948505536 |
| /workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1486134160 |
| /workspace/coverage/default/1.chip_sw_aes_enc.4087216177 |
| /workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.661661389 |
| /workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.402705781 |
| /workspace/coverage/default/1.chip_sw_aes_entropy.2639474877 |
| /workspace/coverage/default/1.chip_sw_aes_idle.2986228283 |
| /workspace/coverage/default/1.chip_sw_aes_masking_off.939727299 |
| /workspace/coverage/default/1.chip_sw_aes_smoketest.3212271478 |
| /workspace/coverage/default/1.chip_sw_alert_handler_entropy.2846432548 |
| /workspace/coverage/default/1.chip_sw_alert_handler_escalation.379421762 |
| /workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.3466844074 |
| /workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.2977703464 |
| /workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.2344941732 |
| /workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.3898932661 |
| /workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.552317091 |
| /workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3328236820 |
| /workspace/coverage/default/1.chip_sw_alert_test.2074376137 |
| /workspace/coverage/default/1.chip_sw_aon_timer_irq.399745279 |
| /workspace/coverage/default/1.chip_sw_aon_timer_smoketest.2523401610 |
| /workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1123340451 |
| /workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.647297184 |
| /workspace/coverage/default/1.chip_sw_ast_clk_outputs.686642945 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.1536758826 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.788019466 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2391937733 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3398583936 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3043685587 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1050898396 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2641975912 |
| /workspace/coverage/default/1.chip_sw_clkmgr_jitter.22809148 |
| /workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.3011804500 |
| /workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.2661511421 |
| /workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.1104297830 |
| /workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.3927344789 |
| /workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.1801409596 |
| /workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.1084140181 |
| /workspace/coverage/default/1.chip_sw_clkmgr_off_peri.747861014 |
| /workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.332125423 |
| /workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.3057584227 |
| /workspace/coverage/default/1.chip_sw_clkmgr_smoketest.705997745 |
| /workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.3100989354 |
| /workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.366377080 |
| /workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.1232296397 |
| /workspace/coverage/default/1.chip_sw_csrng_kat_test.2436856953 |
| /workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.2326943036 |
| /workspace/coverage/default/1.chip_sw_csrng_smoketest.2343738387 |
| /workspace/coverage/default/1.chip_sw_data_integrity_escalation.4100787018 |
| /workspace/coverage/default/1.chip_sw_edn_auto_mode.2980634788 |
| /workspace/coverage/default/1.chip_sw_edn_boot_mode.237448470 |
| /workspace/coverage/default/1.chip_sw_edn_entropy_reqs.1117656404 |
| /workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.3890921768 |
| /workspace/coverage/default/1.chip_sw_edn_kat.2287893306 |
| /workspace/coverage/default/1.chip_sw_edn_sw_mode.2411066062 |
| /workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.2943175343 |
| /workspace/coverage/default/1.chip_sw_entropy_src_csrng.3136094265 |
| /workspace/coverage/default/1.chip_sw_entropy_src_kat_test.1285544012 |
| /workspace/coverage/default/1.chip_sw_entropy_src_smoketest.2533360606 |
| /workspace/coverage/default/1.chip_sw_example_concurrency.3473922993 |
| /workspace/coverage/default/1.chip_sw_example_flash.3563442054 |
| /workspace/coverage/default/1.chip_sw_example_manufacturer.3303908369 |
| /workspace/coverage/default/1.chip_sw_example_rom.2109326729 |
| /workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.45442845 |
| /workspace/coverage/default/1.chip_sw_flash_crash_alert.1161606462 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_access.841433194 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.990610663 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3004614134 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.1743968759 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.858719680 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.1314790875 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_ops.2627641365 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.2830295914 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3446011706 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.4089342627 |
| /workspace/coverage/default/1.chip_sw_flash_init.2392716025 |
| /workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.950446115 |
| /workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.910495162 |
| /workspace/coverage/default/1.chip_sw_gpio_smoketest.3682667541 |
| /workspace/coverage/default/1.chip_sw_hmac_enc.3020552208 |
| /workspace/coverage/default/1.chip_sw_hmac_enc_idle.3948576475 |
| /workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.672785353 |
| /workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.2411008682 |
| /workspace/coverage/default/1.chip_sw_hmac_multistream.112548441 |
| /workspace/coverage/default/1.chip_sw_hmac_oneshot.941478730 |
| /workspace/coverage/default/1.chip_sw_hmac_smoketest.1267893489 |
| /workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.3172527011 |
| /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.3403561514 |
| /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.1264171356 |
| /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.2378338572 |
| /workspace/coverage/default/1.chip_sw_inject_scramble_seed.547656827 |
| /workspace/coverage/default/1.chip_sw_keymgr_key_derivation.2549334587 |
| /workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.2490711784 |
| /workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2083843112 |
| /workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.3255740053 |
| /workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.2651557201 |
| /workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.1909011751 |
| /workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1553342388 |
| /workspace/coverage/default/1.chip_sw_kmac_app_rom.1660289615 |
| /workspace/coverage/default/1.chip_sw_kmac_entropy.2323310135 |
| /workspace/coverage/default/1.chip_sw_kmac_idle.932421323 |
| /workspace/coverage/default/1.chip_sw_kmac_mode_cshake.471768322 |
| /workspace/coverage/default/1.chip_sw_kmac_mode_kmac.2808652885 |
| /workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.4151204827 |
| /workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.527806691 |
| /workspace/coverage/default/1.chip_sw_kmac_smoketest.3967038476 |
| /workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.3079929489 |
| /workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.1583065732 |
| /workspace/coverage/default/1.chip_sw_lc_ctrl_transition.2134947895 |
| /workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.3387174251 |
| /workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3767006388 |
| /workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.565950246 |
| /workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.3661831838 |
| /workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.1912987597 |
| /workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.2048475493 |
| /workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.2903639673 |
| /workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.883403156 |
| /workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2247493148 |
| /workspace/coverage/default/1.chip_sw_otbn_mem_scramble.1823369984 |
| /workspace/coverage/default/1.chip_sw_otbn_randomness.1777585617 |
| /workspace/coverage/default/1.chip_sw_otbn_smoketest.2629625411 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.3676797997 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.2817468353 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.61216497 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.869352020 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.679797244 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.2461237953 |
| /workspace/coverage/default/1.chip_sw_pattgen_ios.3036190593 |
| /workspace/coverage/default/1.chip_sw_plic_sw_irq.2680900969 |
| /workspace/coverage/default/1.chip_sw_power_idle_load.1473842995 |
| /workspace/coverage/default/1.chip_sw_power_sleep_load.2057769932 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.2362066629 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.1708984449 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3423336143 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.594440831 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.1268751874 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3528464574 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.641893387 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.297096054 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2643356518 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.2991125516 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.346480518 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.3616803582 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.481775078 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.1879681214 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.835361609 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.378628694 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.614018859 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.3292650031 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.2945045935 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.1991570964 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.313870017 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.1053526630 |
| /workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.2880806825 |
| /workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.2096372282 |
| /workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.426329545 |
| /workspace/coverage/default/1.chip_sw_rstmgr_smoketest.4235341040 |
| /workspace/coverage/default/1.chip_sw_rstmgr_sw_req.1198115516 |
| /workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.3174877627 |
| /workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.2715242507 |
| /workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.3931584569 |
| /workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.3095808684 |
| /workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.2037480468 |
| /workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.4048997933 |
| /workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3981255918 |
| /workspace/coverage/default/1.chip_sw_rv_plic_smoketest.232594955 |
| /workspace/coverage/default/1.chip_sw_rv_timer_irq.1542591864 |
| /workspace/coverage/default/1.chip_sw_rv_timer_smoketest.886025796 |
| /workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.2480307023 |
| /workspace/coverage/default/1.chip_sw_sensor_ctrl_status.219815804 |
| /workspace/coverage/default/1.chip_sw_sleep_pin_wake.3240839939 |
| /workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.3082700941 |
| /workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.3685423860 |
| /workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.94954524 |
| /workspace/coverage/default/1.chip_sw_spi_device_pass_through.4245569445 |
| /workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.2329929109 |
| /workspace/coverage/default/1.chip_sw_spi_device_tpm.2538061375 |
| /workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.3973220454 |
| /workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.1066438931 |
| /workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.3645854217 |
| /workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.3229240042 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.3814765624 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.3939212097 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.1894208616 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.1021187659 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.2644445216 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3929829328 |
| /workspace/coverage/default/1.chip_sw_uart_rand_baudrate.3125706073 |
| /workspace/coverage/default/1.chip_sw_uart_smoketest.1207784724 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx.1483004235 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.3831925146 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.283366968 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.2328364874 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.3931679260 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.3400176459 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.929816016 |
| /workspace/coverage/default/1.chip_tap_straps_dev.3021247356 |
| /workspace/coverage/default/1.chip_tap_straps_prod.3304357720 |
| /workspace/coverage/default/1.chip_tap_straps_testunlock0.486288532 |
| /workspace/coverage/default/1.rom_e2e_asm_init_dev.1117429824 |
| /workspace/coverage/default/1.rom_e2e_asm_init_prod.1032043041 |
| /workspace/coverage/default/1.rom_e2e_asm_init_prod_end.1863975132 |
| /workspace/coverage/default/1.rom_e2e_asm_init_rma.3871969497 |
| /workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.5036046 |
| /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.2064945055 |
| /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.2675338274 |
| /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.340660178 |
| /workspace/coverage/default/1.rom_e2e_smoke.1804277306 |
| /workspace/coverage/default/1.rom_e2e_static_critical.4036632210 |
| /workspace/coverage/default/1.rom_keymgr_functest.2220073165 |
| /workspace/coverage/default/1.rom_volatile_raw_unlock.3611767359 |
| /workspace/coverage/default/10.chip_sw_lc_ctrl_transition.689729322 |
| /workspace/coverage/default/10.chip_sw_uart_rand_baudrate.973964940 |
| /workspace/coverage/default/11.chip_sw_uart_rand_baudrate.1419880074 |
| /workspace/coverage/default/12.chip_sw_lc_ctrl_transition.2759111002 |
| /workspace/coverage/default/12.chip_sw_uart_rand_baudrate.1723295790 |
| /workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.3247619309 |
| /workspace/coverage/default/13.chip_sw_all_escalation_resets.1614259893 |
| /workspace/coverage/default/13.chip_sw_lc_ctrl_transition.2347580529 |
| /workspace/coverage/default/13.chip_sw_uart_rand_baudrate.2359252282 |
| /workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.2511844616 |
| /workspace/coverage/default/14.chip_sw_all_escalation_resets.1463261575 |
| /workspace/coverage/default/14.chip_sw_lc_ctrl_transition.1705758306 |
| /workspace/coverage/default/14.chip_sw_uart_rand_baudrate.1195198795 |
| /workspace/coverage/default/15.chip_sw_uart_rand_baudrate.613668154 |
| /workspace/coverage/default/16.chip_sw_all_escalation_resets.1573680198 |
| /workspace/coverage/default/16.chip_sw_uart_rand_baudrate.2486007278 |
| /workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.2686993329 |
| /workspace/coverage/default/17.chip_sw_uart_rand_baudrate.438458601 |
| /workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.3282175589 |
| /workspace/coverage/default/18.chip_sw_all_escalation_resets.3808302159 |
| /workspace/coverage/default/18.chip_sw_uart_rand_baudrate.447246573 |
| /workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3325463034 |
| /workspace/coverage/default/19.chip_sw_uart_rand_baudrate.3915363481 |
| /workspace/coverage/default/2.chip_jtag_mem_access.1452885092 |
| /workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.373391966 |
| /workspace/coverage/default/2.chip_sival_flash_info_access.4157581746 |
| /workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1605888192 |
| /workspace/coverage/default/2.chip_sw_aes_enc.3102279812 |
| /workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.3072818760 |
| /workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.3167646250 |
| /workspace/coverage/default/2.chip_sw_aes_entropy.237820777 |
| /workspace/coverage/default/2.chip_sw_aes_idle.1208441685 |
| /workspace/coverage/default/2.chip_sw_aes_masking_off.1204520731 |
| /workspace/coverage/default/2.chip_sw_aes_smoketest.757142768 |
| /workspace/coverage/default/2.chip_sw_alert_handler_entropy.1699852004 |
| /workspace/coverage/default/2.chip_sw_alert_handler_escalation.2447502994 |
| /workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.3745407963 |
| /workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.1325852410 |
| /workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.3417794493 |
| /workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.3364699060 |
| /workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.2769762878 |
| /workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.2904764021 |
| /workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2577316074 |
| /workspace/coverage/default/2.chip_sw_all_escalation_resets.1778050143 |
| /workspace/coverage/default/2.chip_sw_aon_timer_irq.1990837129 |
| /workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.359508047 |
| /workspace/coverage/default/2.chip_sw_aon_timer_smoketest.551123339 |
| /workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2247502260 |
| /workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.1810143805 |
| /workspace/coverage/default/2.chip_sw_ast_clk_outputs.3805469308 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.2143412978 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2538325067 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.57051258 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1177705155 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2504911990 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2107722069 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1661797394 |
| /workspace/coverage/default/2.chip_sw_clkmgr_jitter.1023343568 |
| /workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.3271887176 |
| /workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.1039306462 |
| /workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.3883884125 |
| /workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.374191275 |
| /workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.3420402437 |
| /workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.2842667177 |
| /workspace/coverage/default/2.chip_sw_clkmgr_off_peri.3855901824 |
| /workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.935148318 |
| /workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.2458101967 |
| /workspace/coverage/default/2.chip_sw_clkmgr_smoketest.2833136716 |
| /workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.705680084 |
| /workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.3505953317 |
| /workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.1399582106 |
| /workspace/coverage/default/2.chip_sw_csrng_kat_test.1454045317 |
| /workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3583953355 |
| /workspace/coverage/default/2.chip_sw_csrng_smoketest.1895743323 |
| /workspace/coverage/default/2.chip_sw_data_integrity_escalation.283975564 |
| /workspace/coverage/default/2.chip_sw_edn_boot_mode.194552801 |
| /workspace/coverage/default/2.chip_sw_edn_entropy_reqs.3459721526 |
| /workspace/coverage/default/2.chip_sw_edn_kat.815856505 |
| /workspace/coverage/default/2.chip_sw_edn_sw_mode.3991340355 |
| /workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.127469389 |
| /workspace/coverage/default/2.chip_sw_entropy_src_csrng.3589956245 |
| /workspace/coverage/default/2.chip_sw_entropy_src_kat_test.4019088437 |
| /workspace/coverage/default/2.chip_sw_entropy_src_smoketest.1216318294 |
| /workspace/coverage/default/2.chip_sw_example_concurrency.2433538549 |
| /workspace/coverage/default/2.chip_sw_example_flash.3382928895 |
| /workspace/coverage/default/2.chip_sw_example_manufacturer.2555289796 |
| /workspace/coverage/default/2.chip_sw_example_rom.3054013059 |
| /workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.3808725998 |
| /workspace/coverage/default/2.chip_sw_flash_crash_alert.2380247569 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_access.1262353655 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.4256867271 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2005711738 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.4008163177 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.573851379 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.3512131072 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.2965674311 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_ops.148978192 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.3034681267 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.4100457639 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.1281406969 |
| /workspace/coverage/default/2.chip_sw_flash_init.3690549028 |
| /workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.376202305 |
| /workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.4067974439 |
| /workspace/coverage/default/2.chip_sw_gpio.2347703804 |
| /workspace/coverage/default/2.chip_sw_gpio_smoketest.2762580216 |
| /workspace/coverage/default/2.chip_sw_hmac_enc.40875896 |
| /workspace/coverage/default/2.chip_sw_hmac_enc_idle.735790448 |
| /workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.4077339912 |
| /workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.211540589 |
| /workspace/coverage/default/2.chip_sw_hmac_multistream.3937474028 |
| /workspace/coverage/default/2.chip_sw_hmac_oneshot.3070388522 |
| /workspace/coverage/default/2.chip_sw_hmac_smoketest.2430205399 |
| /workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.3728874787 |
| /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.826094405 |
| /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.1784392721 |
| /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.2585527341 |
| /workspace/coverage/default/2.chip_sw_inject_scramble_seed.337941193 |
| /workspace/coverage/default/2.chip_sw_keymgr_key_derivation.2283136082 |
| /workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.799151150 |
| /workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.4179131904 |
| /workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.470280966 |
| /workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.1717113809 |
| /workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.232080868 |
| /workspace/coverage/default/2.chip_sw_kmac_app_rom.1922380497 |
| /workspace/coverage/default/2.chip_sw_kmac_entropy.3891850767 |
| /workspace/coverage/default/2.chip_sw_kmac_idle.3370468867 |
| /workspace/coverage/default/2.chip_sw_kmac_mode_cshake.2923921534 |
| /workspace/coverage/default/2.chip_sw_kmac_mode_kmac.4145999268 |
| /workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.1216399105 |
| /workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1950881284 |
| /workspace/coverage/default/2.chip_sw_kmac_smoketest.3317713160 |
| /workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.3391456272 |
| /workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.1774204468 |
| /workspace/coverage/default/2.chip_sw_lc_ctrl_transition.1756339688 |
| /workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.520107948 |
| /workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3531883506 |
| /workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.3406161047 |
| /workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.3419448987 |
| /workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.856251025 |
| /workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.3768648944 |
| /workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.3649469104 |
| /workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.2804702479 |
| /workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3939116252 |
| /workspace/coverage/default/2.chip_sw_otbn_mem_scramble.58527067 |
| /workspace/coverage/default/2.chip_sw_otbn_randomness.838093803 |
| /workspace/coverage/default/2.chip_sw_otbn_smoketest.1196189580 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.1800209486 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.3485643962 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.3752647737 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.757116934 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1007695291 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.3682136395 |
| /workspace/coverage/default/2.chip_sw_pattgen_ios.2092952494 |
| /workspace/coverage/default/2.chip_sw_plic_sw_irq.2944980044 |
| /workspace/coverage/default/2.chip_sw_power_idle_load.2955158627 |
| /workspace/coverage/default/2.chip_sw_power_sleep_load.1994847689 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.2356553331 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.1516684594 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1264350612 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.2686566449 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.1249466901 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1012534284 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.2111274287 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.283093921 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.676528141 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2061373580 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.2044553235 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1462435395 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.608079342 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.477637249 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1258396885 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.2650766612 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.693504373 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1750785938 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.2605894832 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.2389558400 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.3775362145 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.3625178145 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.3269301461 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.3879422248 |
| /workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.748061295 |
| /workspace/coverage/default/2.chip_sw_rstmgr_alert_info.477953397 |
| /workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.949597806 |
| /workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.2141298780 |
| /workspace/coverage/default/2.chip_sw_rstmgr_smoketest.595818162 |
| /workspace/coverage/default/2.chip_sw_rstmgr_sw_req.2767419258 |
| /workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.3436181127 |
| /workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.3042676272 |
| /workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.1732188509 |
| /workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.3861074073 |
| /workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.3984479158 |
| /workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.2524855595 |
| /workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2326782886 |
| /workspace/coverage/default/2.chip_sw_rv_plic_smoketest.151095483 |
| /workspace/coverage/default/2.chip_sw_rv_timer_irq.1019185728 |
| /workspace/coverage/default/2.chip_sw_rv_timer_smoketest.1648990272 |
| /workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.1004771574 |
| /workspace/coverage/default/2.chip_sw_sensor_ctrl_status.3920596358 |
| /workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.1511947731 |
| /workspace/coverage/default/2.chip_sw_sleep_pin_retention.4255222089 |
| /workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.3957800711 |
| /workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.1980272275 |
| /workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.1763843748 |
| /workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.682369504 |
| /workspace/coverage/default/2.chip_sw_spi_device_tpm.844686171 |
| /workspace/coverage/default/2.chip_sw_spi_host_tx_rx.1954416871 |
| /workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.1456630992 |
| /workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.183952249 |
| /workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.4157231374 |
| /workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2653396728 |
| /workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.2355847250 |
| /workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.756009070 |
| /workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.2271843327 |
| /workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.140034098 |
| /workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.2454050261 |
| /workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.3184050236 |
| /workspace/coverage/default/2.chip_sw_uart_rand_baudrate.4117463510 |
| /workspace/coverage/default/2.chip_sw_uart_smoketest.24796798 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx.97986501 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1823908798 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3476974390 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.2330569517 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.1772248181 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.3946072651 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.1890491768 |
| /workspace/coverage/default/2.chip_tap_straps_dev.3874920471 |
| /workspace/coverage/default/2.chip_tap_straps_prod.3950556903 |
| /workspace/coverage/default/2.chip_tap_straps_rma.1022224026 |
| /workspace/coverage/default/2.rom_e2e_asm_init_dev.2763567717 |
| /workspace/coverage/default/2.rom_e2e_asm_init_prod.886270572 |
| /workspace/coverage/default/2.rom_e2e_asm_init_prod_end.2653819187 |
| /workspace/coverage/default/2.rom_e2e_asm_init_rma.3410118983 |
| /workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.1653905160 |
| /workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.2865184775 |
| /workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.124219685 |
| /workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.3002724968 |
| /workspace/coverage/default/2.rom_e2e_smoke.156194657 |
| /workspace/coverage/default/2.rom_e2e_static_critical.212174193 |
| /workspace/coverage/default/2.rom_keymgr_functest.2541023417 |
| /workspace/coverage/default/2.rom_volatile_raw_unlock.2072708410 |
| /workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.1257013133 |
| /workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.63696476 |
| /workspace/coverage/default/26.chip_sw_all_escalation_resets.3753783923 |
| /workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.1210146454 |
| /workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.2708485861 |
| /workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.4233286183 |
| /workspace/coverage/default/3.chip_sw_all_escalation_resets.1768445401 |
| /workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.2177759081 |
| /workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.2821237966 |
| /workspace/coverage/default/3.chip_sw_lc_ctrl_transition.930502170 |
| /workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.614269320 |
| /workspace/coverage/default/3.chip_sw_uart_rand_baudrate.3383130631 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx.1947741736 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.3304680254 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.3865698308 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.2793673456 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.1748580412 |
| /workspace/coverage/default/3.chip_tap_straps_dev.3463959428 |
| /workspace/coverage/default/3.chip_tap_straps_prod.3995915734 |
| /workspace/coverage/default/3.chip_tap_straps_rma.4286478213 |
| /workspace/coverage/default/3.chip_tap_straps_testunlock0.4231058250 |
| /workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.331817055 |
| /workspace/coverage/default/32.chip_sw_all_escalation_resets.2034178278 |
| /workspace/coverage/default/33.chip_sw_all_escalation_resets.313847276 |
| /workspace/coverage/default/34.chip_sw_all_escalation_resets.173362741 |
| /workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.1157826864 |
| /workspace/coverage/default/37.chip_sw_all_escalation_resets.3949746694 |
| /workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.1447529783 |
| /workspace/coverage/default/39.chip_sw_all_escalation_resets.3470679514 |
| /workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.2154268759 |
| /workspace/coverage/default/4.chip_sw_all_escalation_resets.3887059516 |
| /workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.395428735 |
| /workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.1548672952 |
| /workspace/coverage/default/4.chip_sw_data_integrity_escalation.1386793391 |
| /workspace/coverage/default/4.chip_sw_lc_ctrl_transition.3959732352 |
| /workspace/coverage/default/4.chip_sw_uart_rand_baudrate.3947407381 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx.2616610009 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.18747054 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2400627196 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.568994145 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.2356177037 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.2614866148 |
| /workspace/coverage/default/4.chip_tap_straps_dev.2998826574 |
| /workspace/coverage/default/4.chip_tap_straps_prod.1380556722 |
| /workspace/coverage/default/4.chip_tap_straps_testunlock0.1992493704 |
| /workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.4125956543 |
| /workspace/coverage/default/42.chip_sw_all_escalation_resets.2551461644 |
| /workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3516635289 |
| /workspace/coverage/default/44.chip_sw_all_escalation_resets.2398000886 |
| /workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.1017592653 |
| /workspace/coverage/default/45.chip_sw_all_escalation_resets.676749291 |
| /workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.102913839 |
| /workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.1086733206 |
| /workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.344141089 |
| /workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.2180887437 |
| /workspace/coverage/default/5.chip_sw_data_integrity_escalation.3875519964 |
| /workspace/coverage/default/5.chip_sw_lc_ctrl_transition.860031076 |
| /workspace/coverage/default/5.chip_sw_uart_rand_baudrate.1740785892 |
| /workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.3317234295 |
| /workspace/coverage/default/50.chip_sw_all_escalation_resets.1340746607 |
| /workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.3227557118 |
| /workspace/coverage/default/51.chip_sw_all_escalation_resets.565573707 |
| /workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.3111228108 |
| /workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.513564561 |
| /workspace/coverage/default/53.chip_sw_all_escalation_resets.3750643153 |
| /workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.1009227384 |
| /workspace/coverage/default/54.chip_sw_all_escalation_resets.3956618187 |
| /workspace/coverage/default/55.chip_sw_all_escalation_resets.588911981 |
| /workspace/coverage/default/56.chip_sw_all_escalation_resets.1963414063 |
| /workspace/coverage/default/57.chip_sw_all_escalation_resets.178487295 |
| /workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.3416812934 |
| /workspace/coverage/default/58.chip_sw_all_escalation_resets.3630342660 |
| /workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.977682173 |
| /workspace/coverage/default/59.chip_sw_all_escalation_resets.3110552138 |
| /workspace/coverage/default/6.chip_sw_all_escalation_resets.2275428145 |
| /workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.614619841 |
| /workspace/coverage/default/6.chip_sw_lc_ctrl_transition.1301629474 |
| /workspace/coverage/default/6.chip_sw_uart_rand_baudrate.3446908004 |
| /workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.3632623650 |
| /workspace/coverage/default/60.chip_sw_all_escalation_resets.3192998043 |
| /workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.4219115535 |
| /workspace/coverage/default/61.chip_sw_all_escalation_resets.3921405467 |
| /workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.1545022346 |
| /workspace/coverage/default/62.chip_sw_all_escalation_resets.2916697236 |
| /workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.3797123739 |
| /workspace/coverage/default/63.chip_sw_all_escalation_resets.680945539 |
| /workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.2426765449 |
| /workspace/coverage/default/64.chip_sw_all_escalation_resets.1086287219 |
| /workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.1679121714 |
| /workspace/coverage/default/66.chip_sw_all_escalation_resets.768689636 |
| /workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.4078991964 |
| /workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.3799469479 |
| /workspace/coverage/default/68.chip_sw_all_escalation_resets.3976895938 |
| /workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.431925436 |
| /workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.3409061347 |
| /workspace/coverage/default/7.chip_sw_all_escalation_resets.1675844783 |
| /workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.990261947 |
| /workspace/coverage/default/7.chip_sw_lc_ctrl_transition.911036075 |
| /workspace/coverage/default/7.chip_sw_uart_rand_baudrate.4190403061 |
| /workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.777664785 |
| /workspace/coverage/default/70.chip_sw_all_escalation_resets.694747527 |
| /workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.1261753067 |
| /workspace/coverage/default/71.chip_sw_all_escalation_resets.328225621 |
| /workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.1861370972 |
| /workspace/coverage/default/72.chip_sw_all_escalation_resets.1428468663 |
| /workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.2569198090 |
| /workspace/coverage/default/73.chip_sw_all_escalation_resets.1531569124 |
| /workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.2104600602 |
| /workspace/coverage/default/76.chip_sw_all_escalation_resets.3263455669 |
| /workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.398450478 |
| /workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.661929315 |
| /workspace/coverage/default/78.chip_sw_all_escalation_resets.470253403 |
| /workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.1344409822 |
| /workspace/coverage/default/79.chip_sw_all_escalation_resets.2648850057 |
| /workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.4007864275 |
| /workspace/coverage/default/8.chip_sw_all_escalation_resets.1223644338 |
| /workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.2336193272 |
| /workspace/coverage/default/8.chip_sw_lc_ctrl_transition.3991187102 |
| /workspace/coverage/default/8.chip_sw_uart_rand_baudrate.4125683367 |
| /workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.2736957587 |
| /workspace/coverage/default/80.chip_sw_all_escalation_resets.173539410 |
| /workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.864036184 |
| /workspace/coverage/default/81.chip_sw_all_escalation_resets.1525891009 |
| /workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.3229053347 |
| /workspace/coverage/default/82.chip_sw_all_escalation_resets.2891362559 |
| /workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.4011340482 |
| /workspace/coverage/default/83.chip_sw_all_escalation_resets.615637697 |
| /workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.978995203 |
| /workspace/coverage/default/85.chip_sw_all_escalation_resets.3203298897 |
| /workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.3662872696 |
| /workspace/coverage/default/87.chip_sw_all_escalation_resets.2631852672 |
| /workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.535771132 |
| /workspace/coverage/default/88.chip_sw_all_escalation_resets.3704275921 |
| /workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.4157831527 |
| /workspace/coverage/default/89.chip_sw_all_escalation_resets.3237463442 |
| /workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.1055428961 |
| /workspace/coverage/default/9.chip_sw_all_escalation_resets.3146637981 |
| /workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.1253201423 |
| /workspace/coverage/default/9.chip_sw_lc_ctrl_transition.744102269 |
| /workspace/coverage/default/9.chip_sw_uart_rand_baudrate.336122401 |
| /workspace/coverage/default/90.chip_sw_all_escalation_resets.3180770802 |
| /workspace/coverage/default/91.chip_sw_all_escalation_resets.2253373942 |
| /workspace/coverage/default/92.chip_sw_all_escalation_resets.4171835749 |
| /workspace/coverage/default/93.chip_sw_all_escalation_resets.1523627833 |
| /workspace/coverage/default/94.chip_sw_all_escalation_resets.3697533732 |
| /workspace/coverage/default/96.chip_sw_all_escalation_resets.1886734299 |
| /workspace/coverage/default/97.chip_sw_all_escalation_resets.43138854 |
| /workspace/coverage/default/98.chip_sw_all_escalation_resets.1196362162 |
| /workspace/coverage/default/99.chip_sw_all_escalation_resets.1448388272 |
| /workspace/coverage/pad_ctrl_test_mode/1.chip_padctrl_attributes.2700689253 |
| /workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.4253326349 |
| /workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.232504144 |
| /workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.3345917143 |
| /workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.2091753641 |
| /workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.4238448373 |
| /workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.883242829 |
| /workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.191673094 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T4 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.1583065732 |
|
|
Jun 22 07:16:03 PM PDT 24 |
Jun 22 07:18:12 PM PDT 24 |
4130952411 ps |
| T5 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.1400239529 |
|
|
Jun 22 07:34:55 PM PDT 24 |
Jun 22 07:44:29 PM PDT 24 |
5061104555 ps |
| T6 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.3797042511 |
|
|
Jun 22 07:16:52 PM PDT 24 |
Jun 22 07:33:39 PM PDT 24 |
5400764832 ps |
| T17 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.3289029646 |
|
|
Jun 22 07:46:16 PM PDT 24 |
Jun 22 07:53:58 PM PDT 24 |
4760740158 ps |
| T32 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.4077339912 |
|
|
Jun 22 07:35:37 PM PDT 24 |
Jun 22 07:40:10 PM PDT 24 |
2769647756 ps |
| T18 |
/workspace/coverage/default/1.chip_jtag_csr_rw.962746717 |
|
|
Jun 22 07:16:42 PM PDT 24 |
Jun 22 07:31:24 PM PDT 24 |
9370104445 ps |
| T83 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.222259600 |
|
|
Jun 22 07:12:04 PM PDT 24 |
Jun 22 07:15:32 PM PDT 24 |
2580151421 ps |
| T58 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.3843243256 |
|
|
Jun 22 07:11:46 PM PDT 24 |
Jun 22 07:36:13 PM PDT 24 |
7729683320 ps |
| T73 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1012534284 |
|
|
Jun 22 07:30:03 PM PDT 24 |
Jun 22 07:37:27 PM PDT 24 |
5477977800 ps |
| T75 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.374429788 |
|
|
Jun 22 07:42:34 PM PDT 24 |
Jun 22 07:53:25 PM PDT 24 |
4562678970 ps |
| T144 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.3581491744 |
|
|
Jun 22 07:11:25 PM PDT 24 |
Jun 22 07:22:23 PM PDT 24 |
8792326302 ps |
| T292 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.874146576 |
|
|
Jun 22 07:49:40 PM PDT 24 |
Jun 22 07:56:09 PM PDT 24 |
3729988708 ps |
| T107 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.3547279794 |
|
|
Jun 22 07:38:56 PM PDT 24 |
Jun 22 07:52:44 PM PDT 24 |
6627388140 ps |
| T33 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.1460098948 |
|
|
Jun 22 07:43:15 PM PDT 24 |
Jun 22 07:52:13 PM PDT 24 |
5105540974 ps |
| T128 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.735790448 |
|
|
Jun 22 07:35:25 PM PDT 24 |
Jun 22 07:42:10 PM PDT 24 |
3251440166 ps |
| T129 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.3669528301 |
|
|
Jun 22 07:35:00 PM PDT 24 |
Jun 22 07:53:36 PM PDT 24 |
7597500335 ps |
| T110 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.3517496026 |
|
|
Jun 22 07:44:49 PM PDT 24 |
Jun 22 07:54:59 PM PDT 24 |
6437005400 ps |
| T261 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.2830295914 |
|
|
Jun 22 07:18:05 PM PDT 24 |
Jun 22 07:29:25 PM PDT 24 |
4118264559 ps |
| T106 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.1446616823 |
|
|
Jun 22 07:45:39 PM PDT 24 |
Jun 22 07:55:55 PM PDT 24 |
4776082228 ps |
| T119 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.3098510114 |
|
|
Jun 22 07:24:14 PM PDT 24 |
Jun 22 07:33:05 PM PDT 24 |
3722217876 ps |
| T117 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.1805147246 |
|
|
Jun 22 07:42:54 PM PDT 24 |
Jun 22 07:53:25 PM PDT 24 |
5945075296 ps |
| T134 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.757142768 |
|
|
Jun 22 07:38:30 PM PDT 24 |
Jun 22 07:42:14 PM PDT 24 |
2772213736 ps |
| T188 |
/workspace/coverage/default/0.chip_sw_hmac_enc.1798298477 |
|
|
Jun 22 07:22:21 PM PDT 24 |
Jun 22 07:27:14 PM PDT 24 |
2900306350 ps |
| T226 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.1275248996 |
|
|
Jun 22 07:42:58 PM PDT 24 |
Jun 22 07:56:53 PM PDT 24 |
5438878706 ps |
| T78 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.514755227 |
|
|
Jun 22 07:12:34 PM PDT 24 |
Jun 22 07:23:37 PM PDT 24 |
4549684348 ps |
| T120 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.1943380925 |
|
|
Jun 22 07:12:34 PM PDT 24 |
Jun 22 07:15:55 PM PDT 24 |
2334207944 ps |
| T72 |
/workspace/coverage/default/2.chip_sw_alert_test.3863493111 |
|
|
Jun 22 07:32:16 PM PDT 24 |
Jun 22 07:36:36 PM PDT 24 |
2837295824 ps |
| T37 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.3394681143 |
|
|
Jun 22 07:28:40 PM PDT 24 |
Jun 22 07:40:46 PM PDT 24 |
6821069138 ps |
| T133 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.2817468353 |
|
|
Jun 22 07:15:09 PM PDT 24 |
Jun 22 07:33:38 PM PDT 24 |
7570700724 ps |
| T150 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.1434337017 |
|
|
Jun 22 07:12:05 PM PDT 24 |
Jun 22 07:19:28 PM PDT 24 |
7941068204 ps |
| T269 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.3034681267 |
|
|
Jun 22 07:29:19 PM PDT 24 |
Jun 22 07:38:18 PM PDT 24 |
4586129163 ps |
| T21 |
/workspace/coverage/default/1.chip_tap_straps_rma.889624872 |
|
|
Jun 22 07:23:33 PM PDT 24 |
Jun 22 07:34:28 PM PDT 24 |
6346994922 ps |
| T140 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.1777825978 |
|
|
Jun 22 07:32:19 PM PDT 24 |
Jun 22 08:37:02 PM PDT 24 |
14964204720 ps |
| T74 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.860031076 |
|
|
Jun 22 07:40:11 PM PDT 24 |
Jun 22 07:54:59 PM PDT 24 |
9150244176 ps |
| T364 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.4007864275 |
|
|
Jun 22 07:40:20 PM PDT 24 |
Jun 22 07:46:32 PM PDT 24 |
4304976022 ps |
| T48 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.3814765624 |
|
|
Jun 22 07:17:41 PM PDT 24 |
Jun 22 08:12:42 PM PDT 24 |
20054325626 ps |
| T274 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.1161606462 |
|
|
Jun 22 07:25:55 PM PDT 24 |
Jun 22 07:34:41 PM PDT 24 |
4960975400 ps |
| T40 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.1419880074 |
|
|
Jun 22 07:41:39 PM PDT 24 |
Jun 22 08:13:17 PM PDT 24 |
13055809800 ps |
| T154 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2107722069 |
|
|
Jun 22 07:36:11 PM PDT 24 |
Jun 22 07:46:55 PM PDT 24 |
5257037988 ps |
| T126 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.2123780394 |
|
|
Jun 22 07:23:17 PM PDT 24 |
Jun 22 07:37:50 PM PDT 24 |
4401364056 ps |
| T372 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.2770561711 |
|
|
Jun 22 07:47:28 PM PDT 24 |
Jun 22 07:54:49 PM PDT 24 |
4253419400 ps |
| T145 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.3229240042 |
|
|
Jun 22 07:28:16 PM PDT 24 |
Jun 22 07:32:24 PM PDT 24 |
2661351160 ps |
| T153 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.1977353191 |
|
|
Jun 22 07:16:16 PM PDT 24 |
Jun 22 07:24:37 PM PDT 24 |
6806818834 ps |
| T537 |
/workspace/coverage/default/0.chip_sw_example_flash.2407637171 |
|
|
Jun 22 07:12:07 PM PDT 24 |
Jun 22 07:16:41 PM PDT 24 |
2574779960 ps |
| T232 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.686914957 |
|
|
Jun 22 07:24:58 PM PDT 24 |
Jun 22 07:30:22 PM PDT 24 |
3415142488 ps |
| T69 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.2556419899 |
|
|
Jun 22 07:24:35 PM PDT 24 |
Jun 22 08:34:37 PM PDT 24 |
15629751040 ps |
| T289 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.2277513479 |
|
|
Jun 22 07:11:27 PM PDT 24 |
Jun 22 07:26:10 PM PDT 24 |
5287542630 ps |
| T224 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.3752647737 |
|
|
Jun 22 07:30:31 PM PDT 24 |
Jun 22 07:54:59 PM PDT 24 |
7090472304 ps |
| T317 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.3036190593 |
|
|
Jun 22 07:16:41 PM PDT 24 |
Jun 22 07:20:35 PM PDT 24 |
2777668664 ps |
| T135 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.614619841 |
|
|
Jun 22 07:41:03 PM PDT 24 |
Jun 22 09:09:59 PM PDT 24 |
26752938496 ps |
| T27 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.93024533 |
|
|
Jun 22 07:44:35 PM PDT 24 |
Jun 22 07:55:24 PM PDT 24 |
5837030200 ps |
| T139 |
/workspace/coverage/default/1.chip_sw_aes_entropy.2639474877 |
|
|
Jun 22 07:18:57 PM PDT 24 |
Jun 22 07:22:51 PM PDT 24 |
2585449496 ps |
| T63 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.4192956201 |
|
|
Jun 22 07:33:39 PM PDT 24 |
Jun 22 07:42:41 PM PDT 24 |
6713878396 ps |
| T141 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.88209362 |
|
|
Jun 22 07:36:51 PM PDT 24 |
Jun 22 08:14:48 PM PDT 24 |
18892672918 ps |
| T161 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.366377080 |
|
|
Jun 22 07:26:30 PM PDT 24 |
Jun 22 08:20:57 PM PDT 24 |
20242656076 ps |
| T113 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.2880806825 |
|
|
Jun 22 07:22:02 PM PDT 24 |
Jun 22 07:29:25 PM PDT 24 |
10151414289 ps |
| T211 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.1545022346 |
|
|
Jun 22 07:46:19 PM PDT 24 |
Jun 22 07:52:52 PM PDT 24 |
4031785760 ps |
| T271 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1658046502 |
|
|
Jun 22 07:11:43 PM PDT 24 |
Jun 22 07:30:12 PM PDT 24 |
7454591087 ps |
| T118 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.1523627833 |
|
|
Jun 22 07:48:34 PM PDT 24 |
Jun 22 07:57:16 PM PDT 24 |
5794338772 ps |
| T177 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.2034178278 |
|
|
Jun 22 07:44:15 PM PDT 24 |
Jun 22 07:55:23 PM PDT 24 |
5266664068 ps |
| T353 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.1973682062 |
|
|
Jun 22 07:15:56 PM PDT 24 |
Jun 22 07:20:32 PM PDT 24 |
2781175952 ps |
| T538 |
/workspace/coverage/default/1.chip_sw_example_concurrency.3473922993 |
|
|
Jun 22 07:14:17 PM PDT 24 |
Jun 22 07:18:52 PM PDT 24 |
3268554660 ps |
| T173 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.2793673456 |
|
|
Jun 22 07:40:21 PM PDT 24 |
Jun 22 07:52:55 PM PDT 24 |
4592943880 ps |
| T70 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.3066165280 |
|
|
Jun 22 07:18:34 PM PDT 24 |
Jun 22 08:30:44 PM PDT 24 |
16010305177 ps |
| T176 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.770028442 |
|
|
Jun 22 07:12:09 PM PDT 24 |
Jun 22 07:23:59 PM PDT 24 |
3631492136 ps |
| T394 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.3268282460 |
|
|
Jun 22 07:46:50 PM PDT 24 |
Jun 22 07:53:10 PM PDT 24 |
4107317120 ps |
| T43 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.2617831608 |
|
|
Jun 22 07:11:48 PM PDT 24 |
Jun 22 07:20:05 PM PDT 24 |
3945003236 ps |
| T273 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.1302260157 |
|
|
Jun 22 07:46:36 PM PDT 24 |
Jun 22 07:55:15 PM PDT 24 |
4883818722 ps |
| T231 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.94954524 |
|
|
Jun 22 07:22:54 PM PDT 24 |
Jun 22 07:39:57 PM PDT 24 |
7642306472 ps |
| T71 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.2041878959 |
|
|
Jun 22 07:19:43 PM PDT 24 |
Jun 22 08:38:12 PM PDT 24 |
15887691648 ps |
| T193 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.1784392721 |
|
|
Jun 22 07:30:50 PM PDT 24 |
Jun 22 07:44:21 PM PDT 24 |
4718850282 ps |
| T296 |
/workspace/coverage/default/1.rom_e2e_static_critical.4036632210 |
|
|
Jun 22 07:30:34 PM PDT 24 |
Jun 22 08:49:30 PM PDT 24 |
17553683468 ps |
| T290 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.3775362145 |
|
|
Jun 22 07:30:49 PM PDT 24 |
Jun 22 07:55:51 PM PDT 24 |
7041576946 ps |
| T163 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.2605894832 |
|
|
Jun 22 07:35:46 PM PDT 24 |
Jun 22 07:42:56 PM PDT 24 |
5611286100 ps |
| T218 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.3347582661 |
|
|
Jun 22 07:50:48 PM PDT 24 |
Jun 22 08:00:12 PM PDT 24 |
4327045204 ps |
| T34 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.1619221658 |
|
|
Jun 22 07:12:04 PM PDT 24 |
Jun 22 07:17:18 PM PDT 24 |
3880231814 ps |
| T297 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.2524855595 |
|
|
Jun 22 07:31:16 PM PDT 24 |
Jun 22 07:48:03 PM PDT 24 |
5299650450 ps |
| T26 |
/workspace/coverage/default/1.chip_tap_straps_dev.3021247356 |
|
|
Jun 22 07:24:57 PM PDT 24 |
Jun 22 07:29:47 PM PDT 24 |
3849536032 ps |
| T539 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.2177759081 |
|
|
Jun 22 07:38:58 PM PDT 24 |
Jun 22 07:44:47 PM PDT 24 |
7360533448 ps |
| T219 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1320977336 |
|
|
Jun 22 07:11:56 PM PDT 24 |
Jun 22 07:21:17 PM PDT 24 |
4295392464 ps |
| T239 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.4200421267 |
|
|
Jun 22 07:43:03 PM PDT 24 |
Jun 22 07:50:07 PM PDT 24 |
3735309800 ps |
| T159 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.639699513 |
|
|
Jun 22 07:31:40 PM PDT 24 |
Jun 22 07:50:57 PM PDT 24 |
5174857912 ps |
| T215 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.3029281421 |
|
|
Jun 22 07:16:56 PM PDT 24 |
Jun 22 07:18:56 PM PDT 24 |
2676521458 ps |
| T293 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.552317091 |
|
|
Jun 22 07:20:36 PM PDT 24 |
Jun 22 07:27:54 PM PDT 24 |
3150843848 ps |
| T393 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.2411008682 |
|
|
Jun 22 07:26:09 PM PDT 24 |
Jun 22 07:30:16 PM PDT 24 |
3368474983 ps |
| T66 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.3089267814 |
|
|
Jun 22 07:12:42 PM PDT 24 |
Jun 22 07:19:03 PM PDT 24 |
3699352766 ps |
| T540 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3890747280 |
|
|
Jun 22 07:14:16 PM PDT 24 |
Jun 22 07:19:25 PM PDT 24 |
2841040650 ps |
| T352 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.1207784724 |
|
|
Jun 22 07:26:49 PM PDT 24 |
Jun 22 07:30:43 PM PDT 24 |
3021459280 ps |
| T351 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.3470679514 |
|
|
Jun 22 07:45:12 PM PDT 24 |
Jun 22 07:53:33 PM PDT 24 |
3999507650 ps |
| T280 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.3564858855 |
|
|
Jun 22 07:47:24 PM PDT 24 |
Jun 22 07:53:12 PM PDT 24 |
3572403464 ps |
| T310 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.4174595218 |
|
|
Jun 22 07:12:36 PM PDT 24 |
Jun 22 07:18:10 PM PDT 24 |
2874827756 ps |
| T130 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.3967038476 |
|
|
Jun 22 07:26:41 PM PDT 24 |
Jun 22 07:31:07 PM PDT 24 |
2510304480 ps |
| T124 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.1998471681 |
|
|
Jun 22 07:12:43 PM PDT 24 |
Jun 22 07:22:26 PM PDT 24 |
3992396824 ps |
| T311 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3043685587 |
|
|
Jun 22 07:25:21 PM PDT 24 |
Jun 22 07:35:18 PM PDT 24 |
4147523316 ps |
| T312 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.1039306462 |
|
|
Jun 22 07:34:49 PM PDT 24 |
Jun 22 07:38:28 PM PDT 24 |
2815402580 ps |
| T225 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.911036075 |
|
|
Jun 22 07:40:09 PM PDT 24 |
Jun 22 07:58:28 PM PDT 24 |
13184029804 ps |
| T174 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3682888081 |
|
|
Jun 22 07:37:58 PM PDT 24 |
Jun 22 07:52:37 PM PDT 24 |
8454013077 ps |
| T313 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.3887059516 |
|
|
Jun 22 07:39:06 PM PDT 24 |
Jun 22 07:49:56 PM PDT 24 |
5232963992 ps |
| T149 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.2330569517 |
|
|
Jun 22 07:27:59 PM PDT 24 |
Jun 22 11:14:17 PM PDT 24 |
79171024708 ps |
| T136 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.2115743495 |
|
|
Jun 22 07:13:05 PM PDT 24 |
Jun 22 07:20:56 PM PDT 24 |
3665920392 ps |
| T371 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.942356740 |
|
|
Jun 22 07:41:28 PM PDT 24 |
Jun 22 07:51:22 PM PDT 24 |
4948786384 ps |
| T368 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.2322263125 |
|
|
Jun 22 07:48:26 PM PDT 24 |
Jun 22 07:58:28 PM PDT 24 |
4831167362 ps |
| T49 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.813646409 |
|
|
Jun 22 07:11:21 PM PDT 24 |
Jun 22 07:17:09 PM PDT 24 |
3364515500 ps |
| T241 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.2134947895 |
|
|
Jun 22 07:14:49 PM PDT 24 |
Jun 22 07:24:16 PM PDT 24 |
6963832308 ps |
| T541 |
/workspace/coverage/default/1.chip_sw_example_rom.2109326729 |
|
|
Jun 22 07:18:19 PM PDT 24 |
Jun 22 07:20:31 PM PDT 24 |
2375229352 ps |
| T323 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.1483004235 |
|
|
Jun 22 07:14:08 PM PDT 24 |
Jun 22 07:26:07 PM PDT 24 |
3821384536 ps |
| T427 |
/workspace/coverage/default/0.rom_e2e_smoke.346197754 |
|
|
Jun 22 07:17:46 PM PDT 24 |
Jun 22 08:32:35 PM PDT 24 |
15572365404 ps |
| T428 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.3002724968 |
|
|
Jun 22 07:42:57 PM PDT 24 |
Jun 22 08:44:38 PM PDT 24 |
15011795780 ps |
| T20 |
/workspace/coverage/default/0.chip_jtag_csr_rw.2430730927 |
|
|
Jun 22 07:03:48 PM PDT 24 |
Jun 22 07:37:58 PM PDT 24 |
18988420998 ps |
| T341 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.3192998043 |
|
|
Jun 22 07:46:10 PM PDT 24 |
Jun 22 07:55:02 PM PDT 24 |
5689731296 ps |
| T242 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.1301629474 |
|
|
Jun 22 07:39:43 PM PDT 24 |
Jun 22 07:46:47 PM PDT 24 |
4839071314 ps |
| T220 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.1653905160 |
|
|
Jun 22 07:40:52 PM PDT 24 |
Jun 22 08:35:23 PM PDT 24 |
11773286181 ps |
| T320 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.951638349 |
|
|
Jun 22 07:11:44 PM PDT 24 |
Jun 22 07:35:55 PM PDT 24 |
8973544688 ps |
| T254 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.2271843327 |
|
|
Jun 22 07:32:24 PM PDT 24 |
Jun 22 07:46:11 PM PDT 24 |
4877564906 ps |
| T175 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.3946072651 |
|
|
Jun 22 07:28:14 PM PDT 24 |
Jun 22 07:38:41 PM PDT 24 |
4273848754 ps |
| T348 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.1195198795 |
|
|
Jun 22 07:40:40 PM PDT 24 |
Jun 22 08:07:09 PM PDT 24 |
8716606956 ps |
| T291 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.1990837129 |
|
|
Jun 22 07:32:11 PM PDT 24 |
Jun 22 07:41:18 PM PDT 24 |
4080781682 ps |
| T44 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.2807088866 |
|
|
Jun 22 07:12:22 PM PDT 24 |
Jun 22 07:16:34 PM PDT 24 |
2884811064 ps |
| T349 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.2180887437 |
|
|
Jun 22 07:40:11 PM PDT 24 |
Jun 22 09:28:08 PM PDT 24 |
31609563112 ps |
| T123 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.2500699634 |
|
|
Jun 22 07:16:23 PM PDT 24 |
Jun 22 07:47:46 PM PDT 24 |
12919990746 ps |
| T137 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.3927344789 |
|
|
Jun 22 07:23:02 PM PDT 24 |
Jun 22 07:30:06 PM PDT 24 |
4483080848 ps |
| T127 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.1991570964 |
|
|
Jun 22 07:20:13 PM PDT 24 |
Jun 22 07:29:35 PM PDT 24 |
6170175152 ps |
| T138 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.2842667177 |
|
|
Jun 22 07:34:24 PM PDT 24 |
Jun 22 07:43:54 PM PDT 24 |
5561508616 ps |
| T415 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.4078991964 |
|
|
Jun 22 07:48:53 PM PDT 24 |
Jun 22 07:54:06 PM PDT 24 |
3863948706 ps |
| T216 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.3611767359 |
|
|
Jun 22 07:26:57 PM PDT 24 |
Jun 22 07:28:59 PM PDT 24 |
2248079984 ps |
| T429 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.1701220491 |
|
|
Jun 22 07:12:31 PM PDT 24 |
Jun 22 07:17:38 PM PDT 24 |
2909396830 ps |
| T542 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.930502170 |
|
|
Jun 22 07:38:44 PM PDT 24 |
Jun 22 07:49:21 PM PDT 24 |
7049965064 ps |
| T166 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.2218522617 |
|
|
Jun 22 07:39:27 PM PDT 24 |
Jun 22 07:48:52 PM PDT 24 |
5135477890 ps |
| T227 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3627609657 |
|
|
Jun 22 07:27:46 PM PDT 24 |
Jun 22 08:50:29 PM PDT 24 |
44950325880 ps |
| T217 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.2593924836 |
|
|
Jun 22 07:29:36 PM PDT 24 |
Jun 22 09:09:11 PM PDT 24 |
51279870717 ps |
| T356 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.1249466901 |
|
|
Jun 22 07:32:02 PM PDT 24 |
Jun 22 07:41:45 PM PDT 24 |
8344783400 ps |
| T270 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.2357096179 |
|
|
Jun 22 07:12:07 PM PDT 24 |
Jun 22 07:22:11 PM PDT 24 |
4251052753 ps |
| T543 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.1117429824 |
|
|
Jun 22 07:31:13 PM PDT 24 |
Jun 22 08:25:44 PM PDT 24 |
15329795054 ps |
| T544 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.705680084 |
|
|
Jun 22 07:32:37 PM PDT 24 |
Jun 22 08:32:38 PM PDT 24 |
12443370514 ps |
| T131 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.2808652885 |
|
|
Jun 22 07:21:31 PM PDT 24 |
Jun 22 07:25:48 PM PDT 24 |
3025054608 ps |
| T41 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.2810925370 |
|
|
Jun 22 07:17:12 PM PDT 24 |
Jun 22 07:21:34 PM PDT 24 |
2925953723 ps |
| T170 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.481775078 |
|
|
Jun 22 07:24:20 PM PDT 24 |
Jun 22 07:34:32 PM PDT 24 |
6860872230 ps |
| T184 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.3310821208 |
|
|
Jun 22 07:39:33 PM PDT 24 |
Jun 22 07:49:53 PM PDT 24 |
5247907712 ps |
| T545 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.702277390 |
|
|
Jun 22 07:13:31 PM PDT 24 |
Jun 22 08:00:41 PM PDT 24 |
10918237740 ps |
| T221 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.565950246 |
|
|
Jun 22 07:17:41 PM PDT 24 |
Jun 22 08:55:40 PM PDT 24 |
50919021570 ps |
| T156 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.1994847689 |
|
|
Jun 22 07:37:17 PM PDT 24 |
Jun 22 07:47:22 PM PDT 24 |
10092003110 ps |
| T324 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.3255740053 |
|
|
Jun 22 07:21:01 PM PDT 24 |
Jun 22 07:59:16 PM PDT 24 |
11504859294 ps |
| T222 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.148216418 |
|
|
Jun 22 07:16:18 PM PDT 24 |
Jun 22 08:52:07 PM PDT 24 |
45657744084 ps |
| T430 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.2253373942 |
|
|
Jun 22 07:49:00 PM PDT 24 |
Jun 22 07:57:52 PM PDT 24 |
5495751920 ps |
| T546 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.1756339688 |
|
|
Jun 22 07:30:50 PM PDT 24 |
Jun 22 07:42:44 PM PDT 24 |
9058217214 ps |
| T189 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.4219115535 |
|
|
Jun 22 07:45:40 PM PDT 24 |
Jun 22 07:52:44 PM PDT 24 |
4384496684 ps |
| T321 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.1399943937 |
|
|
Jun 22 07:11:21 PM PDT 24 |
Jun 22 07:18:48 PM PDT 24 |
3965893400 ps |
| T547 |
/workspace/coverage/default/2.chip_sw_example_rom.3054013059 |
|
|
Jun 22 07:27:08 PM PDT 24 |
Jun 22 07:28:58 PM PDT 24 |
2219079720 ps |
| T84 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.2439237954 |
|
|
Jun 22 07:44:49 PM PDT 24 |
Jun 22 07:52:16 PM PDT 24 |
3698149926 ps |
| T88 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.3957800711 |
|
|
Jun 22 07:30:43 PM PDT 24 |
Jun 22 07:51:45 PM PDT 24 |
8305150232 ps |
| T89 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.1206542637 |
|
|
Jun 22 07:14:14 PM PDT 24 |
Jun 22 07:35:55 PM PDT 24 |
5613784226 ps |
| T90 |
/workspace/coverage/default/1.chip_sw_hmac_oneshot.941478730 |
|
|
Jun 22 07:20:53 PM PDT 24 |
Jun 22 07:25:54 PM PDT 24 |
3713898200 ps |
| T91 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2831289365 |
|
|
Jun 22 07:25:45 PM PDT 24 |
Jun 22 07:36:10 PM PDT 24 |
4627484648 ps |
| T92 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.1577037914 |
|
|
Jun 22 07:44:19 PM PDT 24 |
Jun 22 07:57:08 PM PDT 24 |
6696199204 ps |
| T93 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.4062270586 |
|
|
Jun 22 07:17:07 PM PDT 24 |
Jun 22 08:55:14 PM PDT 24 |
48775956745 ps |
| T94 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.1232296397 |
|
|
Jun 22 07:20:13 PM PDT 24 |
Jun 22 07:28:23 PM PDT 24 |
5431811986 ps |
| T95 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2226069461 |
|
|
Jun 22 07:12:29 PM PDT 24 |
Jun 22 07:28:17 PM PDT 24 |
12366511889 ps |
| T76 |
/workspace/coverage/default/3.chip_tap_straps_rma.4286478213 |
|
|
Jun 22 07:38:57 PM PDT 24 |
Jun 22 07:43:52 PM PDT 24 |
4268521652 ps |
| T85 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.3253793528 |
|
|
Jun 22 07:47:55 PM PDT 24 |
Jun 22 07:57:43 PM PDT 24 |
5602724816 ps |
| T81 |
/workspace/coverage/default/2.chip_jtag_mem_access.1452885092 |
|
|
Jun 22 07:27:25 PM PDT 24 |
Jun 22 07:55:25 PM PDT 24 |
14392661884 ps |
| T197 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.3172527011 |
|
|
Jun 22 07:20:18 PM PDT 24 |
Jun 22 07:30:24 PM PDT 24 |
3938848490 ps |
| T275 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.2551461644 |
|
|
Jun 22 07:47:03 PM PDT 24 |
Jun 22 07:56:36 PM PDT 24 |
5064759314 ps |
| T506 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.565573707 |
|
|
Jun 22 07:45:37 PM PDT 24 |
Jun 22 07:53:55 PM PDT 24 |
5100245500 ps |
| T22 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.3285324357 |
|
|
Jun 22 07:13:40 PM PDT 24 |
Jun 22 07:52:24 PM PDT 24 |
31691786192 ps |
| T548 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.1084140181 |
|
|
Jun 22 07:23:40 PM PDT 24 |
Jun 22 07:31:50 PM PDT 24 |
4829634840 ps |
| T386 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.3947407381 |
|
|
Jun 22 07:39:15 PM PDT 24 |
Jun 22 08:07:33 PM PDT 24 |
8775319568 ps |
| T45 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.671627075 |
|
|
Jun 22 07:17:18 PM PDT 24 |
Jun 22 08:21:56 PM PDT 24 |
18672563152 ps |
| T263 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.1912987597 |
|
|
Jun 22 07:21:04 PM PDT 24 |
Jun 22 08:56:34 PM PDT 24 |
46339355340 ps |
| T277 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.3875519964 |
|
|
Jun 22 07:41:03 PM PDT 24 |
Jun 22 07:51:36 PM PDT 24 |
5052996360 ps |
| T549 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.4146318640 |
|
|
Jun 22 07:17:29 PM PDT 24 |
Jun 22 07:21:35 PM PDT 24 |
3412571830 ps |
| T190 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.275945336 |
|
|
Jun 22 07:43:57 PM PDT 24 |
Jun 22 07:49:28 PM PDT 24 |
2983413524 ps |
| T50 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.3325197656 |
|
|
Jun 22 07:12:36 PM PDT 24 |
Jun 22 07:48:45 PM PDT 24 |
25908789610 ps |
| T550 |
/workspace/coverage/default/2.chip_sw_example_concurrency.2433538549 |
|
|
Jun 22 07:28:53 PM PDT 24 |
Jun 22 07:34:12 PM PDT 24 |
2435146740 ps |
| T551 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1334279676 |
|
|
Jun 22 07:12:08 PM PDT 24 |
Jun 22 07:48:11 PM PDT 24 |
13214384470 ps |
| T302 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.1823369984 |
|
|
Jun 22 07:19:07 PM PDT 24 |
Jun 22 07:25:52 PM PDT 24 |
3805520446 ps |
| T552 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.4264590012 |
|
|
Jun 22 07:14:53 PM PDT 24 |
Jun 22 07:18:39 PM PDT 24 |
3020316664 ps |
| T553 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.3723002167 |
|
|
Jun 22 07:15:38 PM PDT 24 |
Jun 22 07:19:57 PM PDT 24 |
2784110676 ps |
| T230 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.3661831838 |
|
|
Jun 22 07:16:58 PM PDT 24 |
Jun 22 07:35:33 PM PDT 24 |
9932319490 ps |
| T360 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.282920556 |
|
|
Jun 22 07:43:52 PM PDT 24 |
Jun 22 07:50:47 PM PDT 24 |
3382404216 ps |
| T272 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.1260141693 |
|
|
Jun 22 07:12:02 PM PDT 24 |
Jun 22 07:33:53 PM PDT 24 |
5971552518 ps |
| T164 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.2480307023 |
|
|
Jun 22 07:24:27 PM PDT 24 |
Jun 22 07:41:37 PM PDT 24 |
7900004100 ps |
| T210 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.46979905 |
|
|
Jun 22 07:11:46 PM PDT 24 |
Jun 22 07:21:08 PM PDT 24 |
5480117330 ps |
| T298 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.4201059109 |
|
|
Jun 22 07:11:05 PM PDT 24 |
Jun 22 07:12:52 PM PDT 24 |
1818952229 ps |
| T125 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.3855901824 |
|
|
Jun 22 07:34:56 PM PDT 24 |
Jun 22 08:06:04 PM PDT 24 |
11805091464 ps |
| T251 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.3740294612 |
|
|
Jun 22 07:12:57 PM PDT 24 |
Jun 22 11:08:30 PM PDT 24 |
78819589090 ps |
| T554 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.3292650031 |
|
|
Jun 22 07:27:15 PM PDT 24 |
Jun 22 07:34:52 PM PDT 24 |
6474525368 ps |
| T262 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.3444547570 |
|
|
Jun 22 07:11:39 PM PDT 24 |
Jun 22 08:59:39 PM PDT 24 |
51120516444 ps |
| T412 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.1694989312 |
|
|
Jun 22 07:11:15 PM PDT 24 |
Jun 22 07:15:27 PM PDT 24 |
2991908000 ps |
| T397 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1258396885 |
|
|
Jun 22 07:34:48 PM PDT 24 |
Jun 22 07:44:26 PM PDT 24 |
6406625324 ps |
| T555 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.2653819187 |
|
|
Jun 22 07:41:43 PM PDT 24 |
Jun 22 08:33:48 PM PDT 24 |
16066902243 ps |
| T325 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.757116934 |
|
|
Jun 22 07:30:16 PM PDT 24 |
Jun 22 07:46:52 PM PDT 24 |
6814441384 ps |
| T416 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.3263455669 |
|
|
Jun 22 07:49:25 PM PDT 24 |
Jun 22 07:59:41 PM PDT 24 |
5388233496 ps |
| T357 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.2991125516 |
|
|
Jun 22 07:17:33 PM PDT 24 |
Jun 22 07:26:15 PM PDT 24 |
7029391111 ps |
| T556 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.2356177037 |
|
|
Jun 22 07:38:59 PM PDT 24 |
Jun 22 07:50:03 PM PDT 24 |
4113741288 ps |
| T557 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.3383130631 |
|
|
Jun 22 07:38:08 PM PDT 24 |
Jun 22 07:58:56 PM PDT 24 |
9102663508 ps |
| T148 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.3645854217 |
|
|
Jun 22 07:22:55 PM PDT 24 |
Jun 22 07:34:13 PM PDT 24 |
4415589460 ps |
| T558 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.2555289796 |
|
|
Jun 22 07:29:00 PM PDT 24 |
Jun 22 07:31:40 PM PDT 24 |
2762129244 ps |
| T79 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.2373297314 |
|
|
Jun 22 07:09:35 PM PDT 24 |
Jun 22 07:13:01 PM PDT 24 |
2925245953 ps |
| T559 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.829376540 |
|
|
Jun 22 07:20:31 PM PDT 24 |
Jun 22 08:21:29 PM PDT 24 |
15631858196 ps |
| T560 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.1801409596 |
|
|
Jun 22 07:23:45 PM PDT 24 |
Jun 22 07:31:26 PM PDT 24 |
3576814444 ps |
| T42 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.3682667541 |
|
|
Jun 22 07:27:01 PM PDT 24 |
Jun 22 07:31:56 PM PDT 24 |
3141325585 ps |
| T475 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.1340746607 |
|
|
Jun 22 07:47:02 PM PDT 24 |
Jun 22 07:55:55 PM PDT 24 |
6189182120 ps |
| T423 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.2150781215 |
|
|
Jun 22 07:21:35 PM PDT 24 |
Jun 22 07:26:18 PM PDT 24 |
2168070743 ps |
| T8 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.2536254650 |
|
|
Jun 22 07:24:09 PM PDT 24 |
Jun 22 07:33:11 PM PDT 24 |
4885689624 ps |
| T132 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.1347620586 |
|
|
Jun 22 07:16:52 PM PDT 24 |
Jun 22 07:23:07 PM PDT 24 |
2880200466 ps |
| T450 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.2461237953 |
|
|
Jun 22 07:27:07 PM PDT 24 |
Jun 22 07:31:50 PM PDT 24 |
2425395660 ps |
| T451 |
/workspace/coverage/default/1.chip_tap_straps_prod.3304357720 |
|
|
Jun 22 07:24:22 PM PDT 24 |
Jun 22 07:26:28 PM PDT 24 |
2079177011 ps |
| T233 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.2715242507 |
|
|
Jun 22 07:24:42 PM PDT 24 |
Jun 22 07:29:04 PM PDT 24 |
2249664124 ps |
| T322 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.4117463510 |
|
|
Jun 22 07:27:59 PM PDT 24 |
Jun 22 08:07:59 PM PDT 24 |
13416446372 ps |
| T452 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.689729322 |
|
|
Jun 22 07:41:31 PM PDT 24 |
Jun 22 07:49:20 PM PDT 24 |
6267613092 ps |
| T355 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.929816016 |
|
|
Jun 22 07:17:05 PM PDT 24 |
Jun 22 07:31:32 PM PDT 24 |
4427638570 ps |
| T326 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.2549334587 |
|
|
Jun 22 07:21:17 PM PDT 24 |
Jun 22 07:54:57 PM PDT 24 |
10618220570 ps |
| T165 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.614018859 |
|
|
Jun 22 07:24:50 PM PDT 24 |
Jun 22 07:34:00 PM PDT 24 |
6061217320 ps |
| T561 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.1539882378 |
|
|
Jun 22 07:12:31 PM PDT 24 |
Jun 22 07:21:47 PM PDT 24 |
4665667750 ps |
| T562 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.18747054 |
|
|
Jun 22 07:40:02 PM PDT 24 |
Jun 22 08:23:37 PM PDT 24 |
13146447930 ps |
| T264 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.844600040 |
|
|
Jun 22 07:10:57 PM PDT 24 |
Jun 22 08:44:53 PM PDT 24 |
51287484925 ps |
| T413 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.3861074073 |
|
|
Jun 22 07:34:36 PM PDT 24 |
Jun 22 07:38:22 PM PDT 24 |
2237976490 ps |
| T563 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.2355847250 |
|
|
Jun 22 07:37:58 PM PDT 24 |
Jun 22 07:42:28 PM PDT 24 |
2816384156 ps |
| T365 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.1005188107 |
|
|
Jun 22 07:45:15 PM PDT 24 |
Jun 22 07:55:35 PM PDT 24 |
4582234106 ps |
| T424 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.668703656 |
|
|
Jun 22 07:42:09 PM PDT 24 |
Jun 22 07:52:04 PM PDT 24 |
4937628260 ps |
| T160 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.2391348797 |
|
|
Jun 22 07:12:49 PM PDT 24 |
Jun 22 07:25:27 PM PDT 24 |
3147427432 ps |
| T517 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.1778050143 |
|
|
Jun 22 07:27:39 PM PDT 24 |
Jun 22 07:40:03 PM PDT 24 |
6662662588 ps |
| T564 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.661661389 |
|
|
Jun 22 07:24:08 PM PDT 24 |
Jun 22 07:29:09 PM PDT 24 |
2760640941 ps |
| T157 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.917647266 |
|
|
Jun 22 07:17:04 PM PDT 24 |
Jun 22 07:26:01 PM PDT 24 |
4437791622 ps |
| T299 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.371404529 |
|
|
Jun 22 07:12:40 PM PDT 24 |
Jun 22 07:14:50 PM PDT 24 |
2368855524 ps |
| T498 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.3317234295 |
|
|
Jun 22 07:44:46 PM PDT 24 |
Jun 22 07:51:49 PM PDT 24 |
3600676504 ps |
| T240 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.470253403 |
|
|
Jun 22 07:47:16 PM PDT 24 |
Jun 22 07:54:18 PM PDT 24 |
4828981738 ps |
| T504 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.1886734299 |
|
|
Jun 22 07:48:57 PM PDT 24 |
Jun 22 07:58:48 PM PDT 24 |
5055183640 ps |
| T328 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.2490711784 |
|
|
Jun 22 07:21:47 PM PDT 24 |
Jun 22 08:07:41 PM PDT 24 |
12094202080 ps |
| T281 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.4233286183 |
|
|
Jun 22 07:38:16 PM PDT 24 |
Jun 22 07:44:27 PM PDT 24 |
3628136860 ps |
| T521 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.3710273094 |
|
|
Jun 22 07:43:05 PM PDT 24 |
Jun 22 07:50:35 PM PDT 24 |
3738602296 ps |
| T515 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.1573680198 |
|
|
Jun 22 07:41:44 PM PDT 24 |
Jun 22 07:53:53 PM PDT 24 |
5035684452 ps |
| T223 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.3808302159 |
|
|
Jun 22 07:42:09 PM PDT 24 |
Jun 22 07:51:15 PM PDT 24 |
6001980882 ps |
| T228 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.2776429282 |
|
|
Jun 22 07:11:23 PM PDT 24 |
Jun 22 07:13:16 PM PDT 24 |
2603575886 ps |
| T167 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.378628694 |
|
|
Jun 22 07:22:37 PM PDT 24 |
Jun 22 07:29:40 PM PDT 24 |
5219236900 ps |
| T425 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.764411260 |
|
|
Jun 22 07:46:34 PM PDT 24 |
Jun 22 07:52:46 PM PDT 24 |
4059880212 ps |
| T384 |
/workspace/coverage/default/0.chip_sival_flash_info_access.1482050520 |
|
|
Jun 22 07:13:13 PM PDT 24 |
Jun 22 07:20:58 PM PDT 24 |
2955696060 ps |
| T565 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.1216399105 |
|
|
Jun 22 07:32:17 PM PDT 24 |
Jun 22 07:37:09 PM PDT 24 |
2829752164 ps |
| T484 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.513564561 |
|
|
Jun 22 07:47:15 PM PDT 24 |
Jun 22 07:52:46 PM PDT 24 |
3865974844 ps |
| T363 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.4011340482 |
|
|
Jun 22 07:50:50 PM PDT 24 |
Jun 22 07:57:29 PM PDT 24 |
3470810616 ps |
| T566 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1264350612 |
|
|
Jun 22 07:31:49 PM PDT 24 |
Jun 22 07:54:08 PM PDT 24 |
13221702971 ps |
| T195 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.1040834580 |
|
|
Jun 22 07:44:25 PM PDT 24 |
Jun 22 07:56:03 PM PDT 24 |
4998547340 ps |
| T567 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.4089342627 |
|
|
Jun 22 07:25:30 PM PDT 24 |
Jun 22 07:30:33 PM PDT 24 |
3409097112 ps |
| T146 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.1912711960 |
|
|
Jun 22 07:12:16 PM PDT 24 |
Jun 22 07:25:48 PM PDT 24 |
9279137865 ps |
| T358 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.997391457 |
|
|
Jun 22 07:12:26 PM PDT 24 |
Jun 22 07:20:02 PM PDT 24 |
5557966792 ps |
| T350 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.2057769932 |
|
|
Jun 22 07:26:36 PM PDT 24 |
Jun 22 07:33:52 PM PDT 24 |
10586831100 ps |
| T1 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.2896684530 |
|
|
Jun 22 07:24:34 PM PDT 24 |
Jun 22 07:31:34 PM PDT 24 |
7352518616 ps |
| T97 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.950446115 |
|
|
Jun 22 07:25:03 PM PDT 24 |
Jun 22 08:03:10 PM PDT 24 |
18454519301 ps |
| T98 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2643356518 |
|
|
Jun 22 07:16:48 PM PDT 24 |
Jun 22 07:40:36 PM PDT 24 |
12238738124 ps |
| T99 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.1259741455 |
|
|
Jun 22 07:13:57 PM PDT 24 |
Jun 22 07:35:34 PM PDT 24 |
5808575322 ps |