| T400 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.1916864894 |
|
|
Jun 25 08:15:30 PM PDT 24 |
Jun 25 08:20:49 PM PDT 24 |
3850705974 ps |
| T356 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.43344620 |
|
|
Jun 25 07:40:30 PM PDT 24 |
Jun 25 07:47:40 PM PDT 24 |
4170040524 ps |
| T893 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.892697467 |
|
|
Jun 25 08:08:59 PM PDT 24 |
Jun 25 08:13:40 PM PDT 24 |
2802152564 ps |
| T894 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.1666854479 |
|
|
Jun 25 07:51:56 PM PDT 24 |
Jun 25 08:11:34 PM PDT 24 |
5778018197 ps |
| T895 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.2332398479 |
|
|
Jun 25 07:49:05 PM PDT 24 |
Jun 25 08:14:54 PM PDT 24 |
7746936476 ps |
| T896 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.1293959814 |
|
|
Jun 25 07:38:08 PM PDT 24 |
Jun 25 08:11:38 PM PDT 24 |
8453250350 ps |
| T897 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.2511499660 |
|
|
Jun 25 07:57:42 PM PDT 24 |
Jun 25 08:03:12 PM PDT 24 |
2804028310 ps |
| T898 |
/workspace/coverage/default/0.chip_tap_straps_prod.1236536590 |
|
|
Jun 25 07:42:35 PM PDT 24 |
Jun 25 08:05:29 PM PDT 24 |
12690794234 ps |
| T706 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.872512099 |
|
|
Jun 25 08:13:29 PM PDT 24 |
Jun 25 08:21:05 PM PDT 24 |
3739338994 ps |
| T899 |
/workspace/coverage/default/1.rom_e2e_smoke.2225017406 |
|
|
Jun 25 08:01:50 PM PDT 24 |
Jun 25 08:55:41 PM PDT 24 |
14724458800 ps |
| T752 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.1073726614 |
|
|
Jun 25 08:13:33 PM PDT 24 |
Jun 25 08:24:45 PM PDT 24 |
5492533408 ps |
| T900 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.4233362983 |
|
|
Jun 25 07:39:56 PM PDT 24 |
Jun 25 07:44:57 PM PDT 24 |
2843574354 ps |
| T901 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.1479563288 |
|
|
Jun 25 07:37:54 PM PDT 24 |
Jun 25 07:45:33 PM PDT 24 |
6613807704 ps |
| T9 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.3107259435 |
|
|
Jun 25 07:39:54 PM PDT 24 |
Jun 25 08:04:48 PM PDT 24 |
20814709252 ps |
| T308 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.2543546719 |
|
|
Jun 25 07:54:15 PM PDT 24 |
Jun 25 08:14:42 PM PDT 24 |
6546890646 ps |
| T902 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.3256986880 |
|
|
Jun 25 07:39:20 PM PDT 24 |
Jun 25 07:51:49 PM PDT 24 |
7039126762 ps |
| T10 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3955647548 |
|
|
Jun 25 07:42:26 PM PDT 24 |
Jun 25 08:08:40 PM PDT 24 |
24509610040 ps |
| T903 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.4263587764 |
|
|
Jun 25 07:38:51 PM PDT 24 |
Jun 25 08:02:20 PM PDT 24 |
13428321387 ps |
| T904 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1205154581 |
|
|
Jun 25 08:08:02 PM PDT 24 |
Jun 25 08:14:19 PM PDT 24 |
3530053370 ps |
| T905 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.1129769301 |
|
|
Jun 25 08:01:34 PM PDT 24 |
Jun 25 08:15:30 PM PDT 24 |
5762052818 ps |
| T906 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.971471373 |
|
|
Jun 25 07:50:25 PM PDT 24 |
Jun 25 09:01:48 PM PDT 24 |
15889048600 ps |
| T907 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.2117969839 |
|
|
Jun 25 07:40:49 PM PDT 24 |
Jun 25 07:46:18 PM PDT 24 |
3617575054 ps |
| T666 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.2202989038 |
|
|
Jun 25 08:16:06 PM PDT 24 |
Jun 25 08:22:22 PM PDT 24 |
3892708360 ps |
| T697 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.3388899709 |
|
|
Jun 25 08:17:55 PM PDT 24 |
Jun 25 08:27:50 PM PDT 24 |
5756629244 ps |
| T386 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.2249096471 |
|
|
Jun 25 08:14:40 PM PDT 24 |
Jun 25 08:26:30 PM PDT 24 |
6037476116 ps |
| T169 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.3321672362 |
|
|
Jun 25 07:37:36 PM PDT 24 |
Jun 25 07:45:47 PM PDT 24 |
5365275816 ps |
| T908 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.1478225135 |
|
|
Jun 25 07:39:33 PM PDT 24 |
Jun 25 07:43:01 PM PDT 24 |
3018128048 ps |
| T285 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.1922298998 |
|
|
Jun 25 07:38:09 PM PDT 24 |
Jun 25 08:29:13 PM PDT 24 |
11132208182 ps |
| T909 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.1532367451 |
|
|
Jun 25 07:45:01 PM PDT 24 |
Jun 25 07:48:43 PM PDT 24 |
2891469864 ps |
| T910 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.4200522720 |
|
|
Jun 25 07:46:39 PM PDT 24 |
Jun 25 09:02:12 PM PDT 24 |
15625573032 ps |
| T911 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1197057418 |
|
|
Jun 25 07:55:42 PM PDT 24 |
Jun 25 08:11:33 PM PDT 24 |
8620075096 ps |
| T912 |
/workspace/coverage/default/1.chip_sw_hmac_oneshot.4125065830 |
|
|
Jun 25 07:54:07 PM PDT 24 |
Jun 25 07:59:08 PM PDT 24 |
2673471736 ps |
| T206 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.2767132745 |
|
|
Jun 25 07:48:29 PM PDT 24 |
Jun 25 08:02:48 PM PDT 24 |
5026748892 ps |
| T343 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.1352727574 |
|
|
Jun 25 08:13:07 PM PDT 24 |
Jun 25 08:26:39 PM PDT 24 |
5162704928 ps |
| T29 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.231193043 |
|
|
Jun 25 07:39:33 PM PDT 24 |
Jun 25 08:11:53 PM PDT 24 |
23149021360 ps |
| T913 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.2404082235 |
|
|
Jun 25 08:06:01 PM PDT 24 |
Jun 25 08:14:12 PM PDT 24 |
5394731288 ps |
| T914 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.1582519144 |
|
|
Jun 25 07:54:05 PM PDT 24 |
Jun 25 08:03:38 PM PDT 24 |
8258906850 ps |
| T294 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.3224677434 |
|
|
Jun 25 07:53:59 PM PDT 24 |
Jun 25 09:22:33 PM PDT 24 |
46178141342 ps |
| T370 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1598540446 |
|
|
Jun 25 07:44:22 PM PDT 24 |
Jun 25 07:54:15 PM PDT 24 |
5514410374 ps |
| T915 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.3374234230 |
|
|
Jun 25 08:05:33 PM PDT 24 |
Jun 25 08:18:55 PM PDT 24 |
8530628716 ps |
| T916 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.1575669752 |
|
|
Jun 25 08:00:06 PM PDT 24 |
Jun 25 08:03:52 PM PDT 24 |
2193788624 ps |
| T32 |
/workspace/coverage/default/1.chip_sw_gpio.2432923114 |
|
|
Jun 25 07:48:25 PM PDT 24 |
Jun 25 07:56:16 PM PDT 24 |
4114079760 ps |
| T704 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.3229502141 |
|
|
Jun 25 07:38:27 PM PDT 24 |
Jun 25 07:52:44 PM PDT 24 |
7961295868 ps |
| T917 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.3042813392 |
|
|
Jun 25 08:11:55 PM PDT 24 |
Jun 25 08:23:48 PM PDT 24 |
4217951750 ps |
| T222 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.1035244917 |
|
|
Jun 25 08:13:24 PM PDT 24 |
Jun 25 08:22:11 PM PDT 24 |
4556615510 ps |
| T262 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.928122206 |
|
|
Jun 25 08:13:13 PM PDT 24 |
Jun 25 08:23:46 PM PDT 24 |
3751592360 ps |
| T263 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.939022360 |
|
|
Jun 25 08:14:09 PM PDT 24 |
Jun 25 08:25:31 PM PDT 24 |
4737969680 ps |
| T264 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.2125441926 |
|
|
Jun 25 08:12:07 PM PDT 24 |
Jun 25 09:19:30 PM PDT 24 |
15704657383 ps |
| T265 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.1510819465 |
|
|
Jun 25 08:15:08 PM PDT 24 |
Jun 25 08:26:51 PM PDT 24 |
5081556946 ps |
| T266 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.1690890838 |
|
|
Jun 25 08:11:32 PM PDT 24 |
Jun 25 08:19:14 PM PDT 24 |
3099273018 ps |
| T42 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.1079274207 |
|
|
Jun 25 07:59:34 PM PDT 24 |
Jun 25 08:04:51 PM PDT 24 |
2492297550 ps |
| T267 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.139696822 |
|
|
Jun 25 08:10:03 PM PDT 24 |
Jun 25 08:21:33 PM PDT 24 |
3916342814 ps |
| T268 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1574774588 |
|
|
Jun 25 07:53:30 PM PDT 24 |
Jun 25 08:34:10 PM PDT 24 |
12489766370 ps |
| T269 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.646837629 |
|
|
Jun 25 07:48:02 PM PDT 24 |
Jun 25 08:59:33 PM PDT 24 |
15379171964 ps |
| T99 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1319453267 |
|
|
Jun 25 07:55:40 PM PDT 24 |
Jun 25 08:19:36 PM PDT 24 |
20596450972 ps |
| T918 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.3345291927 |
|
|
Jun 25 08:08:04 PM PDT 24 |
Jun 25 08:33:06 PM PDT 24 |
7717283809 ps |
| T90 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.130570682 |
|
|
Jun 25 08:14:09 PM PDT 24 |
Jun 25 08:30:05 PM PDT 24 |
6046172756 ps |
| T919 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.4000626024 |
|
|
Jun 25 08:10:23 PM PDT 24 |
Jun 25 08:20:18 PM PDT 24 |
7037220875 ps |
| T199 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.40548968 |
|
|
Jun 25 08:01:19 PM PDT 24 |
Jun 25 08:33:20 PM PDT 24 |
22649388326 ps |
| T920 |
/workspace/coverage/default/2.rom_keymgr_functest.989624296 |
|
|
Jun 25 08:10:53 PM PDT 24 |
Jun 25 08:18:15 PM PDT 24 |
4892391304 ps |
| T18 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.3931686641 |
|
|
Jun 25 07:48:01 PM PDT 24 |
Jun 25 07:53:04 PM PDT 24 |
2471098823 ps |
| T245 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3137313497 |
|
|
Jun 25 07:39:19 PM PDT 24 |
Jun 25 07:40:56 PM PDT 24 |
2127881374 ps |
| T921 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.3242829881 |
|
|
Jun 25 07:53:48 PM PDT 24 |
Jun 25 08:00:16 PM PDT 24 |
3727135046 ps |
| T922 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.2092170204 |
|
|
Jun 25 08:04:10 PM PDT 24 |
Jun 25 08:09:14 PM PDT 24 |
3546840142 ps |
| T923 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.3244032669 |
|
|
Jun 25 08:09:30 PM PDT 24 |
Jun 25 08:14:04 PM PDT 24 |
2698920140 ps |
| T924 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.684985586 |
|
|
Jun 25 07:51:22 PM PDT 24 |
Jun 25 09:04:34 PM PDT 24 |
16012898972 ps |
| T318 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.320258418 |
|
|
Jun 25 07:47:24 PM PDT 24 |
Jun 25 07:56:44 PM PDT 24 |
4378444936 ps |
| T152 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.1373874661 |
|
|
Jun 25 08:02:34 PM PDT 24 |
Jun 25 08:05:48 PM PDT 24 |
2688331151 ps |
| T171 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.4227369223 |
|
|
Jun 25 07:39:30 PM PDT 24 |
Jun 25 07:44:30 PM PDT 24 |
2993989094 ps |
| T415 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2481002227 |
|
|
Jun 25 07:39:19 PM PDT 24 |
Jun 25 07:54:34 PM PDT 24 |
6021795938 ps |
| T925 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.4294876678 |
|
|
Jun 25 07:47:38 PM PDT 24 |
Jun 25 07:52:21 PM PDT 24 |
2646880568 ps |
| T223 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.1151888817 |
|
|
Jun 25 08:16:36 PM PDT 24 |
Jun 25 08:23:25 PM PDT 24 |
3459076948 ps |
| T699 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.2457397625 |
|
|
Jun 25 08:18:43 PM PDT 24 |
Jun 25 08:24:53 PM PDT 24 |
3848747140 ps |
| T926 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2834013061 |
|
|
Jun 25 08:05:44 PM PDT 24 |
Jun 25 08:26:21 PM PDT 24 |
7066885171 ps |
| T927 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.3435722228 |
|
|
Jun 25 08:11:44 PM PDT 24 |
Jun 25 08:36:37 PM PDT 24 |
7463952464 ps |
| T91 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.2390795095 |
|
|
Jun 25 08:14:15 PM PDT 24 |
Jun 25 08:22:36 PM PDT 24 |
5679949598 ps |
| T293 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.2733303977 |
|
|
Jun 25 07:40:29 PM PDT 24 |
Jun 25 08:21:50 PM PDT 24 |
23989297187 ps |
| T326 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.3632622980 |
|
|
Jun 25 07:38:33 PM PDT 24 |
Jun 25 07:49:29 PM PDT 24 |
3656700792 ps |
| T212 |
/workspace/coverage/default/1.chip_sw_power_idle_load.1092635905 |
|
|
Jun 25 08:02:17 PM PDT 24 |
Jun 25 08:12:51 PM PDT 24 |
4311151416 ps |
| T928 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.1262582735 |
|
|
Jun 25 07:38:34 PM PDT 24 |
Jun 25 07:50:09 PM PDT 24 |
3971604180 ps |
| T929 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.4212714727 |
|
|
Jun 25 08:09:07 PM PDT 24 |
Jun 25 08:18:58 PM PDT 24 |
5890529039 ps |
| T930 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.3636198126 |
|
|
Jun 25 07:56:59 PM PDT 24 |
Jun 25 08:02:22 PM PDT 24 |
2886418774 ps |
| T931 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.2346641464 |
|
|
Jun 25 08:12:26 PM PDT 24 |
Jun 25 08:26:41 PM PDT 24 |
6918081047 ps |
| T932 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.737617173 |
|
|
Jun 25 08:00:42 PM PDT 24 |
Jun 25 08:10:26 PM PDT 24 |
5395202136 ps |
| T933 |
/workspace/coverage/default/0.chip_sw_aes_enc.341032375 |
|
|
Jun 25 07:40:55 PM PDT 24 |
Jun 25 07:44:51 PM PDT 24 |
2722844616 ps |
| T934 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1977396896 |
|
|
Jun 25 08:01:22 PM PDT 24 |
Jun 25 08:47:19 PM PDT 24 |
28627478861 ps |
| T702 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.1309819237 |
|
|
Jun 25 07:46:56 PM PDT 24 |
Jun 25 07:57:10 PM PDT 24 |
5083465280 ps |
| T935 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.2233611671 |
|
|
Jun 25 08:03:28 PM PDT 24 |
Jun 25 08:30:04 PM PDT 24 |
16088326536 ps |
| T936 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.842888088 |
|
|
Jun 25 08:11:14 PM PDT 24 |
Jun 25 09:11:28 PM PDT 24 |
16233899520 ps |
| T345 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.4088335047 |
|
|
Jun 25 07:39:24 PM PDT 24 |
Jun 25 07:47:23 PM PDT 24 |
19270227848 ps |
| T769 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.1487201340 |
|
|
Jun 25 08:17:45 PM PDT 24 |
Jun 25 08:23:47 PM PDT 24 |
3825461626 ps |
| T33 |
/workspace/coverage/default/2.chip_sw_gpio.274097798 |
|
|
Jun 25 07:59:52 PM PDT 24 |
Jun 25 08:09:10 PM PDT 24 |
4069726678 ps |
| T224 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.2551471418 |
|
|
Jun 25 08:13:36 PM PDT 24 |
Jun 25 08:19:43 PM PDT 24 |
3925204136 ps |
| T753 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.3224488956 |
|
|
Jun 25 08:16:58 PM PDT 24 |
Jun 25 08:23:42 PM PDT 24 |
3765373184 ps |
| T686 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.781905466 |
|
|
Jun 25 08:14:36 PM PDT 24 |
Jun 25 08:26:24 PM PDT 24 |
4740917020 ps |
| T334 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.1139612783 |
|
|
Jun 25 07:38:54 PM PDT 24 |
Jun 25 07:50:24 PM PDT 24 |
4905471852 ps |
| T165 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.2686483545 |
|
|
Jun 25 07:40:42 PM PDT 24 |
Jun 25 08:20:02 PM PDT 24 |
21727469672 ps |
| T306 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.1462324634 |
|
|
Jun 25 08:03:59 PM PDT 24 |
Jun 25 08:16:10 PM PDT 24 |
4461445436 ps |
| T937 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.1585342019 |
|
|
Jun 25 07:47:07 PM PDT 24 |
Jun 25 08:37:24 PM PDT 24 |
15837265616 ps |
| T938 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.1984323938 |
|
|
Jun 25 07:46:34 PM PDT 24 |
Jun 25 07:55:48 PM PDT 24 |
6410558904 ps |
| T83 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.3764733276 |
|
|
Jun 25 08:02:27 PM PDT 24 |
Jun 25 08:29:05 PM PDT 24 |
12830251860 ps |
| T939 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.2840445988 |
|
|
Jun 25 08:01:22 PM PDT 24 |
Jun 25 08:15:15 PM PDT 24 |
5395263135 ps |
| T940 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.1723133692 |
|
|
Jun 25 07:56:02 PM PDT 24 |
Jun 25 08:05:00 PM PDT 24 |
6915346888 ps |
| T941 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.3852866611 |
|
|
Jun 25 08:01:16 PM PDT 24 |
Jun 25 09:15:47 PM PDT 24 |
15692186520 ps |
| T707 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.4184597967 |
|
|
Jun 25 08:09:24 PM PDT 24 |
Jun 25 08:16:51 PM PDT 24 |
4317802908 ps |
| T344 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.2680160933 |
|
|
Jun 25 08:16:47 PM PDT 24 |
Jun 25 08:30:23 PM PDT 24 |
4611133040 ps |
| T942 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.944208692 |
|
|
Jun 25 07:50:37 PM PDT 24 |
Jun 25 07:57:29 PM PDT 24 |
6492621800 ps |
| T341 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.2250082260 |
|
|
Jun 25 08:17:28 PM PDT 24 |
Jun 25 08:31:16 PM PDT 24 |
4718887854 ps |
| T943 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.1762914544 |
|
|
Jun 25 08:08:27 PM PDT 24 |
Jun 25 08:13:02 PM PDT 24 |
3644111496 ps |
| T944 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.425507002 |
|
|
Jun 25 07:52:43 PM PDT 24 |
Jun 25 08:11:24 PM PDT 24 |
5805180442 ps |
| T755 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.722319675 |
|
|
Jun 25 08:14:55 PM PDT 24 |
Jun 25 08:23:43 PM PDT 24 |
3953279938 ps |
| T231 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.2158414322 |
|
|
Jun 25 07:56:12 PM PDT 24 |
Jun 25 08:02:33 PM PDT 24 |
3516183068 ps |
| T667 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.700142184 |
|
|
Jun 25 07:49:54 PM PDT 24 |
Jun 25 07:53:47 PM PDT 24 |
3177358134 ps |
| T250 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.3302879633 |
|
|
Jun 25 07:53:48 PM PDT 24 |
Jun 25 08:04:58 PM PDT 24 |
4512030595 ps |
| T372 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.3830689339 |
|
|
Jun 25 08:13:43 PM PDT 24 |
Jun 25 08:24:15 PM PDT 24 |
6176310876 ps |
| T30 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.1111502389 |
|
|
Jun 25 07:36:57 PM PDT 24 |
Jun 25 08:12:53 PM PDT 24 |
8440583918 ps |
| T642 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.1964753579 |
|
|
Jun 25 07:57:23 PM PDT 24 |
Jun 25 08:08:11 PM PDT 24 |
5761987570 ps |
| T84 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.1006558066 |
|
|
Jun 25 08:08:34 PM PDT 24 |
Jun 25 08:12:30 PM PDT 24 |
3083423753 ps |
| T945 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.2713158959 |
|
|
Jun 25 07:37:44 PM PDT 24 |
Jun 25 07:44:33 PM PDT 24 |
3475017684 ps |
| T743 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3559749475 |
|
|
Jun 25 08:15:34 PM PDT 24 |
Jun 25 08:25:25 PM PDT 24 |
5272632080 ps |
| T166 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.1432954490 |
|
|
Jun 25 07:37:53 PM PDT 24 |
Jun 25 07:40:42 PM PDT 24 |
3633251706 ps |
| T351 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.1423209466 |
|
|
Jun 25 08:13:41 PM PDT 24 |
Jun 25 08:23:05 PM PDT 24 |
5221193008 ps |
| T946 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.2955358485 |
|
|
Jun 25 08:02:58 PM PDT 24 |
Jun 25 08:06:37 PM PDT 24 |
2703453460 ps |
| T947 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.3770379054 |
|
|
Jun 25 08:09:07 PM PDT 24 |
Jun 25 08:22:15 PM PDT 24 |
4473014708 ps |
| T948 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.4012636819 |
|
|
Jun 25 07:46:43 PM PDT 24 |
Jun 25 08:51:46 PM PDT 24 |
16605596050 ps |
| T321 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.3489359714 |
|
|
Jun 25 07:49:05 PM PDT 24 |
Jun 25 08:00:05 PM PDT 24 |
4193690388 ps |
| T719 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.1974084904 |
|
|
Jun 25 08:12:45 PM PDT 24 |
Jun 25 08:18:52 PM PDT 24 |
2858934216 ps |
| T949 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.2392522270 |
|
|
Jun 25 08:01:41 PM PDT 24 |
Jun 25 08:24:03 PM PDT 24 |
8722085656 ps |
| T950 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.313358143 |
|
|
Jun 25 07:40:57 PM PDT 24 |
Jun 25 07:51:43 PM PDT 24 |
3980187928 ps |
| T951 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.2159261275 |
|
|
Jun 25 08:05:43 PM PDT 24 |
Jun 25 08:15:04 PM PDT 24 |
4537148250 ps |
| T952 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.3406221015 |
|
|
Jun 25 08:02:34 PM PDT 24 |
Jun 25 08:07:12 PM PDT 24 |
3111183361 ps |
| T251 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.2644416702 |
|
|
Jun 25 08:02:53 PM PDT 24 |
Jun 25 08:11:40 PM PDT 24 |
3748229656 ps |
| T718 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.4253368908 |
|
|
Jun 25 08:13:20 PM PDT 24 |
Jun 25 08:22:41 PM PDT 24 |
4830645786 ps |
| T117 |
/workspace/coverage/default/0.chip_sw_edn_kat.1806771949 |
|
|
Jun 25 07:39:25 PM PDT 24 |
Jun 25 07:51:15 PM PDT 24 |
3542681032 ps |
| T144 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.2163768002 |
|
|
Jun 25 07:37:23 PM PDT 24 |
Jun 25 07:45:20 PM PDT 24 |
3383830616 ps |
| T953 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.89808942 |
|
|
Jun 25 08:03:53 PM PDT 24 |
Jun 25 09:01:57 PM PDT 24 |
16928461548 ps |
| T954 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.2238242669 |
|
|
Jun 25 08:18:42 PM PDT 24 |
Jun 25 08:32:11 PM PDT 24 |
6051257570 ps |
| T197 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.2109082823 |
|
|
Jun 25 07:37:09 PM PDT 24 |
Jun 25 10:52:49 PM PDT 24 |
63794690740 ps |
| T167 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.2574483786 |
|
|
Jun 25 07:50:06 PM PDT 24 |
Jun 25 07:56:09 PM PDT 24 |
3830486346 ps |
| T955 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2622150213 |
|
|
Jun 25 07:43:30 PM PDT 24 |
Jun 25 08:03:26 PM PDT 24 |
6855396475 ps |
| T956 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.4095501957 |
|
|
Jun 25 07:37:19 PM PDT 24 |
Jun 25 07:48:02 PM PDT 24 |
5060976890 ps |
| T957 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.368200345 |
|
|
Jun 25 08:12:13 PM PDT 24 |
Jun 25 08:36:27 PM PDT 24 |
7458532456 ps |
| T252 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.864506709 |
|
|
Jun 25 07:47:15 PM PDT 24 |
Jun 25 07:58:19 PM PDT 24 |
6054783540 ps |
| T760 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.496526610 |
|
|
Jun 25 08:17:58 PM PDT 24 |
Jun 25 08:27:50 PM PDT 24 |
4658684360 ps |
| T958 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.555835100 |
|
|
Jun 25 08:10:54 PM PDT 24 |
Jun 25 08:22:48 PM PDT 24 |
5117646192 ps |
| T959 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.786925165 |
|
|
Jun 25 07:47:13 PM PDT 24 |
Jun 25 07:56:56 PM PDT 24 |
4514904488 ps |
| T246 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.1928307236 |
|
|
Jun 25 07:39:02 PM PDT 24 |
Jun 25 07:41:17 PM PDT 24 |
3082590815 ps |
| T175 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.2462784506 |
|
|
Jun 25 08:04:16 PM PDT 24 |
Jun 25 08:22:31 PM PDT 24 |
7785563852 ps |
| T960 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.3423854287 |
|
|
Jun 25 07:57:43 PM PDT 24 |
Jun 25 08:08:49 PM PDT 24 |
10372194120 ps |
| T961 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.2995887282 |
|
|
Jun 25 08:10:40 PM PDT 24 |
Jun 25 08:27:24 PM PDT 24 |
12948253548 ps |
| T962 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.3110059695 |
|
|
Jun 25 07:40:46 PM PDT 24 |
Jun 25 07:48:33 PM PDT 24 |
3620651398 ps |
| T963 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.1382108291 |
|
|
Jun 25 07:52:02 PM PDT 24 |
Jun 25 08:49:05 PM PDT 24 |
17108778952 ps |
| T114 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.599306801 |
|
|
Jun 25 07:55:10 PM PDT 24 |
Jun 25 08:05:34 PM PDT 24 |
4564724880 ps |
| T350 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.4100637446 |
|
|
Jun 25 08:12:41 PM PDT 24 |
Jun 25 08:26:11 PM PDT 24 |
4998471568 ps |
| T964 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1169651718 |
|
|
Jun 25 07:56:01 PM PDT 24 |
Jun 25 09:03:27 PM PDT 24 |
24677824883 ps |
| T965 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.2883273476 |
|
|
Jun 25 07:38:22 PM PDT 24 |
Jun 25 07:43:15 PM PDT 24 |
2757887080 ps |
| T966 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.312313560 |
|
|
Jun 25 07:39:18 PM PDT 24 |
Jun 25 07:50:09 PM PDT 24 |
5741397940 ps |
| T967 |
/workspace/coverage/default/1.chip_sw_hmac_enc.1357188210 |
|
|
Jun 25 07:53:50 PM PDT 24 |
Jun 25 07:58:07 PM PDT 24 |
3101514392 ps |
| T968 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.1020484725 |
|
|
Jun 25 07:38:57 PM PDT 24 |
Jun 25 09:15:44 PM PDT 24 |
27708593138 ps |
| T969 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.749611028 |
|
|
Jun 25 08:07:51 PM PDT 24 |
Jun 25 08:10:50 PM PDT 24 |
2482386595 ps |
| T970 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.1184092564 |
|
|
Jun 25 08:12:17 PM PDT 24 |
Jun 25 08:16:40 PM PDT 24 |
3423561112 ps |
| T728 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.902561039 |
|
|
Jun 25 08:07:53 PM PDT 24 |
Jun 25 08:23:08 PM PDT 24 |
6672853612 ps |
| T354 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3852374899 |
|
|
Jun 25 08:01:22 PM PDT 24 |
Jun 25 08:09:33 PM PDT 24 |
19138277576 ps |
| T253 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3141104652 |
|
|
Jun 25 07:44:10 PM PDT 24 |
Jun 25 07:52:33 PM PDT 24 |
4071456003 ps |
| T971 |
/workspace/coverage/default/2.rom_e2e_smoke.1965630635 |
|
|
Jun 25 08:11:41 PM PDT 24 |
Jun 25 09:10:20 PM PDT 24 |
15551386366 ps |
| T972 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.3787419754 |
|
|
Jun 25 08:10:57 PM PDT 24 |
Jun 25 08:26:20 PM PDT 24 |
9097182928 ps |
| T63 |
/workspace/coverage/default/4.chip_tap_straps_rma.1791198055 |
|
|
Jun 25 08:09:43 PM PDT 24 |
Jun 25 08:18:22 PM PDT 24 |
5332430978 ps |
| T115 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1941449809 |
|
|
Jun 25 08:04:29 PM PDT 24 |
Jun 25 08:12:54 PM PDT 24 |
3817025136 ps |
| T973 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.3934237893 |
|
|
Jun 25 08:01:49 PM PDT 24 |
Jun 25 08:14:58 PM PDT 24 |
7694763696 ps |
| T716 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.616628538 |
|
|
Jun 25 08:13:00 PM PDT 24 |
Jun 25 08:23:24 PM PDT 24 |
5770401448 ps |
| T974 |
/workspace/coverage/default/1.chip_tap_straps_prod.2021737737 |
|
|
Jun 25 07:55:00 PM PDT 24 |
Jun 25 08:08:40 PM PDT 24 |
7565476113 ps |
| T173 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.3519393783 |
|
|
Jun 25 07:47:37 PM PDT 24 |
Jun 25 09:09:06 PM PDT 24 |
42178121948 ps |
| T11 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.755694221 |
|
|
Jun 25 07:47:01 PM PDT 24 |
Jun 25 07:52:43 PM PDT 24 |
3135494312 ps |
| T975 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.1870644434 |
|
|
Jun 25 07:40:12 PM PDT 24 |
Jun 25 08:08:34 PM PDT 24 |
7480826608 ps |
| T976 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.2949079922 |
|
|
Jun 25 08:02:25 PM PDT 24 |
Jun 25 08:09:27 PM PDT 24 |
3432597820 ps |
| T977 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.1741406141 |
|
|
Jun 25 08:12:31 PM PDT 24 |
Jun 25 09:04:41 PM PDT 24 |
15161111491 ps |
| T978 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.66324838 |
|
|
Jun 25 07:50:02 PM PDT 24 |
Jun 25 08:02:35 PM PDT 24 |
6714996484 ps |
| T979 |
/workspace/coverage/default/1.chip_sw_example_flash.3537078417 |
|
|
Jun 25 07:48:54 PM PDT 24 |
Jun 25 07:54:09 PM PDT 24 |
2771366496 ps |
| T330 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.1239384108 |
|
|
Jun 25 07:38:36 PM PDT 24 |
Jun 25 07:46:54 PM PDT 24 |
4356957288 ps |
| T44 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.430651927 |
|
|
Jun 25 07:41:16 PM PDT 24 |
Jun 25 07:48:51 PM PDT 24 |
5924698644 ps |
| T234 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.833385140 |
|
|
Jun 25 07:45:01 PM PDT 24 |
Jun 25 08:32:44 PM PDT 24 |
31240937030 ps |
| T77 |
/workspace/coverage/default/2.chip_jtag_csr_rw.3448783468 |
|
|
Jun 25 07:58:18 PM PDT 24 |
Jun 25 08:23:42 PM PDT 24 |
10675216727 ps |
| T696 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.2680517044 |
|
|
Jun 25 08:12:14 PM PDT 24 |
Jun 25 08:20:09 PM PDT 24 |
4224377128 ps |
| T980 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.2904943700 |
|
|
Jun 25 07:50:40 PM PDT 24 |
Jun 25 08:04:59 PM PDT 24 |
8868199584 ps |
| T981 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.1661484968 |
|
|
Jun 25 07:52:27 PM PDT 24 |
Jun 25 07:59:10 PM PDT 24 |
2846428227 ps |
| T982 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.4289517956 |
|
|
Jun 25 08:02:20 PM PDT 24 |
Jun 25 08:13:27 PM PDT 24 |
5165060320 ps |
| T983 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.1085071581 |
|
|
Jun 25 07:47:28 PM PDT 24 |
Jun 25 09:01:08 PM PDT 24 |
15703120182 ps |
| T984 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.2169627494 |
|
|
Jun 25 07:39:51 PM PDT 24 |
Jun 25 07:49:42 PM PDT 24 |
6548330014 ps |
| T985 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.209342750 |
|
|
Jun 25 08:01:36 PM PDT 24 |
Jun 25 08:06:11 PM PDT 24 |
2819825694 ps |
| T31 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.2815844278 |
|
|
Jun 25 07:39:21 PM PDT 24 |
Jun 25 09:16:48 PM PDT 24 |
19074809752 ps |
| T70 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.2477263279 |
|
|
Jun 25 07:37:00 PM PDT 24 |
Jun 25 09:33:12 PM PDT 24 |
31134106968 ps |
| T986 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.2916634717 |
|
|
Jun 25 07:52:06 PM PDT 24 |
Jun 25 08:24:32 PM PDT 24 |
5885816840 ps |
| T703 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.3429290836 |
|
|
Jun 25 08:12:26 PM PDT 24 |
Jun 25 08:20:57 PM PDT 24 |
3688599332 ps |
| T987 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.4282376544 |
|
|
Jun 25 07:41:14 PM PDT 24 |
Jun 25 08:19:41 PM PDT 24 |
8492127744 ps |
| T643 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.537875618 |
|
|
Jun 25 07:41:11 PM PDT 24 |
Jun 25 07:43:09 PM PDT 24 |
2504568319 ps |
| T988 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.1432383469 |
|
|
Jun 25 07:57:54 PM PDT 24 |
Jun 25 08:18:06 PM PDT 24 |
5958718028 ps |
| T989 |
/workspace/coverage/default/0.chip_sw_aes_idle.1750555922 |
|
|
Jun 25 07:39:37 PM PDT 24 |
Jun 25 07:44:22 PM PDT 24 |
3459480262 ps |
| T990 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2504419094 |
|
|
Jun 25 07:38:11 PM PDT 24 |
Jun 25 07:47:51 PM PDT 24 |
5516676776 ps |
| T991 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.2500589230 |
|
|
Jun 25 08:10:14 PM PDT 24 |
Jun 25 08:17:35 PM PDT 24 |
7621977078 ps |
| T992 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.2085079695 |
|
|
Jun 25 08:10:29 PM PDT 24 |
Jun 25 08:54:28 PM PDT 24 |
12902349332 ps |
| T993 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3430908448 |
|
|
Jun 25 08:06:44 PM PDT 24 |
Jun 25 08:17:18 PM PDT 24 |
5032794434 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.3067983922 |
|
|
Jun 25 08:05:10 PM PDT 24 |
Jun 25 08:09:51 PM PDT 24 |
3007887550 ps |
| T298 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3680581883 |
|
|
Jun 25 07:39:14 PM PDT 24 |
Jun 25 07:49:39 PM PDT 24 |
5020521920 ps |
| T644 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.2951976086 |
|
|
Jun 25 08:00:49 PM PDT 24 |
Jun 25 08:02:54 PM PDT 24 |
2874430020 ps |
| T995 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.2712754854 |
|
|
Jun 25 07:56:33 PM PDT 24 |
Jun 25 08:07:20 PM PDT 24 |
5313565940 ps |
| T737 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.1760997414 |
|
|
Jun 25 08:15:38 PM PDT 24 |
Jun 25 08:23:37 PM PDT 24 |
5062488600 ps |
| T996 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.551154088 |
|
|
Jun 25 07:40:33 PM PDT 24 |
Jun 25 07:51:35 PM PDT 24 |
4857330800 ps |
| T698 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.905631771 |
|
|
Jun 25 08:13:41 PM PDT 24 |
Jun 25 08:25:34 PM PDT 24 |
5487717832 ps |
| T997 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.3622187624 |
|
|
Jun 25 07:54:22 PM PDT 24 |
Jun 25 09:04:00 PM PDT 24 |
16256604706 ps |
| T148 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.3788901675 |
|
|
Jun 25 07:41:00 PM PDT 24 |
Jun 25 08:06:24 PM PDT 24 |
12455655610 ps |
| T726 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.788116930 |
|
|
Jun 25 08:17:48 PM PDT 24 |
Jun 25 08:25:41 PM PDT 24 |
3786008248 ps |
| T998 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.2950753970 |
|
|
Jun 25 08:02:17 PM PDT 24 |
Jun 25 08:58:55 PM PDT 24 |
15248753800 ps |
| T192 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.3830059198 |
|
|
Jun 25 08:01:08 PM PDT 24 |
Jun 25 08:13:17 PM PDT 24 |
5706160453 ps |
| T999 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.3454647148 |
|
|
Jun 25 07:58:28 PM PDT 24 |
Jun 25 08:14:48 PM PDT 24 |
5831503484 ps |
| T633 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.1357361100 |
|
|
Jun 25 07:51:45 PM PDT 24 |
Jun 25 08:01:30 PM PDT 24 |
3544673624 ps |
| T145 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.3694148917 |
|
|
Jun 25 07:54:43 PM PDT 24 |
Jun 25 08:04:34 PM PDT 24 |
3537230288 ps |
| T286 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.193725245 |
|
|
Jun 25 08:04:25 PM PDT 24 |
Jun 25 08:28:08 PM PDT 24 |
9166045480 ps |
| T1000 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.2485379940 |
|
|
Jun 25 08:10:42 PM PDT 24 |
Jun 25 09:56:02 PM PDT 24 |
28836348984 ps |
| T1001 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.2554718364 |
|
|
Jun 25 07:41:22 PM PDT 24 |
Jun 25 07:53:00 PM PDT 24 |
7562905564 ps |
| T1002 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.2649950435 |
|
|
Jun 25 08:01:50 PM PDT 24 |
Jun 25 08:19:53 PM PDT 24 |
6505918940 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.3004687536 |
|
|
Jun 25 07:41:56 PM PDT 24 |
Jun 25 07:54:01 PM PDT 24 |
7188143300 ps |
| T1004 |
/workspace/coverage/default/3.chip_tap_straps_dev.886442433 |
|
|
Jun 25 08:09:50 PM PDT 24 |
Jun 25 08:15:37 PM PDT 24 |
4100978796 ps |
| T100 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.2069623805 |
|
|
Jun 25 07:56:18 PM PDT 24 |
Jun 25 08:04:00 PM PDT 24 |
7008111764 ps |
| T700 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1637951067 |
|
|
Jun 25 08:15:04 PM PDT 24 |
Jun 25 08:21:43 PM PDT 24 |
3603730584 ps |
| T1005 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.1471340718 |
|
|
Jun 25 07:46:53 PM PDT 24 |
Jun 25 08:06:54 PM PDT 24 |
9548347384 ps |
| T504 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.4126704207 |
|
|
Jun 25 07:50:26 PM PDT 24 |
Jun 25 08:20:47 PM PDT 24 |
12028286949 ps |
| T1006 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.2214876440 |
|
|
Jun 25 07:50:01 PM PDT 24 |
Jun 25 07:58:36 PM PDT 24 |
3909753415 ps |
| T754 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.685886353 |
|
|
Jun 25 08:16:58 PM PDT 24 |
Jun 25 08:25:41 PM PDT 24 |
5710079472 ps |
| T105 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.559212278 |
|
|
Jun 25 08:07:47 PM PDT 24 |
Jun 25 08:48:48 PM PDT 24 |
14907234213 ps |
| T734 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.4265029126 |
|
|
Jun 25 08:14:26 PM PDT 24 |
Jun 25 08:20:35 PM PDT 24 |
3257613496 ps |
| T1007 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.2245071118 |
|
|
Jun 25 07:56:51 PM PDT 24 |
Jun 25 08:19:19 PM PDT 24 |
10772579317 ps |
| T1008 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.705194844 |
|
|
Jun 25 07:48:48 PM PDT 24 |
Jun 25 08:04:01 PM PDT 24 |
5817880660 ps |
| T1009 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.2828530676 |
|
|
Jun 25 07:37:27 PM PDT 24 |
Jun 25 07:48:32 PM PDT 24 |
4195012518 ps |
| T159 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.379556908 |
|
|
Jun 25 07:55:41 PM PDT 24 |
Jun 25 08:06:20 PM PDT 24 |
5088329116 ps |
| T685 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.2285954055 |
|
|
Jun 25 08:14:59 PM PDT 24 |
Jun 25 08:30:44 PM PDT 24 |
6551410320 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.2783748156 |
|
|
Jun 25 08:03:40 PM PDT 24 |
Jun 25 08:35:35 PM PDT 24 |
6137666116 ps |
| T765 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.109531804 |
|
|
Jun 25 08:15:49 PM PDT 24 |
Jun 25 08:23:04 PM PDT 24 |
3890436284 ps |
| T352 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.2014848747 |
|
|
Jun 25 08:11:39 PM PDT 24 |
Jun 25 08:24:31 PM PDT 24 |
6393055726 ps |
| T1011 |
/workspace/coverage/default/1.chip_sival_flash_info_access.1574529153 |
|
|
Jun 25 07:46:30 PM PDT 24 |
Jun 25 07:51:38 PM PDT 24 |
2684641598 ps |
| T1012 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3212480744 |
|
|
Jun 25 08:08:21 PM PDT 24 |
Jun 25 08:28:16 PM PDT 24 |
8264558105 ps |
| T645 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.3920756065 |
|
|
Jun 25 07:44:53 PM PDT 24 |
Jun 25 07:46:45 PM PDT 24 |
2173133030 ps |
| T1013 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3932344123 |
|
|
Jun 25 07:47:23 PM PDT 24 |
Jun 25 07:57:19 PM PDT 24 |
4001985853 ps |
| T1014 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.2287364224 |
|
|
Jun 25 08:03:57 PM PDT 24 |
Jun 25 09:09:48 PM PDT 24 |
15132518808 ps |
| T176 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.3600604574 |
|
|
Jun 25 07:54:08 PM PDT 24 |
Jun 25 08:12:14 PM PDT 24 |
10157955195 ps |
| T501 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.4120178208 |
|
|
Jun 25 07:51:08 PM PDT 24 |
Jun 25 08:05:20 PM PDT 24 |
4426419016 ps |
| T1015 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.3927189122 |
|
|
Jun 25 08:08:36 PM PDT 24 |
Jun 25 08:18:01 PM PDT 24 |
4843125462 ps |
| T1016 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.2766820297 |
|
|
Jun 25 07:46:54 PM PDT 24 |
Jun 25 08:59:48 PM PDT 24 |
15275332696 ps |
| T1017 |
/workspace/coverage/default/1.rom_e2e_static_critical.2852301223 |
|
|
Jun 25 08:02:20 PM PDT 24 |
Jun 25 09:16:51 PM PDT 24 |
17267114402 ps |
| T692 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.1686377816 |
|
|
Jun 25 08:14:39 PM PDT 24 |
Jun 25 08:21:58 PM PDT 24 |
3919491904 ps |
| T6 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.1943337346 |
|
|
Jun 25 07:39:08 PM PDT 24 |
Jun 25 07:44:25 PM PDT 24 |
4980055984 ps |