Line Coverage for Module :
rv_plic
| Line No. | Total | Covered | Percent |
TOTAL | | 575 | 574 | 99.83 |
CONT_ASSIGN | 74 | 1 | 1 | 100.00 |
ALWAYS | 77 | 4 | 4 | 100.00 |
ALWAYS | 83 | 4 | 4 | 100.00 |
CONT_ASSIGN | 99 | 1 | 1 | 100.00 |
CONT_ASSIGN | 100 | 1 | 1 | 100.00 |
CONT_ASSIGN | 101 | 1 | 1 | 100.00 |
CONT_ASSIGN | 102 | 1 | 1 | 100.00 |
CONT_ASSIGN | 103 | 1 | 1 | 100.00 |
CONT_ASSIGN | 104 | 1 | 1 | 100.00 |
CONT_ASSIGN | 105 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
CONT_ASSIGN | 107 | 1 | 1 | 100.00 |
CONT_ASSIGN | 108 | 1 | 1 | 100.00 |
CONT_ASSIGN | 109 | 1 | 1 | 100.00 |
CONT_ASSIGN | 110 | 1 | 1 | 100.00 |
CONT_ASSIGN | 111 | 1 | 1 | 100.00 |
CONT_ASSIGN | 112 | 1 | 1 | 100.00 |
CONT_ASSIGN | 113 | 1 | 1 | 100.00 |
CONT_ASSIGN | 114 | 1 | 1 | 100.00 |
CONT_ASSIGN | 115 | 1 | 1 | 100.00 |
CONT_ASSIGN | 116 | 1 | 1 | 100.00 |
CONT_ASSIGN | 117 | 1 | 1 | 100.00 |
CONT_ASSIGN | 118 | 1 | 1 | 100.00 |
CONT_ASSIGN | 119 | 1 | 1 | 100.00 |
CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
CONT_ASSIGN | 121 | 1 | 1 | 100.00 |
CONT_ASSIGN | 122 | 1 | 1 | 100.00 |
CONT_ASSIGN | 123 | 1 | 1 | 100.00 |
CONT_ASSIGN | 124 | 1 | 1 | 100.00 |
CONT_ASSIGN | 125 | 1 | 1 | 100.00 |
CONT_ASSIGN | 126 | 1 | 1 | 100.00 |
CONT_ASSIGN | 127 | 1 | 1 | 100.00 |
CONT_ASSIGN | 128 | 1 | 1 | 100.00 |
CONT_ASSIGN | 129 | 1 | 1 | 100.00 |
CONT_ASSIGN | 130 | 1 | 1 | 100.00 |
CONT_ASSIGN | 131 | 1 | 1 | 100.00 |
CONT_ASSIGN | 132 | 1 | 1 | 100.00 |
CONT_ASSIGN | 133 | 1 | 1 | 100.00 |
CONT_ASSIGN | 134 | 1 | 1 | 100.00 |
CONT_ASSIGN | 135 | 1 | 1 | 100.00 |
CONT_ASSIGN | 136 | 1 | 1 | 100.00 |
CONT_ASSIGN | 137 | 1 | 1 | 100.00 |
CONT_ASSIGN | 138 | 1 | 1 | 100.00 |
CONT_ASSIGN | 139 | 1 | 1 | 100.00 |
CONT_ASSIGN | 140 | 1 | 1 | 100.00 |
CONT_ASSIGN | 141 | 1 | 1 | 100.00 |
CONT_ASSIGN | 142 | 1 | 1 | 100.00 |
CONT_ASSIGN | 143 | 1 | 1 | 100.00 |
CONT_ASSIGN | 144 | 1 | 1 | 100.00 |
CONT_ASSIGN | 145 | 1 | 1 | 100.00 |
CONT_ASSIGN | 146 | 1 | 1 | 100.00 |
CONT_ASSIGN | 147 | 1 | 1 | 100.00 |
CONT_ASSIGN | 148 | 1 | 1 | 100.00 |
CONT_ASSIGN | 149 | 1 | 1 | 100.00 |
CONT_ASSIGN | 150 | 1 | 1 | 100.00 |
CONT_ASSIGN | 151 | 1 | 1 | 100.00 |
CONT_ASSIGN | 152 | 1 | 1 | 100.00 |
CONT_ASSIGN | 153 | 1 | 1 | 100.00 |
CONT_ASSIGN | 154 | 1 | 1 | 100.00 |
CONT_ASSIGN | 155 | 1 | 1 | 100.00 |
CONT_ASSIGN | 156 | 1 | 1 | 100.00 |
CONT_ASSIGN | 157 | 1 | 1 | 100.00 |
CONT_ASSIGN | 158 | 1 | 1 | 100.00 |
CONT_ASSIGN | 159 | 1 | 1 | 100.00 |
CONT_ASSIGN | 160 | 1 | 1 | 100.00 |
CONT_ASSIGN | 161 | 1 | 1 | 100.00 |
CONT_ASSIGN | 162 | 1 | 1 | 100.00 |
CONT_ASSIGN | 163 | 1 | 1 | 100.00 |
CONT_ASSIGN | 164 | 1 | 1 | 100.00 |
CONT_ASSIGN | 165 | 1 | 1 | 100.00 |
CONT_ASSIGN | 166 | 1 | 1 | 100.00 |
CONT_ASSIGN | 167 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 169 | 1 | 1 | 100.00 |
CONT_ASSIGN | 170 | 1 | 1 | 100.00 |
CONT_ASSIGN | 171 | 1 | 1 | 100.00 |
CONT_ASSIGN | 172 | 1 | 1 | 100.00 |
CONT_ASSIGN | 173 | 1 | 1 | 100.00 |
CONT_ASSIGN | 174 | 1 | 1 | 100.00 |
CONT_ASSIGN | 175 | 1 | 1 | 100.00 |
CONT_ASSIGN | 176 | 1 | 1 | 100.00 |
CONT_ASSIGN | 177 | 1 | 1 | 100.00 |
CONT_ASSIGN | 178 | 1 | 1 | 100.00 |
CONT_ASSIGN | 179 | 1 | 1 | 100.00 |
CONT_ASSIGN | 180 | 1 | 1 | 100.00 |
CONT_ASSIGN | 181 | 1 | 1 | 100.00 |
CONT_ASSIGN | 182 | 1 | 1 | 100.00 |
CONT_ASSIGN | 183 | 1 | 1 | 100.00 |
CONT_ASSIGN | 184 | 1 | 1 | 100.00 |
CONT_ASSIGN | 185 | 1 | 1 | 100.00 |
CONT_ASSIGN | 186 | 1 | 1 | 100.00 |
CONT_ASSIGN | 187 | 1 | 1 | 100.00 |
CONT_ASSIGN | 188 | 1 | 1 | 100.00 |
CONT_ASSIGN | 189 | 1 | 1 | 100.00 |
CONT_ASSIGN | 190 | 1 | 1 | 100.00 |
CONT_ASSIGN | 191 | 1 | 1 | 100.00 |
CONT_ASSIGN | 192 | 1 | 1 | 100.00 |
CONT_ASSIGN | 193 | 1 | 1 | 100.00 |
CONT_ASSIGN | 194 | 1 | 1 | 100.00 |
CONT_ASSIGN | 195 | 1 | 1 | 100.00 |
CONT_ASSIGN | 196 | 1 | 1 | 100.00 |
CONT_ASSIGN | 197 | 1 | 1 | 100.00 |
CONT_ASSIGN | 198 | 1 | 1 | 100.00 |
CONT_ASSIGN | 199 | 1 | 1 | 100.00 |
CONT_ASSIGN | 200 | 1 | 1 | 100.00 |
CONT_ASSIGN | 201 | 1 | 1 | 100.00 |
CONT_ASSIGN | 202 | 1 | 1 | 100.00 |
CONT_ASSIGN | 203 | 1 | 1 | 100.00 |
CONT_ASSIGN | 204 | 1 | 1 | 100.00 |
CONT_ASSIGN | 205 | 1 | 1 | 100.00 |
CONT_ASSIGN | 206 | 1 | 1 | 100.00 |
CONT_ASSIGN | 207 | 1 | 1 | 100.00 |
CONT_ASSIGN | 208 | 1 | 1 | 100.00 |
CONT_ASSIGN | 209 | 1 | 1 | 100.00 |
CONT_ASSIGN | 210 | 1 | 1 | 100.00 |
CONT_ASSIGN | 211 | 1 | 1 | 100.00 |
CONT_ASSIGN | 212 | 1 | 1 | 100.00 |
CONT_ASSIGN | 213 | 1 | 1 | 100.00 |
CONT_ASSIGN | 214 | 1 | 1 | 100.00 |
CONT_ASSIGN | 215 | 1 | 1 | 100.00 |
CONT_ASSIGN | 216 | 1 | 1 | 100.00 |
CONT_ASSIGN | 217 | 1 | 1 | 100.00 |
CONT_ASSIGN | 218 | 1 | 1 | 100.00 |
CONT_ASSIGN | 219 | 1 | 1 | 100.00 |
CONT_ASSIGN | 220 | 1 | 1 | 100.00 |
CONT_ASSIGN | 221 | 1 | 1 | 100.00 |
CONT_ASSIGN | 222 | 1 | 1 | 100.00 |
CONT_ASSIGN | 223 | 1 | 1 | 100.00 |
CONT_ASSIGN | 224 | 1 | 1 | 100.00 |
CONT_ASSIGN | 225 | 1 | 1 | 100.00 |
CONT_ASSIGN | 226 | 1 | 1 | 100.00 |
CONT_ASSIGN | 227 | 1 | 1 | 100.00 |
CONT_ASSIGN | 228 | 1 | 1 | 100.00 |
CONT_ASSIGN | 229 | 1 | 1 | 100.00 |
CONT_ASSIGN | 230 | 1 | 1 | 100.00 |
CONT_ASSIGN | 231 | 1 | 1 | 100.00 |
CONT_ASSIGN | 232 | 1 | 1 | 100.00 |
CONT_ASSIGN | 233 | 1 | 1 | 100.00 |
CONT_ASSIGN | 234 | 1 | 1 | 100.00 |
CONT_ASSIGN | 235 | 1 | 1 | 100.00 |
CONT_ASSIGN | 236 | 1 | 1 | 100.00 |
CONT_ASSIGN | 237 | 1 | 1 | 100.00 |
CONT_ASSIGN | 238 | 1 | 1 | 100.00 |
CONT_ASSIGN | 239 | 1 | 1 | 100.00 |
CONT_ASSIGN | 240 | 1 | 1 | 100.00 |
CONT_ASSIGN | 241 | 1 | 1 | 100.00 |
CONT_ASSIGN | 242 | 1 | 1 | 100.00 |
CONT_ASSIGN | 243 | 1 | 1 | 100.00 |
CONT_ASSIGN | 244 | 1 | 1 | 100.00 |
CONT_ASSIGN | 245 | 1 | 1 | 100.00 |
CONT_ASSIGN | 246 | 1 | 1 | 100.00 |
CONT_ASSIGN | 247 | 1 | 1 | 100.00 |
CONT_ASSIGN | 248 | 1 | 1 | 100.00 |
CONT_ASSIGN | 249 | 1 | 1 | 100.00 |
CONT_ASSIGN | 250 | 1 | 1 | 100.00 |
CONT_ASSIGN | 251 | 1 | 1 | 100.00 |
CONT_ASSIGN | 252 | 1 | 1 | 100.00 |
CONT_ASSIGN | 253 | 1 | 1 | 100.00 |
CONT_ASSIGN | 254 | 1 | 1 | 100.00 |
CONT_ASSIGN | 255 | 1 | 1 | 100.00 |
CONT_ASSIGN | 256 | 1 | 1 | 100.00 |
CONT_ASSIGN | 257 | 1 | 1 | 100.00 |
CONT_ASSIGN | 258 | 1 | 1 | 100.00 |
CONT_ASSIGN | 259 | 1 | 1 | 100.00 |
CONT_ASSIGN | 260 | 1 | 1 | 100.00 |
CONT_ASSIGN | 261 | 1 | 1 | 100.00 |
CONT_ASSIGN | 262 | 1 | 1 | 100.00 |
CONT_ASSIGN | 263 | 1 | 1 | 100.00 |
CONT_ASSIGN | 264 | 1 | 1 | 100.00 |
CONT_ASSIGN | 265 | 1 | 1 | 100.00 |
CONT_ASSIGN | 266 | 1 | 1 | 100.00 |
CONT_ASSIGN | 267 | 1 | 1 | 100.00 |
CONT_ASSIGN | 268 | 1 | 1 | 100.00 |
CONT_ASSIGN | 269 | 1 | 1 | 100.00 |
CONT_ASSIGN | 270 | 1 | 1 | 100.00 |
CONT_ASSIGN | 271 | 1 | 1 | 100.00 |
CONT_ASSIGN | 272 | 1 | 1 | 100.00 |
CONT_ASSIGN | 273 | 1 | 1 | 100.00 |
CONT_ASSIGN | 274 | 1 | 1 | 100.00 |
CONT_ASSIGN | 275 | 1 | 1 | 100.00 |
CONT_ASSIGN | 276 | 1 | 1 | 100.00 |
CONT_ASSIGN | 277 | 1 | 1 | 100.00 |
CONT_ASSIGN | 278 | 1 | 1 | 100.00 |
CONT_ASSIGN | 279 | 1 | 1 | 100.00 |
CONT_ASSIGN | 280 | 1 | 1 | 100.00 |
CONT_ASSIGN | 281 | 1 | 1 | 100.00 |
CONT_ASSIGN | 282 | 1 | 1 | 100.00 |
CONT_ASSIGN | 283 | 1 | 1 | 100.00 |
CONT_ASSIGN | 284 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 290 | 1 | 1 | 100.00 |
CONT_ASSIGN | 296 | 1 | 1 | 100.00 |
CONT_ASSIGN | 301 | 1 | 1 | 100.00 |
CONT_ASSIGN | 302 | 1 | 1 | 100.00 |
CONT_ASSIGN | 303 | 1 | 1 | 100.00 |
CONT_ASSIGN | 304 | 1 | 1 | 100.00 |
CONT_ASSIGN | 305 | 1 | 1 | 100.00 |
CONT_ASSIGN | 310 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 0 | 0.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 317 | 1 | 1 | 100.00 |
CONT_ASSIGN | 379 | 1 | 1 | 100.00 |
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_rv_plic_0/rtl/rv_plic.sv' or '../src/lowrisc_opentitan_top_earlgrey_rv_plic_0/rtl/rv_plic.sv' was not found, so annotated line coverage report could not be generated.
Line No. | Covered | Statements | |
74 |
1 |
1 |
77 |
1 |
1 |
78 |
1 |
1 |
79 |
2 |
2 |
|
|
|
MISSING_ELSE |
83 |
1 |
1 |
84 |
1 |
1 |
85 |
2 |
2 |
|
|
|
MISSING_ELSE |
99 |
1 |
1 |
100 |
1 |
1 |
101 |
1 |
1 |
102 |
1 |
1 |
103 |
1 |
1 |
104 |
1 |
1 |
105 |
1 |
1 |
106 |
1 |
1 |
107 |
1 |
1 |
108 |
1 |
1 |
109 |
1 |
1 |
110 |
1 |
1 |
111 |
1 |
1 |
112 |
1 |
1 |
113 |
1 |
1 |
114 |
1 |
1 |
115 |
1 |
1 |
116 |
1 |
1 |
117 |
1 |
1 |
118 |
1 |
1 |
119 |
1 |
1 |
120 |
1 |
1 |
121 |
1 |
1 |
122 |
1 |
1 |
123 |
1 |
1 |
124 |
1 |
1 |
125 |
1 |
1 |
126 |
1 |
1 |
127 |
1 |
1 |
128 |
1 |
1 |
129 |
1 |
1 |
130 |
1 |
1 |
131 |
1 |
1 |
132 |
1 |
1 |
133 |
1 |
1 |
134 |
1 |
1 |
135 |
1 |
1 |
136 |
1 |
1 |
137 |
1 |
1 |
138 |
1 |
1 |
139 |
1 |
1 |
140 |
1 |
1 |
141 |
1 |
1 |
142 |
1 |
1 |
143 |
1 |
1 |
144 |
1 |
1 |
145 |
1 |
1 |
146 |
1 |
1 |
147 |
1 |
1 |
148 |
1 |
1 |
149 |
1 |
1 |
150 |
1 |
1 |
151 |
1 |
1 |
152 |
1 |
1 |
153 |
1 |
1 |
154 |
1 |
1 |
155 |
1 |
1 |
156 |
1 |
1 |
157 |
1 |
1 |
158 |
1 |
1 |
159 |
1 |
1 |
160 |
1 |
1 |
161 |
1 |
1 |
162 |
1 |
1 |
163 |
1 |
1 |
164 |
1 |
1 |
165 |
1 |
1 |
166 |
1 |
1 |
167 |
1 |
1 |
168 |
1 |
1 |
169 |
1 |
1 |
170 |
1 |
1 |
171 |
1 |
1 |
172 |
1 |
1 |
173 |
1 |
1 |
174 |
1 |
1 |
175 |
1 |
1 |
176 |
1 |
1 |
177 |
1 |
1 |
178 |
1 |
1 |
179 |
1 |
1 |
180 |
1 |
1 |
181 |
1 |
1 |
182 |
1 |
1 |
183 |
1 |
1 |
184 |
1 |
1 |
185 |
1 |
1 |
186 |
1 |
1 |
187 |
1 |
1 |
188 |
1 |
1 |
189 |
1 |
1 |
190 |
1 |
1 |
191 |
1 |
1 |
192 |
1 |
1 |
193 |
1 |
1 |
194 |
1 |
1 |
195 |
1 |
1 |
196 |
1 |
1 |
197 |
1 |
1 |
198 |
1 |
1 |
199 |
1 |
1 |
200 |
1 |
1 |
201 |
1 |
1 |
202 |
1 |
1 |
203 |
1 |
1 |
204 |
1 |
1 |
205 |
1 |
1 |
206 |
1 |
1 |
207 |
1 |
1 |
208 |
1 |
1 |
209 |
1 |
1 |
210 |
1 |
1 |
211 |
1 |
1 |
212 |
1 |
1 |
213 |
1 |
1 |
214 |
1 |
1 |
215 |
1 |
1 |
216 |
1 |
1 |
217 |
1 |
1 |
218 |
1 |
1 |
219 |
1 |
1 |
220 |
1 |
1 |
221 |
1 |
1 |
222 |
1 |
1 |
223 |
1 |
1 |
224 |
1 |
1 |
225 |
1 |
1 |
226 |
1 |
1 |
227 |
1 |
1 |
228 |
1 |
1 |
229 |
1 |
1 |
230 |
1 |
1 |
231 |
1 |
1 |
232 |
1 |
1 |
233 |
1 |
1 |
234 |
1 |
1 |
235 |
1 |
1 |
236 |
1 |
1 |
237 |
1 |
1 |
238 |
1 |
1 |
239 |
1 |
1 |
240 |
1 |
1 |
241 |
1 |
1 |
242 |
1 |
1 |
243 |
1 |
1 |
244 |
1 |
1 |
245 |
1 |
1 |
246 |
1 |
1 |
247 |
1 |
1 |
248 |
1 |
1 |
249 |
1 |
1 |
250 |
1 |
1 |
251 |
1 |
1 |
252 |
1 |
1 |
253 |
1 |
1 |
254 |
1 |
1 |
255 |
1 |
1 |
256 |
1 |
1 |
257 |
1 |
1 |
258 |
1 |
1 |
259 |
1 |
1 |
260 |
1 |
1 |
261 |
1 |
1 |
262 |
1 |
1 |
263 |
1 |
1 |
264 |
1 |
1 |
265 |
1 |
1 |
266 |
1 |
1 |
267 |
1 |
1 |
268 |
1 |
1 |
269 |
1 |
1 |
270 |
1 |
1 |
271 |
1 |
1 |
272 |
1 |
1 |
273 |
1 |
1 |
274 |
1 |
1 |
275 |
1 |
1 |
276 |
1 |
1 |
277 |
1 |
1 |
278 |
1 |
1 |
279 |
1 |
1 |
280 |
1 |
1 |
281 |
1 |
1 |
282 |
1 |
1 |
283 |
1 |
1 |
284 |
1 |
1 |
290 |
186 |
186 |
296 |
1 |
1 |
301 |
1 |
1 |
302 |
1 |
1 |
303 |
1 |
1 |
304 |
1 |
1 |
305 |
1 |
1 |
310 |
1 |
1 |
317 |
185 |
186 |
379 |
1 |
1 |
Cond Coverage for Module :
rv_plic
| Total | Covered | Percent |
Conditions | 3 | 3 | 100.00 |
Logical | 3 | 3 | 100.00 |
Non-Logical | 0 | 0 | |
Event | 0 | 0 | |
LINE 379
SUB-EXPRESSION (reg2hw.alert_test.q & reg2hw.alert_test.qe)
---------1--------- ----------2---------
-1- | -2- | Status | Tests |
0 | 1 | Covered | T214 |
1 | 0 | Covered | T4,T15,T16 |
1 | 1 | Covered | T61,T62,T63 |
Toggle Coverage for Module :
rv_plic
| Total | Covered | Percent |
Totals |
33 |
33 |
100.00 |
Total Bits |
716 |
716 |
100.00 |
Total Bits 0->1 |
358 |
358 |
100.00 |
Total Bits 1->0 |
358 |
358 |
100.00 |
| | | |
Ports |
33 |
33 |
100.00 |
Port Bits |
716 |
716 |
100.00 |
Port Bits 0->1 |
358 |
358 |
100.00 |
Port Bits 1->0 |
358 |
358 |
100.00 |
Port Details
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i |
Yes |
Yes |
T4,T5,T6 |
Yes |
T4,T5,T6 |
INPUT |
rst_ni |
Yes |
Yes |
T4,T5,T44 |
Yes |
T4,T5,T6 |
INPUT |
tl_i.d_ready |
Yes |
Yes |
T4,T5,T44 |
Yes |
T4,T5,T6 |
INPUT |
tl_i.a_user.data_intg[6:0] |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
INPUT |
tl_i.a_user.cmd_intg[6:0] |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
INPUT |
tl_i.a_user.instr_type[3:0] |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
INPUT |
tl_i.a_user.rsvd[4:0] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_data[31:0] |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
INPUT |
tl_i.a_mask[3:0] |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
INPUT |
tl_i.a_address[27:0] |
Yes |
Yes |
*T84,*T85,*T134 |
Yes |
T84,T85,T134 |
INPUT |
tl_i.a_address[29:28] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_address[30] |
Yes |
Yes |
*T4,*T15,*T16 |
Yes |
T4,T15,T16 |
INPUT |
tl_i.a_address[31] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_source[5:0] |
Yes |
Yes |
*T214,*T83,*T84 |
Yes |
T214,T83,T84 |
INPUT |
tl_i.a_source[7:6] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_size[1:0] |
Yes |
Yes |
T83,T84,T85 |
Yes |
T83,T84,T85 |
INPUT |
tl_i.a_param[2:0] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
tl_i.a_opcode[2:0] |
Yes |
Yes |
T84,T85,T134 |
Yes |
T84,T85,T134 |
INPUT |
tl_i.a_valid |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
INPUT |
tl_o.a_ready |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
OUTPUT |
tl_o.d_error |
Yes |
Yes |
T84,T85,T134 |
Yes |
T84,T85,T134 |
OUTPUT |
tl_o.d_user.data_intg[6:0] |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
OUTPUT |
tl_o.d_user.rsp_intg[6:0] |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
OUTPUT |
tl_o.d_data[31:0] |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
OUTPUT |
tl_o.d_sink |
Yes |
Yes |
T84,T85,T135 |
Yes |
T84,T85,T135 |
OUTPUT |
tl_o.d_source[5:0] |
Yes |
Yes |
*T214,*T84,*T85 |
Yes |
T214,T84,T85 |
OUTPUT |
tl_o.d_source[7:6] |
Unreachable |
Unreachable |
|
Unreachable |
|
OUTPUT |
tl_o.d_size[1:0] |
Yes |
Yes |
T84,T85,T134 |
Yes |
T84,T85,T134 |
OUTPUT |
tl_o.d_param[2:0] |
Unreachable |
Unreachable |
|
Unreachable |
|
OUTPUT |
tl_o.d_opcode[0] |
Yes |
Yes |
*T4,*T15,*T16 |
Yes |
T4,T15,T16 |
OUTPUT |
tl_o.d_opcode[2:1] |
Unreachable |
Unreachable |
|
Unreachable |
|
OUTPUT |
tl_o.d_valid |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
OUTPUT |
intr_src_i[0] |
Unreachable |
Unreachable |
|
Unreachable |
|
INPUT |
intr_src_i[185:1] |
Yes |
Yes |
T232,T91,T341 |
Yes |
T232,T91,T341 |
INPUT |
alert_rx_i[0].ack_n |
Yes |
Yes |
T4,T5,T6 |
Yes |
T4,T5,T6 |
INPUT |
alert_rx_i[0].ack_p |
Yes |
Yes |
T61,T62,T428 |
Yes |
T61,T62,T428 |
INPUT |
alert_rx_i[0].ping_n |
Yes |
Yes |
T88,T89,T90 |
Yes |
T88,T89,T90 |
INPUT |
alert_rx_i[0].ping_p |
Yes |
Yes |
T88,T89,T90 |
Yes |
T88,T89,T90 |
INPUT |
alert_tx_o[0].alert_n |
Yes |
Yes |
T4,T5,T6 |
Yes |
T4,T5,T6 |
OUTPUT |
alert_tx_o[0].alert_p |
Yes |
Yes |
T61,T62,T428 |
Yes |
T61,T62,T428 |
OUTPUT |
irq_o |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
OUTPUT |
irq_id_o[0][0] |
Yes |
Yes |
T15,T16,T65 |
Yes |
T15,T16,T65 |
OUTPUT |
irq_id_o[0][1] |
Yes |
Yes |
T4,T15,T16 |
Yes |
T4,T15,T16 |
OUTPUT |
irq_id_o[0][2] |
Yes |
Yes |
T15,T16,T68 |
Yes |
T15,T16,T68 |
OUTPUT |
irq_id_o[0][3] |
Yes |
Yes |
T15,T16,T65 |
Yes |
T15,T16,T65 |
OUTPUT |
irq_id_o[0][4] |
Yes |
Yes |
T15,T16,T65 |
Yes |
T15,T16,T65 |
OUTPUT |
irq_id_o[0][5] |
Yes |
Yes |
T68,T132,T69 |
Yes |
T68,T132,T69 |
OUTPUT |
irq_id_o[0][6] |
Yes |
Yes |
T68,T69,T177 |
Yes |
T68,T69,T177 |
OUTPUT |
irq_id_o[0][7] |
Yes |
Yes |
T4,T65,T329 |
Yes |
T4,T65,T329 |
OUTPUT |
msip_o |
Yes |
Yes |
T262,T263,T264 |
Yes |
T262,T263,T264 |
OUTPUT |
*Tests covering at least one bit in the range
Branch Coverage for Module :
rv_plic
| Line No. | Total | Covered | Percent |
Branches |
|
4 |
4 |
100.00 |
IF |
79 |
2 |
2 |
100.00 |
IF |
85 |
2 |
2 |
100.00 |
WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_rv_plic_0/rtl/rv_plic.sv' or '../src/lowrisc_opentitan_top_earlgrey_rv_plic_0/rtl/rv_plic.sv was not found/opened, so annotated branch coverage report could not be generated.
LineNo. Expression
-1-: 79 if (claim_re[i])
Branches:
-1- | Status | Tests |
1 |
Covered |
T4,T15,T16 |
0 |
Covered |
T4,T15,T16 |
LineNo. Expression
-1-: 85 if (complete_we[i])
Branches:
-1- | Status | Tests |
1 |
Covered |
T4,T15,T16 |
0 |
Covered |
T4,T15,T16 |
Assert Coverage for Module :
rv_plic
Assertion Details
FpvSecCmBusIntegrity_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
516738293 |
0 |
0 |
0 |
FpvSecCmRegWeOnehotCheck_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
516738293 |
1 |
0 |
0 |
T88 |
452876 |
0 |
0 |
0 |
T428 |
237268 |
1 |
0 |
0 |
T429 |
850550 |
0 |
0 |
0 |
T430 |
931085 |
0 |
0 |
0 |
T431 |
202835 |
0 |
0 |
0 |
T432 |
224268 |
0 |
0 |
0 |
T433 |
130432 |
0 |
0 |
0 |
T434 |
209841 |
0 |
0 |
0 |
T435 |
337099 |
0 |
0 |
0 |
T436 |
128461 |
0 |
0 |
0 |
Irq0Tied_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
516738293 |
516631474 |
0 |
0 |
T4 |
278828 |
278711 |
0 |
0 |
T5 |
862854 |
862741 |
0 |
0 |
T6 |
204222 |
204171 |
0 |
0 |
T15 |
213648 |
213597 |
0 |
0 |
T16 |
152738 |
152680 |
0 |
0 |
T44 |
199003 |
198887 |
0 |
0 |
T45 |
217490 |
217377 |
0 |
0 |
T92 |
69384 |
69326 |
0 |
0 |
T93 |
90956 |
90901 |
0 |
0 |
T94 |
89313 |
89251 |
0 |
0 |
IrqKnownO_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
516738293 |
516631474 |
0 |
0 |
T4 |
278828 |
278711 |
0 |
0 |
T5 |
862854 |
862741 |
0 |
0 |
T6 |
204222 |
204171 |
0 |
0 |
T15 |
213648 |
213597 |
0 |
0 |
T16 |
152738 |
152680 |
0 |
0 |
T44 |
199003 |
198887 |
0 |
0 |
T45 |
217490 |
217377 |
0 |
0 |
T92 |
69384 |
69326 |
0 |
0 |
T93 |
90956 |
90901 |
0 |
0 |
T94 |
89313 |
89251 |
0 |
0 |
MsipKnownO_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
516738293 |
516631474 |
0 |
0 |
T4 |
278828 |
278711 |
0 |
0 |
T5 |
862854 |
862741 |
0 |
0 |
T6 |
204222 |
204171 |
0 |
0 |
T15 |
213648 |
213597 |
0 |
0 |
T16 |
152738 |
152680 |
0 |
0 |
T44 |
199003 |
198887 |
0 |
0 |
T45 |
217490 |
217377 |
0 |
0 |
T92 |
69384 |
69326 |
0 |
0 |
T93 |
90956 |
90901 |
0 |
0 |
T94 |
89313 |
89251 |
0 |
0 |
TlAReadyKnownO_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
516738293 |
516631474 |
0 |
0 |
T4 |
278828 |
278711 |
0 |
0 |
T5 |
862854 |
862741 |
0 |
0 |
T6 |
204222 |
204171 |
0 |
0 |
T15 |
213648 |
213597 |
0 |
0 |
T16 |
152738 |
152680 |
0 |
0 |
T44 |
199003 |
198887 |
0 |
0 |
T45 |
217490 |
217377 |
0 |
0 |
T92 |
69384 |
69326 |
0 |
0 |
T93 |
90956 |
90901 |
0 |
0 |
T94 |
89313 |
89251 |
0 |
0 |
TlDValidKnownO_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
516738293 |
516631474 |
0 |
0 |
T4 |
278828 |
278711 |
0 |
0 |
T5 |
862854 |
862741 |
0 |
0 |
T6 |
204222 |
204171 |
0 |
0 |
T15 |
213648 |
213597 |
0 |
0 |
T16 |
152738 |
152680 |
0 |
0 |
T44 |
199003 |
198887 |
0 |
0 |
T45 |
217490 |
217377 |
0 |
0 |
T92 |
69384 |
69326 |
0 |
0 |
T93 |
90956 |
90901 |
0 |
0 |
T94 |
89313 |
89251 |
0 |
0 |
gen_irq_id_known[0].IrqIdKnownO_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
516738293 |
516631474 |
0 |
0 |
T4 |
278828 |
278711 |
0 |
0 |
T5 |
862854 |
862741 |
0 |
0 |
T6 |
204222 |
204171 |
0 |
0 |
T15 |
213648 |
213597 |
0 |
0 |
T16 |
152738 |
152680 |
0 |
0 |
T44 |
199003 |
198887 |
0 |
0 |
T45 |
217490 |
217377 |
0 |
0 |
T92 |
69384 |
69326 |
0 |
0 |
T93 |
90956 |
90901 |
0 |
0 |
T94 |
89313 |
89251 |
0 |
0 |
onehot0Claim
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
516738293 |
516631474 |
0 |
0 |
T4 |
278828 |
278711 |
0 |
0 |
T5 |
862854 |
862741 |
0 |
0 |
T6 |
204222 |
204171 |
0 |
0 |
T15 |
213648 |
213597 |
0 |
0 |
T16 |
152738 |
152680 |
0 |
0 |
T44 |
199003 |
198887 |
0 |
0 |
T45 |
217490 |
217377 |
0 |
0 |
T92 |
69384 |
69326 |
0 |
0 |
T93 |
90956 |
90901 |
0 |
0 |
T94 |
89313 |
89251 |
0 |
0 |
onehot0Complete
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
516738293 |
516631474 |
0 |
0 |
T4 |
278828 |
278711 |
0 |
0 |
T5 |
862854 |
862741 |
0 |
0 |
T6 |
204222 |
204171 |
0 |
0 |
T15 |
213648 |
213597 |
0 |
0 |
T16 |
152738 |
152680 |
0 |
0 |
T44 |
199003 |
198887 |
0 |
0 |
T45 |
217490 |
217377 |
0 |
0 |
T92 |
69384 |
69326 |
0 |
0 |
T93 |
90956 |
90901 |
0 |
0 |
T94 |
89313 |
89251 |
0 |
0 |