SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.00 | 85.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.19 | 85.19 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.19 | 85.19 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.19 | 85.19 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.22 | 90.32 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9360 | 85.00 |
Total Bits 0->1 | 5506 | 4694 | 85.25 |
Total Bits 1->0 | 5506 | 4666 | 84.74 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9360 | 85.00 |
Port Bits 0->1 | 5506 | 4694 | 85.25 |
Port Bits 1->0 | 5506 | 4666 | 84.74 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_ni | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_edn_ni | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
edn_o.edn_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
edn_i.edn_fips | No | No | Yes | T122,T153,T123 | INPUT | |
edn_i.edn_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T80,*T81,*T82 | Yes | T80,T81,T82 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T5,*T83,*T84 | Yes | T5,T83,T84 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T5,*T83,*T154 | Yes | T5,T83,T154 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T5,*T20,*T153 | Yes | T5,T20,T153 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T80,*T81,*T82 | Yes | T80,T81,T82 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T80,*T81,*T82 | Yes | T80,T81,T82 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T5,*T83,*T84 | Yes | T5,T83,T84 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T155,T156,T157 | Yes | T155,T156,T157 | OUTPUT |
intr_otp_error_o | Yes | Yes | T155,T156,T157 | Yes | T155,T156,T157 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T62,T90,T91 | Yes | T62,T90,T91 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T90,T91,T92 | Yes | T91,T92,T93 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T91,T92,T93 | Yes | T90,T91,T92 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T6,T65,T66 | Yes | T6,T65,T66 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T90,T91,T92 | Yes | T90,T91,T92 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T90,T91,T92 | Yes | T90,T91,T92 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T158,T118,T62 | Yes | T158,T118,T62 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T90,T91,T93 | Yes | T90,T91,T93 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T90,T91,T93 | Yes | T90,T91,T93 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T159,T160,T62 | Yes | T159,T160,T62 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T90,T91,T92 | Yes | T90,T92,T93 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T90,T92,T93 | Yes | T90,T91,T92 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T62,T90,T91 | Yes | T62,T90,T91 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T90,T91,T92 | Yes | T90,T91,T92 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T90,T91,T92 | Yes | T90,T91,T92 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T62,T90,T91 | Yes | T62,T90,T91 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T6,T65,T66 | Yes | T6,T65,T66 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T158,T118,T62 | Yes | T158,T118,T62 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T159,T160,T62 | Yes | T159,T160,T62 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T62,T90,T91 | Yes | T62,T90,T91 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T4,T6,T30 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
lc_otp_vendor_test_i.ctrl[3:0] | No | No | Yes | T161,T162,T163 | INPUT | |
lc_otp_vendor_test_i.ctrl[4] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[14:5] | No | No | Yes | T162,T163,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[18:15] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[27:19] | No | No | Yes | T163,T162,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[28] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:29] | No | No | Yes | T161,T163,T162 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[3:0] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[4] | No | No | No | INPUT | ||
lc_otp_program_i.count[11:5] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[12] | No | No | No | INPUT | ||
lc_otp_program_i.count[19:13] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT |
lc_otp_program_i.count[20] | No | No | No | INPUT | ||
lc_otp_program_i.count[29:21] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT |
lc_otp_program_i.count[30] | No | No | No | INPUT | ||
lc_otp_program_i.count[35:31] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[36] | No | No | No | INPUT | ||
lc_otp_program_i.count[39:37] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[40] | No | No | No | INPUT | ||
lc_otp_program_i.count[42:41] | Yes | Yes | *T20,T61,T164 | Yes | T20,T167,T83 | INPUT |
lc_otp_program_i.count[43] | No | No | No | INPUT | ||
lc_otp_program_i.count[44] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[45] | No | No | No | INPUT | ||
lc_otp_program_i.count[67:46] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T167,T83 | INPUT |
lc_otp_program_i.count[68] | No | No | No | INPUT | ||
lc_otp_program_i.count[71:69] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[73:72] | No | No | No | INPUT | ||
lc_otp_program_i.count[90:74] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T167,T83 | INPUT |
lc_otp_program_i.count[91] | No | No | No | INPUT | ||
lc_otp_program_i.count[98:92] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T55,T167 | INPUT |
lc_otp_program_i.count[99] | No | No | No | INPUT | ||
lc_otp_program_i.count[102:100] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[103] | No | No | No | INPUT | ||
lc_otp_program_i.count[107:104] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT |
lc_otp_program_i.count[108] | No | No | No | INPUT | ||
lc_otp_program_i.count[109] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T55,T167 | INPUT |
lc_otp_program_i.count[110] | No | No | No | INPUT | ||
lc_otp_program_i.count[113:111] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[114] | No | No | No | INPUT | ||
lc_otp_program_i.count[125:115] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T55,T167 | INPUT |
lc_otp_program_i.count[127:126] | No | No | No | INPUT | ||
lc_otp_program_i.count[131:128] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[134:132] | No | No | No | INPUT | ||
lc_otp_program_i.count[144:135] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[145] | No | No | No | INPUT | ||
lc_otp_program_i.count[150:146] | Yes | Yes | *T166,*T4,*T5 | Yes | T166,T4,T5 | INPUT |
lc_otp_program_i.count[152:151] | No | No | No | INPUT | ||
lc_otp_program_i.count[162:153] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[163] | No | No | No | INPUT | ||
lc_otp_program_i.count[173:164] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[174] | No | No | No | INPUT | ||
lc_otp_program_i.count[177:175] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[178] | No | No | No | INPUT | ||
lc_otp_program_i.count[192:179] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[193] | No | No | No | INPUT | ||
lc_otp_program_i.count[198:194] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[199] | No | No | No | INPUT | ||
lc_otp_program_i.count[200] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[201] | No | No | No | INPUT | ||
lc_otp_program_i.count[222:202] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[223] | No | No | No | INPUT | ||
lc_otp_program_i.count[242:224] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[243] | No | No | No | INPUT | ||
lc_otp_program_i.count[248:244] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[249] | No | No | No | INPUT | ||
lc_otp_program_i.count[254:250] | Yes | Yes | *T166,*T4,*T5 | Yes | T166,T4,T5 | INPUT |
lc_otp_program_i.count[255] | No | No | No | INPUT | ||
lc_otp_program_i.count[275:256] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT |
lc_otp_program_i.count[276] | No | No | No | INPUT | ||
lc_otp_program_i.count[278:277] | Yes | Yes | T166 | Yes | T166 | INPUT |
lc_otp_program_i.count[279] | No | No | No | INPUT | ||
lc_otp_program_i.count[282:280] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[283] | No | No | No | INPUT | ||
lc_otp_program_i.count[286:284] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[287] | No | No | No | INPUT | ||
lc_otp_program_i.count[298:288] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[299] | No | No | No | INPUT | ||
lc_otp_program_i.count[316:300] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[317] | No | No | No | INPUT | ||
lc_otp_program_i.count[319:318] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[320] | No | No | No | INPUT | ||
lc_otp_program_i.count[322:321] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[323] | No | No | No | INPUT | ||
lc_otp_program_i.count[340:324] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[343:341] | No | No | No | INPUT | ||
lc_otp_program_i.count[345:344] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[346] | No | No | No | INPUT | ||
lc_otp_program_i.count[354:347] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[355] | No | No | No | INPUT | ||
lc_otp_program_i.count[367:356] | Yes | Yes | *T166,*T4,*T5 | Yes | T166,T4,T5 | INPUT |
lc_otp_program_i.count[368] | No | No | No | INPUT | ||
lc_otp_program_i.count[371:369] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[372] | No | No | No | INPUT | ||
lc_otp_program_i.count[379:373] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.count[380] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:381] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[1:0] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[3:2] | No | No | No | INPUT | ||
lc_otp_program_i.state[5:4] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[6] | No | No | No | INPUT | ||
lc_otp_program_i.state[16:7] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[17] | No | No | No | INPUT | ||
lc_otp_program_i.state[39:18] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[41:40] | No | No | No | INPUT | ||
lc_otp_program_i.state[48:42] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[49] | No | No | No | INPUT | ||
lc_otp_program_i.state[54:50] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[55] | No | No | No | INPUT | ||
lc_otp_program_i.state[59:56] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T167,T83 | INPUT |
lc_otp_program_i.state[60] | No | No | No | INPUT | ||
lc_otp_program_i.state[67:61] | Yes | Yes | *T20,T61,T164 | Yes | T20,T167,T83 | INPUT |
lc_otp_program_i.state[68] | No | No | No | INPUT | ||
lc_otp_program_i.state[69] | Yes | Yes | *T20,*T61,*T59 | Yes | T20,T59,T70 | INPUT |
lc_otp_program_i.state[70] | No | No | No | INPUT | ||
lc_otp_program_i.state[73:71] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[74] | No | No | No | INPUT | ||
lc_otp_program_i.state[82:75] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT |
lc_otp_program_i.state[83] | No | No | No | INPUT | ||
lc_otp_program_i.state[87:84] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[89:88] | No | No | No | INPUT | ||
lc_otp_program_i.state[105:90] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[106] | No | No | No | INPUT | ||
lc_otp_program_i.state[110:107] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[112:111] | No | No | No | INPUT | ||
lc_otp_program_i.state[115:113] | Yes | Yes | *T20,*T61,*T59 | Yes | T20,T59,T70 | INPUT |
lc_otp_program_i.state[116] | No | No | No | INPUT | ||
lc_otp_program_i.state[130:117] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[131] | No | No | No | INPUT | ||
lc_otp_program_i.state[135:132] | Yes | Yes | *T20,T61,*T59 | Yes | T20,T59,T70 | INPUT |
lc_otp_program_i.state[136] | No | No | No | INPUT | ||
lc_otp_program_i.state[144:137] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT |
lc_otp_program_i.state[145] | No | No | No | INPUT | ||
lc_otp_program_i.state[156:146] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[157] | No | No | No | INPUT | ||
lc_otp_program_i.state[160:158] | Yes | Yes | T20,T61,T59 | Yes | T20,T59,T70 | INPUT |
lc_otp_program_i.state[161] | No | No | No | INPUT | ||
lc_otp_program_i.state[173:162] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[177:174] | No | No | No | INPUT | ||
lc_otp_program_i.state[199:178] | Yes | Yes | *T20,*T61,*T59 | Yes | T20,T59,T70 | INPUT |
lc_otp_program_i.state[201:200] | No | No | No | INPUT | ||
lc_otp_program_i.state[206:202] | Yes | Yes | *T166,*T20,*T61 | Yes | T166,T20,T59 | INPUT |
lc_otp_program_i.state[208:207] | No | No | No | INPUT | ||
lc_otp_program_i.state[221:209] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[222] | No | No | No | INPUT | ||
lc_otp_program_i.state[238:223] | Yes | Yes | *T5,*T20,*T61 | Yes | T5,T20,T59 | INPUT |
lc_otp_program_i.state[239] | No | No | No | INPUT | ||
lc_otp_program_i.state[257:240] | Yes | Yes | *T5,*T20,*T61 | Yes | T5,T20,T59 | INPUT |
lc_otp_program_i.state[258] | No | No | No | INPUT | ||
lc_otp_program_i.state[273:259] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[274] | No | No | No | INPUT | ||
lc_otp_program_i.state[276:275] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.state[277] | No | No | No | INPUT | ||
lc_otp_program_i.state[279:278] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[280] | No | No | No | INPUT | ||
lc_otp_program_i.state[282:281] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[283] | No | No | No | INPUT | ||
lc_otp_program_i.state[286:284] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[288:287] | No | No | No | INPUT | ||
lc_otp_program_i.state[316:289] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT |
lc_otp_program_i.state[317] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:318] | Yes | Yes | T5,T20,T61 | Yes | T5,T20,T59 | INPUT |
lc_otp_program_i.req | Yes | Yes | T5,T20,T61 | Yes | T5,T20,T61 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T5,T20,T61 | Yes | T5,T20,T61 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T168,T169,T170 | Yes | T168,T169,T170 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T6,T65,T66 | Yes | T6,T65,T66 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T5,T20,T59 | Yes | T5,T20,T61 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T95,T19,T65 | Yes | T65,T59,T66 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T171,T167,T172 | Yes | T153,T173,T57 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T4,T5,T20 | Yes | T4,T5,T20 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T5,T95,T96 | Yes | T5,T174,T65 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T171,T167,T172 | Yes | T153,T173,T57 | OUTPUT |
otp_lc_data_o.count[3:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[4] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[11:5] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[12] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[19:13] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[20] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[29:21] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[30] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[35:31] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[36] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[39:37] | Yes | Yes | T61,T164,T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.count[40] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[42:41] | Yes | Yes | T20,*T61,*T164 | Yes | T20,T167,T83 | OUTPUT |
otp_lc_data_o.count[43] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[44] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[45] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[67:46] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T167,T83 | OUTPUT |
otp_lc_data_o.count[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[71:69] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[73:72] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[90:74] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[91] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[98:92] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T55,T167 | OUTPUT |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[102:100] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.count[103] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[107:104] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[108] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[109] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[110] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[113:111] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[114] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[125:115] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[127:126] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[131:128] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.count[134:132] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[144:135] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[145] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[150:146] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[152:151] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[162:153] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[163] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[173:164] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[174] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[177:175] | Yes | Yes | *T59,*T70,*T175 | Yes | T59,T70,T175 | OUTPUT |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[192:179] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.count[193] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[198:194] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[200] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.count[201] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[222:202] | Yes | Yes | *T176,*T177,*T178 | Yes | T168,T176,T177 | OUTPUT |
otp_lc_data_o.count[223] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[242:224] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[243] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[248:244] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.count[249] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[254:250] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[275:256] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[276] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[278:277] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[279] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[282:280] | Yes | Yes | T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.count[283] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[286:284] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[298:288] | Yes | Yes | *T178,*T179,*T180 | Yes | T168,T178,T169 | OUTPUT |
otp_lc_data_o.count[299] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[316:300] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[319:318] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[320] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[322:321] | Yes | Yes | T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[340:324] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[343:341] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[345:344] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[346] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[354:347] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[355] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[367:356] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[368] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[371:369] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[372] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[379:373] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.count[380] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:381] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[1:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[3:2] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[5:4] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[6] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[16:7] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[39:18] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[41:40] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[48:42] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[49] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[54:50] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[55] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[59:56] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[60] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[67:61] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T167,T83 | OUTPUT |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[69] | Yes | Yes | *T20,*T61,*T59 | Yes | T20,T59,T70 | OUTPUT |
otp_lc_data_o.state[70] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[73:71] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.state[74] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[82:75] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[87:84] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[89:88] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[105:90] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[106] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[110:107] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.state[112:111] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[115:113] | Yes | Yes | T20,T61,*T59 | Yes | T20,T59,T70 | OUTPUT |
otp_lc_data_o.state[116] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[130:117] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.state[131] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[135:132] | Yes | Yes | *T20,*T61,T59 | Yes | T20,T59,T70 | OUTPUT |
otp_lc_data_o.state[136] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[144:137] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[145] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[156:146] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.state[157] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[160:158] | Yes | Yes | T20,T61,T59 | Yes | T20,T59,T70 | OUTPUT |
otp_lc_data_o.state[161] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[173:162] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[177:174] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[199:178] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[201:200] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[206:202] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[208:207] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[221:209] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.state[222] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[238:223] | Yes | Yes | *T5,*T20,*T61 | Yes | T5,T20,T59 | OUTPUT |
otp_lc_data_o.state[239] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[257:240] | Yes | Yes | *T5,*T20,*T61 | Yes | T5,T20,T59 | OUTPUT |
otp_lc_data_o.state[258] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[273:259] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[274] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[276:275] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[277] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[279:278] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.state[280] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[282:281] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[283] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[286:284] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.state[288:287] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[316:289] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT |
otp_lc_data_o.state[317] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:318] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T6,T65,T66 | Yes | T6,T65,T66 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T171,T167,T172 | Yes | T153,T173,T57 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T6,T95,T96 | Yes | T6,T21,T65 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T171,T167,T172 | Yes | T153,T173,T57 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T95,T18,T19 | Yes | T21,T60,T181 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T182,T54,T57 | Yes | T182,T54,T57 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T182,T183,T184 | Yes | T182,T183,T184 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T185,T186,T187 | Yes | T185,T186,T187 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T182,T54,T57 | Yes | T182,T54,T57 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T182,T183,T184 | Yes | T182,T183,T184 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T185,T187,T188 | Yes | T185,T187,T188 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T122,T54,T57 | Yes | T122,T54,T57 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T122,T54,T57 | Yes | T122,T54,T57 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T4,T6,T20 | Yes | T4,T6,T20 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[17:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[18] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[34:19] | Yes | Yes | *T20,*T189,*T186 | Yes | T20,T189,T186 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[35] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[40:36] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[41] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[46:42] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[47] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[69:48] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[70] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[115:71] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[116] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[179:117] | Yes | Yes | *T20,*T171,*T189 | Yes | T20,T171,T189 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[180] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[193:181] | Yes | Yes | *T171,*T190,*T4 | Yes | T171,T190,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[194] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[251:195] | Yes | Yes | *T20,*T171,*T189 | Yes | T20,T171,T189 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[252] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:253] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T5,T6,T21 | Yes | T5,T6,T95 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T20,T171,T189 | Yes | T20,T171,T189 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T22,T23,T24 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9359 | 85.19 |
Total Bits 0->1 | 5493 | 4693 | 85.44 |
Total Bits 1->0 | 5493 | 4666 | 84.94 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9359 | 85.19 |
Port Bits 0->1 | 5493 | 4693 | 85.44 |
Port Bits 1->0 | 5493 | 4666 | 84.94 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_ni | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_edn_ni | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
edn_o.edn_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
edn_i.edn_fips | No | No | Yes | T122,T153,T123 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T80,*T81,*T82 | Yes | T80,T81,T82 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T5,*T83,*T84 | Yes | T5,T83,T84 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T5,*T83,*T154 | Yes | T5,T83,T154 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T5,*T20,*T153 | Yes | T5,T20,T153 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T80,*T81,*T82 | Yes | T80,T81,T82 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T80,*T81,*T82 | Yes | T80,T81,T82 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T5,*T83,*T84 | Yes | T5,T83,T84 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T80,T81,T82 | Yes | T80,T81,T82 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T155,T156,T157 | Yes | T155,T156,T157 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T155,T156,T157 | Yes | T155,T156,T157 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T62,T90,T91 | Yes | T62,T90,T91 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T90,T91,T92 | Yes | T91,T92,T93 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T91,T92,T93 | Yes | T90,T91,T92 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T6,T65,T66 | Yes | T6,T65,T66 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T90,T91,T92 | Yes | T90,T91,T92 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T90,T91,T92 | Yes | T90,T91,T92 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T158,T118,T62 | Yes | T158,T118,T62 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T90,T91,T93 | Yes | T90,T91,T93 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T90,T91,T93 | Yes | T90,T91,T93 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T159,T160,T62 | Yes | T159,T160,T62 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T90,T91,T92 | Yes | T90,T92,T93 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T90,T92,T93 | Yes | T90,T91,T92 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T62,T90,T91 | Yes | T62,T90,T91 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T90,T91,T92 | Yes | T90,T91,T92 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T90,T91,T92 | Yes | T90,T91,T92 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T62,T90,T91 | Yes | T62,T90,T91 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T6,T65,T66 | Yes | T6,T65,T66 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T158,T118,T62 | Yes | T158,T118,T62 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T159,T160,T62 | Yes | T159,T160,T62 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T62,T90,T91 | Yes | T62,T90,T91 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T4,T6,T30 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[3:0] | No | No | Yes | T161,T162,T163 | INPUT | ||
lc_otp_vendor_test_i.ctrl[4] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[14:5] | No | No | Yes | T162,T163,T161 | INPUT | ||
lc_otp_vendor_test_i.ctrl[18:15] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[27:19] | No | No | Yes | T163,T162,T161 | INPUT | ||
lc_otp_vendor_test_i.ctrl[28] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:29] | No | No | Yes | T161,T163,T162 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[3:0] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[4] | No | No | No | INPUT | |||
lc_otp_program_i.count[11:5] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[12] | No | No | No | INPUT | |||
lc_otp_program_i.count[19:13] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT | |
lc_otp_program_i.count[20] | No | No | No | INPUT | |||
lc_otp_program_i.count[29:21] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT | |
lc_otp_program_i.count[30] | No | No | No | INPUT | |||
lc_otp_program_i.count[35:31] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[36] | No | No | No | INPUT | |||
lc_otp_program_i.count[39:37] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[40] | No | No | No | INPUT | |||
lc_otp_program_i.count[42:41] | Yes | Yes | *T20,T61,T164 | Yes | T20,T167,T83 | INPUT | |
lc_otp_program_i.count[43] | No | No | No | INPUT | |||
lc_otp_program_i.count[44] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[45] | No | No | No | INPUT | |||
lc_otp_program_i.count[67:46] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T167,T83 | INPUT | |
lc_otp_program_i.count[68] | No | No | No | INPUT | |||
lc_otp_program_i.count[71:69] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[73:72] | No | No | No | INPUT | |||
lc_otp_program_i.count[90:74] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T167,T83 | INPUT | |
lc_otp_program_i.count[91] | No | No | No | INPUT | |||
lc_otp_program_i.count[98:92] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T55,T167 | INPUT | |
lc_otp_program_i.count[99] | No | No | No | INPUT | |||
lc_otp_program_i.count[102:100] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[103] | No | No | No | INPUT | |||
lc_otp_program_i.count[107:104] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT | |
lc_otp_program_i.count[108] | No | No | No | INPUT | |||
lc_otp_program_i.count[109] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T55,T167 | INPUT | |
lc_otp_program_i.count[110] | No | No | No | INPUT | |||
lc_otp_program_i.count[113:111] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[114] | No | No | No | INPUT | |||
lc_otp_program_i.count[125:115] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T55,T167 | INPUT | |
lc_otp_program_i.count[127:126] | No | No | No | INPUT | |||
lc_otp_program_i.count[131:128] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[134:132] | No | No | No | INPUT | |||
lc_otp_program_i.count[144:135] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[145] | No | No | No | INPUT | |||
lc_otp_program_i.count[150:146] | Yes | Yes | *T166,*T4,*T5 | Yes | T166,T4,T5 | INPUT | |
lc_otp_program_i.count[152:151] | No | No | No | INPUT | |||
lc_otp_program_i.count[162:153] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[163] | No | No | No | INPUT | |||
lc_otp_program_i.count[173:164] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[174] | No | No | No | INPUT | |||
lc_otp_program_i.count[177:175] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[178] | No | No | No | INPUT | |||
lc_otp_program_i.count[192:179] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[193] | No | No | No | INPUT | |||
lc_otp_program_i.count[198:194] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[199] | No | No | No | INPUT | |||
lc_otp_program_i.count[200] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[201] | No | No | No | INPUT | |||
lc_otp_program_i.count[222:202] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[223] | No | No | No | INPUT | |||
lc_otp_program_i.count[242:224] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[243] | No | No | No | INPUT | |||
lc_otp_program_i.count[248:244] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[249] | No | No | No | INPUT | |||
lc_otp_program_i.count[254:250] | Yes | Yes | *T166,*T4,*T5 | Yes | T166,T4,T5 | INPUT | |
lc_otp_program_i.count[255] | No | No | No | INPUT | |||
lc_otp_program_i.count[275:256] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT | |
lc_otp_program_i.count[276] | No | No | No | INPUT | |||
lc_otp_program_i.count[278:277] | Yes | Yes | T166 | Yes | T166 | INPUT | |
lc_otp_program_i.count[279] | No | No | No | INPUT | |||
lc_otp_program_i.count[282:280] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[283] | No | No | No | INPUT | |||
lc_otp_program_i.count[286:284] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[287] | No | No | No | INPUT | |||
lc_otp_program_i.count[298:288] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[299] | No | No | No | INPUT | |||
lc_otp_program_i.count[316:300] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[317] | No | No | No | INPUT | |||
lc_otp_program_i.count[319:318] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[320] | No | No | No | INPUT | |||
lc_otp_program_i.count[322:321] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[323] | No | No | No | INPUT | |||
lc_otp_program_i.count[340:324] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[343:341] | No | No | No | INPUT | |||
lc_otp_program_i.count[345:344] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[346] | No | No | No | INPUT | |||
lc_otp_program_i.count[354:347] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[355] | No | No | No | INPUT | |||
lc_otp_program_i.count[367:356] | Yes | Yes | *T166,*T4,*T5 | Yes | T166,T4,T5 | INPUT | |
lc_otp_program_i.count[368] | No | No | No | INPUT | |||
lc_otp_program_i.count[371:369] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[372] | No | No | No | INPUT | |||
lc_otp_program_i.count[379:373] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.count[380] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:381] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[1:0] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[3:2] | No | No | No | INPUT | |||
lc_otp_program_i.state[5:4] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[6] | No | No | No | INPUT | |||
lc_otp_program_i.state[16:7] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[17] | No | No | No | INPUT | |||
lc_otp_program_i.state[39:18] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[41:40] | No | No | No | INPUT | |||
lc_otp_program_i.state[48:42] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[49] | No | No | No | INPUT | |||
lc_otp_program_i.state[54:50] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[55] | No | No | No | INPUT | |||
lc_otp_program_i.state[59:56] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T167,T83 | INPUT | |
lc_otp_program_i.state[60] | No | No | No | INPUT | |||
lc_otp_program_i.state[67:61] | Yes | Yes | *T20,T61,T164 | Yes | T20,T167,T83 | INPUT | |
lc_otp_program_i.state[68] | No | No | No | INPUT | |||
lc_otp_program_i.state[69] | Yes | Yes | *T20,*T61,*T59 | Yes | T20,T59,T70 | INPUT | |
lc_otp_program_i.state[70] | No | No | No | INPUT | |||
lc_otp_program_i.state[73:71] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[74] | No | No | No | INPUT | |||
lc_otp_program_i.state[82:75] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT | |
lc_otp_program_i.state[83] | No | No | No | INPUT | |||
lc_otp_program_i.state[87:84] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[89:88] | No | No | No | INPUT | |||
lc_otp_program_i.state[105:90] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[106] | No | No | No | INPUT | |||
lc_otp_program_i.state[110:107] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[112:111] | No | No | No | INPUT | |||
lc_otp_program_i.state[115:113] | Yes | Yes | *T20,*T61,*T59 | Yes | T20,T59,T70 | INPUT | |
lc_otp_program_i.state[116] | No | No | No | INPUT | |||
lc_otp_program_i.state[130:117] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[131] | No | No | No | INPUT | |||
lc_otp_program_i.state[135:132] | Yes | Yes | *T20,T61,*T59 | Yes | T20,T59,T70 | INPUT | |
lc_otp_program_i.state[136] | No | No | No | INPUT | |||
lc_otp_program_i.state[144:137] | Yes | Yes | *T166,*T61,*T164 | Yes | T166,T61,T164 | INPUT | |
lc_otp_program_i.state[145] | No | No | No | INPUT | |||
lc_otp_program_i.state[156:146] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[157] | No | No | No | INPUT | |||
lc_otp_program_i.state[160:158] | Yes | Yes | T20,T61,T59 | Yes | T20,T59,T70 | INPUT | |
lc_otp_program_i.state[161] | No | No | No | INPUT | |||
lc_otp_program_i.state[173:162] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[177:174] | No | No | No | INPUT | |||
lc_otp_program_i.state[199:178] | Yes | Yes | *T20,*T61,*T59 | Yes | T20,T59,T70 | INPUT | |
lc_otp_program_i.state[201:200] | No | No | No | INPUT | |||
lc_otp_program_i.state[206:202] | Yes | Yes | *T166,*T20,*T61 | Yes | T166,T20,T59 | INPUT | |
lc_otp_program_i.state[208:207] | No | No | No | INPUT | |||
lc_otp_program_i.state[221:209] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[222] | No | No | No | INPUT | |||
lc_otp_program_i.state[238:223] | Yes | Yes | *T5,*T20,*T61 | Yes | T5,T20,T59 | INPUT | |
lc_otp_program_i.state[239] | No | No | No | INPUT | |||
lc_otp_program_i.state[257:240] | Yes | Yes | *T5,*T20,*T61 | Yes | T5,T20,T59 | INPUT | |
lc_otp_program_i.state[258] | No | No | No | INPUT | |||
lc_otp_program_i.state[273:259] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[274] | No | No | No | INPUT | |||
lc_otp_program_i.state[276:275] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.state[277] | No | No | No | INPUT | |||
lc_otp_program_i.state[279:278] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[280] | No | No | No | INPUT | |||
lc_otp_program_i.state[282:281] | Yes | Yes | T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[283] | No | No | No | INPUT | |||
lc_otp_program_i.state[286:284] | Yes | Yes | T61,T164,T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[288:287] | No | No | No | INPUT | |||
lc_otp_program_i.state[316:289] | Yes | Yes | *T61,*T164,*T165 | Yes | T61,T164,T165 | INPUT | |
lc_otp_program_i.state[317] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:318] | Yes | Yes | T5,T20,T61 | Yes | T5,T20,T59 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T5,T20,T61 | Yes | T5,T20,T61 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T5,T20,T61 | Yes | T5,T20,T61 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T168,T169,T170 | Yes | T168,T169,T170 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T6,T65,T66 | Yes | T6,T65,T66 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T5,T20,T59 | Yes | T5,T20,T61 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T95,T19,T65 | Yes | T65,T59,T66 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T171,T167,T172 | Yes | T153,T173,T57 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T4,T5,T20 | Yes | T4,T5,T20 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T5,T95,T96 | Yes | T5,T174,T65 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T171,T167,T172 | Yes | T153,T173,T57 | OUTPUT | |
otp_lc_data_o.count[3:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[4] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[11:5] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[12] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[19:13] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[20] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[29:21] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[30] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[35:31] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[36] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[39:37] | Yes | Yes | T61,T164,T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.count[40] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[42:41] | Yes | Yes | T20,*T61,*T164 | Yes | T20,T167,T83 | OUTPUT | |
otp_lc_data_o.count[43] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[44] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[45] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[67:46] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T167,T83 | OUTPUT | |
otp_lc_data_o.count[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[71:69] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[73:72] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[90:74] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[91] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[98:92] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T55,T167 | OUTPUT | |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[102:100] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.count[103] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[107:104] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[108] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[109] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[110] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[113:111] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[114] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[125:115] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[127:126] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[131:128] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.count[134:132] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[144:135] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[145] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[150:146] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[152:151] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[162:153] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[163] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[173:164] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[174] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[177:175] | Yes | Yes | *T59,*T70,*T175 | Yes | T59,T70,T175 | OUTPUT | |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[192:179] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.count[193] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[198:194] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[200] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.count[201] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[222:202] | Yes | Yes | *T176,*T177,*T178 | Yes | T168,T176,T177 | OUTPUT | |
otp_lc_data_o.count[223] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[242:224] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[243] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[248:244] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.count[249] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[254:250] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[275:256] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[276] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[278:277] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[279] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[282:280] | Yes | Yes | T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.count[283] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[286:284] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[298:288] | Yes | Yes | *T178,*T179,*T180 | Yes | T168,T178,T169 | OUTPUT | |
otp_lc_data_o.count[299] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[316:300] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[319:318] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[320] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[322:321] | Yes | Yes | T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[340:324] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[343:341] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[345:344] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[346] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[354:347] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[355] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[367:356] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[368] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[371:369] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[372] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[379:373] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.count[380] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:381] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[1:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[3:2] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[5:4] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[6] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[16:7] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[39:18] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[41:40] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[48:42] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[49] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[54:50] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[55] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[59:56] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[60] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[67:61] | Yes | Yes | *T20,*T61,*T164 | Yes | T20,T167,T83 | OUTPUT | |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[69] | Yes | Yes | *T20,*T61,*T59 | Yes | T20,T59,T70 | OUTPUT | |
otp_lc_data_o.state[70] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[73:71] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.state[74] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[82:75] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[87:84] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[89:88] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[105:90] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[106] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[110:107] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.state[112:111] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[115:113] | Yes | Yes | T20,T61,*T59 | Yes | T20,T59,T70 | OUTPUT | |
otp_lc_data_o.state[116] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[130:117] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.state[131] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[135:132] | Yes | Yes | *T20,*T61,T59 | Yes | T20,T59,T70 | OUTPUT | |
otp_lc_data_o.state[136] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[144:137] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[145] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[156:146] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.state[157] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[160:158] | Yes | Yes | T20,T61,T59 | Yes | T20,T59,T70 | OUTPUT | |
otp_lc_data_o.state[161] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[173:162] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[177:174] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[199:178] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[201:200] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[206:202] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[208:207] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[221:209] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.state[222] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[238:223] | Yes | Yes | *T5,*T20,*T61 | Yes | T5,T20,T59 | OUTPUT | |
otp_lc_data_o.state[239] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[257:240] | Yes | Yes | *T5,*T20,*T61 | Yes | T5,T20,T59 | OUTPUT | |
otp_lc_data_o.state[258] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[273:259] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[274] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[276:275] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[277] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[279:278] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.state[280] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[282:281] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[283] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[286:284] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.state[288:287] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[316:289] | Yes | Yes | *T61,*T164,*T165 | Yes | T167,T83,T172 | OUTPUT | |
otp_lc_data_o.state[317] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:318] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T6,T65,T66 | Yes | T6,T65,T66 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T171,T167,T172 | Yes | T153,T173,T57 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T6,T95,T96 | Yes | T6,T21,T65 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T171,T167,T172 | Yes | T153,T173,T57 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T95,T18,T19 | Yes | T21,T60,T181 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T182,T54,T57 | Yes | T182,T54,T57 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T182,T183,T184 | Yes | T182,T183,T184 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T185,T186,T187 | Yes | T185,T186,T187 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T182,T54,T57 | Yes | T182,T54,T57 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T182,T183,T184 | Yes | T182,T183,T184 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T185,T187,T188 | Yes | T185,T187,T188 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T122,T54,T57 | Yes | T122,T54,T57 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T4,T6,T21 | Yes | T4,T6,T95 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T122,T54,T57 | Yes | T122,T54,T57 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T4,T6,T20 | Yes | T4,T6,T20 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[17:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[18] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[34:19] | Yes | Yes | *T20,*T189,*T186 | Yes | T20,T189,T186 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[35] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[40:36] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[41] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[46:42] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[47] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[69:48] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[70] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[115:71] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[116] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[179:117] | Yes | Yes | *T20,*T171,*T189 | Yes | T20,T171,T189 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[180] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[193:181] | Yes | Yes | *T171,*T190,*T4 | Yes | T171,T190,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[194] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[251:195] | Yes | Yes | *T20,*T171,*T189 | Yes | T20,T171,T189 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[252] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:253] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T5,T6,T21 | Yes | T5,T6,T95 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T20,T171,T189 | Yes | T20,T171,T189 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |