Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

3 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 3762501 1 T72 2346 T73 19 T74 231
values[2] 748562 1 T72 333 T73 18 T74 519
values[3] 102788 1 T72 3 T73 18 T74 653
values[4] 54392 1 T73 18 T74 455 T738 6
values[5] 37051 1 T73 18 T74 295 T738 6
values[6] 27645 1 T73 19 T74 229 T738 6
values[7] 22295 1 T73 18 T74 87 T738 6
values[8] 19304 1 T73 18 T74 46 T738 6
values[9] 17183 1 T73 18 T74 49 T738 6
values[10] 15828 1 T73 18 T74 51 T738 7
values[11] 14572 1 T73 18 T74 39 T738 6
values[12] 13867 1 T73 18 T74 34 T738 6
values[13] 12933 1 T73 18 T74 35 T738 6
values[14] 12422 1 T73 18 T74 25 T738 6
values[15] 11729 1 T73 18 T74 36 T738 6
values[16] 11148 1 T73 18 T74 44 T738 6
values[17] 10982 1 T73 18 T74 29 T738 6
values[18] 10513 1 T73 18 T74 27 T738 6
values[19] 10257 1 T73 18 T74 25 T738 6
values[20] 9771 1 T73 19 T74 26 T738 6
values[21] 9545 1 T73 18 T74 28 T738 6
values[22] 9267 1 T73 18 T74 19 T738 6
values[23] 9029 1 T73 20 T74 13 T738 7
values[24] 8456 1 T73 18 T74 11 T738 6
values[25] 7915 1 T73 18 T74 16 T738 6
values[26] 7711 1 T73 18 T74 19 T738 6
values[27] 7597 1 T73 19 T74 16 T738 6
values[28] 7369 1 T73 19 T74 14 T738 6
values[29] 6611 1 T73 18 T74 8 T738 6
values[30] 6251 1 T73 19 T74 9 T738 6
values[31] 5921 1 T73 18 T74 13 T738 6
values[32] 5394 1 T73 18 T74 9 T738 6
values[33] 5188 1 T73 19 T74 18 T738 6
values[34] 4963 1 T73 18 T74 18 T738 6
values[35] 4627 1 T73 18 T74 12 T738 6
values[36] 4305 1 T73 18 T74 8 T738 6
values[37] 4020 1 T73 18 T74 15 T738 6
values[38] 3803 1 T73 18 T74 18 T738 7
values[39] 3614 1 T73 18 T74 18 T738 6
values[40] 3473 1 T73 18 T74 12 T738 6
values[41] 3282 1 T73 18 T74 18 T738 6
values[42] 3239 1 T73 19 T74 16 T738 6
values[43] 3143 1 T73 18 T74 16 T738 6
values[44] 3072 1 T73 18 T74 13 T738 6
values[45] 2983 1 T73 18 T74 17 T738 6
values[46] 2939 1 T73 19 T74 13 T738 7
values[47] 2910 1 T73 18 T74 13 T738 6
values[48] 2935 1 T73 18 T74 15 T738 6
values[49] 2799 1 T73 18 T74 13 T738 6
values[50] 2720 1 T73 18 T74 17 T738 6
values[51] 2717 1 T73 18 T74 15 T738 6
values[52] 2573 1 T73 18 T74 14 T738 6
values[53] 2515 1 T73 18 T74 13 T738 6
values[54] 2483 1 T73 19 T74 11 T738 6
values[55] 2415 1 T73 18 T74 10 T738 6
values[56] 2373 1 T73 18 T74 11 T738 6
values[57] 2312 1 T73 18 T74 13 T738 6
values[58] 2345 1 T73 19 T74 10 T738 6
values[59] 2199 1 T73 19 T74 8 T738 6
values[60] 2253 1 T73 19 T74 13 T738 6
values[61] 2474 1 T73 18 T74 12 T738 7
values[62] 3689 1 T73 18 T74 22 T738 6
values[63] 9538 1 T73 20 T74 57 T738 6
values[64] 220924 1 T73 3234 T74 371 T738 1198


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 4785017 1 T72 3949 T73 2948 T74 2894
values[2] 802777 1 T72 742 T73 850 T74 718
values[3] 81985 1 T72 11 T73 212 T74 117
values[4] 14033 1 T73 57 T74 30 T78 5
values[5] 5224 1 T73 14 T74 25 T78 1
values[6] 3183 1 T73 5 T74 30 T287 4
values[7] 2435 1 T73 3 T74 28 T287 2
values[8] 1989 1 T73 3 T74 22 T422 2
values[9] 1880 1 T73 2 T74 24 T422 2
values[10] 1691 1 T73 2 T74 18 T422 2
values[11] 1536 1 T73 2 T74 21 T422 2
values[12] 1544 1 T73 2 T74 18 T422 2
values[13] 1369 1 T73 2 T74 12 T422 2
values[14] 1357 1 T73 2 T74 1 T422 2
values[15] 1228 1 T73 2 T74 3 T422 2
values[16] 1115 1 T73 2 T74 6 T422 2
values[17] 1057 1 T73 2 T74 4 T422 2
values[18] 935 1 T73 2 T74 3 T422 2
values[19] 877 1 T73 2 T74 4 T422 2
values[20] 827 1 T73 2 T74 10 T422 2
values[21] 732 1 T73 2 T74 6 T422 2
values[22] 746 1 T73 2 T74 3 T422 2
values[23] 671 1 T73 2 T74 4 T422 2
values[24] 681 1 T73 2 T74 4 T422 2
values[25] 678 1 T73 2 T74 5 T422 2
values[26] 639 1 T73 2 T74 2 T422 2
values[27] 604 1 T73 2 T74 3 T422 2
values[28] 603 1 T73 2 T74 1 T422 2
values[29] 558 1 T73 2 T74 4 T422 2
values[30] 583 1 T73 2 T74 2 T422 2
values[31] 568 1 T73 2 T74 1 T422 2
values[32] 536 1 T73 2 T74 3 T422 2
values[33] 533 1 T73 2 T74 2 T422 2
values[34] 595 1 T73 2 T74 2 T422 3
values[35] 556 1 T73 2 T74 1 T422 2
values[36] 515 1 T73 2 T74 5 T422 2
values[37] 481 1 T73 2 T74 5 T422 2
values[38] 480 1 T73 2 T74 4 T422 2
values[39] 430 1 T73 2 T422 2 T739 6
values[40] 441 1 T73 2 T422 2 T739 5
values[41] 450 1 T73 2 T422 2 T739 1
values[42] 453 1 T73 2 T422 2 T739 1
values[43] 466 1 T73 2 T422 2 T739 1
values[44] 460 1 T73 2 T422 2 T739 2
values[45] 418 1 T73 2 T422 2 T739 1
values[46] 406 1 T73 2 T422 2 T739 2
values[47] 409 1 T73 2 T422 2 T739 2
values[48] 409 1 T73 2 T422 2 T739 1
values[49] 412 1 T73 2 T422 2 T739 1
values[50] 419 1 T73 2 T422 2 T739 1
values[51] 391 1 T73 2 T422 2 T739 3
values[52] 361 1 T73 2 T422 2 T739 1
values[53] 390 1 T73 2 T422 2 T739 1
values[54] 345 1 T73 2 T422 2 T739 1
values[55] 364 1 T73 2 T422 2 T739 1
values[56] 357 1 T73 2 T422 2 T739 2
values[57] 340 1 T73 2 T422 2 T739 2
values[58] 354 1 T73 2 T422 2 T739 1
values[59] 343 1 T73 2 T422 2 T739 1
values[60] 340 1 T73 2 T422 2 T739 1
values[61] 375 1 T73 2 T422 2 T739 1
values[62] 586 1 T73 2 T422 2 T739 3
values[63] 2129 1 T73 2 T422 4 T739 25
values[64] 26898 1 T73 424 T422 395 T739 81


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 584914 1 T72 238 T73 18 T74 18
values[2] 2693766 1 T72 1987 T73 18 T74 78
values[3] 1161257 1 T72 327 T73 18 T74 446
values[4] 143742 1 T72 3 T73 18 T74 636
values[5] 74146 1 T73 18 T74 427 T287 2
values[6] 48582 1 T73 18 T74 304 T738 6
values[7] 35434 1 T73 18 T74 246 T738 6
values[8] 28437 1 T73 18 T74 189 T738 6
values[9] 23817 1 T73 18 T74 136 T738 7
values[10] 20777 1 T73 18 T74 96 T738 6
values[11] 18516 1 T73 19 T74 42 T738 6
values[12] 16745 1 T73 18 T74 38 T738 6
values[13] 15828 1 T73 18 T74 18 T738 6
values[14] 14800 1 T73 18 T74 29 T738 6
values[15] 14115 1 T73 18 T74 30 T738 6
values[16] 13730 1 T73 18 T74 30 T738 6
values[17] 13089 1 T73 18 T74 24 T738 6
values[18] 12345 1 T73 18 T74 22 T738 6
values[19] 12350 1 T73 18 T74 17 T738 6
values[20] 11518 1 T73 18 T74 16 T738 6
values[21] 11311 1 T73 19 T74 35 T738 6
values[22] 11000 1 T73 18 T74 40 T738 6
values[23] 10751 1 T73 18 T74 37 T738 6
values[24] 10132 1 T73 18 T74 26 T738 6
values[25] 9413 1 T73 18 T74 32 T738 6
values[26] 9111 1 T73 18 T74 33 T738 6
values[27] 8542 1 T73 18 T74 34 T738 6
values[28] 7859 1 T73 18 T74 39 T738 6
values[29] 7680 1 T73 18 T74 29 T738 6
values[30] 7183 1 T73 18 T74 23 T738 6
values[31] 6630 1 T73 18 T74 29 T738 6
values[32] 6012 1 T73 18 T74 41 T738 6
values[33] 5498 1 T73 18 T74 32 T738 6
values[34] 5066 1 T73 19 T74 27 T738 6
values[35] 4688 1 T73 18 T74 28 T738 6
values[36] 4450 1 T73 18 T74 22 T738 6
values[37] 4193 1 T73 18 T74 13 T738 6
values[38] 4107 1 T73 18 T74 23 T738 6
values[39] 3838 1 T73 18 T74 45 T738 6
values[40] 3672 1 T73 18 T74 29 T738 6
values[41] 3510 1 T73 18 T74 25 T738 6
values[42] 3386 1 T73 19 T74 17 T738 6
values[43] 3414 1 T73 18 T74 23 T738 6
values[44] 3391 1 T73 18 T74 17 T738 6
values[45] 3325 1 T73 18 T74 22 T738 6
values[46] 3236 1 T73 18 T74 18 T738 6
values[47] 3121 1 T73 20 T74 14 T738 6
values[48] 3058 1 T73 18 T74 20 T738 6
values[49] 3013 1 T73 19 T74 24 T738 6
values[50] 2990 1 T73 18 T74 27 T738 6
values[51] 3012 1 T73 18 T74 17 T738 7
values[52] 2947 1 T73 19 T74 12 T738 6
values[53] 2729 1 T73 18 T74 9 T738 7
values[54] 2696 1 T73 18 T74 10 T738 6
values[55] 2566 1 T73 18 T74 9 T738 6
values[56] 2601 1 T73 18 T74 17 T738 6
values[57] 2607 1 T73 20 T74 20 T738 6
values[58] 2631 1 T73 18 T74 22 T738 6
values[59] 2538 1 T73 18 T74 17 T738 6
values[60] 2529 1 T73 19 T74 14 T738 6
values[61] 2572 1 T73 18 T74 16 T738 7
values[62] 3190 1 T73 20 T74 28 T738 6
values[63] 7746 1 T73 22 T74 40 T738 8
values[64] 214146 1 T73 3256 T74 161 T738 1268

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%