SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.08 | 85.08 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.27 | 85.27 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.27 | 85.27 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.27 | 85.27 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.34 | 90.68 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 141 | 85.98 |
Total Bits | 11012 | 9369 | 85.08 |
Total Bits 0->1 | 5506 | 4699 | 85.34 |
Total Bits 1->0 | 5506 | 4670 | 84.82 |
Ports | 164 | 141 | 85.98 |
Port Bits | 11012 | 9369 | 85.08 |
Port Bits 0->1 | 5506 | 4699 | 85.34 |
Port Bits 1->0 | 5506 | 4670 | 84.82 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_ni | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | INPUT |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_edn_ni | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | INPUT |
edn_o.edn_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
edn_i.edn_fips | No | No | Yes | T115,T126,T117 | INPUT | |
edn_i.edn_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T66,*T32,*T75 | Yes | T66,T32,T75 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T32,T2,T76 | Yes | T32,T2,T76 | INPUT |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T72,T77,T79 | Yes | T72,T77,T78 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T72,T77,T78 | Yes | T72,T77,T79 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T66,*T32,*T75 | Yes | T66,T32,T75 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T72,T77,T79 | Yes | T72,T77,T79 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T20,*T55,*T151 | Yes | T20,T55,T151 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T32,*T72,*T77 | Yes | T32,T72,T77 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T66,*T32,*T75 | Yes | T66,T32,T75 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T32,T2,T76 | Yes | T32,T2,T76 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T5,T6,T60 | Yes | T5,T6,T60 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T5,T6,T60 | Yes | T5,T16,T42 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T5,T6,T60 | Yes | T5,T16,T42 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T72,T77,T79 | Yes | T72,T77,T79 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T32,T72,*T73 | Yes | T32,T72,T77 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T72,T77,T78 | Yes | T72,T77,T78 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T5,*T6,*T60 | Yes | T5,T16,T42 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T103,T152,T153 | Yes | T103,T152,T153 | OUTPUT |
intr_otp_error_o | Yes | Yes | T103,T152,T153 | Yes | T103,T152,T153 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T80,T56,T82 | Yes | T80,T56,T82 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T16,T61,T62 | Yes | T16,T61,T62 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T80,T56,T154 | Yes | T80,T56,T154 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T32,T80,T155 | Yes | T32,T80,T155 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T80,T56,T82 | Yes | T80,T56,T82 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T80,T56,T82 | Yes | T80,T56,T82 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T16,T61,T62 | Yes | T16,T61,T62 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T80,T56,T154 | Yes | T80,T56,T154 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T32,T80,T155 | Yes | T32,T80,T155 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T80,T56,T82 | Yes | T80,T56,T82 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T5,T62,T123 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
lc_otp_vendor_test_i.ctrl[0] | No | No | Yes | T156 | INPUT | |
lc_otp_vendor_test_i.ctrl[2:1] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[15:3] | No | No | Yes | T156,T157,T158 | INPUT | |
lc_otp_vendor_test_i.ctrl[16] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[26:17] | No | No | Yes | T156,T158,T157 | INPUT | |
lc_otp_vendor_test_i.ctrl[27] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[29:28] | No | No | Yes | T156,T158 | INPUT | |
lc_otp_vendor_test_i.ctrl[30] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31] | No | No | Yes | T158 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[0] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[1] | No | No | No | INPUT | ||
lc_otp_program_i.count[17:2] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[18] | No | No | No | INPUT | ||
lc_otp_program_i.count[25:19] | Yes | Yes | T20,*T53,T55 | Yes | T20,T55,T51 | INPUT |
lc_otp_program_i.count[27:26] | No | No | No | INPUT | ||
lc_otp_program_i.count[46:28] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[47] | No | No | No | INPUT | ||
lc_otp_program_i.count[50:48] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.count[51] | No | No | No | INPUT | ||
lc_otp_program_i.count[57:52] | Yes | Yes | *T20,*T53,*T55 | Yes | T20,T55,T51 | INPUT |
lc_otp_program_i.count[58] | No | No | No | INPUT | ||
lc_otp_program_i.count[63:59] | Yes | Yes | T20,*T53,T55 | Yes | T20,T55,T51 | INPUT |
lc_otp_program_i.count[64] | No | No | No | INPUT | ||
lc_otp_program_i.count[67:65] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[68] | No | No | No | INPUT | ||
lc_otp_program_i.count[76:69] | Yes | Yes | *T20,*T53,*T55 | Yes | T20,T55,T51 | INPUT |
lc_otp_program_i.count[77] | No | No | No | INPUT | ||
lc_otp_program_i.count[83:78] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[84] | No | No | No | INPUT | ||
lc_otp_program_i.count[101:85] | Yes | Yes | *T18,*T20,*T53 | Yes | T18,T20,T55 | INPUT |
lc_otp_program_i.count[103:102] | No | No | No | INPUT | ||
lc_otp_program_i.count[110:104] | Yes | Yes | *T18,*T20,*T53 | Yes | T18,T20,T55 | INPUT |
lc_otp_program_i.count[111] | No | No | No | INPUT | ||
lc_otp_program_i.count[120:112] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[121] | No | No | No | INPUT | ||
lc_otp_program_i.count[125:122] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.count[127:126] | No | No | No | INPUT | ||
lc_otp_program_i.count[132:128] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[133] | No | No | No | INPUT | ||
lc_otp_program_i.count[138:134] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.count[139] | No | No | No | INPUT | ||
lc_otp_program_i.count[148:140] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[149] | No | No | No | INPUT | ||
lc_otp_program_i.count[154:150] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.count[155] | No | No | No | INPUT | ||
lc_otp_program_i.count[160:156] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[161] | No | No | No | INPUT | ||
lc_otp_program_i.count[175:162] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[176] | No | No | No | INPUT | ||
lc_otp_program_i.count[184:177] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.count[185] | No | No | No | INPUT | ||
lc_otp_program_i.count[190:186] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[192:191] | No | No | No | INPUT | ||
lc_otp_program_i.count[211:193] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.count[212] | No | No | No | INPUT | ||
lc_otp_program_i.count[218:213] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[219] | No | No | No | INPUT | ||
lc_otp_program_i.count[227:220] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[228] | No | No | No | INPUT | ||
lc_otp_program_i.count[233:229] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[234] | No | No | No | INPUT | ||
lc_otp_program_i.count[252:235] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[253] | No | No | No | INPUT | ||
lc_otp_program_i.count[270:254] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[271] | No | No | No | INPUT | ||
lc_otp_program_i.count[273:272] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[274] | No | No | No | INPUT | ||
lc_otp_program_i.count[276:275] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[277] | No | No | No | INPUT | ||
lc_otp_program_i.count[278] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[279] | No | No | No | INPUT | ||
lc_otp_program_i.count[280] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[281] | No | No | No | INPUT | ||
lc_otp_program_i.count[288:282] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[289] | No | No | No | INPUT | ||
lc_otp_program_i.count[291:290] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[292] | No | No | No | INPUT | ||
lc_otp_program_i.count[296:293] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.count[297] | No | No | No | INPUT | ||
lc_otp_program_i.count[303:298] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[304] | No | No | No | INPUT | ||
lc_otp_program_i.count[311:305] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[312] | No | No | No | INPUT | ||
lc_otp_program_i.count[317:313] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[318] | No | No | No | INPUT | ||
lc_otp_program_i.count[323:319] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[324] | No | No | No | INPUT | ||
lc_otp_program_i.count[331:325] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.count[332] | No | No | No | INPUT | ||
lc_otp_program_i.count[333] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[334] | No | No | No | INPUT | ||
lc_otp_program_i.count[336:335] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[337] | No | No | No | INPUT | ||
lc_otp_program_i.count[343:338] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.count[344] | No | No | No | INPUT | ||
lc_otp_program_i.count[345] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.count[346] | No | No | No | INPUT | ||
lc_otp_program_i.count[350:347] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[351] | No | No | No | INPUT | ||
lc_otp_program_i.count[371:352] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.count[372] | No | No | No | INPUT | ||
lc_otp_program_i.count[375:373] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[377:376] | No | No | No | INPUT | ||
lc_otp_program_i.count[381:378] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT |
lc_otp_program_i.count[382] | No | No | No | INPUT | ||
lc_otp_program_i.count[383] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[0] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[1] | No | No | No | INPUT | ||
lc_otp_program_i.state[4:2] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.state[5] | No | No | No | INPUT | ||
lc_otp_program_i.state[14:6] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[15] | No | No | No | INPUT | ||
lc_otp_program_i.state[18:16] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[19] | No | No | No | INPUT | ||
lc_otp_program_i.state[26:20] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[27] | No | No | No | INPUT | ||
lc_otp_program_i.state[51:28] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[52] | No | No | No | INPUT | ||
lc_otp_program_i.state[57:53] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[58] | No | No | No | INPUT | ||
lc_otp_program_i.state[65:59] | Yes | Yes | *T20,*T53,*T55 | Yes | T20,T55,T51 | INPUT |
lc_otp_program_i.state[66] | No | No | No | INPUT | ||
lc_otp_program_i.state[100:67] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[101] | No | No | No | INPUT | ||
lc_otp_program_i.state[103:102] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[105:104] | No | No | No | INPUT | ||
lc_otp_program_i.state[107:106] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.state[108] | No | No | No | INPUT | ||
lc_otp_program_i.state[125:109] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[126] | No | No | No | INPUT | ||
lc_otp_program_i.state[151:127] | Yes | Yes | *T19,*T20,*T53 | Yes | T19,T20,T55 | INPUT |
lc_otp_program_i.state[153:152] | No | No | No | INPUT | ||
lc_otp_program_i.state[156:154] | Yes | Yes | *T19,*T20,*T53 | Yes | T19,T20,T55 | INPUT |
lc_otp_program_i.state[157] | No | No | No | INPUT | ||
lc_otp_program_i.state[166:158] | Yes | Yes | *T19,*T20,*T53 | Yes | T19,T20,T55 | INPUT |
lc_otp_program_i.state[167] | No | No | No | INPUT | ||
lc_otp_program_i.state[178:168] | Yes | Yes | *T19,*T20,*T53 | Yes | T19,T20,T55 | INPUT |
lc_otp_program_i.state[179] | No | No | No | INPUT | ||
lc_otp_program_i.state[186:180] | Yes | Yes | *T19,T20,*T53 | Yes | T19,T20,T55 | INPUT |
lc_otp_program_i.state[187] | No | No | No | INPUT | ||
lc_otp_program_i.state[194:188] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[195] | No | No | No | INPUT | ||
lc_otp_program_i.state[200:196] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[201] | No | No | No | INPUT | ||
lc_otp_program_i.state[203:202] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[204] | No | No | No | INPUT | ||
lc_otp_program_i.state[208:205] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[209] | No | No | No | INPUT | ||
lc_otp_program_i.state[213:210] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.state[214] | No | No | No | INPUT | ||
lc_otp_program_i.state[226:215] | Yes | Yes | *T19,T20,*T53 | Yes | T19,T20,T55 | INPUT |
lc_otp_program_i.state[227] | No | No | No | INPUT | ||
lc_otp_program_i.state[232:228] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[234:233] | No | No | No | INPUT | ||
lc_otp_program_i.state[235] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.state[236] | No | No | No | INPUT | ||
lc_otp_program_i.state[243:237] | Yes | Yes | *T19,*T20,*T53 | Yes | T19,T20,T55 | INPUT |
lc_otp_program_i.state[244] | No | No | No | INPUT | ||
lc_otp_program_i.state[253:245] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[254] | No | No | No | INPUT | ||
lc_otp_program_i.state[257:255] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.state[258] | No | No | No | INPUT | ||
lc_otp_program_i.state[261:259] | Yes | Yes | *T4,*T18,*T19 | Yes | T18,T19,T20 | INPUT |
lc_otp_program_i.state[262] | No | No | No | INPUT | ||
lc_otp_program_i.state[265:263] | Yes | Yes | T20,T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[266] | No | No | No | INPUT | ||
lc_otp_program_i.state[267] | Yes | Yes | *T4,*T18,*T19 | Yes | T18,T19,T20 | INPUT |
lc_otp_program_i.state[268] | No | No | No | INPUT | ||
lc_otp_program_i.state[278:269] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[280:279] | No | No | No | INPUT | ||
lc_otp_program_i.state[283:281] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T42 | INPUT |
lc_otp_program_i.state[284] | No | No | No | INPUT | ||
lc_otp_program_i.state[298:285] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T42 | INPUT |
lc_otp_program_i.state[299] | No | No | No | INPUT | ||
lc_otp_program_i.state[309:300] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT |
lc_otp_program_i.state[310] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:311] | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | INPUT |
lc_otp_program_i.req | Yes | Yes | T19,T20,T55 | Yes | T19,T20,T55 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T19,T20,T55 | Yes | T19,T20,T55 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T100,T162,T163 | Yes | T100,T162,T163 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T5,T16,T42 | Yes | T5,T6,T60 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T5,T16,T42 | Yes | T5,T6,T60 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T16,T61,T62 | Yes | T16,T61,T62 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T19,T20,T55 | Yes | T19,T20,T55 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T16,T20,T55 | Yes | T4,T6,T60 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T55,T164,T165 | Yes | T20,T55,T164 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T4,T86,T18 | Yes | T18,T19,T31 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T5,T18,T42 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T55,T164,T165 | Yes | T20,T55,T164 | OUTPUT |
otp_lc_data_o.count[0] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.count[1] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[17:2] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.count[18] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[25:19] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[27:26] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[46:28] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[47] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[50:48] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[51] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[57:52] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[58] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[63:59] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[64] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[67:65] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.count[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[76:69] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[77] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[83:78] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[84] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[101:85] | Yes | Yes | *T18,*T20,*T53 | Yes | T18,T20,T55 | OUTPUT |
otp_lc_data_o.count[103:102] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[110:104] | Yes | Yes | *T18,*T20,*T53 | Yes | T18,T20,T55 | OUTPUT |
otp_lc_data_o.count[111] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[120:112] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[125:122] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[127:126] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[132:128] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[133] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[138:134] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[139] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[148:140] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.count[149] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[154:150] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[160:156] | Yes | Yes | *T166,*T167,*T168 | Yes | T19,T169,T170 | OUTPUT |
otp_lc_data_o.count[161] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[175:162] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[176] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[184:177] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[185] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[190:186] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[192:191] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[211:193] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[212] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[218:213] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[219] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[227:220] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[228] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[233:229] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[234] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[252:235] | Yes | Yes | *T167,*T168,*T171 | Yes | T166,T100,T167 | OUTPUT |
otp_lc_data_o.count[253] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[270:254] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.count[271] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[273:272] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT |
otp_lc_data_o.count[274] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[276:275] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[278] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT |
otp_lc_data_o.count[279] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[280] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[288:282] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[289] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[291:290] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[296:293] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[297] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[303:298] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[304] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[311:305] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[312] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[317:313] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT |
otp_lc_data_o.count[318] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[323:319] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[324] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[331:325] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[332] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[333] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[336:335] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[337] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[343:338] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[344] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[345] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[346] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350:347] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[371:352] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[372] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[375:373] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.count[377:376] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[381:378] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT |
otp_lc_data_o.count[382] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[0] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[1] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[4:2] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.state[5] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[14:6] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[15] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[18:16] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[19] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[26:20] | Yes | Yes | T20,T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.state[27] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[51:28] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.state[52] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[57:53] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[58] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[65:59] | Yes | Yes | *T20,*T53,*T55 | Yes | T20,T55,T51 | OUTPUT |
otp_lc_data_o.state[66] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[100:67] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.state[101] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[103:102] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[105:104] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[107:106] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.state[108] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[125:109] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[126] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[151:127] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[153:152] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[156:154] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[157] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[166:158] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[167] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[178:168] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[186:180] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[187] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[194:188] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[195] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[200:196] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.state[201] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[203:202] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[204] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[208:205] | Yes | Yes | T20,T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.state[209] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[213:210] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.state[214] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[226:215] | Yes | Yes | *T19,T20,*T53 | Yes | T19,T20,T55 | OUTPUT |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[232:228] | Yes | Yes | T20,T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.state[234:233] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[235] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.state[236] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[243:237] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[244] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[253:245] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.state[254] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[257:255] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.state[258] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[261:259] | Yes | Yes | *T4,T18,T19 | Yes | T18,T19,T20 | OUTPUT |
otp_lc_data_o.state[262] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[265:263] | Yes | Yes | T5,*T18,T16 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[267] | Yes | Yes | *T4,*T18,*T19 | Yes | T18,T19,T20 | OUTPUT |
otp_lc_data_o.state[268] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[278:269] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.state[280:279] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[283:281] | Yes | Yes | T18,*T52,*T167 | Yes | T18,T172,T52 | OUTPUT |
otp_lc_data_o.state[284] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[298:285] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T42 | OUTPUT |
otp_lc_data_o.state[299] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[309:300] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT |
otp_lc_data_o.state[310] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:311] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T16,T61,T62 | Yes | T16,T61,T62 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T55,T164,T165 | Yes | T20,T55,T164 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T5,T6,T60 | Yes | T5,T16,T42 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T55,T164,T165 | Yes | T20,T55,T164 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T16,T42,T20 | Yes | T6,T86,T87 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T18,T53,T54 | Yes | T18,T53,T54 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T118,T173,T119 | Yes | T118,T173,T119 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T174,T175,T176 | Yes | T174,T175,T176 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T18,T53,T54 | Yes | T18,T53,T54 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T118,T173,T119 | Yes | T118,T173,T119 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T176,T177,T178 | Yes | T176,T177,T178 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T18,T53,T54 | Yes | T18,T53,T54 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T18,T53,T54 | Yes | T18,T53,T54 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T42,T61,T31 | Yes | T4,T87,T88 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[15:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[16] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[72:17] | Yes | Yes | *T179,*T180,*T124 | Yes | T179,T180,T124 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[143:74] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[144] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[179:145] | Yes | Yes | *T181,*T179,*T180 | Yes | T181,T179,T180 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[180] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[221:181] | Yes | Yes | *T181,*T4,*T5 | Yes | T181,T5,T18 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[222] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[246:223] | Yes | Yes | *T179,*T180,*T124 | Yes | T179,T180,T124 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[247] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:248] | Yes | Yes | T179,T180,T124 | Yes | T179,T180,T124 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T18,T16,T42 | Yes | T6,T18,T88 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[56:0] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[57] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:58] | Yes | Yes | T18,T20,T53 | Yes | T18,T20,T55 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T21,T22,T23 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T5,T16,T42 | Yes | T5,T6,T60 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 141 | 88.12 |
Total Bits | 10986 | 9368 | 85.27 |
Total Bits 0->1 | 5493 | 4698 | 85.53 |
Total Bits 1->0 | 5493 | 4670 | 85.02 |
Ports | 160 | 141 | 88.12 |
Port Bits | 10986 | 9368 | 85.27 |
Port Bits 0->1 | 5493 | 4698 | 85.53 |
Port Bits 1->0 | 5493 | 4670 | 85.02 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_ni | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | INPUT | |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_edn_ni | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | INPUT | |
edn_o.edn_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
edn_i.edn_fips | No | No | Yes | T115,T126,T117 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T66,*T32,*T75 | Yes | T66,T32,T75 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T32,T2,T76 | Yes | T32,T2,T76 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T72,T77,T79 | Yes | T72,T77,T78 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T72,T77,T78 | Yes | T72,T77,T79 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T66,*T32,*T75 | Yes | T66,T32,T75 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T72,T77,T79 | Yes | T72,T77,T79 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T20,*T55,*T151 | Yes | T20,T55,T151 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T32,*T72,*T77 | Yes | T32,T72,T77 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T66,*T32,*T75 | Yes | T66,T32,T75 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T32,T2,T76 | Yes | T32,T2,T76 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T5,T6,T60 | Yes | T5,T6,T60 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T5,T6,T60 | Yes | T5,T16,T42 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T5,T6,T60 | Yes | T5,T16,T42 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T72,T77,T79 | Yes | T72,T77,T79 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T32,T72,*T73 | Yes | T32,T72,T77 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T72,T77,T78 | Yes | T72,T77,T78 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T5,*T6,*T60 | Yes | T5,T16,T42 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T32,T72,T77 | Yes | T32,T72,T77 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T103,T152,T153 | Yes | T103,T152,T153 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T103,T152,T153 | Yes | T103,T152,T153 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T80,T56,T82 | Yes | T80,T56,T82 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T16,T61,T62 | Yes | T16,T61,T62 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T80,T56,T154 | Yes | T80,T56,T154 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T32,T80,T155 | Yes | T32,T80,T155 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T80,T56,T82 | Yes | T80,T56,T82 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T80,T82,T83 | Yes | T80,T82,T83 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T80,T56,T82 | Yes | T80,T56,T82 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T16,T61,T62 | Yes | T16,T61,T62 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T80,T56,T154 | Yes | T80,T56,T154 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T32,T80,T155 | Yes | T32,T80,T155 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T80,T56,T82 | Yes | T80,T56,T82 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T5,T62,T123 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[0] | No | No | Yes | T156 | INPUT | ||
lc_otp_vendor_test_i.ctrl[2:1] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[15:3] | No | No | Yes | T156,T157,T158 | INPUT | ||
lc_otp_vendor_test_i.ctrl[16] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[26:17] | No | No | Yes | T156,T158,T157 | INPUT | ||
lc_otp_vendor_test_i.ctrl[27] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[29:28] | No | No | Yes | T156,T158 | INPUT | ||
lc_otp_vendor_test_i.ctrl[30] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31] | No | No | Yes | T158 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[0] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[1] | No | No | No | INPUT | |||
lc_otp_program_i.count[17:2] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[18] | No | No | No | INPUT | |||
lc_otp_program_i.count[25:19] | Yes | Yes | T20,*T53,T55 | Yes | T20,T55,T51 | INPUT | |
lc_otp_program_i.count[27:26] | No | No | No | INPUT | |||
lc_otp_program_i.count[46:28] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[47] | No | No | No | INPUT | |||
lc_otp_program_i.count[50:48] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.count[51] | No | No | No | INPUT | |||
lc_otp_program_i.count[57:52] | Yes | Yes | *T20,*T53,*T55 | Yes | T20,T55,T51 | INPUT | |
lc_otp_program_i.count[58] | No | No | No | INPUT | |||
lc_otp_program_i.count[63:59] | Yes | Yes | T20,*T53,T55 | Yes | T20,T55,T51 | INPUT | |
lc_otp_program_i.count[64] | No | No | No | INPUT | |||
lc_otp_program_i.count[67:65] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[68] | No | No | No | INPUT | |||
lc_otp_program_i.count[76:69] | Yes | Yes | *T20,*T53,*T55 | Yes | T20,T55,T51 | INPUT | |
lc_otp_program_i.count[77] | No | No | No | INPUT | |||
lc_otp_program_i.count[83:78] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[84] | No | No | No | INPUT | |||
lc_otp_program_i.count[101:85] | Yes | Yes | *T18,*T20,*T53 | Yes | T18,T20,T55 | INPUT | |
lc_otp_program_i.count[103:102] | No | No | No | INPUT | |||
lc_otp_program_i.count[110:104] | Yes | Yes | *T18,*T20,*T53 | Yes | T18,T20,T55 | INPUT | |
lc_otp_program_i.count[111] | No | No | No | INPUT | |||
lc_otp_program_i.count[120:112] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[121] | No | No | No | INPUT | |||
lc_otp_program_i.count[125:122] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.count[127:126] | No | No | No | INPUT | |||
lc_otp_program_i.count[132:128] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[133] | No | No | No | INPUT | |||
lc_otp_program_i.count[138:134] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.count[139] | No | No | No | INPUT | |||
lc_otp_program_i.count[148:140] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[149] | No | No | No | INPUT | |||
lc_otp_program_i.count[154:150] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.count[155] | No | No | No | INPUT | |||
lc_otp_program_i.count[160:156] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[161] | No | No | No | INPUT | |||
lc_otp_program_i.count[175:162] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[176] | No | No | No | INPUT | |||
lc_otp_program_i.count[184:177] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.count[185] | No | No | No | INPUT | |||
lc_otp_program_i.count[190:186] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[192:191] | No | No | No | INPUT | |||
lc_otp_program_i.count[211:193] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.count[212] | No | No | No | INPUT | |||
lc_otp_program_i.count[218:213] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[219] | No | No | No | INPUT | |||
lc_otp_program_i.count[227:220] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[228] | No | No | No | INPUT | |||
lc_otp_program_i.count[233:229] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[234] | No | No | No | INPUT | |||
lc_otp_program_i.count[252:235] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[253] | No | No | No | INPUT | |||
lc_otp_program_i.count[270:254] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[271] | No | No | No | INPUT | |||
lc_otp_program_i.count[273:272] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[274] | No | No | No | INPUT | |||
lc_otp_program_i.count[276:275] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[277] | No | No | No | INPUT | |||
lc_otp_program_i.count[278] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[279] | No | No | No | INPUT | |||
lc_otp_program_i.count[280] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[281] | No | No | No | INPUT | |||
lc_otp_program_i.count[288:282] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[289] | No | No | No | INPUT | |||
lc_otp_program_i.count[291:290] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[292] | No | No | No | INPUT | |||
lc_otp_program_i.count[296:293] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.count[297] | No | No | No | INPUT | |||
lc_otp_program_i.count[303:298] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[304] | No | No | No | INPUT | |||
lc_otp_program_i.count[311:305] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[312] | No | No | No | INPUT | |||
lc_otp_program_i.count[317:313] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[318] | No | No | No | INPUT | |||
lc_otp_program_i.count[323:319] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[324] | No | No | No | INPUT | |||
lc_otp_program_i.count[331:325] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.count[332] | No | No | No | INPUT | |||
lc_otp_program_i.count[333] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[334] | No | No | No | INPUT | |||
lc_otp_program_i.count[336:335] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[337] | No | No | No | INPUT | |||
lc_otp_program_i.count[343:338] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.count[344] | No | No | No | INPUT | |||
lc_otp_program_i.count[345] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.count[346] | No | No | No | INPUT | |||
lc_otp_program_i.count[350:347] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[351] | No | No | No | INPUT | |||
lc_otp_program_i.count[371:352] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.count[372] | No | No | No | INPUT | |||
lc_otp_program_i.count[375:373] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[377:376] | No | No | No | INPUT | |||
lc_otp_program_i.count[381:378] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | INPUT | |
lc_otp_program_i.count[382] | No | No | No | INPUT | |||
lc_otp_program_i.count[383] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[0] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[1] | No | No | No | INPUT | |||
lc_otp_program_i.state[4:2] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.state[5] | No | No | No | INPUT | |||
lc_otp_program_i.state[14:6] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[15] | No | No | No | INPUT | |||
lc_otp_program_i.state[18:16] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[19] | No | No | No | INPUT | |||
lc_otp_program_i.state[26:20] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[27] | No | No | No | INPUT | |||
lc_otp_program_i.state[51:28] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[52] | No | No | No | INPUT | |||
lc_otp_program_i.state[57:53] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[58] | No | No | No | INPUT | |||
lc_otp_program_i.state[65:59] | Yes | Yes | *T20,*T53,*T55 | Yes | T20,T55,T51 | INPUT | |
lc_otp_program_i.state[66] | No | No | No | INPUT | |||
lc_otp_program_i.state[100:67] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[101] | No | No | No | INPUT | |||
lc_otp_program_i.state[103:102] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[105:104] | No | No | No | INPUT | |||
lc_otp_program_i.state[107:106] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.state[108] | No | No | No | INPUT | |||
lc_otp_program_i.state[125:109] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[126] | No | No | No | INPUT | |||
lc_otp_program_i.state[151:127] | Yes | Yes | *T19,*T20,*T53 | Yes | T19,T20,T55 | INPUT | |
lc_otp_program_i.state[153:152] | No | No | No | INPUT | |||
lc_otp_program_i.state[156:154] | Yes | Yes | *T19,*T20,*T53 | Yes | T19,T20,T55 | INPUT | |
lc_otp_program_i.state[157] | No | No | No | INPUT | |||
lc_otp_program_i.state[166:158] | Yes | Yes | *T19,*T20,*T53 | Yes | T19,T20,T55 | INPUT | |
lc_otp_program_i.state[167] | No | No | No | INPUT | |||
lc_otp_program_i.state[178:168] | Yes | Yes | *T19,*T20,*T53 | Yes | T19,T20,T55 | INPUT | |
lc_otp_program_i.state[179] | No | No | No | INPUT | |||
lc_otp_program_i.state[186:180] | Yes | Yes | *T19,T20,*T53 | Yes | T19,T20,T55 | INPUT | |
lc_otp_program_i.state[187] | No | No | No | INPUT | |||
lc_otp_program_i.state[194:188] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[195] | No | No | No | INPUT | |||
lc_otp_program_i.state[200:196] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[201] | No | No | No | INPUT | |||
lc_otp_program_i.state[203:202] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[204] | No | No | No | INPUT | |||
lc_otp_program_i.state[208:205] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[209] | No | No | No | INPUT | |||
lc_otp_program_i.state[213:210] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.state[214] | No | No | No | INPUT | |||
lc_otp_program_i.state[226:215] | Yes | Yes | *T19,T20,*T53 | Yes | T19,T20,T55 | INPUT | |
lc_otp_program_i.state[227] | No | No | No | INPUT | |||
lc_otp_program_i.state[232:228] | Yes | Yes | T20,T55,T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[234:233] | No | No | No | INPUT | |||
lc_otp_program_i.state[235] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.state[236] | No | No | No | INPUT | |||
lc_otp_program_i.state[243:237] | Yes | Yes | *T19,*T20,*T53 | Yes | T19,T20,T55 | INPUT | |
lc_otp_program_i.state[244] | No | No | No | INPUT | |||
lc_otp_program_i.state[253:245] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[254] | No | No | No | INPUT | |||
lc_otp_program_i.state[257:255] | Yes | Yes | *T159,*T160,*T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.state[258] | No | No | No | INPUT | |||
lc_otp_program_i.state[261:259] | Yes | Yes | *T4,*T18,*T19 | Yes | T18,T19,T20 | INPUT | |
lc_otp_program_i.state[262] | No | No | No | INPUT | |||
lc_otp_program_i.state[265:263] | Yes | Yes | T20,T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[266] | No | No | No | INPUT | |||
lc_otp_program_i.state[267] | Yes | Yes | *T4,*T18,*T19 | Yes | T18,T19,T20 | INPUT | |
lc_otp_program_i.state[268] | No | No | No | INPUT | |||
lc_otp_program_i.state[278:269] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[280:279] | No | No | No | INPUT | |||
lc_otp_program_i.state[283:281] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T42 | INPUT | |
lc_otp_program_i.state[284] | No | No | No | INPUT | |||
lc_otp_program_i.state[298:285] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T42 | INPUT | |
lc_otp_program_i.state[299] | No | No | No | INPUT | |||
lc_otp_program_i.state[309:300] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | INPUT | |
lc_otp_program_i.state[310] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:311] | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T19,T20,T55 | Yes | T19,T20,T55 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T19,T20,T55 | Yes | T19,T20,T55 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T100,T162,T163 | Yes | T100,T162,T163 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T5,T16,T42 | Yes | T5,T6,T60 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T5,T16,T42 | Yes | T5,T6,T60 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T16,T61,T62 | Yes | T16,T61,T62 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T19,T20,T55 | Yes | T19,T20,T55 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T16,T20,T55 | Yes | T4,T6,T60 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T55,T164,T165 | Yes | T20,T55,T164 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T4,T86,T18 | Yes | T18,T19,T31 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T5,T18,T42 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T55,T164,T165 | Yes | T20,T55,T164 | OUTPUT | |
otp_lc_data_o.count[0] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.count[1] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[17:2] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.count[18] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[25:19] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[27:26] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[46:28] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[47] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[50:48] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[51] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[57:52] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[58] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[63:59] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[64] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[67:65] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.count[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[76:69] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[77] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[83:78] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[84] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[101:85] | Yes | Yes | *T18,*T20,*T53 | Yes | T18,T20,T55 | OUTPUT | |
otp_lc_data_o.count[103:102] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[110:104] | Yes | Yes | *T18,*T20,*T53 | Yes | T18,T20,T55 | OUTPUT | |
otp_lc_data_o.count[111] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[120:112] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[125:122] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[127:126] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[132:128] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[133] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[138:134] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[139] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[148:140] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.count[149] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[154:150] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[160:156] | Yes | Yes | *T166,*T167,*T168 | Yes | T19,T169,T170 | OUTPUT | |
otp_lc_data_o.count[161] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[175:162] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[176] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[184:177] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[185] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[190:186] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[192:191] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[211:193] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[212] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[218:213] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[219] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[227:220] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[228] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[233:229] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[234] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[252:235] | Yes | Yes | *T167,*T168,*T171 | Yes | T166,T100,T167 | OUTPUT | |
otp_lc_data_o.count[253] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[270:254] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.count[271] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[273:272] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT | |
otp_lc_data_o.count[274] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[276:275] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[278] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT | |
otp_lc_data_o.count[279] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[280] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT | |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[288:282] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[289] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[291:290] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[296:293] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[297] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[303:298] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[304] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[311:305] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[312] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[317:313] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT | |
otp_lc_data_o.count[318] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[323:319] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[324] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[331:325] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[332] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[333] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[336:335] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[337] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[343:338] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[344] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[345] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[346] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350:347] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT | |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[371:352] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[372] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[375:373] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.count[377:376] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[381:378] | Yes | Yes | *T167,*T168,*T171 | Yes | T100,T167,T168 | OUTPUT | |
otp_lc_data_o.count[382] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[0] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[1] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[4:2] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.state[5] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[14:6] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[15] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[18:16] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[19] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[26:20] | Yes | Yes | T20,T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.state[27] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[51:28] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.state[52] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[57:53] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[58] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[65:59] | Yes | Yes | *T20,*T53,*T55 | Yes | T20,T55,T51 | OUTPUT | |
otp_lc_data_o.state[66] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[100:67] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.state[101] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[103:102] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[105:104] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[107:106] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.state[108] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[125:109] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[126] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[151:127] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[153:152] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[156:154] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[157] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[166:158] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[167] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[178:168] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[186:180] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[187] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[194:188] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[195] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[200:196] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.state[201] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[203:202] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[204] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[208:205] | Yes | Yes | T20,T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.state[209] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[213:210] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.state[214] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[226:215] | Yes | Yes | *T19,T20,*T53 | Yes | T19,T20,T55 | OUTPUT | |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[232:228] | Yes | Yes | T20,T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.state[234:233] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[235] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.state[236] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[243:237] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[244] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[253:245] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.state[254] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[257:255] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.state[258] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[261:259] | Yes | Yes | *T4,T18,T19 | Yes | T18,T19,T20 | OUTPUT | |
otp_lc_data_o.state[262] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[265:263] | Yes | Yes | T5,*T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[267] | Yes | Yes | *T4,*T18,*T19 | Yes | T18,T19,T20 | OUTPUT | |
otp_lc_data_o.state[268] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[278:269] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.state[280:279] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[283:281] | Yes | Yes | T18,*T52,*T167 | Yes | T18,T172,T52 | OUTPUT | |
otp_lc_data_o.state[284] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[298:285] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T42 | OUTPUT | |
otp_lc_data_o.state[299] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[309:300] | Yes | Yes | *T20,*T55,*T66 | Yes | T20,T55,T66 | OUTPUT | |
otp_lc_data_o.state[310] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:311] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T16,T61,T62 | Yes | T16,T61,T62 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T55,T164,T165 | Yes | T20,T55,T164 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T5,T6,T60 | Yes | T5,T16,T42 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T55,T164,T165 | Yes | T20,T55,T164 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T16,T42,T20 | Yes | T6,T86,T87 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T18,T53,T54 | Yes | T18,T53,T54 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T118,T173,T119 | Yes | T118,T173,T119 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T174,T175,T176 | Yes | T174,T175,T176 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T18,T53,T54 | Yes | T18,T53,T54 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T118,T173,T119 | Yes | T118,T173,T119 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T176,T177,T178 | Yes | T176,T177,T178 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T18,T53,T54 | Yes | T18,T53,T54 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T5,T18,T16 | Yes | T5,T6,T60 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T18,T53,T54 | Yes | T18,T53,T54 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T42,T61,T31 | Yes | T4,T87,T88 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[15:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[16] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[72:17] | Yes | Yes | *T179,*T180,*T124 | Yes | T179,T180,T124 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[143:74] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[144] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[179:145] | Yes | Yes | *T181,*T179,*T180 | Yes | T181,T179,T180 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[180] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[221:181] | Yes | Yes | *T181,*T4,*T5 | Yes | T181,T5,T18 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[222] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[246:223] | Yes | Yes | *T179,*T180,*T124 | Yes | T179,T180,T124 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[247] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:248] | Yes | Yes | T179,T180,T124 | Yes | T179,T180,T124 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T18,T16,T42 | Yes | T6,T18,T88 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T18,T16 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[56:0] | Yes | Yes | *T5,*T18,*T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[57] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:58] | Yes | Yes | T18,T20,T53 | Yes | T18,T20,T55 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T5,T18,T16 | Yes | T4,T5,T6 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T5,T16,T42 | Yes | T5,T6,T60 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |