Unified Coverage Report :: Module :: rv_plic_gateway

Module : rv_plic_gateway

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
69.17	100.00	20.00			87.50

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.top_earlgrey.u_rv_plic.u_gateway	75.00	100.00	25.00			100.00

---

Module Instance : tb.dut.top_earlgrey.u_rv_plic.u_gateway

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
75.00	100.00	25.00			100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
75.00	100.00	25.00			100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
91.30	99.83	66.67	100.00		100.00	90.00	u_rv_plic

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

Line Coverage for Module : rv_plic_gateway

	Line No.	Total	Covered	Percent
TOTAL		11	11	100.00
ALWAYS	28	3	3	100.00
ALWAYS	33	0	0
ALWAYS	33	2	2	100.00
ALWAYS	43	3	3	100.00
ALWAYS	55	3	3	100.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv' or '../src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
28	2	2
29	1	1
33	1	1
34	1	1
43	1	1
44	1	1
46	1	1
55	1	1
56	1	1
58	1	1

---

Cond Coverage for Module : rv_plic_gateway

	Total	Covered	Percent
Conditions	5	1	20.00
Logical	5	1	20.00
Non-Logical	0	0
Event	0	0

 LINE       34
 EXPRESSION (le_i[i] ? (src_i[i] & ((~src_q[i]))) : src_i[i])
             ---1---

-1-	Status	Tests
0	Covered	T4,T5,T16
1	Not Covered

 LINE       34
 SUB-EXPRESSION (src_i[i] & ((~src_q[i])))
                 ----1---   ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

---

Branch Coverage for Module : rv_plic_gateway

	Line No.	Total	Covered	Percent
Branches		8	7	87.50
IF	28	2	2	100.00
TERNARY	34	2	1	50.00
IF	43	2	2	100.00
IF	55	2	2	100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv' or '../src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	28	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Covered	T4,T5,T6
0	Covered	T4,T5,T6

	LineNo.	Expression
-1-:	34	(le_i[i]) ? 

Branches:

-1-	Status	Tests
1	Not Covered
0	Covered	T4,T5,T16

	LineNo.	Expression
-1-:	43	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Covered	T4,T5,T6
0	Covered	T4,T5,T6

	LineNo.	Expression
-1-:	55	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Covered	T4,T5,T6
0	Covered	T4,T5,T6

Line Coverage for Instance : tb.dut.top_earlgrey.u_rv_plic.u_gateway

	Line No.	Total	Covered	Percent
TOTAL		11	11	100.00
ALWAYS	28	3	3	100.00
ALWAYS	33	0	0
ALWAYS	33	2	2	100.00
ALWAYS	43	3	3	100.00
ALWAYS	55	3	3	100.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv' or '../src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
28	2	2
29	1	1
33	1	1
34	1	1
43	1	1
44	1	1
46	1	1
55	1	1
56	1	1
58	1	1

---

Cond Coverage for Instance : tb.dut.top_earlgrey.u_rv_plic.u_gateway

	Total	Covered	Percent
Conditions	4	1	25.00
Logical	4	1	25.00
Non-Logical	0	0
Event	0	0

 LINE       34
 EXPRESSION (le_i[i] ? (src_i[i] & ((~src_q[i]))) : src_i[i])
             ---1---

-1-	Status	Tests	Exclude Annotation
0	Covered	T4,T5,T16
1	Excluded		[UNR] The le_i input is tied off to 0 (only level interrupts supported).

 LINE       34
 SUB-EXPRESSION (src_i[i] & ((~src_q[i])))
                 ----1---   ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

---

Branch Coverage for Instance : tb.dut.top_earlgrey.u_rv_plic.u_gateway

	Line No.	Total	Covered	Percent
Branches		7	7	100.00
IF	28	2	2	100.00
TERNARY	34	1	1	100.00
IF	43	2	2	100.00
IF	55	2	2	100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv' or '../src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	28	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Covered	T4,T5,T6
0	Covered	T4,T5,T6

	LineNo.	Expression
-1-:	34	(le_i[i]) ? 

Branches:

-1-	Status	Tests	Exclude Annotation
1	Excluded		[UNR] The le_i input is tied off to 0 (only level interrupts supported).
0	Covered	T4,T5,T16

	LineNo.	Expression
-1-:	43	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Covered	T4,T5,T6
0	Covered	T4,T5,T6

	LineNo.	Expression
-1-:	55	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Covered	T4,T5,T6
0	Covered	T4,T5,T6