Unified Coverage Report :: Group :: tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	3508787	1			T76	1669		T77	1803		T82	112
values[2]	716275	1			T76	542		T77	148		T82	41
values[3]	109963	1			T76	41		T77	1		T82	3
values[4]	58456	1			T76	3		T150	13		T250	82
values[5]	39305	1			T150	12		T250	86		T430	29
values[6]	29171	1			T150	12		T250	64		T430	25
values[7]	22847	1			T150	12		T250	63		T430	42
values[8]	19075	1			T150	13		T250	87		T430	41
values[9]	16399	1			T150	13		T250	74		T430	39
values[10]	14536	1			T150	12		T250	71		T430	30
values[11]	13533	1			T150	12		T250	32		T430	25
values[12]	12754	1			T150	12		T250	23		T430	39
values[13]	11984	1			T150	12		T250	8		T430	17
values[14]	11039	1			T150	12		T250	2		T430	22
values[15]	11014	1			T150	12		T250	4		T430	17
values[16]	10453	1			T150	12		T250	2		T430	19
values[17]	9991	1			T150	12		T250	2		T430	15
values[18]	9666	1			T150	12		T250	1		T430	12
values[19]	9587	1			T150	12		T250	3		T430	18
values[20]	9275	1			T150	12		T250	1		T430	10
values[21]	9070	1			T150	13		T250	1		T430	15
values[22]	9001	1			T150	12		T250	2		T430	26
values[23]	8659	1			T150	12		T250	5		T430	39
values[24]	8090	1			T150	12		T250	3		T430	21
values[25]	7809	1			T150	12		T250	1		T430	8
values[26]	7435	1			T150	12		T250	2		T430	9
values[27]	6925	1			T150	12		T250	1		T430	15
values[28]	6665	1			T150	12		T250	5		T430	16
values[29]	6540	1			T150	12		T250	4		T430	12
values[30]	6204	1			T150	12		T250	7		T430	7
values[31]	5903	1			T150	13		T250	9		T430	7
values[32]	5619	1			T150	12		T250	1		T430	5
values[33]	4995	1			T150	12		T250	1		T430	8
values[34]	4651	1			T150	12		T250	1		T430	10
values[35]	4230	1			T150	12		T250	1		T430	10
values[36]	4082	1			T150	12		T250	3		T430	6
values[37]	4140	1			T150	12		T250	7		T430	6
values[38]	3891	1			T150	12		T250	2		T430	4
values[39]	3765	1			T150	12		T250	2		T430	5
values[40]	3617	1			T150	12		T250	2		T430	7
values[41]	3525	1			T150	12		T250	2		T430	7
values[42]	3357	1			T150	12		T250	1		T430	10
values[43]	3208	1			T150	12		T250	2		T430	8
values[44]	3152	1			T150	12		T250	2		T430	8
values[45]	3160	1			T150	13		T250	1		T430	5
values[46]	3138	1			T150	13		T250	1		T430	4
values[47]	3084	1			T150	12		T250	2		T430	10
values[48]	2986	1			T150	13		T250	1		T430	10
values[49]	2931	1			T150	13		T250	2		T430	3
values[50]	2880	1			T150	12		T250	1		T430	4
values[51]	2932	1			T150	12		T250	1		T430	5
values[52]	2825	1			T150	12		T250	3		T430	9
values[53]	2709	1			T150	12		T250	4		T430	4
values[54]	2795	1			T150	13		T250	3		T430	2
values[55]	2756	1			T150	12		T250	1		T430	2
values[56]	2738	1			T150	12		T250	3		T430	2
values[57]	2614	1			T150	12		T250	3		T430	2
values[58]	2506	1			T150	13		T250	2		T430	2
values[59]	2528	1			T150	12		T250	2		T430	2
values[60]	2590	1			T150	12		T250	2		T430	2
values[61]	2769	1			T150	13		T250	3		T430	2
values[62]	4217	1			T150	12		T250	16		T430	2
values[63]	11791	1			T150	15		T250	33		T430	3
values[64]	245473	1			T150	2380		T250	72		T430	97

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	4537185	1			T76	1603		T77	2006		T82	101
values[2]	770200	1			T76	449		T77	97		T82	25
values[3]	82217	1			T76	123		T77	1		T82	1
values[4]	14978	1			T76	38		T150	44		T250	51
values[5]	5672	1			T76	14		T150	19		T250	39
values[6]	3527	1			T76	5		T150	9		T250	41
values[7]	2593	1			T150	8		T250	26		T430	2
values[8]	2304	1			T150	3		T250	27		T430	2
values[9]	2116	1			T150	2		T250	21		T430	2
values[10]	1830	1			T150	2		T250	15		T430	2
values[11]	1610	1			T150	2		T250	4		T430	3
values[12]	1348	1			T150	2		T250	6		T430	2
values[13]	1274	1			T150	2		T250	2		T430	2
values[14]	1099	1			T150	2		T430	2		T251	9
values[15]	1014	1			T150	2		T430	2		T251	3
values[16]	1020	1			T150	2		T430	1		T251	2
values[17]	1035	1			T150	2		T430	1		T251	4
values[18]	965	1			T150	2		T430	2		T251	11
values[19]	860	1			T150	2		T430	2		T251	12
values[20]	864	1			T150	2		T430	2		T251	11
values[21]	854	1			T150	2		T430	2		T251	7
values[22]	823	1			T150	2		T430	2		T251	2
values[23]	835	1			T150	2		T430	2		T251	2
values[24]	741	1			T150	2		T430	3		T429	2
values[25]	683	1			T150	2		T430	2		T429	2
values[26]	626	1			T150	2		T430	2		T429	1
values[27]	689	1			T150	2		T430	2		T429	3
values[28]	711	1			T150	2		T430	2		T429	2
values[29]	679	1			T150	2		T430	2		T429	2
values[30]	615	1			T150	2		T430	2		T429	1
values[31]	592	1			T150	2		T430	3		T429	2
values[32]	634	1			T150	2		T430	2		T429	1
values[33]	672	1			T150	2		T430	2		T429	6
values[34]	646	1			T150	2		T430	2		T429	2
values[35]	567	1			T150	2		T430	2		T429	1
values[36]	586	1			T150	2		T430	2		T429	3
values[37]	615	1			T150	3		T430	2		T429	1
values[38]	565	1			T150	2		T430	2		T429	3
values[39]	554	1			T150	2		T430	2		T429	2
values[40]	503	1			T150	2		T430	2		T429	1
values[41]	528	1			T150	3		T430	2		T429	1
values[42]	532	1			T150	2		T430	2		T429	3
values[43]	464	1			T150	2		T430	2		T429	1
values[44]	465	1			T150	2		T430	2		T429	1
values[45]	441	1			T150	2		T430	2		T429	1
values[46]	436	1			T150	2		T430	2		T429	1
values[47]	415	1			T150	2		T430	2		T429	2
values[48]	437	1			T150	2		T430	2		T429	3
values[49]	425	1			T150	2		T430	2		T429	5
values[50]	413	1			T150	2		T430	2		T429	1
values[51]	423	1			T150	2		T430	2		T429	3
values[52]	412	1			T150	2		T430	2		T429	1
values[53]	413	1			T150	2		T430	2		T429	1
values[54]	405	1			T150	2		T430	2		T429	3
values[55]	398	1			T150	2		T430	2		T429	1
values[56]	381	1			T150	2		T430	2		T429	1
values[57]	399	1			T150	2		T430	2		T429	2
values[58]	364	1			T150	2		T430	2		T429	1
values[59]	383	1			T150	2		T430	2		T429	1
values[60]	378	1			T150	2		T430	2		T429	3
values[61]	429	1			T150	2		T430	2		T429	1
values[62]	743	1			T150	2		T430	2		T429	2
values[63]	2807	1			T150	2		T430	4		T429	1
values[64]	28342	1			T150	394		T430	153		T429	49

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	564323	1			T76	15		T77	15		T82	1
values[2]	2475111	1			T76	245		T77	1664		T82	81
values[3]	1126586	1			T76	1665		T77	143		T82	36
values[4]	147007	1			T76	473		T82	1		T150	12
values[5]	76211	1			T76	23		T150	12		T250	117
values[6]	49440	1			T76	1		T150	13		T250	85
values[7]	35410	1			T76	1		T150	12		T250	81
values[8]	28251	1			T150	12		T250	84		T430	7
values[9]	23590	1			T150	12		T250	104		T430	7
values[10]	20414	1			T150	12		T250	83		T430	12
values[11]	18477	1			T150	12		T250	40		T430	20
values[12]	17046	1			T150	12		T250	32		T430	14
values[13]	15437	1			T150	12		T250	24		T430	16
values[14]	14125	1			T150	12		T250	19		T430	5
values[15]	13642	1			T150	12		T250	12		T430	14
values[16]	12770	1			T150	12		T250	6		T430	10
values[17]	12164	1			T150	12		T250	1		T430	21
values[18]	11645	1			T150	12		T250	2		T430	31
values[19]	10926	1			T150	12		T250	4		T430	17
values[20]	10441	1			T150	12		T250	4		T430	18
values[21]	10229	1			T150	12		T250	1		T430	12
values[22]	9784	1			T150	12		T250	2		T430	15
values[23]	9436	1			T150	12		T250	1		T430	13
values[24]	8960	1			T150	12		T250	3		T430	4
values[25]	8753	1			T150	12		T250	5		T430	19
values[26]	8728	1			T150	12		T250	6		T430	18
values[27]	8496	1			T150	12		T250	3		T430	7
values[28]	7818	1			T150	12		T250	2		T430	13
values[29]	7480	1			T150	12		T250	3		T430	16
values[30]	6889	1			T150	13		T250	7		T430	23
values[31]	6599	1			T150	12		T250	3		T430	14
values[32]	6343	1			T150	12		T250	3		T430	7
values[33]	5818	1			T150	13		T250	2		T251	8
values[34]	5522	1			T150	12		T250	3		T251	13
values[35]	5080	1			T150	12		T250	3		T251	10
values[36]	4782	1			T150	12		T250	2		T251	17
values[37]	4527	1			T150	12		T250	1		T251	10
values[38]	4446	1			T150	12		T250	3		T251	12
values[39]	4180	1			T150	12		T250	2		T251	5
values[40]	3917	1			T150	12		T250	2		T251	4
values[41]	3846	1			T150	12		T250	1		T251	2
values[42]	3749	1			T150	12		T250	2		T251	5
values[43]	3701	1			T150	12		T250	5		T251	4
values[44]	3584	1			T150	12		T250	7		T251	3
values[45]	3522	1			T150	12		T250	2		T251	9
values[46]	3498	1			T150	12		T250	1		T251	14
values[47]	3352	1			T150	12		T250	1		T251	11
values[48]	3464	1			T150	12		T250	1		T251	5
values[49]	3288	1			T150	12		T250	2		T251	4
values[50]	3226	1			T150	12		T250	7		T251	3
values[51]	3198	1			T150	12		T250	1		T251	2
values[52]	3112	1			T150	12		T250	1		T251	2
values[53]	3078	1			T150	12		T250	2		T251	1
values[54]	3035	1			T150	12		T250	5		T251	2
values[55]	2999	1			T150	12		T250	4		T251	2
values[56]	2885	1			T150	12		T250	2		T251	2
values[57]	2934	1			T150	12		T250	1		T251	2
values[58]	2950	1			T150	12		T250	2		T251	6
values[59]	2821	1			T150	12		T250	5		T251	2
values[60]	2814	1			T150	13		T250	3		T251	1
values[61]	2934	1			T150	12		T250	2		T251	5
values[62]	3887	1			T150	12		T250	1		T251	4
values[63]	9990	1			T150	15		T250	11		T251	4
values[64]	234155	1			T150	2330		T250	54		T251	49