Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
25.56 26.32 23.08 27.27


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
45.45 50.00 31.82 54.55


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.37 98.93 81.27 98.84 75.84 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 67.58 76.47 44.44 81.82



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
25.56 26.32 23.08 27.27


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
45.45 50.00 31.82 54.55


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.37 98.93 81.27 98.84 75.84 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 67.58 76.47 44.44 81.82



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
25.56 26.32 23.08 27.27


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
45.45 50.00 31.82 54.55


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.37 98.93 81.27 98.84 75.84 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 67.58 76.47 44.44 81.82



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
45.52 52.63 38.46 45.45


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
56.14 63.89 40.91 63.64


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.37 98.93 81.27 98.84 75.84 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 67.58 76.47 44.44 81.82



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
46.80 57.89 46.15 36.36


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
68.35 77.78 63.64 63.64


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.37 98.93 81.27 98.84 75.84 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 93.27 100.00 88.89 90.91



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
49.37 57.89 53.85 36.36


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
69.87 77.78 68.18 63.64


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.37 98.93 81.27 98.84 75.84 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 93.27 100.00 88.89 90.91



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
49.83 57.89 46.15 45.45


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
69.87 77.78 63.64 68.18


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.37 98.93 81.27 98.84 75.84 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 93.27 100.00 88.89 90.91



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
52.40 57.89 53.85 45.45


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
71.38 77.78 68.18 68.18


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.37 98.93 81.27 98.84 75.84 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 93.27 100.00 88.89 90.91

Line Coverage for Module : pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191368.42
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 1 1
52 1 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Module : pinmux_wkup
TotalCoveredPercent
Conditions13969.23
Logical13969.23
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT1,T2,T3
10CoveredT4,T5,T6
11CoveredT1,T2,T3

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT4,T5,T6
10CoveredT1,T2,T3
11CoveredT1,T2,T3

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0CoveredT7
1CoveredT4,T5,T6

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0CoveredT7
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Module : pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 6 54.55
TERNARY 50 3 2 66.67
IF 57 6 2 33.33
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T4,T5,T6
0 1 Not Covered
0 0 Covered T7


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T1,T2,T3
0 - Covered T8,T9,T7


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T4,T5,T6
0 Covered T4,T5,T6

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL19526.32
CONT_ASSIGN45100.00
CONT_ASSIGN46100.00
CONT_ASSIGN50100.00
CONT_ASSIGN52100.00
ALWAYS551000.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 0 1
46 0 1
50 0 1
52 0 1
55 0 1
56 0 1
57 0 1
58 0 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
==> MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup
TotalCoveredPercent
Conditions13323.08
Logical13323.08
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01Not Covered
10CoveredT4,T5,T6
11Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT4,T5,T6
10Not Covered
11Not Covered

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0Not Covered
1CoveredT4,T5,T6

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0Not Covered
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 3 27.27
TERNARY 50 3 1 33.33
IF 57 6 0 0.00
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T4,T5,T6
0 1 Not Covered
0 0 Not Covered


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Not Covered
0 - Not Covered


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T4,T5,T6
0 Covered T4,T5,T6

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL19526.32
CONT_ASSIGN45100.00
CONT_ASSIGN46100.00
CONT_ASSIGN50100.00
CONT_ASSIGN52100.00
ALWAYS551000.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 0 1
46 0 1
50 0 1
52 0 1
55 0 1
56 0 1
57 0 1
58 0 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
==> MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup
TotalCoveredPercent
Conditions13323.08
Logical13323.08
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01Not Covered
10CoveredT4,T5,T6
11Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT4,T5,T6
10Not Covered
11Not Covered

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0Not Covered
1CoveredT4,T5,T6

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0Not Covered
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 3 27.27
TERNARY 50 3 1 33.33
IF 57 6 0 0.00
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T4,T5,T6
0 1 Not Covered
0 0 Not Covered


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Not Covered
0 - Not Covered


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T4,T5,T6
0 Covered T4,T5,T6

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL19526.32
CONT_ASSIGN45100.00
CONT_ASSIGN46100.00
CONT_ASSIGN50100.00
CONT_ASSIGN52100.00
ALWAYS551000.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 0 1
46 0 1
50 0 1
52 0 1
55 0 1
56 0 1
57 0 1
58 0 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
==> MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup
TotalCoveredPercent
Conditions13323.08
Logical13323.08
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01Not Covered
10CoveredT4,T5,T6
11Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT4,T5,T6
10Not Covered
11Not Covered

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0Not Covered
1CoveredT4,T5,T6

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0Not Covered
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 3 27.27
TERNARY 50 3 1 33.33
IF 57 6 0 0.00
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T4,T5,T6
0 1 Not Covered
0 0 Not Covered


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Not Covered
0 - Not Covered


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T4,T5,T6
0 Covered T4,T5,T6

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191052.63
CONT_ASSIGN45100.00
CONT_ASSIGN46100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
ALWAYS5510330.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 0 1
46 0 1
50 1 1
52 1 1
55 1 1
56 1 1
57 1 1
58 0 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup
TotalCoveredPercent
Conditions13538.46
Logical13538.46
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01Not Covered
10CoveredT4,T5,T6
11Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT4,T5,T6
10Not Covered
11Not Covered

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0CoveredT7
1CoveredT4,T5,T6

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0CoveredT7
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 5 45.45
TERNARY 50 3 2 66.67
IF 57 6 1 16.67
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T4,T5,T6
0 1 Not Covered
0 0 Covered T7


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Not Covered
0 - Covered T7


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T4,T5,T6
0 Covered T4,T5,T6

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191157.89
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN50100.00
CONT_ASSIGN52100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 0 1
52 0 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
==> MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup
TotalCoveredPercent
Conditions13646.15
Logical13646.15
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT10
10CoveredT4,T5,T6
11Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT4,T5,T6
10CoveredT10
11CoveredT10

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0Not Covered
1CoveredT4,T5,T6

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0Not Covered
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 4 36.36
TERNARY 50 3 1 33.33
IF 57 6 1 16.67
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T4,T5,T6
0 1 Not Covered
0 0 Not Covered


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T10
0 - Not Covered


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T4,T5,T6
0 Covered T4,T5,T6

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191157.89
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN50100.00
CONT_ASSIGN52100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 0 1
52 0 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
==> MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup
TotalCoveredPercent
Conditions13753.85
Logical13753.85
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT1,T2,T11
10CoveredT4,T5,T6
11CoveredT1,T2,T11

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT4,T5,T6
10CoveredT1,T2,T11
11CoveredT1,T2,T11

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0Not Covered
1CoveredT4,T5,T6

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0Not Covered
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 4 36.36
TERNARY 50 3 1 33.33
IF 57 6 1 16.67
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T4,T5,T6
0 1 Not Covered
0 0 Not Covered


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T1,T2,T11
0 - Not Covered


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T4,T5,T6
0 Covered T4,T5,T6

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191157.89
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN50100.00
CONT_ASSIGN52100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 0 1
52 0 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup
TotalCoveredPercent
Conditions13646.15
Logical13646.15
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT8
10CoveredT4,T5,T6
11Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT4,T5,T6
10CoveredT8
11CoveredT8

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0Not Covered
1CoveredT4,T5,T6

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0Not Covered
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 5 45.45
TERNARY 50 3 1 33.33
IF 57 6 2 33.33
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T4,T5,T6
0 1 Not Covered
0 0 Not Covered


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T8
0 - Covered T8


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T4,T5,T6
0 Covered T4,T5,T6

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191157.89
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN50100.00
CONT_ASSIGN52100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 0 1
52 0 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup
TotalCoveredPercent
Conditions13753.85
Logical13753.85
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT3,T9,T12
10CoveredT4,T5,T6
11CoveredT3,T9,T12

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT4,T5,T6
10CoveredT3,T9,T12
11CoveredT3,T9,T12

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0Not Covered
1CoveredT4,T5,T6

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0Not Covered
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 5 45.45
TERNARY 50 3 1 33.33
IF 57 6 2 33.33
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T4,T5,T6
0 1 Not Covered
0 0 Not Covered


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T3,T9,T12
0 - Covered T9,T13,T14


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T4,T5,T6
0 Covered T4,T5,T6

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%