SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.07 | 85.07 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.26 | 85.26 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.26 | 85.26 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.26 | 85.26 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.34 | 90.68 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9368 | 85.07 |
Total Bits 0->1 | 5506 | 4698 | 85.33 |
Total Bits 1->0 | 5506 | 4670 | 84.82 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9368 | 85.07 |
Port Bits 0->1 | 5506 | 4698 | 85.33 |
Port Bits 1->0 | 5506 | 4670 | 84.82 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_ni | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | INPUT |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_edn_ni | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | INPUT |
edn_o.edn_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
edn_i.edn_fips | No | No | Yes | T149,T150,T151 | INPUT | |
edn_i.edn_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T85,*T86,*T87 | Yes | T85,T86,T87 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T64,*T79,*T88 | Yes | T64,T79,T88 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T64,T79,T88 | Yes | T64,T79,T88 | INPUT |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T85,T86,T124 | Yes | T85,T86,T122 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T85,T86,T89 | Yes | T85,T86,T124 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T64,*T65,*T142 | Yes | T64,T65,T142 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T85,T86,T122 | Yes | T85,T86,T124 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T18,*T152,*T153 | Yes | T18,T152,T153 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T85,*T86,*T87 | Yes | T85,T86,T87 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T64,*T65,*T85 | Yes | T64,T65,T85 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T64,*T79,*T88 | Yes | T64,T79,T88 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T64,T79,T88 | Yes | T64,T79,T88 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T85,T86,T89 | Yes | T85,T86,T89 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T64,*T65,T85 | Yes | T64,T65,T85 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T85,T86,T89 | Yes | T85,T86,T89 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T154,T155,T156 | Yes | T154,T155,T156 | OUTPUT |
intr_otp_error_o | Yes | Yes | T154,T155,T156 | Yes | T154,T155,T156 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T64,T92,T93 | Yes | T64,T92,T93 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T4,T42,T74 | Yes | T4,T42,T74 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T158,T64,T92 | Yes | T158,T64,T92 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T64,T92,T65 | Yes | T64,T92,T65 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T159 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T92,T93,T159 | Yes | T92,T93,T157 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T91,T92,T65 | Yes | T91,T92,T65 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T64,T92,T93 | Yes | T64,T92,T93 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T4,T42,T74 | Yes | T4,T42,T74 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T158,T64,T92 | Yes | T158,T64,T92 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T64,T92,T65 | Yes | T64,T92,T65 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T91,T92,T65 | Yes | T91,T92,T65 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T71,T20,T109 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
lc_otp_vendor_test_i.ctrl[1:0] | No | No | Yes | T160,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[2] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[9:3] | No | No | Yes | T161,T160,T162 | INPUT | |
lc_otp_vendor_test_i.ctrl[10] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[11] | No | No | Yes | T161,T160 | INPUT | |
lc_otp_vendor_test_i.ctrl[12] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[15:13] | No | No | Yes | T161,T162 | INPUT | |
lc_otp_vendor_test_i.ctrl[16] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[18:17] | No | No | Yes | T160,T161,T162 | INPUT | |
lc_otp_vendor_test_i.ctrl[19] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[23:20] | No | No | Yes | T162,T161,T160 | INPUT | |
lc_otp_vendor_test_i.ctrl[24] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:25] | No | No | Yes | T161,T160,T162 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[11:0] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[12] | No | No | No | INPUT | ||
lc_otp_program_i.count[13] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[15:14] | No | No | No | INPUT | ||
lc_otp_program_i.count[16] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.count[17] | No | No | No | INPUT | ||
lc_otp_program_i.count[33:18] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[34] | No | No | No | INPUT | ||
lc_otp_program_i.count[37:35] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.count[38] | No | No | No | INPUT | ||
lc_otp_program_i.count[41:39] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.count[42] | No | No | No | INPUT | ||
lc_otp_program_i.count[49:43] | Yes | Yes | T63,*T100,T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[50] | No | No | No | INPUT | ||
lc_otp_program_i.count[51] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.count[53:52] | No | No | No | INPUT | ||
lc_otp_program_i.count[76:54] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.count[77] | No | No | No | INPUT | ||
lc_otp_program_i.count[94:78] | Yes | Yes | *T6,*T108,*T63 | Yes | T55,T166,T167 | INPUT |
lc_otp_program_i.count[96:95] | No | No | No | INPUT | ||
lc_otp_program_i.count[103:97] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.count[105:104] | No | No | No | INPUT | ||
lc_otp_program_i.count[111:106] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[112] | No | No | No | INPUT | ||
lc_otp_program_i.count[115:113] | Yes | Yes | *T6,*T62,*T108 | Yes | T100,T54,T55 | INPUT |
lc_otp_program_i.count[116] | No | No | No | INPUT | ||
lc_otp_program_i.count[117] | Yes | Yes | *T6,*T62,*T108 | Yes | T100,T54,T55 | INPUT |
lc_otp_program_i.count[118] | No | No | No | INPUT | ||
lc_otp_program_i.count[120:119] | Yes | Yes | T63,*T100,T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[121] | No | No | No | INPUT | ||
lc_otp_program_i.count[122] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.count[123] | No | No | No | INPUT | ||
lc_otp_program_i.count[131:124] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.count[132] | No | No | No | INPUT | ||
lc_otp_program_i.count[137:133] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.count[138] | No | No | No | INPUT | ||
lc_otp_program_i.count[139] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.count[140] | No | No | No | INPUT | ||
lc_otp_program_i.count[144:141] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[145] | No | No | No | INPUT | ||
lc_otp_program_i.count[149:146] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT |
lc_otp_program_i.count[153:150] | No | No | No | INPUT | ||
lc_otp_program_i.count[160:154] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[161] | No | No | No | INPUT | ||
lc_otp_program_i.count[169:162] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.count[170] | No | No | No | INPUT | ||
lc_otp_program_i.count[200:171] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT |
lc_otp_program_i.count[201] | No | No | No | INPUT | ||
lc_otp_program_i.count[210:202] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT |
lc_otp_program_i.count[211] | No | No | No | INPUT | ||
lc_otp_program_i.count[215:212] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT |
lc_otp_program_i.count[216] | No | No | No | INPUT | ||
lc_otp_program_i.count[217] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.count[218] | No | No | No | INPUT | ||
lc_otp_program_i.count[225:219] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.count[226] | No | No | No | INPUT | ||
lc_otp_program_i.count[240:227] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[242:241] | No | No | No | INPUT | ||
lc_otp_program_i.count[243] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT |
lc_otp_program_i.count[244] | No | No | No | INPUT | ||
lc_otp_program_i.count[253:245] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[254] | No | No | No | INPUT | ||
lc_otp_program_i.count[264:255] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.count[265] | No | No | No | INPUT | ||
lc_otp_program_i.count[266] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT |
lc_otp_program_i.count[267] | No | No | No | INPUT | ||
lc_otp_program_i.count[276:268] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.count[277] | No | No | No | INPUT | ||
lc_otp_program_i.count[288:278] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[289] | No | No | No | INPUT | ||
lc_otp_program_i.count[291:290] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.count[292] | No | No | No | INPUT | ||
lc_otp_program_i.count[303:293] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.count[304] | No | No | No | INPUT | ||
lc_otp_program_i.count[310:305] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT |
lc_otp_program_i.count[311] | No | No | No | INPUT | ||
lc_otp_program_i.count[316:312] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT |
lc_otp_program_i.count[317] | No | No | No | INPUT | ||
lc_otp_program_i.count[318] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.count[319] | No | No | No | INPUT | ||
lc_otp_program_i.count[360:320] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.count[361] | No | No | No | INPUT | ||
lc_otp_program_i.count[363:362] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | INPUT |
lc_otp_program_i.count[364] | No | No | No | INPUT | ||
lc_otp_program_i.count[375:365] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT |
lc_otp_program_i.count[376] | No | No | No | INPUT | ||
lc_otp_program_i.count[378:377] | Yes | Yes | T63,T163,T166 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.count[379] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:380] | Yes | Yes | T100,T164,T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[0] | No | No | No | INPUT | ||
lc_otp_program_i.state[3:1] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[4] | No | No | No | INPUT | ||
lc_otp_program_i.state[10:5] | Yes | Yes | T72,T63,*T100 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.state[11] | No | No | No | INPUT | ||
lc_otp_program_i.state[26:12] | Yes | Yes | *T72,*T63,*T73 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.state[27] | No | No | No | INPUT | ||
lc_otp_program_i.state[31:28] | Yes | Yes | *T6,*T72,*T108 | Yes | T55,T166,T167 | INPUT |
lc_otp_program_i.state[32] | No | No | No | INPUT | ||
lc_otp_program_i.state[45:33] | Yes | Yes | T72,T63,T73 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.state[46] | No | No | No | INPUT | ||
lc_otp_program_i.state[48:47] | Yes | Yes | T72,T63,*T100 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.state[49] | No | No | No | INPUT | ||
lc_otp_program_i.state[77:50] | Yes | Yes | *T6,*T72,*T108 | Yes | T55,T166,T167 | INPUT |
lc_otp_program_i.state[78] | No | No | No | INPUT | ||
lc_otp_program_i.state[81:79] | Yes | Yes | *T6,T72,*T108 | Yes | T58,T60,T55 | INPUT |
lc_otp_program_i.state[84:82] | No | No | No | INPUT | ||
lc_otp_program_i.state[103:85] | Yes | Yes | *T72,*T63,*T100 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.state[104] | No | No | No | INPUT | ||
lc_otp_program_i.state[112:105] | Yes | Yes | *T72,*T63,*T100 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.state[113] | No | No | No | INPUT | ||
lc_otp_program_i.state[115:114] | Yes | Yes | T6,T72,T108 | Yes | T58,T60,T55 | INPUT |
lc_otp_program_i.state[116] | No | No | No | INPUT | ||
lc_otp_program_i.state[144:117] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[145] | No | No | No | INPUT | ||
lc_otp_program_i.state[148:146] | Yes | Yes | T72,T63,*T100 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.state[149] | No | No | No | INPUT | ||
lc_otp_program_i.state[166:150] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[167] | No | No | No | INPUT | ||
lc_otp_program_i.state[171:168] | Yes | Yes | T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[172] | No | No | No | INPUT | ||
lc_otp_program_i.state[181:173] | Yes | Yes | *T6,*T72,*T108 | Yes | T58,T100,T60 | INPUT |
lc_otp_program_i.state[182] | No | No | No | INPUT | ||
lc_otp_program_i.state[194:183] | Yes | Yes | *T6,*T72,*T108 | Yes | T58,T100,T60 | INPUT |
lc_otp_program_i.state[195] | No | No | No | INPUT | ||
lc_otp_program_i.state[201:196] | Yes | Yes | *T6,*T72,*T108 | Yes | T58,T60,T55 | INPUT |
lc_otp_program_i.state[202] | No | No | No | INPUT | ||
lc_otp_program_i.state[205:203] | Yes | Yes | *T6,T72,*T108 | Yes | T58,T60,T55 | INPUT |
lc_otp_program_i.state[206] | No | No | No | INPUT | ||
lc_otp_program_i.state[212:207] | Yes | Yes | *T6,T72,*T108 | Yes | T58,T100,T60 | INPUT |
lc_otp_program_i.state[213] | No | No | No | INPUT | ||
lc_otp_program_i.state[215:214] | Yes | Yes | T72,T63,*T100 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.state[217:216] | No | No | No | INPUT | ||
lc_otp_program_i.state[221:218] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[222] | No | No | No | INPUT | ||
lc_otp_program_i.state[233:223] | Yes | Yes | *T6,*T72,*T108 | Yes | T58,T100,T60 | INPUT |
lc_otp_program_i.state[234] | No | No | No | INPUT | ||
lc_otp_program_i.state[246:235] | Yes | Yes | *T72,*T63,*T73 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.state[247] | No | No | No | INPUT | ||
lc_otp_program_i.state[253:248] | Yes | Yes | *T72,*T63,*T100 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.state[254] | No | No | No | INPUT | ||
lc_otp_program_i.state[256:255] | Yes | Yes | *T72,*T63,T100 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.state[257] | No | No | No | INPUT | ||
lc_otp_program_i.state[260:258] | Yes | Yes | T72,T63,*T100 | Yes | T63,T100,T163 | INPUT |
lc_otp_program_i.state[262:261] | No | No | No | INPUT | ||
lc_otp_program_i.state[265:263] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[266] | No | No | No | INPUT | ||
lc_otp_program_i.state[275:267] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[276] | No | No | No | INPUT | ||
lc_otp_program_i.state[279:277] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[280] | No | No | No | INPUT | ||
lc_otp_program_i.state[289:281] | Yes | Yes | *T72,*T63,*T73 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.state[290] | No | No | No | INPUT | ||
lc_otp_program_i.state[300:291] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[301] | No | No | No | INPUT | ||
lc_otp_program_i.state[303:302] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT |
lc_otp_program_i.state[304] | No | No | No | INPUT | ||
lc_otp_program_i.state[315:305] | Yes | Yes | *T6,*T18,*T62 | Yes | T18,T58,T60 | INPUT |
lc_otp_program_i.state[317:316] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:318] | Yes | Yes | T72,T63,T73 | Yes | T63,T163,T166 | INPUT |
lc_otp_program_i.req | Yes | Yes | T72,T63,T58 | Yes | T72,T63,T58 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T72,T63,T58 | Yes | T72,T63,T58 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T72,T73,T168 | Yes | T72,T73,T168 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T43 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T43 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T4,T42,T74 | Yes | T4,T42,T74 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T72,T58,T73 | Yes | T72,T63,T58 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T4,T42,T74 | Yes | T4,T5,T17 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T53,T169,T166 | Yes | T57,T152,T53 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T42,T74,T19 | Yes | T6,T43,T17 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T18,T74 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T53,T169,T166 | Yes | T57,T152,T53 | OUTPUT |
otp_lc_data_o.count[11:0] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[12] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[13] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[15:14] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[16] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[33:18] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[34] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[37:35] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[38] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[41:39] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[42] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[49:43] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[50] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[51] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[53:52] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[76:54] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.count[77] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[94:78] | Yes | Yes | *T6,*T108,*T63 | Yes | T55,T166,T167 | OUTPUT |
otp_lc_data_o.count[96:95] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[103:97] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.count[105:104] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[111:106] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[112] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[115:113] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T43 | OUTPUT |
otp_lc_data_o.count[116] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[117] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T43 | OUTPUT |
otp_lc_data_o.count[118] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[120:119] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[122] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[131:124] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.count[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[137:133] | Yes | Yes | T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[138] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[139] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[140] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[144:141] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[145] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[149:146] | Yes | Yes | *T58,*T171,*T172 | Yes | T72,T58,T73 | OUTPUT |
otp_lc_data_o.count[153:150] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[160:154] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[161] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[169:162] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.count[170] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[200:171] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[201] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[210:202] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[215:212] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[216] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[217] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[218] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[225:219] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[240:227] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[242:241] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[243] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[244] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[253:245] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[254] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[264:255] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.count[265] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[266] | Yes | Yes | *T173,*T174,*T175 | Yes | T72,T73,T173 | OUTPUT |
otp_lc_data_o.count[267] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[276:268] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[288:278] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[289] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[291:290] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[303:293] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[304] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[310:305] | Yes | Yes | *T173,*T174,*T175 | Yes | T72,T73,T173 | OUTPUT |
otp_lc_data_o.count[311] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[316:312] | Yes | Yes | *T173,*T174,*T175 | Yes | T72,T73,T173 | OUTPUT |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[318] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[319] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[360:320] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.count[361] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[363:362] | Yes | Yes | *T173,*T174,*T175 | Yes | T72,T73,T173 | OUTPUT |
otp_lc_data_o.count[364] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[375:365] | Yes | Yes | *T173,*T174,*T175 | Yes | T72,T73,T173 | OUTPUT |
otp_lc_data_o.count[376] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[378:377] | Yes | Yes | T63,T163,T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:380] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[0] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[3:1] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[4] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[10:5] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[11] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[26:12] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.state[27] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[31:28] | Yes | Yes | *T6,*T108,*T63 | Yes | T55,T166,T167 | OUTPUT |
otp_lc_data_o.state[32] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[45:33] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.state[46] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[48:47] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[49] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[77:50] | Yes | Yes | *T6,*T108,*T63 | Yes | T55,T166,T167 | OUTPUT |
otp_lc_data_o.state[78] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[81:79] | Yes | Yes | *T6,*T108,*T63 | Yes | T58,T60,T55 | OUTPUT |
otp_lc_data_o.state[84:82] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[103:85] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[104] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[112:105] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[115:114] | Yes | Yes | *T6,*T108,*T63 | Yes | T58,T60,T55 | OUTPUT |
otp_lc_data_o.state[116] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[144:117] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[145] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[148:146] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[166:150] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[167] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[171:168] | Yes | Yes | T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[181:173] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T43 | OUTPUT |
otp_lc_data_o.state[182] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[194:183] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T43 | OUTPUT |
otp_lc_data_o.state[195] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[201:196] | Yes | Yes | *T6,*T108,*T63 | Yes | T58,T60,T55 | OUTPUT |
otp_lc_data_o.state[202] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[205:203] | Yes | Yes | *T6,*T108,T63 | Yes | T58,T60,T55 | OUTPUT |
otp_lc_data_o.state[206] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[212:207] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T43 | OUTPUT |
otp_lc_data_o.state[213] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[215:214] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[217:216] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[221:218] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[222] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[233:223] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T43 | OUTPUT |
otp_lc_data_o.state[234] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[246:235] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.state[247] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[253:248] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[254] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[256:255] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[257] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[260:258] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[262:261] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[265:263] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[275:267] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[276] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[279:277] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[280] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[289:281] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.state[290] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[300:291] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[301] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[303:302] | Yes | Yes | *T4,*T5,T6 | Yes | T4,T42,T71 | OUTPUT |
otp_lc_data_o.state[304] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[315:305] | Yes | Yes | *T6,*T18,*T62 | Yes | T18,T58,T60 | OUTPUT |
otp_lc_data_o.state[317:316] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:318] | Yes | Yes | T63,T163,T166 | Yes | T166,T167,T170 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T4,T42,T74 | Yes | T4,T42,T74 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T53,T169,T166 | Yes | T57,T152,T53 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T4,T71,T18 | Yes | T4,T43,T95 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T53,T169,T166 | Yes | T57,T152,T53 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T42,T19,T176 | Yes | T42,T70,T177 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T6,T56,T57 | Yes | T6,T56,T57 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T115,T178,T179 | Yes | T115,T178,T179 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T18,T180,T181 | Yes | T18,T180,T181 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T6,T56,T57 | Yes | T6,T56,T57 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T115,T178,T179 | Yes | T115,T178,T179 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T180,T182,T183 | Yes | T180,T182,T183 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T6,T43,T56 | Yes | T6,T43,T56 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T6,T43,T56 | Yes | T6,T43,T56 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T100,T91 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[15:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[16] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[31:17] | Yes | Yes | *T18,*T181,*T184 | Yes | T18,T181,T184 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[32] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[58:33] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[59] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[160:60] | Yes | Yes | *T18,*T181,*T184 | Yes | T18,T181,T184 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[161] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[213:162] | Yes | Yes | *T185,*T4,*T5 | Yes | T185,T4,T42 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[214] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[241:215] | Yes | Yes | *T18,*T181,*T184 | Yes | T18,T181,T184 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[242] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[251:243] | Yes | Yes | *T18,*T181,*T184 | Yes | T18,T181,T184 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[252] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:253] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T4,T42,T18 | Yes | T4,T5,T95 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T43 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T21,T22,T23 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9367 | 85.26 |
Total Bits 0->1 | 5493 | 4697 | 85.51 |
Total Bits 1->0 | 5493 | 4670 | 85.02 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9367 | 85.26 |
Port Bits 0->1 | 5493 | 4697 | 85.51 |
Port Bits 1->0 | 5493 | 4670 | 85.02 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_ni | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | INPUT | |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_edn_ni | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | INPUT | |
edn_o.edn_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
edn_i.edn_fips | No | No | Yes | T149,T150,T151 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T85,*T86,*T87 | Yes | T85,T86,T87 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T64,*T79,*T88 | Yes | T64,T79,T88 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T64,T79,T88 | Yes | T64,T79,T88 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T85,T86,T124 | Yes | T85,T86,T122 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T85,T86,T89 | Yes | T85,T86,T124 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T64,*T65,*T142 | Yes | T64,T65,T142 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T85,T86,T122 | Yes | T85,T86,T124 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T18,*T152,*T153 | Yes | T18,T152,T153 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T85,*T86,*T87 | Yes | T85,T86,T87 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T64,*T65,*T85 | Yes | T64,T65,T85 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T64,*T79,*T88 | Yes | T64,T79,T88 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T64,T79,T88 | Yes | T64,T79,T88 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T85,T86,T89 | Yes | T85,T86,T89 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T64,*T65,T85 | Yes | T64,T65,T85 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T85,T86,T89 | Yes | T85,T86,T89 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T64,T65,T85 | Yes | T64,T65,T85 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T154,T155,T156 | Yes | T154,T155,T156 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T154,T155,T156 | Yes | T154,T155,T156 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T64,T92,T93 | Yes | T64,T92,T93 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T4,T42,T74 | Yes | T4,T42,T74 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T158,T64,T92 | Yes | T158,T64,T92 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T157 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T64,T92,T65 | Yes | T64,T92,T65 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T92,T93,T157 | Yes | T92,T93,T159 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T92,T93,T159 | Yes | T92,T93,T157 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T91,T92,T65 | Yes | T91,T92,T65 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T64,T92,T93 | Yes | T64,T92,T93 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T4,T42,T74 | Yes | T4,T42,T74 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T158,T64,T92 | Yes | T158,T64,T92 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T64,T92,T65 | Yes | T64,T92,T65 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T91,T92,T65 | Yes | T91,T92,T65 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T71,T20,T109 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[1:0] | No | No | Yes | T160,T161 | INPUT | ||
lc_otp_vendor_test_i.ctrl[2] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[9:3] | No | No | Yes | T161,T160,T162 | INPUT | ||
lc_otp_vendor_test_i.ctrl[10] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[11] | No | No | Yes | T161,T160 | INPUT | ||
lc_otp_vendor_test_i.ctrl[12] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[15:13] | No | No | Yes | T161,T162 | INPUT | ||
lc_otp_vendor_test_i.ctrl[16] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[18:17] | No | No | Yes | T160,T161,T162 | INPUT | ||
lc_otp_vendor_test_i.ctrl[19] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[23:20] | No | No | Yes | T162,T161,T160 | INPUT | ||
lc_otp_vendor_test_i.ctrl[24] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:25] | No | No | Yes | T161,T160,T162 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[11:0] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[12] | No | No | No | INPUT | |||
lc_otp_program_i.count[13] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[15:14] | No | No | No | INPUT | |||
lc_otp_program_i.count[16] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.count[17] | No | No | No | INPUT | |||
lc_otp_program_i.count[33:18] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[34] | No | No | No | INPUT | |||
lc_otp_program_i.count[37:35] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.count[38] | No | No | No | INPUT | |||
lc_otp_program_i.count[41:39] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.count[42] | No | No | No | INPUT | |||
lc_otp_program_i.count[49:43] | Yes | Yes | T63,*T100,T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[50] | No | No | No | INPUT | |||
lc_otp_program_i.count[51] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.count[53:52] | No | No | No | INPUT | |||
lc_otp_program_i.count[76:54] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.count[77] | No | No | No | INPUT | |||
lc_otp_program_i.count[94:78] | Yes | Yes | *T6,*T108,*T63 | Yes | T55,T166,T167 | INPUT | |
lc_otp_program_i.count[96:95] | No | No | No | INPUT | |||
lc_otp_program_i.count[103:97] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.count[105:104] | No | No | No | INPUT | |||
lc_otp_program_i.count[111:106] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[112] | No | No | No | INPUT | |||
lc_otp_program_i.count[115:113] | Yes | Yes | *T6,*T62,*T108 | Yes | T100,T54,T55 | INPUT | |
lc_otp_program_i.count[116] | No | No | No | INPUT | |||
lc_otp_program_i.count[117] | Yes | Yes | *T6,*T62,*T108 | Yes | T100,T54,T55 | INPUT | |
lc_otp_program_i.count[118] | No | No | No | INPUT | |||
lc_otp_program_i.count[120:119] | Yes | Yes | T63,*T100,T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[121] | No | No | No | INPUT | |||
lc_otp_program_i.count[122] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.count[123] | No | No | No | INPUT | |||
lc_otp_program_i.count[131:124] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.count[132] | No | No | No | INPUT | |||
lc_otp_program_i.count[137:133] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.count[138] | No | No | No | INPUT | |||
lc_otp_program_i.count[139] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.count[140] | No | No | No | INPUT | |||
lc_otp_program_i.count[144:141] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[145] | No | No | No | INPUT | |||
lc_otp_program_i.count[149:146] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT | |
lc_otp_program_i.count[153:150] | No | No | No | INPUT | |||
lc_otp_program_i.count[160:154] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[161] | No | No | No | INPUT | |||
lc_otp_program_i.count[169:162] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.count[170] | No | No | No | INPUT | |||
lc_otp_program_i.count[200:171] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT | |
lc_otp_program_i.count[201] | No | No | No | INPUT | |||
lc_otp_program_i.count[210:202] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT | |
lc_otp_program_i.count[211] | No | No | No | INPUT | |||
lc_otp_program_i.count[215:212] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT | |
lc_otp_program_i.count[216] | No | No | No | INPUT | |||
lc_otp_program_i.count[217] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.count[218] | No | No | No | INPUT | |||
lc_otp_program_i.count[225:219] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.count[226] | No | No | No | INPUT | |||
lc_otp_program_i.count[240:227] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[242:241] | No | No | No | INPUT | |||
lc_otp_program_i.count[243] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT | |
lc_otp_program_i.count[244] | No | No | No | INPUT | |||
lc_otp_program_i.count[253:245] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[254] | No | No | No | INPUT | |||
lc_otp_program_i.count[264:255] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.count[265] | No | No | No | INPUT | |||
lc_otp_program_i.count[266] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT | |
lc_otp_program_i.count[267] | No | No | No | INPUT | |||
lc_otp_program_i.count[276:268] | Yes | Yes | *T63,*T163,*T166 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.count[277] | No | No | No | INPUT | |||
lc_otp_program_i.count[288:278] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[289] | No | No | No | INPUT | |||
lc_otp_program_i.count[291:290] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.count[292] | No | No | No | INPUT | |||
lc_otp_program_i.count[303:293] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.count[304] | No | No | No | INPUT | |||
lc_otp_program_i.count[310:305] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT | |
lc_otp_program_i.count[311] | No | No | No | INPUT | |||
lc_otp_program_i.count[316:312] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT | |
lc_otp_program_i.count[317] | No | No | No | INPUT | |||
lc_otp_program_i.count[318] | Yes | Yes | *T63,*T100,*T163 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.count[319] | No | No | No | INPUT | |||
lc_otp_program_i.count[360:320] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.count[361] | No | No | No | INPUT | |||
lc_otp_program_i.count[363:362] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | INPUT | |
lc_otp_program_i.count[364] | No | No | No | INPUT | |||
lc_otp_program_i.count[375:365] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | INPUT | |
lc_otp_program_i.count[376] | No | No | No | INPUT | |||
lc_otp_program_i.count[378:377] | Yes | Yes | T63,T163,T166 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.count[379] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:380] | Yes | Yes | T100,T164,T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[0] | No | No | No | INPUT | |||
lc_otp_program_i.state[3:1] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[4] | No | No | No | INPUT | |||
lc_otp_program_i.state[10:5] | Yes | Yes | T72,T63,*T100 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.state[11] | No | No | No | INPUT | |||
lc_otp_program_i.state[26:12] | Yes | Yes | *T72,*T63,*T73 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.state[27] | No | No | No | INPUT | |||
lc_otp_program_i.state[31:28] | Yes | Yes | *T6,*T72,*T108 | Yes | T55,T166,T167 | INPUT | |
lc_otp_program_i.state[32] | No | No | No | INPUT | |||
lc_otp_program_i.state[45:33] | Yes | Yes | T72,T63,T73 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.state[46] | No | No | No | INPUT | |||
lc_otp_program_i.state[48:47] | Yes | Yes | T72,T63,*T100 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.state[49] | No | No | No | INPUT | |||
lc_otp_program_i.state[77:50] | Yes | Yes | *T6,*T72,*T108 | Yes | T55,T166,T167 | INPUT | |
lc_otp_program_i.state[78] | No | No | No | INPUT | |||
lc_otp_program_i.state[81:79] | Yes | Yes | *T6,T72,*T108 | Yes | T58,T60,T55 | INPUT | |
lc_otp_program_i.state[84:82] | No | No | No | INPUT | |||
lc_otp_program_i.state[103:85] | Yes | Yes | *T72,*T63,*T100 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.state[104] | No | No | No | INPUT | |||
lc_otp_program_i.state[112:105] | Yes | Yes | *T72,*T63,*T100 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.state[113] | No | No | No | INPUT | |||
lc_otp_program_i.state[115:114] | Yes | Yes | T6,T72,T108 | Yes | T58,T60,T55 | INPUT | |
lc_otp_program_i.state[116] | No | No | No | INPUT | |||
lc_otp_program_i.state[144:117] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[145] | No | No | No | INPUT | |||
lc_otp_program_i.state[148:146] | Yes | Yes | T72,T63,*T100 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.state[149] | No | No | No | INPUT | |||
lc_otp_program_i.state[166:150] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[167] | No | No | No | INPUT | |||
lc_otp_program_i.state[171:168] | Yes | Yes | T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[172] | No | No | No | INPUT | |||
lc_otp_program_i.state[181:173] | Yes | Yes | *T6,*T72,*T108 | Yes | T58,T100,T60 | INPUT | |
lc_otp_program_i.state[182] | No | No | No | INPUT | |||
lc_otp_program_i.state[194:183] | Yes | Yes | *T6,*T72,*T108 | Yes | T58,T100,T60 | INPUT | |
lc_otp_program_i.state[195] | No | No | No | INPUT | |||
lc_otp_program_i.state[201:196] | Yes | Yes | *T6,*T72,*T108 | Yes | T58,T60,T55 | INPUT | |
lc_otp_program_i.state[202] | No | No | No | INPUT | |||
lc_otp_program_i.state[205:203] | Yes | Yes | *T6,T72,*T108 | Yes | T58,T60,T55 | INPUT | |
lc_otp_program_i.state[206] | No | No | No | INPUT | |||
lc_otp_program_i.state[212:207] | Yes | Yes | *T6,T72,*T108 | Yes | T58,T100,T60 | INPUT | |
lc_otp_program_i.state[213] | No | No | No | INPUT | |||
lc_otp_program_i.state[215:214] | Yes | Yes | T72,T63,*T100 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.state[217:216] | No | No | No | INPUT | |||
lc_otp_program_i.state[221:218] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[222] | No | No | No | INPUT | |||
lc_otp_program_i.state[233:223] | Yes | Yes | *T6,*T72,*T108 | Yes | T58,T100,T60 | INPUT | |
lc_otp_program_i.state[234] | No | No | No | INPUT | |||
lc_otp_program_i.state[246:235] | Yes | Yes | *T72,*T63,*T73 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.state[247] | No | No | No | INPUT | |||
lc_otp_program_i.state[253:248] | Yes | Yes | *T72,*T63,*T100 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.state[254] | No | No | No | INPUT | |||
lc_otp_program_i.state[256:255] | Yes | Yes | *T72,*T63,T100 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.state[257] | No | No | No | INPUT | |||
lc_otp_program_i.state[260:258] | Yes | Yes | T72,T63,*T100 | Yes | T63,T100,T163 | INPUT | |
lc_otp_program_i.state[262:261] | No | No | No | INPUT | |||
lc_otp_program_i.state[265:263] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[266] | No | No | No | INPUT | |||
lc_otp_program_i.state[275:267] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[276] | No | No | No | INPUT | |||
lc_otp_program_i.state[279:277] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[280] | No | No | No | INPUT | |||
lc_otp_program_i.state[289:281] | Yes | Yes | *T72,*T63,*T73 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.state[290] | No | No | No | INPUT | |||
lc_otp_program_i.state[300:291] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[301] | No | No | No | INPUT | |||
lc_otp_program_i.state[303:302] | Yes | Yes | *T100,*T164,*T165 | Yes | T100,T164,T165 | INPUT | |
lc_otp_program_i.state[304] | No | No | No | INPUT | |||
lc_otp_program_i.state[315:305] | Yes | Yes | *T6,*T18,*T62 | Yes | T18,T58,T60 | INPUT | |
lc_otp_program_i.state[317:316] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:318] | Yes | Yes | T72,T63,T73 | Yes | T63,T163,T166 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T72,T63,T58 | Yes | T72,T63,T58 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T72,T63,T58 | Yes | T72,T63,T58 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T72,T73,T168 | Yes | T72,T73,T168 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T43 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T43 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T4,T42,T74 | Yes | T4,T42,T74 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T72,T58,T73 | Yes | T72,T63,T58 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T4,T42,T74 | Yes | T4,T5,T17 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T53,T169,T166 | Yes | T57,T152,T53 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T42,T74,T19 | Yes | T6,T43,T17 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T18,T74 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T53,T169,T166 | Yes | T57,T152,T53 | OUTPUT | |
otp_lc_data_o.count[11:0] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[12] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[13] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[15:14] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[16] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[33:18] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[34] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[37:35] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[38] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[41:39] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[42] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[49:43] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[50] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[51] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[53:52] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[76:54] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.count[77] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[94:78] | Yes | Yes | *T6,*T108,*T63 | Yes | T55,T166,T167 | OUTPUT | |
otp_lc_data_o.count[96:95] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[103:97] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.count[105:104] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[111:106] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[112] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[115:113] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T43 | OUTPUT | |
otp_lc_data_o.count[116] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[117] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T43 | OUTPUT | |
otp_lc_data_o.count[118] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[120:119] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[122] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[131:124] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.count[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[137:133] | Yes | Yes | T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[138] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[139] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[140] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[144:141] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[145] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[149:146] | Yes | Yes | *T58,*T171,*T172 | Yes | T72,T58,T73 | OUTPUT | |
otp_lc_data_o.count[153:150] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[160:154] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[161] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[169:162] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.count[170] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[200:171] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[201] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[210:202] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[215:212] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[216] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[217] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[218] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[225:219] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[240:227] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[242:241] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[243] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[244] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[253:245] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[254] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[264:255] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.count[265] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[266] | Yes | Yes | *T173,*T174,*T175 | Yes | T72,T73,T173 | OUTPUT | |
otp_lc_data_o.count[267] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[276:268] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[288:278] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[289] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[291:290] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[303:293] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[304] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[310:305] | Yes | Yes | *T173,*T174,*T175 | Yes | T72,T73,T173 | OUTPUT | |
otp_lc_data_o.count[311] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[316:312] | Yes | Yes | *T173,*T174,*T175 | Yes | T72,T73,T173 | OUTPUT | |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[318] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[319] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[360:320] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.count[361] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[363:362] | Yes | Yes | *T173,*T174,*T175 | Yes | T72,T73,T173 | OUTPUT | |
otp_lc_data_o.count[364] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[375:365] | Yes | Yes | *T173,*T174,*T175 | Yes | T72,T73,T173 | OUTPUT | |
otp_lc_data_o.count[376] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[378:377] | Yes | Yes | T63,T163,T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:380] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[0] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[3:1] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[4] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[10:5] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[11] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[26:12] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.state[27] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[31:28] | Yes | Yes | *T6,*T108,*T63 | Yes | T55,T166,T167 | OUTPUT | |
otp_lc_data_o.state[32] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[45:33] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.state[46] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[48:47] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[49] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[77:50] | Yes | Yes | *T6,*T108,*T63 | Yes | T55,T166,T167 | OUTPUT | |
otp_lc_data_o.state[78] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[81:79] | Yes | Yes | *T6,*T108,*T63 | Yes | T58,T60,T55 | OUTPUT | |
otp_lc_data_o.state[84:82] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[103:85] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[104] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[112:105] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[115:114] | Yes | Yes | *T6,*T108,*T63 | Yes | T58,T60,T55 | OUTPUT | |
otp_lc_data_o.state[116] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[144:117] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[145] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[148:146] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[166:150] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[167] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[171:168] | Yes | Yes | T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[181:173] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T43 | OUTPUT | |
otp_lc_data_o.state[182] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[194:183] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T43 | OUTPUT | |
otp_lc_data_o.state[195] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[201:196] | Yes | Yes | *T6,*T108,*T63 | Yes | T58,T60,T55 | OUTPUT | |
otp_lc_data_o.state[202] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[205:203] | Yes | Yes | *T6,*T108,T63 | Yes | T58,T60,T55 | OUTPUT | |
otp_lc_data_o.state[206] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[212:207] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T43 | OUTPUT | |
otp_lc_data_o.state[213] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[215:214] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[217:216] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[221:218] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[222] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[233:223] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T43 | OUTPUT | |
otp_lc_data_o.state[234] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[246:235] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.state[247] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[253:248] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[254] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[256:255] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[257] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[260:258] | Yes | Yes | *T4,*T42,*T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[262:261] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[265:263] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[275:267] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[276] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[279:277] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[280] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[289:281] | Yes | Yes | *T63,*T163,*T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.state[290] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[300:291] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[301] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[303:302] | Yes | Yes | *T4,*T5,T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_lc_data_o.state[304] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[315:305] | Yes | Yes | *T6,*T18,*T62 | Yes | T18,T58,T60 | OUTPUT | |
otp_lc_data_o.state[317:316] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:318] | Yes | Yes | T63,T163,T166 | Yes | T166,T167,T170 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T4,T42,T74 | Yes | T4,T42,T74 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T53,T169,T166 | Yes | T57,T152,T53 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T4,T71,T18 | Yes | T4,T43,T95 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T53,T169,T166 | Yes | T57,T152,T53 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T42,T19,T176 | Yes | T42,T70,T177 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T6,T56,T57 | Yes | T6,T56,T57 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T115,T178,T179 | Yes | T115,T178,T179 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T18,T180,T181 | Yes | T18,T180,T181 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T6,T56,T57 | Yes | T6,T56,T57 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T115,T178,T179 | Yes | T115,T178,T179 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T180,T182,T183 | Yes | T180,T182,T183 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T6,T43,T56 | Yes | T6,T43,T56 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T6,T43,T95 | Yes | T6,T43,T42 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T6,T43,T56 | Yes | T6,T43,T56 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T100,T91 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[15:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[16] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[31:17] | Yes | Yes | *T18,*T181,*T184 | Yes | T18,T181,T184 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[32] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[58:33] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[59] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[160:60] | Yes | Yes | *T18,*T181,*T184 | Yes | T18,T181,T184 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[161] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[213:162] | Yes | Yes | *T185,*T4,*T5 | Yes | T185,T4,T42 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[214] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[241:215] | Yes | Yes | *T18,*T181,*T184 | Yes | T18,T181,T184 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[242] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[251:243] | Yes | Yes | *T18,*T181,*T184 | Yes | T18,T181,T184 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[252] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:253] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T4,T42,T18 | Yes | T4,T5,T95 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T42,T71 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T43 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T4,T42,T71 | Yes | T4,T5,T6 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |