CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 369621 | 1 | T78 | 6 | T255 | 1 | T532 | 128 | ||||
rising | 369703 | 1 | T78 | 6 | T255 | 1 | T532 | 127 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1032830 | 1 | T78 | 12 | T255 | 2 | T532 | 380 | ||||
auto[1] | 9681926 | 1 | T75 | 238 | T76 | 3094 | T77 | 334 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 322106 | 1 | T78 | 13 | T255 | 1 | T532 | 176 | ||||
rising | 322173 | 1 | T78 | 14 | T255 | 1 | T532 | 176 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1144492 | 1 | T78 | 30 | T255 | 2 | T532 | 524 | ||||
auto[1] | 10396668 | 1 | T75 | 320 | T76 | 2902 | T77 | 264 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 653843 | 1 | T76 | 4 | T78 | 9 | T532 | 251 | ||||
rising | 653927 | 1 | T76 | 4 | T78 | 9 | T532 | 251 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1039886 | 1 | T76 | 4 | T78 | 18 | T532 | 437 | ||||
auto[1] | 9763648 | 1 | T75 | 342 | T76 | 3392 | T77 | 392 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8423 | 1 | T556 | 1 | T532 | 1 | T543 | 1 | ||||
rising | 8464 | 1 | T556 | 1 | T532 | 1 | T543 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 179359 | 1 | T75 | 5 | T76 | 65 | T77 | 13 | ||||
auto[1] | 16771 | 1 | T556 | 1 | T532 | 1 | T543 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6486 | 1 | T255 | 106 | T543 | 2 | T544 | 1 | ||||
rising | 6519 | 1 | T255 | 106 | T543 | 2 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189423 | 1 | T75 | 11 | T76 | 78 | T77 | 15 | ||||
auto[1] | 10637 | 1 | T255 | 210 | T543 | 2 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3259 | 1 | T76 | 1 | T127 | 56 | T556 | 1 | ||||
rising | 3289 | 1 | T76 | 1 | T127 | 57 | T556 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184622 | 1 | T75 | 8 | T76 | 65 | T77 | 13 | ||||
auto[1] | 3574 | 1 | T76 | 1 | T127 | 62 | T556 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7334 | 1 | T255 | 70 | T543 | 3 | T498 | 2 | ||||
rising | 7373 | 1 | T255 | 71 | T543 | 3 | T498 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 173237 | 1 | T75 | 7 | T76 | 68 | T77 | 4 | ||||
auto[1] | 18955 | 1 | T255 | 466 | T543 | 3 | T498 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4838 | 1 | T77 | 1 | T127 | 72 | T544 | 1 | ||||
rising | 4856 | 1 | T77 | 1 | T127 | 72 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189581 | 1 | T75 | 4 | T76 | 59 | T77 | 6 | ||||
auto[1] | 5544 | 1 | T77 | 1 | T127 | 91 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8082 | 1 | T76 | 1 | T543 | 3 | T484 | 2 | ||||
rising | 8128 | 1 | T76 | 1 | T543 | 3 | T484 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 176333 | 1 | T75 | 6 | T76 | 73 | T77 | 8 | ||||
auto[1] | 16779 | 1 | T76 | 1 | T543 | 3 | T484 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6565 | 1 | T127 | 105 | T543 | 3 | T544 | 2 | ||||
rising | 6611 | 1 | T127 | 105 | T543 | 3 | T544 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183420 | 1 | T75 | 10 | T76 | 60 | T77 | 9 | ||||
auto[1] | 14715 | 1 | T127 | 366 | T543 | 3 | T544 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7115 | 1 | T544 | 1 | T484 | 1 | T549 | 112 | ||||
rising | 7172 | 1 | T544 | 1 | T484 | 1 | T549 | 113 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182109 | 1 | T75 | 2 | T76 | 66 | T77 | 10 | ||||
auto[1] | 15613 | 1 | T544 | 1 | T484 | 1 | T549 | 301 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5461 | 1 | T127 | 93 | T544 | 2 | T498 | 2 | ||||
rising | 5500 | 1 | T127 | 94 | T556 | 1 | T544 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184368 | 1 | T75 | 4 | T76 | 78 | T77 | 8 | ||||
auto[1] | 10957 | 1 | T127 | 309 | T556 | 1 | T544 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5840 | 1 | T255 | 106 | T543 | 2 | T498 | 2 | ||||
rising | 5879 | 1 | T255 | 106 | T543 | 2 | T498 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 190973 | 1 | T75 | 4 | T76 | 54 | T77 | 7 | ||||
auto[1] | 8978 | 1 | T255 | 225 | T543 | 2 | T498 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5187 | 1 | T255 | 114 | T543 | 3 | T458 | 2 | ||||
rising | 5213 | 1 | T255 | 114 | T543 | 3 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 193209 | 1 | T75 | 6 | T76 | 70 | T77 | 2 | ||||
auto[1] | 6753 | 1 | T255 | 160 | T543 | 3 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 15959 | 1 | T77 | 2 | T255 | 16 | T127 | 27 | ||||
rising | 15984 | 1 | T77 | 2 | T255 | 16 | T127 | 27 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1491528 | 1 | T75 | 43 | T76 | 437 | T77 | 36 | ||||
auto[1] | 16647 | 1 | T77 | 2 | T255 | 16 | T127 | 29 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7343 | 1 | T127 | 103 | T543 | 2 | T544 | 1 | ||||
rising | 7393 | 1 | T127 | 104 | T543 | 2 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 192754 | 1 | T75 | 5 | T76 | 46 | T77 | 6 | ||||
auto[1] | 16206 | 1 | T127 | 325 | T543 | 2 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7537 | 1 | T545 | 1 | T498 | 1 | T484 | 1 | ||||
rising | 7583 | 1 | T545 | 1 | T498 | 1 | T484 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178280 | 1 | T75 | 4 | T76 | 77 | T77 | 8 | ||||
auto[1] | 18035 | 1 | T545 | 1 | T498 | 1 | T484 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2566 | 1 | T543 | 4 | T544 | 2 | T484 | 1 | ||||
rising | 2589 | 1 | T543 | 4 | T544 | 2 | T484 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 193926 | 1 | T75 | 3 | T76 | 59 | T77 | 8 | ||||
auto[1] | 2726 | 1 | T543 | 4 | T544 | 2 | T484 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 10100 | 1 | T543 | 2 | T544 | 1 | T498 | 2 | ||||
rising | 10150 | 1 | T543 | 2 | T544 | 1 | T498 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184734 | 1 | T75 | 6 | T76 | 44 | T77 | 3 | ||||
auto[1] | 20419 | 1 | T543 | 2 | T544 | 1 | T498 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7554 | 1 | T556 | 1 | T543 | 1 | T498 | 1 | ||||
rising | 7607 | 1 | T556 | 1 | T543 | 1 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177812 | 1 | T75 | 10 | T76 | 58 | T77 | 7 | ||||
auto[1] | 15401 | 1 | T556 | 1 | T543 | 1 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7791 | 1 | T76 | 1 | T498 | 2 | T484 | 2 | ||||
rising | 7833 | 1 | T76 | 1 | T498 | 2 | T484 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175648 | 1 | T75 | 6 | T76 | 58 | T77 | 9 | ||||
auto[1] | 15838 | 1 | T76 | 1 | T498 | 2 | T484 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5994 | 1 | T77 | 1 | T543 | 2 | T498 | 2 | ||||
rising | 6033 | 1 | T77 | 1 | T543 | 2 | T498 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 194345 | 1 | T75 | 8 | T76 | 69 | T77 | 6 | ||||
auto[1] | 9182 | 1 | T77 | 1 | T543 | 2 | T498 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3095 | 1 | T543 | 1 | T484 | 1 | T456 | 1 | ||||
rising | 3114 | 1 | T543 | 1 | T484 | 1 | T456 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 193831 | 1 | T75 | 3 | T76 | 63 | T77 | 9 | ||||
auto[1] | 3323 | 1 | T543 | 1 | T484 | 1 | T456 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7303 | 1 | T551 | 1 | T543 | 2 | T498 | 1 | ||||
rising | 7339 | 1 | T551 | 1 | T543 | 2 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 188140 | 1 | T75 | 4 | T76 | 67 | T77 | 5 | ||||
auto[1] | 10881 | 1 | T551 | 1 | T543 | 2 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 38763 | 1 | T570 | 568 | T560 | 1120 | T561 | 2295 | ||||
rising | 38769 | 1 | T570 | 569 | T560 | 1120 | T561 | 2295 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 83709 | 1 | T570 | 1162 | T560 | 2492 | T561 | 4971 | ||||
auto[1] | 75389 | 1 | T570 | 1118 | T560 | 2133 | T561 | 4346 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 22038 | 1 | T570 | 295 | T560 | 643 | T561 | 1271 | ||||
rising | 22039 | 1 | T570 | 294 | T560 | 643 | T561 | 1271 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 131789 | 1 | T570 | 1927 | T560 | 3833 | T561 | 7750 | ||||
auto[1] | 27309 | 1 | T570 | 353 | T560 | 792 | T561 | 1567 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 22038 | 1 | T570 | 295 | T560 | 643 | T561 | 1271 | ||||
rising | 22039 | 1 | T570 | 294 | T560 | 643 | T561 | 1271 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 131789 | 1 | T570 | 1927 | T560 | 3833 | T561 | 7750 | ||||
auto[1] | 27309 | 1 | T570 | 353 | T560 | 792 | T561 | 1567 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3920 | 1 | T570 | 21 | T560 | 120 | T561 | 246 | ||||
rising | 3917 | 1 | T570 | 21 | T560 | 120 | T561 | 245 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 153583 | 1 | T570 | 2255 | T560 | 4475 | T561 | 8973 | ||||
auto[1] | 5515 | 1 | T570 | 25 | T560 | 150 | T561 | 344 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 117849 | 1 | T146 | 2463 | T147 | 593 | T393 | 6240 | ||||
rising | 117875 | 1 | T146 | 2464 | T147 | 593 | T393 | 6241 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 37842483 | 1 | T4 | 4427 | T5 | 48595 | T6 | 13234 | ||||
auto[1] | 643217 | 1 | T146 | 23344 | T147 | 719 | T393 | 44625 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 39143 | 1 | T570 | 550 | T560 | 1136 | T561 | 2286 | ||||
rising | 39146 | 1 | T570 | 551 | T560 | 1136 | T561 | 2286 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 84093 | 1 | T570 | 1140 | T560 | 2385 | T561 | 4895 | ||||
auto[1] | 75005 | 1 | T570 | 1140 | T560 | 2240 | T561 | 4422 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 33421 | 1 | T570 | 465 | T560 | 982 | T561 | 1926 | ||||
rising | 33423 | 1 | T570 | 464 | T560 | 982 | T561 | 1927 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 111589 | 1 | T570 | 1613 | T560 | 3262 | T561 | 6538 | ||||
auto[1] | 47509 | 1 | T570 | 667 | T560 | 1363 | T561 | 2779 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2300 | 1 | T543 | 3 | T544 | 1 | T538 | 18 | ||||
rising | 2326 | 1 | T556 | 1 | T543 | 3 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189112 | 1 | T75 | 4 | T76 | 56 | T77 | 4 | ||||
auto[1] | 2438 | 1 | T556 | 1 | T543 | 3 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3068 | 1 | T76 | 1 | T77 | 1 | T498 | 4 | ||||
rising | 3090 | 1 | T76 | 1 | T77 | 1 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 190699 | 1 | T75 | 5 | T76 | 72 | T77 | 10 | ||||
auto[1] | 3269 | 1 | T76 | 1 | T77 | 1 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6310 | 1 | T543 | 1 | T538 | 58 | T484 | 1 | ||||
rising | 6366 | 1 | T543 | 1 | T538 | 58 | T484 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 166463 | 1 | T75 | 5 | T76 | 52 | T77 | 7 | ||||
auto[1] | 24774 | 1 | T543 | 1 | T538 | 67 | T484 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8082 | 1 | T76 | 1 | T127 | 66 | T498 | 1 | ||||
rising | 8125 | 1 | T76 | 1 | T127 | 66 | T556 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 173708 | 1 | T75 | 5 | T76 | 64 | T77 | 2 | ||||
auto[1] | 21079 | 1 | T76 | 1 | T127 | 396 | T556 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3133 | 1 | T76 | 1 | T543 | 1 | T498 | 1 | ||||
rising | 3155 | 1 | T76 | 1 | T543 | 1 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189396 | 1 | T75 | 8 | T76 | 62 | T77 | 5 | ||||
auto[1] | 3349 | 1 | T76 | 1 | T543 | 1 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7440 | 1 | T544 | 2 | T545 | 1 | T498 | 1 | ||||
rising | 7483 | 1 | T544 | 2 | T545 | 1 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178534 | 1 | T75 | 9 | T76 | 71 | T77 | 7 | ||||
auto[1] | 14640 | 1 | T544 | 2 | T545 | 1 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8014 | 1 | T543 | 4 | T544 | 1 | T538 | 28 | ||||
rising | 8061 | 1 | T543 | 4 | T544 | 1 | T538 | 28 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 180218 | 1 | T75 | 2 | T76 | 64 | T77 | 7 | ||||
auto[1] | 15275 | 1 | T543 | 4 | T544 | 1 | T538 | 30 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7479 | 1 | T543 | 4 | T544 | 1 | T498 | 1 | ||||
rising | 7520 | 1 | T543 | 4 | T544 | 1 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 181000 | 1 | T75 | 2 | T76 | 77 | T77 | 5 | ||||
auto[1] | 16898 | 1 | T543 | 4 | T544 | 1 | T498 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 22571 | 1 | T75 | 1 | T76 | 3 | T77 | 1 | ||||
rising | 22591 | 1 | T75 | 1 | T76 | 3 | T77 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1465616 | 1 | T75 | 43 | T76 | 438 | T77 | 36 | ||||
auto[1] | 23615 | 1 | T75 | 1 | T76 | 3 | T77 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7335 | 1 | T77 | 1 | T556 | 1 | T543 | 1 | ||||
rising | 7374 | 1 | T77 | 1 | T556 | 1 | T543 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 168073 | 1 | T75 | 3 | T76 | 54 | T77 | 6 | ||||
auto[1] | 14806 | 1 | T77 | 1 | T556 | 1 | T543 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7237 | 1 | T556 | 1 | T484 | 1 | T456 | 2 | ||||
rising | 7273 | 1 | T556 | 1 | T484 | 1 | T456 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 194154 | 1 | T75 | 8 | T76 | 58 | T77 | 10 | ||||
auto[1] | 11587 | 1 | T556 | 1 | T484 | 1 | T456 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 208595 | 1 | T78 | 203 | T456 | 212 | T457 | 679 | ||||
rising | 208583 | 1 | T78 | 203 | T456 | 212 | T457 | 678 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1873007 | 1 | T78 | 1839 | T456 | 1727 | T457 | 6363 | ||||
auto[1] | 234823 | 1 | T78 | 234 | T456 | 240 | T457 | 771 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 516867 | 1 | T78 | 497 | T456 | 473 | T457 | 1730 | ||||
rising | 516861 | 1 | T78 | 498 | T456 | 472 | T457 | 1730 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 936208 | 1 | T78 | 870 | T456 | 891 | T457 | 3120 | ||||
auto[1] | 1171622 | 1 | T78 | 1203 | T456 | 1076 | T457 | 4014 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 516867 | 1 | T78 | 497 | T456 | 473 | T457 | 1730 | ||||
rising | 516861 | 1 | T78 | 498 | T456 | 472 | T457 | 1730 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 936208 | 1 | T78 | 870 | T456 | 891 | T457 | 3120 | ||||
auto[1] | 1171622 | 1 | T78 | 1203 | T456 | 1076 | T457 | 4014 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |