Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143114	1			T75	6		T76	44		T77	3
values[2]	11007	1			T78	3		T543	2		T544	1
values[3]	3895	1			T78	1		T498	2		T548	1
values[4]	2197	1			T660	16		T634	65		T840	1
values[5]	1540	1			T660	21		T634	14		T840	1
values[6]	1107	1			T660	25		T634	7		T840	1
values[7]	934	1			T660	9		T840	1		T481	3
values[8]	644	1			T660	7		T840	1		T481	1
values[9]	574	1			T660	24		T840	1		T481	2
values[10]	560	1			T660	14		T840	1		T481	1
values[11]	586	1			T660	24		T840	1		T481	1
values[12]	524	1			T660	12		T840	1		T481	2
values[13]	439	1			T660	12		T840	1		T481	2
values[14]	459	1			T660	11		T840	1		T481	2
values[15]	415	1			T660	8		T840	1		T481	1
values[16]	432	1			T660	12		T840	1		T481	1
values[17]	441	1			T660	24		T840	1		T481	2
values[18]	422	1			T660	11		T840	1		T481	2
values[19]	471	1			T660	15		T840	1		T481	4
values[20]	447	1			T660	12		T840	1		T481	3
values[21]	436	1			T660	16		T840	1		T481	2
values[22]	459	1			T660	10		T840	1		T481	6
values[23]	423	1			T660	16		T840	1		T481	7
values[24]	409	1			T660	15		T840	1		T481	1
values[25]	430	1			T660	11		T840	1		T481	5
values[26]	399	1			T660	10		T840	1		T481	2
values[27]	454	1			T660	16		T840	1		T481	1
values[28]	495	1			T660	10		T840	1		T481	6
values[29]	476	1			T660	15		T840	1		T481	5
values[30]	487	1			T660	12		T840	1		T481	3
values[31]	411	1			T660	19		T840	1		T481	2
values[32]	496	1			T660	16		T840	1		T481	3
values[33]	372	1			T660	16		T840	1		T481	3
values[34]	445	1			T660	20		T840	1		T481	1
values[35]	446	1			T660	12		T840	1		T481	2
values[36]	417	1			T660	19		T840	1		T481	2
values[37]	459	1			T660	7		T840	1		T481	2
values[38]	421	1			T660	9		T840	1		T481	2
values[39]	355	1			T660	16		T840	1		T481	2
values[40]	380	1			T660	17		T840	1		T481	1
values[41]	385	1			T660	14		T840	1		T481	2
values[42]	356	1			T660	11		T840	1		T481	2
values[43]	441	1			T660	10		T840	1		T481	7
values[44]	433	1			T660	15		T840	1		T481	2
values[45]	422	1			T660	10		T840	1		T481	2
values[46]	394	1			T660	21		T840	1		T481	5
values[47]	416	1			T660	15		T840	1		T481	1
values[48]	417	1			T660	5		T840	1		T481	7
values[49]	388	1			T660	8		T840	1		T481	5
values[50]	429	1			T660	9		T840	1		T481	8
values[51]	387	1			T660	9		T840	1		T481	2
values[52]	386	1			T660	7		T840	1		T481	4
values[53]	346	1			T660	6		T840	1		T481	1
values[54]	332	1			T660	5		T840	1		T481	7
values[55]	352	1			T660	6		T840	1		T481	9
values[56]	327	1			T660	6		T840	1		T481	1
values[57]	351	1			T660	4		T840	1		T481	2
values[58]	350	1			T660	5		T840	1		T481	3
values[59]	325	1			T660	6		T840	1		T481	2
values[60]	330	1			T660	5		T840	1		T481	2
values[61]	287	1			T660	11		T840	1		T481	1
values[62]	331	1			T660	6		T840	1		T481	5
values[63]	360	1			T660	8		T840	1		T481	4
values[64]	268	1			T660	5		T840	1		T481	6
values[65]	281	1			T660	4		T840	1		T481	1
values[66]	288	1			T840	1		T481	2		T841	3
values[67]	256	1			T840	1		T481	7		T841	5
values[68]	263	1			T840	1		T481	8		T841	7
values[69]	228	1			T840	1		T481	4		T841	6
values[70]	167	1			T840	1		T481	2		T841	3
values[71]	192	1			T840	1		T481	4		T841	4
values[72]	198	1			T840	1		T481	1		T841	11
values[73]	227	1			T840	1		T481	4		T841	9
values[74]	174	1			T840	1		T481	2		T841	3
values[75]	202	1			T840	1		T481	2		T841	4
values[76]	175	1			T840	1		T481	2		T841	10
values[77]	166	1			T840	1		T481	1		T841	1
values[78]	143	1			T840	1		T481	3		T509	10
values[79]	133	1			T840	1		T481	3		T509	19
values[80]	127	1			T840	1		T481	5		T509	15
values[81]	106	1			T840	1		T481	3		T509	8
values[82]	108	1			T840	1		T481	3		T509	10
values[83]	114	1			T840	1		T481	2		T509	6
values[84]	129	1			T840	1		T481	3		T509	6
values[85]	95	1			T840	1		T481	1		T509	11
values[86]	107	1			T840	1		T481	2		T509	5
values[87]	100	1			T840	1		T481	3		T509	5
values[88]	105	1			T840	2		T481	1		T509	2
values[89]	117	1			T840	7		T481	1		T509	5
values[90]	85	1			T840	4		T481	1		T509	5
values[91]	87	1			T840	2		T481	2		T509	5
values[92]	112	1			T840	3		T481	3		T509	9
values[93]	104	1			T840	9		T481	3		T509	6
values[94]	92	1			T840	2		T481	3		T509	1
values[95]	87	1			T840	6		T481	1		T509	3
values[96]	99	1			T840	6		T481	3		T509	5
values[97]	86	1			T840	2		T481	1		T509	6
values[98]	91	1			T840	9		T481	1		T509	6
values[99]	98	1			T840	1		T481	3		T509	2
values[100]	83	1			T840	2		T481	1		T509	2
values[101]	85	1			T840	1		T481	1		T509	2
values[102]	92	1			T840	2		T481	1		T509	5
values[103]	89	1			T840	1		T481	2		T509	3
values[104]	85	1			T840	1		T481	5		T509	3
values[105]	77	1			T840	1		T481	2		T509	2
values[106]	97	1			T840	2		T481	4		T509	1
values[107]	84	1			T840	2		T481	3		T837	5
values[108]	101	1			T840	1		T481	2		T837	1
values[109]	91	1			T840	4		T481	4		T837	3
values[110]	108	1			T840	2		T481	7		T837	5
values[111]	104	1			T840	3		T481	14		T837	1
values[112]	99	1			T840	1		T481	10		T837	1
values[113]	95	1			T840	5		T481	6		T837	3
values[114]	101	1			T840	1		T481	11		T837	1
values[115]	73	1			T840	8		T481	1		T837	1
values[116]	73	1			T840	2		T481	4		T837	2
values[117]	84	1			T840	3		T481	3		T837	3
values[118]	97	1			T840	2		T481	5		T837	2
values[119]	87	1			T840	2		T481	7		T837	2
values[120]	70	1			T840	1		T481	2		T837	1
values[121]	66	1			T840	3		T481	1		T837	3
values[122]	76	1			T840	3		T481	3		T837	1
values[123]	88	1			T840	1		T481	11		T837	2
values[124]	114	1			T840	2		T481	10		T837	7
values[125]	142	1			T840	2		T481	11		T837	4
values[126]	198	1			T840	1		T481	24		T837	2
values[127]	1100	1			T840	21		T481	42		T837	25
values[128]	8661	1			T840	253		T481	19		T837	307