SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.99 | 84.99 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.18 | 85.18 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.18 | 85.18 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.18 | 85.18 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.34 | 90.68 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9359 | 84.99 |
Total Bits 0->1 | 5506 | 4695 | 85.27 |
Total Bits 1->0 | 5506 | 4664 | 84.71 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9359 | 84.99 |
Port Bits 0->1 | 5506 | 4695 | 85.27 |
Port Bits 1->0 | 5506 | 4664 | 84.71 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_ni | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_edn_ni | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
edn_o.edn_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
edn_i.edn_fips | No | No | Yes | T117,T149,T150 | INPUT | |
edn_i.edn_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T78,*T79,*T80 | Yes | T78,T79,T80 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T73,*T74,*T81 | Yes | T73,T74,T81 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T36,T82,T83 | Yes | T36,T82,T83 | INPUT |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T78,T80,T84 | Yes | T78,T80,T84 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T78,T80,T84 | Yes | T78,T79,T80 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T74,*T36,*T151 | Yes | T74,T36,T151 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T80,T84 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T22,*T61,*T152 | Yes | T22,T61,T152 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T78,*T79,*T80 | Yes | T78,T79,T80 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T36,*T78,*T79 | Yes | T36,T78,T79 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T73,*T74,*T81 | Yes | T73,T74,T81 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T36,T82,T83 | Yes | T36,T82,T83 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T36,T78,T84 | Yes | T36,T78,T79 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT |
intr_otp_error_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T86,T156,T64 | Yes | T86,T156,T64 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T68,T69,T70 | Yes | T68,T69,T70 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T85,T86,T88 | Yes | T85,T86,T88 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T85,T86,T88 | Yes | T85,T86,T88 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T86,T158,T36 | Yes | T86,T158,T36 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T86,T36,T64 | Yes | T86,T36,T64 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T86,T36,T64 | Yes | T86,T36,T64 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T86,T156,T64 | Yes | T86,T156,T64 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T68,T69,T70 | Yes | T68,T69,T70 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T86,T158,T36 | Yes | T86,T158,T36 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T86,T36,T64 | Yes | T86,T36,T64 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T86,T36,T64 | Yes | T86,T36,T64 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T5,T48,T20 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
lc_otp_vendor_test_i.ctrl[8:0] | No | No | Yes | T159,T160,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[9] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[13:10] | No | No | Yes | T159,T160,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[14] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[25:15] | No | No | Yes | T159,T160,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[26] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:27] | No | No | Yes | T161,T159,T160 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[18:0] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[19] | No | No | No | INPUT | ||
lc_otp_program_i.count[21:20] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT |
lc_otp_program_i.count[22] | No | No | No | INPUT | ||
lc_otp_program_i.count[25:23] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT |
lc_otp_program_i.count[27:26] | No | No | No | INPUT | ||
lc_otp_program_i.count[40:28] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT |
lc_otp_program_i.count[41] | No | No | No | INPUT | ||
lc_otp_program_i.count[65:42] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT |
lc_otp_program_i.count[66] | No | No | No | INPUT | ||
lc_otp_program_i.count[69:67] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[70] | No | No | No | INPUT | ||
lc_otp_program_i.count[71] | Yes | Yes | *T156 | Yes | T156 | INPUT |
lc_otp_program_i.count[72] | No | No | No | INPUT | ||
lc_otp_program_i.count[91:73] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT |
lc_otp_program_i.count[92] | No | No | No | INPUT | ||
lc_otp_program_i.count[94:93] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[95] | No | No | No | INPUT | ||
lc_otp_program_i.count[114:96] | Yes | Yes | *T62,*T23,*T60 | Yes | T23,T22,T61 | INPUT |
lc_otp_program_i.count[115] | No | No | No | INPUT | ||
lc_otp_program_i.count[121:116] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[122] | No | No | No | INPUT | ||
lc_otp_program_i.count[141:123] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[142] | No | No | No | INPUT | ||
lc_otp_program_i.count[152:143] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[153] | No | No | No | INPUT | ||
lc_otp_program_i.count[154] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[155] | No | No | No | INPUT | ||
lc_otp_program_i.count[161:156] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[163:162] | No | No | No | INPUT | ||
lc_otp_program_i.count[164] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[165] | No | No | No | INPUT | ||
lc_otp_program_i.count[167:166] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[168] | No | No | No | INPUT | ||
lc_otp_program_i.count[179:169] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[180] | No | No | No | INPUT | ||
lc_otp_program_i.count[187:181] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[188] | No | No | No | INPUT | ||
lc_otp_program_i.count[193:189] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[194] | No | No | No | INPUT | ||
lc_otp_program_i.count[198:195] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[199] | No | No | No | INPUT | ||
lc_otp_program_i.count[200] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[201] | No | No | No | INPUT | ||
lc_otp_program_i.count[202] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[203] | No | No | No | INPUT | ||
lc_otp_program_i.count[208:204] | Yes | Yes | *T156,*T4,*T5 | Yes | T156,T4,T5 | INPUT |
lc_otp_program_i.count[209] | No | No | No | INPUT | ||
lc_otp_program_i.count[212:210] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[213] | No | No | No | INPUT | ||
lc_otp_program_i.count[234:214] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[235] | No | No | No | INPUT | ||
lc_otp_program_i.count[238:236] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[239] | No | No | No | INPUT | ||
lc_otp_program_i.count[246:240] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[248:247] | No | No | No | INPUT | ||
lc_otp_program_i.count[254:249] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[257:255] | No | No | No | INPUT | ||
lc_otp_program_i.count[261:258] | Yes | Yes | *T156,*T62,*T22 | Yes | T156,T62,T22 | INPUT |
lc_otp_program_i.count[262] | No | No | No | INPUT | ||
lc_otp_program_i.count[265:263] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[266] | No | No | No | INPUT | ||
lc_otp_program_i.count[277:267] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[278] | No | No | No | INPUT | ||
lc_otp_program_i.count[283:279] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[284] | No | No | No | INPUT | ||
lc_otp_program_i.count[285] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[286] | No | No | No | INPUT | ||
lc_otp_program_i.count[290:287] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[291] | No | No | No | INPUT | ||
lc_otp_program_i.count[295:292] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[296] | No | No | No | INPUT | ||
lc_otp_program_i.count[298:297] | Yes | Yes | *T156,*T4,*T5 | Yes | T156,T4,T5 | INPUT |
lc_otp_program_i.count[299] | No | No | No | INPUT | ||
lc_otp_program_i.count[301:300] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[302] | No | No | No | INPUT | ||
lc_otp_program_i.count[308:303] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[309] | No | No | No | INPUT | ||
lc_otp_program_i.count[311:310] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[312] | No | No | No | INPUT | ||
lc_otp_program_i.count[316:313] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[317] | No | No | No | INPUT | ||
lc_otp_program_i.count[320:318] | Yes | Yes | *T156,*T4,*T5 | Yes | T156,T4,T5 | INPUT |
lc_otp_program_i.count[321] | No | No | No | INPUT | ||
lc_otp_program_i.count[322] | Yes | Yes | *T156 | Yes | T156 | INPUT |
lc_otp_program_i.count[323] | No | No | No | INPUT | ||
lc_otp_program_i.count[330:324] | Yes | Yes | *T156,*T4,*T5 | Yes | T156,T4,T5 | INPUT |
lc_otp_program_i.count[331] | No | No | No | INPUT | ||
lc_otp_program_i.count[334:332] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[335] | No | No | No | INPUT | ||
lc_otp_program_i.count[351:336] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[352] | No | No | No | INPUT | ||
lc_otp_program_i.count[359:353] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[360] | No | No | No | INPUT | ||
lc_otp_program_i.count[362:361] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.count[363] | No | No | No | INPUT | ||
lc_otp_program_i.count[367:364] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.count[368] | No | No | No | INPUT | ||
lc_otp_program_i.count[374:369] | Yes | Yes | *T156,*T4,*T5 | Yes | T156,T4,T5 | INPUT |
lc_otp_program_i.count[376:375] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:377] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[3:0] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[4] | No | No | No | INPUT | ||
lc_otp_program_i.state[33:5] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[34] | No | No | No | INPUT | ||
lc_otp_program_i.state[44:35] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[45] | No | No | No | INPUT | ||
lc_otp_program_i.state[49:46] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[50] | No | No | No | INPUT | ||
lc_otp_program_i.state[51] | Yes | Yes | *T156 | Yes | T156 | INPUT |
lc_otp_program_i.state[52] | No | No | No | INPUT | ||
lc_otp_program_i.state[53] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[54] | No | No | No | INPUT | ||
lc_otp_program_i.state[75:55] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT |
lc_otp_program_i.state[76] | No | No | No | INPUT | ||
lc_otp_program_i.state[90:77] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[91] | No | No | No | INPUT | ||
lc_otp_program_i.state[95:92] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[96] | No | No | No | INPUT | ||
lc_otp_program_i.state[105:97] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[106] | No | No | No | INPUT | ||
lc_otp_program_i.state[116:107] | Yes | Yes | *T156,*T62,*T22 | Yes | T156,T62,T22 | INPUT |
lc_otp_program_i.state[117] | No | No | No | INPUT | ||
lc_otp_program_i.state[125:118] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T67 | INPUT |
lc_otp_program_i.state[127:126] | No | No | No | INPUT | ||
lc_otp_program_i.state[143:128] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[144] | No | No | No | INPUT | ||
lc_otp_program_i.state[149:145] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T67 | INPUT |
lc_otp_program_i.state[150] | No | No | No | INPUT | ||
lc_otp_program_i.state[156:151] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T67 | INPUT |
lc_otp_program_i.state[157] | No | No | No | INPUT | ||
lc_otp_program_i.state[165:158] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[166] | No | No | No | INPUT | ||
lc_otp_program_i.state[172:167] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[174:173] | No | No | No | INPUT | ||
lc_otp_program_i.state[218:175] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T67 | INPUT |
lc_otp_program_i.state[219] | No | No | No | INPUT | ||
lc_otp_program_i.state[221:220] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[222] | No | No | No | INPUT | ||
lc_otp_program_i.state[223] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[224] | No | No | No | INPUT | ||
lc_otp_program_i.state[230:225] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[231] | No | No | No | INPUT | ||
lc_otp_program_i.state[237:232] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[238] | No | No | No | INPUT | ||
lc_otp_program_i.state[244:239] | Yes | Yes | *T156,*T62,*T22 | Yes | T156,T62,T22 | INPUT |
lc_otp_program_i.state[245] | No | No | No | INPUT | ||
lc_otp_program_i.state[253:246] | Yes | Yes | *T62,*T23,*T21 | Yes | T23,T22,T61 | INPUT |
lc_otp_program_i.state[256:254] | No | No | No | INPUT | ||
lc_otp_program_i.state[259:257] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[260] | No | No | No | INPUT | ||
lc_otp_program_i.state[271:261] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T67 | INPUT |
lc_otp_program_i.state[272] | No | No | No | INPUT | ||
lc_otp_program_i.state[274:273] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[275] | No | No | No | INPUT | ||
lc_otp_program_i.state[279:276] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
lc_otp_program_i.state[281:280] | No | No | No | INPUT | ||
lc_otp_program_i.state[284:282] | Yes | Yes | T156,*T62,*T22 | Yes | T156,T62,T22 | INPUT |
lc_otp_program_i.state[285] | No | No | No | INPUT | ||
lc_otp_program_i.state[288:286] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.state[289] | No | No | No | INPUT | ||
lc_otp_program_i.state[291:290] | Yes | Yes | T62,*T23,*T21 | Yes | T23,T22,T61 | INPUT |
lc_otp_program_i.state[292] | No | No | No | INPUT | ||
lc_otp_program_i.state[299:293] | Yes | Yes | *T62,*T23,*T21 | Yes | T23,T22,T61 | INPUT |
lc_otp_program_i.state[300] | No | No | No | INPUT | ||
lc_otp_program_i.state[307:301] | Yes | Yes | *T156,*T62,*T23 | Yes | T156,T23,T22 | INPUT |
lc_otp_program_i.state[308] | No | No | No | INPUT | ||
lc_otp_program_i.state[311:309] | Yes | Yes | *T62,*T23,*T21 | Yes | T23,T22,T61 | INPUT |
lc_otp_program_i.state[312] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:313] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_i.req | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T162,T163,T164 | Yes | T162,T163,T164 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T68,T69,T70 | Yes | T68,T69,T70 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T22,T61,T67 | Yes | T62,T22,T61 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T6,T18,T48 | Yes | T6,T48,T23 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T22,T165,T166 | Yes | T22,T61,T116 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T6,T18,T19 | Yes | T6,T23,T21 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T4,T18,T19 | Yes | T4,T48,T20 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T22,T165,T166 | Yes | T22,T61,T116 | OUTPUT |
otp_lc_data_o.count[18:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[21:20] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[25:23] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[27:26] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[40:28] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[41] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[65:42] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[66] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[69:67] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[70] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[71] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[72] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[91:73] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[94:93] | Yes | Yes | T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[114:96] | Yes | Yes | *T62,*T23,*T60 | Yes | T23,T22,T61 | OUTPUT |
otp_lc_data_o.count[115] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[121:116] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[122] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[141:123] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[152:143] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[154] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[161:156] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[163:162] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[164] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[165] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[167:166] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[168] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[179:169] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[180] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[187:181] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[188] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[193:189] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[194] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[198:195] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[200] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[201] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[202] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[203] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[208:204] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[209] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[212:210] | Yes | Yes | T167,T168,*T169 | Yes | T167,T168,T169 | OUTPUT |
otp_lc_data_o.count[213] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[234:214] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[238:236] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[239] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[246:240] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[248:247] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[254:249] | Yes | Yes | T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[257:255] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[261:258] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[262] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[265:263] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[266] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[277:267] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | OUTPUT |
otp_lc_data_o.count[278] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[283:279] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[284] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[285] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[286] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[290:287] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[291] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[295:292] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[296] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[298:297] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[299] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[301:300] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[302] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[308:303] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[311:310] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[312] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[316:313] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[320:318] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[321] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[322] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[330:324] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[331] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[334:332] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | OUTPUT |
otp_lc_data_o.count[335] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[351:336] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[352] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[359:353] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.count[360] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[362:361] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | OUTPUT |
otp_lc_data_o.count[363] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[367:364] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[368] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[374:369] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[376:375] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:377] | Yes | Yes | T62,T22,T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[3:0] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[4] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[33:5] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[34] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[44:35] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[45] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[49:46] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[50] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[51] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[52] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[53] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[54] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[75:55] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[90:77] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[91] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[95:92] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[96] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[105:97] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[106] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[116:107] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[117] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[125:118] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[127:126] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[143:128] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[144] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[149:145] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T67 | OUTPUT |
otp_lc_data_o.state[150] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[156:151] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[157] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[165:158] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[166] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[172:167] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[174:173] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[218:175] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T67 | OUTPUT |
otp_lc_data_o.state[219] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[221:220] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[222] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[223] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[224] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[230:225] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[231] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[237:232] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[238] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[244:239] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[245] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[253:246] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[256:254] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[259:257] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[271:261] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T67 | OUTPUT |
otp_lc_data_o.state[272] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[274:273] | Yes | Yes | T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[275] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[279:276] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[281:280] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[284:282] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[285] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[288:286] | Yes | Yes | T62,T22,T61 | Yes | T22,T61,T74 | OUTPUT |
otp_lc_data_o.state[289] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[291:290] | Yes | Yes | *T62,T23,T21 | Yes | T23,T22,T61 | OUTPUT |
otp_lc_data_o.state[292] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[299:293] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[300] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[307:301] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[308] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[311:309] | Yes | Yes | *T62,*T23,T21 | Yes | T23,T22,T61 | OUTPUT |
otp_lc_data_o.state[312] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:313] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T68,T69,T70 | Yes | T68,T69,T70 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T22,T165,T166 | Yes | T22,T61,T116 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T22,T165,T166 | Yes | T22,T61,T116 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T5,T19,T172 | Yes | T5,T69,T173 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T57,T58,T59 | Yes | T57,T58,T59 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T119,T174,T120 | Yes | T119,T174,T120 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T175,T176,T177 | Yes | T175,T176,T177 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T57,T58,T59 | Yes | T57,T58,T59 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T119,T174,T120 | Yes | T119,T174,T120 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T176,T177,T178 | Yes | T176,T177,T178 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T57,T58,T59 | Yes | T57,T58,T59 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T57,T58,T59 | Yes | T57,T58,T59 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T6,T48,T20 | Yes | T6,T48,T20 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | Yes | Yes | *T165 | Yes | T165 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[1] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[34:2] | Yes | Yes | *T175,*T179,*T180 | Yes | T175,T179,T180 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[35] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[39:36] | Yes | Yes | *T165,*T181,*T4 | Yes | T165,T181,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[40] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[71:41] | Yes | Yes | *T165,*T182,*T181 | Yes | T165,T182,T181 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[72] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[74] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[89:75] | Yes | Yes | *T182,*T181,*T4 | Yes | T182,T181,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[90] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[179:91] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[180] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:181] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T5,T18,T62 | Yes | T5,T20,T23 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T183,T184,T185 | Yes | T179,T186,T187 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T23,T24,T25 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9358 | 85.18 |
Total Bits 0->1 | 5493 | 4694 | 85.45 |
Total Bits 1->0 | 5493 | 4664 | 84.91 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9358 | 85.18 |
Port Bits 0->1 | 5493 | 4694 | 85.45 |
Port Bits 1->0 | 5493 | 4664 | 84.91 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_ni | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_edn_ni | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
edn_o.edn_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
edn_i.edn_fips | No | No | Yes | T117,T149,T150 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T78,*T79,*T80 | Yes | T78,T79,T80 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T73,*T74,*T81 | Yes | T73,T74,T81 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T36,T82,T83 | Yes | T36,T82,T83 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T78,T80,T84 | Yes | T78,T80,T84 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T78,T80,T84 | Yes | T78,T79,T80 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T74,*T36,*T151 | Yes | T74,T36,T151 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T80,T84 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T22,*T61,*T152 | Yes | T22,T61,T152 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T78,*T79,*T80 | Yes | T78,T79,T80 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T36,*T78,*T79 | Yes | T36,T78,T79 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T73,*T74,*T81 | Yes | T73,T74,T81 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T36,T82,T83 | Yes | T36,T82,T83 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T36,T78,T84 | Yes | T36,T78,T79 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T36,T78,T79 | Yes | T36,T78,T79 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T86,T156,T64 | Yes | T86,T156,T64 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T68,T69,T70 | Yes | T68,T69,T70 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T85,T86,T88 | Yes | T85,T86,T88 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T85,T86,T88 | Yes | T85,T86,T88 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T86,T158,T36 | Yes | T86,T158,T36 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T86,T36,T64 | Yes | T86,T36,T64 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T86,T36,T64 | Yes | T86,T36,T64 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T86,T88,T157 | Yes | T86,T88,T157 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T86,T156,T64 | Yes | T86,T156,T64 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T68,T69,T70 | Yes | T68,T69,T70 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T86,T158,T36 | Yes | T86,T158,T36 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T86,T36,T64 | Yes | T86,T36,T64 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T86,T36,T64 | Yes | T86,T36,T64 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T5,T48,T20 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[8:0] | No | No | Yes | T159,T160,T161 | INPUT | ||
lc_otp_vendor_test_i.ctrl[9] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[13:10] | No | No | Yes | T159,T160,T161 | INPUT | ||
lc_otp_vendor_test_i.ctrl[14] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[25:15] | No | No | Yes | T159,T160,T161 | INPUT | ||
lc_otp_vendor_test_i.ctrl[26] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:27] | No | No | Yes | T161,T159,T160 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[18:0] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[19] | No | No | No | INPUT | |||
lc_otp_program_i.count[21:20] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT | |
lc_otp_program_i.count[22] | No | No | No | INPUT | |||
lc_otp_program_i.count[25:23] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT | |
lc_otp_program_i.count[27:26] | No | No | No | INPUT | |||
lc_otp_program_i.count[40:28] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT | |
lc_otp_program_i.count[41] | No | No | No | INPUT | |||
lc_otp_program_i.count[65:42] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT | |
lc_otp_program_i.count[66] | No | No | No | INPUT | |||
lc_otp_program_i.count[69:67] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[70] | No | No | No | INPUT | |||
lc_otp_program_i.count[71] | Yes | Yes | *T156 | Yes | T156 | INPUT | |
lc_otp_program_i.count[72] | No | No | No | INPUT | |||
lc_otp_program_i.count[91:73] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT | |
lc_otp_program_i.count[92] | No | No | No | INPUT | |||
lc_otp_program_i.count[94:93] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[95] | No | No | No | INPUT | |||
lc_otp_program_i.count[114:96] | Yes | Yes | *T62,*T23,*T60 | Yes | T23,T22,T61 | INPUT | |
lc_otp_program_i.count[115] | No | No | No | INPUT | |||
lc_otp_program_i.count[121:116] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[122] | No | No | No | INPUT | |||
lc_otp_program_i.count[141:123] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[142] | No | No | No | INPUT | |||
lc_otp_program_i.count[152:143] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[153] | No | No | No | INPUT | |||
lc_otp_program_i.count[154] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[155] | No | No | No | INPUT | |||
lc_otp_program_i.count[161:156] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[163:162] | No | No | No | INPUT | |||
lc_otp_program_i.count[164] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[165] | No | No | No | INPUT | |||
lc_otp_program_i.count[167:166] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[168] | No | No | No | INPUT | |||
lc_otp_program_i.count[179:169] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[180] | No | No | No | INPUT | |||
lc_otp_program_i.count[187:181] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[188] | No | No | No | INPUT | |||
lc_otp_program_i.count[193:189] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[194] | No | No | No | INPUT | |||
lc_otp_program_i.count[198:195] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[199] | No | No | No | INPUT | |||
lc_otp_program_i.count[200] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[201] | No | No | No | INPUT | |||
lc_otp_program_i.count[202] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[203] | No | No | No | INPUT | |||
lc_otp_program_i.count[208:204] | Yes | Yes | *T156,*T4,*T5 | Yes | T156,T4,T5 | INPUT | |
lc_otp_program_i.count[209] | No | No | No | INPUT | |||
lc_otp_program_i.count[212:210] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[213] | No | No | No | INPUT | |||
lc_otp_program_i.count[234:214] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[235] | No | No | No | INPUT | |||
lc_otp_program_i.count[238:236] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[239] | No | No | No | INPUT | |||
lc_otp_program_i.count[246:240] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[248:247] | No | No | No | INPUT | |||
lc_otp_program_i.count[254:249] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[257:255] | No | No | No | INPUT | |||
lc_otp_program_i.count[261:258] | Yes | Yes | *T156,*T62,*T22 | Yes | T156,T62,T22 | INPUT | |
lc_otp_program_i.count[262] | No | No | No | INPUT | |||
lc_otp_program_i.count[265:263] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[266] | No | No | No | INPUT | |||
lc_otp_program_i.count[277:267] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[278] | No | No | No | INPUT | |||
lc_otp_program_i.count[283:279] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[284] | No | No | No | INPUT | |||
lc_otp_program_i.count[285] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[286] | No | No | No | INPUT | |||
lc_otp_program_i.count[290:287] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[291] | No | No | No | INPUT | |||
lc_otp_program_i.count[295:292] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[296] | No | No | No | INPUT | |||
lc_otp_program_i.count[298:297] | Yes | Yes | *T156,*T4,*T5 | Yes | T156,T4,T5 | INPUT | |
lc_otp_program_i.count[299] | No | No | No | INPUT | |||
lc_otp_program_i.count[301:300] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[302] | No | No | No | INPUT | |||
lc_otp_program_i.count[308:303] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[309] | No | No | No | INPUT | |||
lc_otp_program_i.count[311:310] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[312] | No | No | No | INPUT | |||
lc_otp_program_i.count[316:313] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[317] | No | No | No | INPUT | |||
lc_otp_program_i.count[320:318] | Yes | Yes | *T156,*T4,*T5 | Yes | T156,T4,T5 | INPUT | |
lc_otp_program_i.count[321] | No | No | No | INPUT | |||
lc_otp_program_i.count[322] | Yes | Yes | *T156 | Yes | T156 | INPUT | |
lc_otp_program_i.count[323] | No | No | No | INPUT | |||
lc_otp_program_i.count[330:324] | Yes | Yes | *T156,*T4,*T5 | Yes | T156,T4,T5 | INPUT | |
lc_otp_program_i.count[331] | No | No | No | INPUT | |||
lc_otp_program_i.count[334:332] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[335] | No | No | No | INPUT | |||
lc_otp_program_i.count[351:336] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[352] | No | No | No | INPUT | |||
lc_otp_program_i.count[359:353] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[360] | No | No | No | INPUT | |||
lc_otp_program_i.count[362:361] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.count[363] | No | No | No | INPUT | |||
lc_otp_program_i.count[367:364] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.count[368] | No | No | No | INPUT | |||
lc_otp_program_i.count[374:369] | Yes | Yes | *T156,*T4,*T5 | Yes | T156,T4,T5 | INPUT | |
lc_otp_program_i.count[376:375] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:377] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[3:0] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[4] | No | No | No | INPUT | |||
lc_otp_program_i.state[33:5] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[34] | No | No | No | INPUT | |||
lc_otp_program_i.state[44:35] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[45] | No | No | No | INPUT | |||
lc_otp_program_i.state[49:46] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[50] | No | No | No | INPUT | |||
lc_otp_program_i.state[51] | Yes | Yes | *T156 | Yes | T156 | INPUT | |
lc_otp_program_i.state[52] | No | No | No | INPUT | |||
lc_otp_program_i.state[53] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[54] | No | No | No | INPUT | |||
lc_otp_program_i.state[75:55] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T74 | INPUT | |
lc_otp_program_i.state[76] | No | No | No | INPUT | |||
lc_otp_program_i.state[90:77] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[91] | No | No | No | INPUT | |||
lc_otp_program_i.state[95:92] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[96] | No | No | No | INPUT | |||
lc_otp_program_i.state[105:97] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[106] | No | No | No | INPUT | |||
lc_otp_program_i.state[116:107] | Yes | Yes | *T156,*T62,*T22 | Yes | T156,T62,T22 | INPUT | |
lc_otp_program_i.state[117] | No | No | No | INPUT | |||
lc_otp_program_i.state[125:118] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T67 | INPUT | |
lc_otp_program_i.state[127:126] | No | No | No | INPUT | |||
lc_otp_program_i.state[143:128] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[144] | No | No | No | INPUT | |||
lc_otp_program_i.state[149:145] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T67 | INPUT | |
lc_otp_program_i.state[150] | No | No | No | INPUT | |||
lc_otp_program_i.state[156:151] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T67 | INPUT | |
lc_otp_program_i.state[157] | No | No | No | INPUT | |||
lc_otp_program_i.state[165:158] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[166] | No | No | No | INPUT | |||
lc_otp_program_i.state[172:167] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[174:173] | No | No | No | INPUT | |||
lc_otp_program_i.state[218:175] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T67 | INPUT | |
lc_otp_program_i.state[219] | No | No | No | INPUT | |||
lc_otp_program_i.state[221:220] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[222] | No | No | No | INPUT | |||
lc_otp_program_i.state[223] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[224] | No | No | No | INPUT | |||
lc_otp_program_i.state[230:225] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[231] | No | No | No | INPUT | |||
lc_otp_program_i.state[237:232] | Yes | Yes | *T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[238] | No | No | No | INPUT | |||
lc_otp_program_i.state[244:239] | Yes | Yes | *T156,*T62,*T22 | Yes | T156,T62,T22 | INPUT | |
lc_otp_program_i.state[245] | No | No | No | INPUT | |||
lc_otp_program_i.state[253:246] | Yes | Yes | *T62,*T23,*T21 | Yes | T23,T22,T61 | INPUT | |
lc_otp_program_i.state[256:254] | No | No | No | INPUT | |||
lc_otp_program_i.state[259:257] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[260] | No | No | No | INPUT | |||
lc_otp_program_i.state[271:261] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T67 | INPUT | |
lc_otp_program_i.state[272] | No | No | No | INPUT | |||
lc_otp_program_i.state[274:273] | Yes | Yes | T62,*T22,*T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[275] | No | No | No | INPUT | |||
lc_otp_program_i.state[279:276] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
lc_otp_program_i.state[281:280] | No | No | No | INPUT | |||
lc_otp_program_i.state[284:282] | Yes | Yes | T156,*T62,*T22 | Yes | T156,T62,T22 | INPUT | |
lc_otp_program_i.state[285] | No | No | No | INPUT | |||
lc_otp_program_i.state[288:286] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.state[289] | No | No | No | INPUT | |||
lc_otp_program_i.state[291:290] | Yes | Yes | T62,*T23,*T21 | Yes | T23,T22,T61 | INPUT | |
lc_otp_program_i.state[292] | No | No | No | INPUT | |||
lc_otp_program_i.state[299:293] | Yes | Yes | *T62,*T23,*T21 | Yes | T23,T22,T61 | INPUT | |
lc_otp_program_i.state[300] | No | No | No | INPUT | |||
lc_otp_program_i.state[307:301] | Yes | Yes | *T156,*T62,*T23 | Yes | T156,T23,T22 | INPUT | |
lc_otp_program_i.state[308] | No | No | No | INPUT | |||
lc_otp_program_i.state[311:309] | Yes | Yes | *T62,*T23,*T21 | Yes | T23,T22,T61 | INPUT | |
lc_otp_program_i.state[312] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:313] | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T62,T22,T61 | Yes | T62,T22,T61 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T162,T163,T164 | Yes | T162,T163,T164 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T68,T69,T70 | Yes | T68,T69,T70 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T22,T61,T67 | Yes | T62,T22,T61 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T6,T18,T48 | Yes | T6,T48,T23 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T22,T165,T166 | Yes | T22,T61,T116 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T6,T18,T19 | Yes | T6,T23,T21 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T4,T18,T19 | Yes | T4,T48,T20 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T22,T165,T166 | Yes | T22,T61,T116 | OUTPUT | |
otp_lc_data_o.count[18:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[21:20] | Yes | Yes | T62,*T60,*T57 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[25:23] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[27:26] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[40:28] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[41] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[65:42] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[66] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[69:67] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[70] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[71] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[72] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[91:73] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[94:93] | Yes | Yes | T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[114:96] | Yes | Yes | *T62,*T23,*T60 | Yes | T23,T22,T61 | OUTPUT | |
otp_lc_data_o.count[115] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[121:116] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[122] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[141:123] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[152:143] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[154] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[161:156] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[163:162] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[164] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[165] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[167:166] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[168] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[179:169] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[180] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[187:181] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[188] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[193:189] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[194] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[198:195] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[200] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[201] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[202] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[203] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[208:204] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[209] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[212:210] | Yes | Yes | T167,T168,*T169 | Yes | T167,T168,T169 | OUTPUT | |
otp_lc_data_o.count[213] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[234:214] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[238:236] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[239] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[246:240] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[248:247] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[254:249] | Yes | Yes | T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[257:255] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[261:258] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[262] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[265:263] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[266] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[277:267] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | OUTPUT | |
otp_lc_data_o.count[278] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[283:279] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[284] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[285] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[286] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[290:287] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[291] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[295:292] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[296] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[298:297] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[299] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[301:300] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[302] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[308:303] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[311:310] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[312] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[316:313] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[320:318] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[321] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[322] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[330:324] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[331] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[334:332] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | OUTPUT | |
otp_lc_data_o.count[335] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[351:336] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[352] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[359:353] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.count[360] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[362:361] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | OUTPUT | |
otp_lc_data_o.count[363] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[367:364] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[368] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[374:369] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[376:375] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:377] | Yes | Yes | T62,T22,T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[3:0] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[4] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[33:5] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[34] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[44:35] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[45] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[49:46] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[50] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[51] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[52] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[53] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[54] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[75:55] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[90:77] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[91] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[95:92] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[96] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[105:97] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[106] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[116:107] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[117] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[125:118] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[127:126] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[143:128] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[144] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[149:145] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T67 | OUTPUT | |
otp_lc_data_o.state[150] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[156:151] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[157] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[165:158] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[166] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[172:167] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[174:173] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[218:175] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T67 | OUTPUT | |
otp_lc_data_o.state[219] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[221:220] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[222] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[223] | Yes | Yes | *T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[224] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[230:225] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[231] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[237:232] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[238] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[244:239] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[245] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[253:246] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[256:254] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[259:257] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[271:261] | Yes | Yes | *T62,*T60,*T57 | Yes | T22,T61,T67 | OUTPUT | |
otp_lc_data_o.state[272] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[274:273] | Yes | Yes | T62,*T22,*T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[275] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[279:276] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[281:280] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[284:282] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[285] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[288:286] | Yes | Yes | T62,T22,T61 | Yes | T22,T61,T74 | OUTPUT | |
otp_lc_data_o.state[289] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[291:290] | Yes | Yes | *T62,T23,T21 | Yes | T23,T22,T61 | OUTPUT | |
otp_lc_data_o.state[292] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[299:293] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[300] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[307:301] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[308] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[311:309] | Yes | Yes | *T62,*T23,T21 | Yes | T23,T22,T61 | OUTPUT | |
otp_lc_data_o.state[312] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:313] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T68,T69,T70 | Yes | T68,T69,T70 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T22,T165,T166 | Yes | T22,T61,T116 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T22,T165,T166 | Yes | T22,T61,T116 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T5,T19,T172 | Yes | T5,T69,T173 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T57,T58,T59 | Yes | T57,T58,T59 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T119,T174,T120 | Yes | T119,T174,T120 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T175,T176,T177 | Yes | T175,T176,T177 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T57,T58,T59 | Yes | T57,T58,T59 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T119,T174,T120 | Yes | T119,T174,T120 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T176,T177,T178 | Yes | T176,T177,T178 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T57,T58,T59 | Yes | T57,T58,T59 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T6,T48,T23 | Yes | T6,T18,T19 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T5,T6,T18 | Yes | T5,T6,T48 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T57,T58,T59 | Yes | T57,T58,T59 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T6,T48,T20 | Yes | T6,T48,T20 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | Yes | Yes | *T165 | Yes | T165 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[1] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[34:2] | Yes | Yes | *T175,*T179,*T180 | Yes | T175,T179,T180 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[35] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[39:36] | Yes | Yes | *T165,*T181,*T4 | Yes | T165,T181,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[40] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[71:41] | Yes | Yes | *T165,*T182,*T181 | Yes | T165,T182,T181 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[72] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[74] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[89:75] | Yes | Yes | *T182,*T181,*T4 | Yes | T182,T181,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[90] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[179:91] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[180] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:181] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T5,T18,T62 | Yes | T5,T20,T23 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T183,T184,T185 | Yes | T179,T186,T187 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |