SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.48 | 84.48 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 84.67 | 84.67 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.67 | 84.67 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.67 | 84.67 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.34 | 90.68 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 141 | 85.98 |
Total Bits | 11012 | 9303 | 84.48 |
Total Bits 0->1 | 5506 | 4666 | 84.74 |
Total Bits 1->0 | 5506 | 4637 | 84.22 |
Ports | 164 | 141 | 85.98 |
Port Bits | 11012 | 9303 | 84.48 |
Port Bits 0->1 | 5506 | 4666 | 84.74 |
Port Bits 1->0 | 5506 | 4637 | 84.22 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_ni | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | INPUT |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_edn_ni | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | INPUT |
edn_o.edn_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
edn_i.edn_fips | No | No | Yes | T158,T123,T159 | INPUT | |
edn_i.edn_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T81,*T82,*T83 | Yes | T81,T82,T83 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T84,*T85,*T86 | Yes | T84,T85,T86 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T60,T87,T88 | Yes | T60,T87,T88 | INPUT |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T85,*T86,*T60 | Yes | T85,T86,T60 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T5,*T160,*T132 | Yes | T5,T160,T132 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T60,T81,T82 | Yes | T60,T81,T82 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T60,T81,T82 | Yes | T60,T81,T82 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T81,*T82,*T83 | Yes | T81,T82,T83 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T60,*T81,*T82 | Yes | T60,T81,T82 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T84,*T85,*T86 | Yes | T84,T85,T86 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T60,T87,T88 | Yes | T60,T87,T88 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T60,T81,T82 | Yes | T60,T81,T82 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T60,T82,T83 | Yes | T60,T81,T82 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T60,T81,T82 | Yes | T60,T81,T82 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T60,T82,T134 | Yes | T60,T81,T82 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T81,T82,T133 | Yes | T81,T82,T83 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T60,T81,T82 | Yes | T60,T81,T82 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T161,T162,T163 | Yes | T161,T162,T163 | OUTPUT |
intr_otp_error_o | Yes | Yes | T161,T162,T163 | Yes | T161,T162,T163 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T5,T89,T92 | Yes | T5,T89,T92 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T5,T41,T68 | Yes | T5,T41,T68 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T89,T92,T164 | Yes | T89,T92,T164 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T5,T89,T92 | Yes | T5,T89,T92 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T5,T41,T68 | Yes | T5,T41,T68 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T89,T92,T164 | Yes | T89,T92,T164 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T64,T116,T89 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
lc_otp_vendor_test_i.ctrl[0] | No | No | Yes | T165 | INPUT | |
lc_otp_vendor_test_i.ctrl[1] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[2] | No | No | Yes | T166 | INPUT | |
lc_otp_vendor_test_i.ctrl[3] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[12:4] | No | No | Yes | T165,T166,T59 | INPUT | |
lc_otp_vendor_test_i.ctrl[13] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[16:14] | No | No | Yes | T59,T165,T166 | INPUT | |
lc_otp_vendor_test_i.ctrl[17] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[19:18] | No | No | Yes | T59,T165 | INPUT | |
lc_otp_vendor_test_i.ctrl[20] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[21] | No | No | Yes | T166 | INPUT | |
lc_otp_vendor_test_i.ctrl[22] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:23] | No | No | Yes | T59,T166,T165 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[1:0] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[2] | No | No | No | INPUT | ||
lc_otp_program_i.count[7:3] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT |
lc_otp_program_i.count[8] | No | No | No | INPUT | ||
lc_otp_program_i.count[11:9] | Yes | Yes | T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT |
lc_otp_program_i.count[12] | No | No | No | INPUT | ||
lc_otp_program_i.count[21:13] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[22] | No | No | No | INPUT | ||
lc_otp_program_i.count[23] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[26:24] | No | No | No | INPUT | ||
lc_otp_program_i.count[33:27] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[34] | No | No | No | INPUT | ||
lc_otp_program_i.count[36:35] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | INPUT |
lc_otp_program_i.count[38:37] | No | No | No | INPUT | ||
lc_otp_program_i.count[53:39] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | INPUT |
lc_otp_program_i.count[54] | No | No | No | INPUT | ||
lc_otp_program_i.count[59:55] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[61:60] | No | No | No | INPUT | ||
lc_otp_program_i.count[68:62] | Yes | Yes | *T5,T55,T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[69] | No | No | No | INPUT | ||
lc_otp_program_i.count[70] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[73:71] | No | No | No | INPUT | ||
lc_otp_program_i.count[92:74] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[93] | No | No | No | INPUT | ||
lc_otp_program_i.count[94] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[95] | No | No | No | INPUT | ||
lc_otp_program_i.count[96] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[97] | No | No | No | INPUT | ||
lc_otp_program_i.count[106:98] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[108:107] | No | No | No | INPUT | ||
lc_otp_program_i.count[122:109] | Yes | Yes | *T5,*T58,*T72 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[123] | No | No | No | INPUT | ||
lc_otp_program_i.count[125:124] | Yes | Yes | *T58,*T72,*T169 | Yes | T55,T56,T52 | INPUT |
lc_otp_program_i.count[126] | No | No | No | INPUT | ||
lc_otp_program_i.count[127] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[128] | No | No | No | INPUT | ||
lc_otp_program_i.count[139:129] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[140] | No | No | No | INPUT | ||
lc_otp_program_i.count[145:141] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT |
lc_otp_program_i.count[146] | No | No | No | INPUT | ||
lc_otp_program_i.count[164:147] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[166:165] | No | No | No | INPUT | ||
lc_otp_program_i.count[168:167] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[170:169] | No | No | No | INPUT | ||
lc_otp_program_i.count[174:171] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[175] | No | No | No | INPUT | ||
lc_otp_program_i.count[177:176] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[178] | No | No | No | INPUT | ||
lc_otp_program_i.count[179] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[180] | No | No | No | INPUT | ||
lc_otp_program_i.count[182:181] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[183] | No | No | No | INPUT | ||
lc_otp_program_i.count[186:184] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[187] | No | No | No | INPUT | ||
lc_otp_program_i.count[200:188] | Yes | Yes | *T5,*T167,*T4 | Yes | T5,T167,T16 | INPUT |
lc_otp_program_i.count[201] | No | No | No | INPUT | ||
lc_otp_program_i.count[204:202] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT |
lc_otp_program_i.count[205] | No | No | No | INPUT | ||
lc_otp_program_i.count[209:206] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT |
lc_otp_program_i.count[210] | No | No | No | INPUT | ||
lc_otp_program_i.count[216:211] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[217] | No | No | No | INPUT | ||
lc_otp_program_i.count[225:218] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[226] | No | No | No | INPUT | ||
lc_otp_program_i.count[227] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[228] | No | No | No | INPUT | ||
lc_otp_program_i.count[237:229] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT |
lc_otp_program_i.count[238] | No | No | No | INPUT | ||
lc_otp_program_i.count[247:239] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[248] | No | No | No | INPUT | ||
lc_otp_program_i.count[253:249] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[256:254] | No | No | No | INPUT | ||
lc_otp_program_i.count[258:257] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[259] | No | No | No | INPUT | ||
lc_otp_program_i.count[270:260] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.count[271] | No | No | No | INPUT | ||
lc_otp_program_i.count[273:272] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[274] | No | No | No | INPUT | ||
lc_otp_program_i.count[283:275] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[284] | No | No | No | INPUT | ||
lc_otp_program_i.count[285] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[286] | No | No | No | INPUT | ||
lc_otp_program_i.count[299:287] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[301:300] | No | No | No | INPUT | ||
lc_otp_program_i.count[306:302] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[307] | No | No | No | INPUT | ||
lc_otp_program_i.count[308] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[309] | No | No | No | INPUT | ||
lc_otp_program_i.count[312:310] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[313] | No | No | No | INPUT | ||
lc_otp_program_i.count[317:314] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[318] | No | No | No | INPUT | ||
lc_otp_program_i.count[328:319] | Yes | Yes | *T5,*T167,*T4 | Yes | T5,T167,T16 | INPUT |
lc_otp_program_i.count[329] | No | No | No | INPUT | ||
lc_otp_program_i.count[330] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[331] | No | No | No | INPUT | ||
lc_otp_program_i.count[337:332] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[338] | No | No | No | INPUT | ||
lc_otp_program_i.count[343:339] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.count[344] | No | No | No | INPUT | ||
lc_otp_program_i.count[352:345] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT |
lc_otp_program_i.count[353] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:354] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.state[8:0] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[9] | No | No | No | INPUT | ||
lc_otp_program_i.state[16:10] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT |
lc_otp_program_i.state[17] | No | No | No | INPUT | ||
lc_otp_program_i.state[21:18] | Yes | Yes | *T57,T55,T56 | Yes | T55,T56,T168 | INPUT |
lc_otp_program_i.state[22] | No | No | No | INPUT | ||
lc_otp_program_i.state[39:23] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.state[41:40] | No | No | No | INPUT | ||
lc_otp_program_i.state[50:42] | Yes | Yes | *T5,*T57,*T55 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[52:51] | No | No | No | INPUT | ||
lc_otp_program_i.state[62:53] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.state[64:63] | No | No | No | INPUT | ||
lc_otp_program_i.state[67:65] | Yes | Yes | T5,*T57,T55 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[68] | No | No | No | INPUT | ||
lc_otp_program_i.state[72:69] | Yes | Yes | *T5,*T57,*T55 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[73] | No | No | No | INPUT | ||
lc_otp_program_i.state[76:74] | Yes | Yes | *T5,*T57,*T55 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[77] | No | No | No | INPUT | ||
lc_otp_program_i.state[80:78] | Yes | Yes | *T5,T55,T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[83:81] | No | No | No | INPUT | ||
lc_otp_program_i.state[85:84] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.state[87:86] | No | No | No | INPUT | ||
lc_otp_program_i.state[102:88] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[103] | No | No | No | INPUT | ||
lc_otp_program_i.state[132:104] | Yes | Yes | *T57,*T55,*T56 | Yes | T55,T56,T66 | INPUT |
lc_otp_program_i.state[133] | No | No | No | INPUT | ||
lc_otp_program_i.state[154:134] | Yes | Yes | *T5,*T167,*T57 | Yes | T5,T167,T55 | INPUT |
lc_otp_program_i.state[155] | No | No | No | INPUT | ||
lc_otp_program_i.state[166:156] | Yes | Yes | *T5,*T57,*T55 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[167] | No | No | No | INPUT | ||
lc_otp_program_i.state[168] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.state[169] | No | No | No | INPUT | ||
lc_otp_program_i.state[178:170] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[180:179] | No | No | No | INPUT | ||
lc_otp_program_i.state[188:181] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.state[189] | No | No | No | INPUT | ||
lc_otp_program_i.state[190] | Yes | Yes | *T5,*T167 | Yes | T5,T167 | INPUT |
lc_otp_program_i.state[193:191] | No | No | No | INPUT | ||
lc_otp_program_i.state[202:194] | Yes | Yes | *T5,T55,T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[203] | No | No | No | INPUT | ||
lc_otp_program_i.state[204] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.state[205] | No | No | No | INPUT | ||
lc_otp_program_i.state[211:206] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[213:212] | No | No | No | INPUT | ||
lc_otp_program_i.state[221:214] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.state[223:222] | No | No | No | INPUT | ||
lc_otp_program_i.state[227:224] | Yes | Yes | *T5,*T57,*T59 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[228] | No | No | No | INPUT | ||
lc_otp_program_i.state[241:229] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[242] | No | No | No | INPUT | ||
lc_otp_program_i.state[243] | Yes | Yes | *T5,*T167 | Yes | T5,T167 | INPUT |
lc_otp_program_i.state[245:244] | No | No | No | INPUT | ||
lc_otp_program_i.state[250:246] | Yes | Yes | T55,T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.state[251] | No | No | No | INPUT | ||
lc_otp_program_i.state[252] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT |
lc_otp_program_i.state[253] | No | No | No | INPUT | ||
lc_otp_program_i.state[266:254] | Yes | Yes | *T57,*T58,*T59 | Yes | T132,T18,T55 | INPUT |
lc_otp_program_i.state[267] | No | No | No | INPUT | ||
lc_otp_program_i.state[281:268] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT |
lc_otp_program_i.state[282] | No | No | No | INPUT | ||
lc_otp_program_i.state[285:283] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_i.state[287:286] | No | No | No | INPUT | ||
lc_otp_program_i.state[318:288] | Yes | Yes | *T5,*T167,*T57 | Yes | T5,T167,T132 | INPUT |
lc_otp_program_i.state[319] | No | No | No | INPUT | ||
lc_otp_program_i.req | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T170,T171,T172 | Yes | T170,T171,T172 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T5,T41,T68 | Yes | T5,T41,T68 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T55,T56,T66 | Yes | T55,T56,T67 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T41,T42,T17 | Yes | T4,T6,T96 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T18,T55,T56 | Yes | T132,T18,T122 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T6,T96,T65 | Yes | T17,T68,T132 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T5,T16,T97 | Yes | T5,T16,T17 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T18,T55,T56 | Yes | T132,T18,T122 | OUTPUT |
otp_lc_data_o.count[1:0] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[2] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[7:3] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[8] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[11:9] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[12] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[21:13] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[23] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[26:24] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[33:27] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[34] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[36:35] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[38:37] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[53:39] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[54] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[59:55] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[61:60] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[68:62] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[69] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[70] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[73:71] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[92:74] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[93] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[94] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[96] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[97] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[106:98] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[108:107] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[122:109] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[125:124] | Yes | Yes | *T58,*T72,*T169 | Yes | T55,T56,T52 | OUTPUT |
otp_lc_data_o.count[126] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[127] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[128] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[139:129] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[140] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[145:141] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[146] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[164:147] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[166:165] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[168:167] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[170:169] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[174:171] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[175] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[177:176] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[179] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[180] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[182:181] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[183] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[186:184] | Yes | Yes | *T173,*T174,*T175 | Yes | T176,T173,T174 | OUTPUT |
otp_lc_data_o.count[187] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[200:188] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[201] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[204:202] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[205] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[209:206] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[210] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[216:211] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[217] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[225:218] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[227] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[228] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[237:229] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[238] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[247:239] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[248] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[253:249] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[256:254] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[258:257] | Yes | Yes | T173,T174,T175 | Yes | T173,T174,T175 | OUTPUT |
otp_lc_data_o.count[259] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[270:260] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[271] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[273:272] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[274] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[283:275] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[284] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[285] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[286] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[299:287] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[301:300] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[306:302] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[307] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[308] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[312:310] | Yes | Yes | *T173,*T174,*T175 | Yes | T173,T174,T175 | OUTPUT |
otp_lc_data_o.count[313] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[317:314] | Yes | Yes | *T173,*T174,*T175 | Yes | T173,T174,T175 | OUTPUT |
otp_lc_data_o.count[318] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[328:319] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[329] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[330] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[331] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[337:332] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[338] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[343:339] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.count[344] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[352:345] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.count[353] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:354] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[8:0] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[9] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[16:10] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.state[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[21:18] | Yes | Yes | *T57,*T55,*T56 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[39:23] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[41:40] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[50:42] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[52:51] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[62:53] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[64:63] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[67:65] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[72:69] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[73] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[76:74] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[77] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[80:78] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[83:81] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[85:84] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[87:86] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[102:88] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[103] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[132:104] | Yes | Yes | *T57,*T55,*T56 | Yes | T55,T56,T66 | OUTPUT |
otp_lc_data_o.state[133] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[154:134] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[166:156] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[167] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[168] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[169] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[178:170] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[180:179] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[188:181] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[190] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.state[193:191] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[202:194] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[203] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[204] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[205] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[211:206] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[213:212] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[221:214] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[223:222] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[227:224] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[228] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[241:229] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[242] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[243] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.state[245:244] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[250:246] | Yes | Yes | T55,T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[251] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[252] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[266:254] | Yes | Yes | *T57,*T58,*T59 | Yes | T132,T18,T55 | OUTPUT |
otp_lc_data_o.state[267] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[281:268] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.state[282] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[285:283] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT |
otp_lc_data_o.state[287:286] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[318:288] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_lc_data_o.state[319] | No | No | No | OUTPUT | ||
otp_lc_data_o.error | Yes | Yes | T5,T41,T68 | Yes | T5,T41,T68 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T18,T55,T56 | Yes | T132,T18,T122 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T18,T55,T56 | Yes | T132,T18,T122 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T6,T96,T15 | Yes | T64,T41,T18 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T16,T53,T17 | Yes | T16,T53,T17 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T177,T178,T179 | Yes | T177,T178,T179 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T180,T181,T182 | Yes | T180,T181,T182 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T16,T53,T17 | Yes | T16,T53,T17 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T177,T178,T179 | Yes | T177,T178,T179 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T180,T181,T183 | Yes | T180,T181,T183 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T16,T53,T17 | Yes | T16,T53,T17 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T16,T53,T17 | Yes | T16,T53,T17 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T5,T64,T42 | Yes | T5,T6,T64 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[6:0] | Yes | Yes | *T184,*T4,*T5 | Yes | T184,T5,T16 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[7] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[37:8] | Yes | Yes | *T185,*T186,*T187 | Yes | T185,T186,T187 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[38] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[137:39] | Yes | Yes | *T186,*T184,*T185 | Yes | T186,T184,T185 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[138] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[160:139] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[161] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[174:162] | Yes | Yes | *T186,*T184,*T185 | Yes | T186,T184,T185 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[175] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[198:176] | Yes | Yes | *T187,*T188,*T184 | Yes | T187,T188,T184 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[199] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[204:200] | Yes | Yes | *T185,*T187,*T188 | Yes | T185,T187,T188 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[205] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:206] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T64,T189,T18 | Yes | T4,T6,T96 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[51:0] | Yes | Yes | *T5,*T64,*T41 | Yes | T4,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[52] | No | No | Yes | T188,T190,T191 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:53] | Yes | Yes | T16,T17,T52 | Yes | T16,T53,T17 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T19,T20,T21 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 141 | 88.12 |
Total Bits | 10986 | 9302 | 84.67 |
Total Bits 0->1 | 5493 | 4665 | 84.93 |
Total Bits 1->0 | 5493 | 4637 | 84.42 |
Ports | 160 | 141 | 88.12 |
Port Bits | 10986 | 9302 | 84.67 |
Port Bits 0->1 | 5493 | 4665 | 84.93 |
Port Bits 1->0 | 5493 | 4637 | 84.42 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_ni | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | INPUT | |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_edn_ni | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | INPUT | |
edn_o.edn_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
edn_i.edn_fips | No | No | Yes | T158,T123,T159 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T81,*T82,*T83 | Yes | T81,T82,T83 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T84,*T85,*T86 | Yes | T84,T85,T86 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T60,T87,T88 | Yes | T60,T87,T88 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T85,*T86,*T60 | Yes | T85,T86,T60 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T5,*T160,*T132 | Yes | T5,T160,T132 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T60,T81,T82 | Yes | T60,T81,T82 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T60,T81,T82 | Yes | T60,T81,T82 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T81,*T82,*T83 | Yes | T81,T82,T83 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T60,*T81,*T82 | Yes | T60,T81,T82 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T84,*T85,*T86 | Yes | T84,T85,T86 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T60,T87,T88 | Yes | T60,T87,T88 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T60,T81,T82 | Yes | T60,T81,T82 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T60,T82,T83 | Yes | T60,T81,T82 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T60,T81,T82 | Yes | T60,T81,T82 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T81,T82,T83 | Yes | T81,T82,T83 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T60,T82,T134 | Yes | T60,T81,T82 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T81,T82,T133 | Yes | T81,T82,T83 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T60,T81,T82 | Yes | T60,T81,T82 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T161,T162,T163 | Yes | T161,T162,T163 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T161,T162,T163 | Yes | T161,T162,T163 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T5,T89,T92 | Yes | T5,T89,T92 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T5,T41,T68 | Yes | T5,T41,T68 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T89,T92,T164 | Yes | T89,T92,T164 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T5,T89,T92 | Yes | T5,T89,T92 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T5,T41,T68 | Yes | T5,T41,T68 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T89,T92,T164 | Yes | T89,T92,T164 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T89,T92,T94 | Yes | T89,T92,T94 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T64,T116,T89 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[0] | No | No | Yes | T165 | INPUT | ||
lc_otp_vendor_test_i.ctrl[1] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[2] | No | No | Yes | T166 | INPUT | ||
lc_otp_vendor_test_i.ctrl[3] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[12:4] | No | No | Yes | T165,T166,T59 | INPUT | ||
lc_otp_vendor_test_i.ctrl[13] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[16:14] | No | No | Yes | T59,T165,T166 | INPUT | ||
lc_otp_vendor_test_i.ctrl[17] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[19:18] | No | No | Yes | T59,T165 | INPUT | ||
lc_otp_vendor_test_i.ctrl[20] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[21] | No | No | Yes | T166 | INPUT | ||
lc_otp_vendor_test_i.ctrl[22] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:23] | No | No | Yes | T59,T166,T165 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[1:0] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[2] | No | No | No | INPUT | |||
lc_otp_program_i.count[7:3] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT | |
lc_otp_program_i.count[8] | No | No | No | INPUT | |||
lc_otp_program_i.count[11:9] | Yes | Yes | T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT | |
lc_otp_program_i.count[12] | No | No | No | INPUT | |||
lc_otp_program_i.count[21:13] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[22] | No | No | No | INPUT | |||
lc_otp_program_i.count[23] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[26:24] | No | No | No | INPUT | |||
lc_otp_program_i.count[33:27] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[34] | No | No | No | INPUT | |||
lc_otp_program_i.count[36:35] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | INPUT | |
lc_otp_program_i.count[38:37] | No | No | No | INPUT | |||
lc_otp_program_i.count[53:39] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | INPUT | |
lc_otp_program_i.count[54] | No | No | No | INPUT | |||
lc_otp_program_i.count[59:55] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[61:60] | No | No | No | INPUT | |||
lc_otp_program_i.count[68:62] | Yes | Yes | *T5,T55,T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[69] | No | No | No | INPUT | |||
lc_otp_program_i.count[70] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[73:71] | No | No | No | INPUT | |||
lc_otp_program_i.count[92:74] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[93] | No | No | No | INPUT | |||
lc_otp_program_i.count[94] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[95] | No | No | No | INPUT | |||
lc_otp_program_i.count[96] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[97] | No | No | No | INPUT | |||
lc_otp_program_i.count[106:98] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[108:107] | No | No | No | INPUT | |||
lc_otp_program_i.count[122:109] | Yes | Yes | *T5,*T58,*T72 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[123] | No | No | No | INPUT | |||
lc_otp_program_i.count[125:124] | Yes | Yes | *T58,*T72,*T169 | Yes | T55,T56,T52 | INPUT | |
lc_otp_program_i.count[126] | No | No | No | INPUT | |||
lc_otp_program_i.count[127] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[128] | No | No | No | INPUT | |||
lc_otp_program_i.count[139:129] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[140] | No | No | No | INPUT | |||
lc_otp_program_i.count[145:141] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT | |
lc_otp_program_i.count[146] | No | No | No | INPUT | |||
lc_otp_program_i.count[164:147] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[166:165] | No | No | No | INPUT | |||
lc_otp_program_i.count[168:167] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[170:169] | No | No | No | INPUT | |||
lc_otp_program_i.count[174:171] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[175] | No | No | No | INPUT | |||
lc_otp_program_i.count[177:176] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[178] | No | No | No | INPUT | |||
lc_otp_program_i.count[179] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[180] | No | No | No | INPUT | |||
lc_otp_program_i.count[182:181] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[183] | No | No | No | INPUT | |||
lc_otp_program_i.count[186:184] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[187] | No | No | No | INPUT | |||
lc_otp_program_i.count[200:188] | Yes | Yes | *T5,*T167,*T4 | Yes | T5,T167,T16 | INPUT | |
lc_otp_program_i.count[201] | No | No | No | INPUT | |||
lc_otp_program_i.count[204:202] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT | |
lc_otp_program_i.count[205] | No | No | No | INPUT | |||
lc_otp_program_i.count[209:206] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT | |
lc_otp_program_i.count[210] | No | No | No | INPUT | |||
lc_otp_program_i.count[216:211] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[217] | No | No | No | INPUT | |||
lc_otp_program_i.count[225:218] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[226] | No | No | No | INPUT | |||
lc_otp_program_i.count[227] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[228] | No | No | No | INPUT | |||
lc_otp_program_i.count[237:229] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT | |
lc_otp_program_i.count[238] | No | No | No | INPUT | |||
lc_otp_program_i.count[247:239] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[248] | No | No | No | INPUT | |||
lc_otp_program_i.count[253:249] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[256:254] | No | No | No | INPUT | |||
lc_otp_program_i.count[258:257] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[259] | No | No | No | INPUT | |||
lc_otp_program_i.count[270:260] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.count[271] | No | No | No | INPUT | |||
lc_otp_program_i.count[273:272] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[274] | No | No | No | INPUT | |||
lc_otp_program_i.count[283:275] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[284] | No | No | No | INPUT | |||
lc_otp_program_i.count[285] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[286] | No | No | No | INPUT | |||
lc_otp_program_i.count[299:287] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[301:300] | No | No | No | INPUT | |||
lc_otp_program_i.count[306:302] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[307] | No | No | No | INPUT | |||
lc_otp_program_i.count[308] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[309] | No | No | No | INPUT | |||
lc_otp_program_i.count[312:310] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[313] | No | No | No | INPUT | |||
lc_otp_program_i.count[317:314] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[318] | No | No | No | INPUT | |||
lc_otp_program_i.count[328:319] | Yes | Yes | *T5,*T167,*T4 | Yes | T5,T167,T16 | INPUT | |
lc_otp_program_i.count[329] | No | No | No | INPUT | |||
lc_otp_program_i.count[330] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[331] | No | No | No | INPUT | |||
lc_otp_program_i.count[337:332] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[338] | No | No | No | INPUT | |||
lc_otp_program_i.count[343:339] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.count[344] | No | No | No | INPUT | |||
lc_otp_program_i.count[352:345] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | INPUT | |
lc_otp_program_i.count[353] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:354] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.state[8:0] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[9] | No | No | No | INPUT | |||
lc_otp_program_i.state[16:10] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT | |
lc_otp_program_i.state[17] | No | No | No | INPUT | |||
lc_otp_program_i.state[21:18] | Yes | Yes | *T57,T55,T56 | Yes | T55,T56,T168 | INPUT | |
lc_otp_program_i.state[22] | No | No | No | INPUT | |||
lc_otp_program_i.state[39:23] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.state[41:40] | No | No | No | INPUT | |||
lc_otp_program_i.state[50:42] | Yes | Yes | *T5,*T57,*T55 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[52:51] | No | No | No | INPUT | |||
lc_otp_program_i.state[62:53] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.state[64:63] | No | No | No | INPUT | |||
lc_otp_program_i.state[67:65] | Yes | Yes | T5,*T57,T55 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[68] | No | No | No | INPUT | |||
lc_otp_program_i.state[72:69] | Yes | Yes | *T5,*T57,*T55 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[73] | No | No | No | INPUT | |||
lc_otp_program_i.state[76:74] | Yes | Yes | *T5,*T57,*T55 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[77] | No | No | No | INPUT | |||
lc_otp_program_i.state[80:78] | Yes | Yes | *T5,T55,T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[83:81] | No | No | No | INPUT | |||
lc_otp_program_i.state[85:84] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.state[87:86] | No | No | No | INPUT | |||
lc_otp_program_i.state[102:88] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[103] | No | No | No | INPUT | |||
lc_otp_program_i.state[132:104] | Yes | Yes | *T57,*T55,*T56 | Yes | T55,T56,T66 | INPUT | |
lc_otp_program_i.state[133] | No | No | No | INPUT | |||
lc_otp_program_i.state[154:134] | Yes | Yes | *T5,*T167,*T57 | Yes | T5,T167,T55 | INPUT | |
lc_otp_program_i.state[155] | No | No | No | INPUT | |||
lc_otp_program_i.state[166:156] | Yes | Yes | *T5,*T57,*T55 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[167] | No | No | No | INPUT | |||
lc_otp_program_i.state[168] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.state[169] | No | No | No | INPUT | |||
lc_otp_program_i.state[178:170] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[180:179] | No | No | No | INPUT | |||
lc_otp_program_i.state[188:181] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.state[189] | No | No | No | INPUT | |||
lc_otp_program_i.state[190] | Yes | Yes | *T5,*T167 | Yes | T5,T167 | INPUT | |
lc_otp_program_i.state[193:191] | No | No | No | INPUT | |||
lc_otp_program_i.state[202:194] | Yes | Yes | *T5,T55,T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[203] | No | No | No | INPUT | |||
lc_otp_program_i.state[204] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.state[205] | No | No | No | INPUT | |||
lc_otp_program_i.state[211:206] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[213:212] | No | No | No | INPUT | |||
lc_otp_program_i.state[221:214] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.state[223:222] | No | No | No | INPUT | |||
lc_otp_program_i.state[227:224] | Yes | Yes | *T5,*T57,*T59 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[228] | No | No | No | INPUT | |||
lc_otp_program_i.state[241:229] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[242] | No | No | No | INPUT | |||
lc_otp_program_i.state[243] | Yes | Yes | *T5,*T167 | Yes | T5,T167 | INPUT | |
lc_otp_program_i.state[245:244] | No | No | No | INPUT | |||
lc_otp_program_i.state[250:246] | Yes | Yes | T55,T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.state[251] | No | No | No | INPUT | |||
lc_otp_program_i.state[252] | Yes | Yes | *T5,*T55,*T56 | Yes | T5,T55,T56 | INPUT | |
lc_otp_program_i.state[253] | No | No | No | INPUT | |||
lc_otp_program_i.state[266:254] | Yes | Yes | *T57,*T58,*T59 | Yes | T132,T18,T55 | INPUT | |
lc_otp_program_i.state[267] | No | No | No | INPUT | |||
lc_otp_program_i.state[281:268] | Yes | Yes | *T5,*T167,*T55 | Yes | T5,T167,T55 | INPUT | |
lc_otp_program_i.state[282] | No | No | No | INPUT | |||
lc_otp_program_i.state[285:283] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_i.state[287:286] | No | No | No | INPUT | |||
lc_otp_program_i.state[318:288] | Yes | Yes | *T5,*T167,*T57 | Yes | T5,T167,T132 | INPUT | |
lc_otp_program_i.state[319] | No | No | No | INPUT | |||
lc_otp_program_i.req | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T67 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T170,T171,T172 | Yes | T170,T171,T172 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T5,T41,T68 | Yes | T5,T41,T68 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T55,T56,T66 | Yes | T55,T56,T67 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T41,T42,T17 | Yes | T4,T6,T96 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T18,T55,T56 | Yes | T132,T18,T122 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T6,T96,T65 | Yes | T17,T68,T132 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T5,T16,T97 | Yes | T5,T16,T17 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T18,T55,T56 | Yes | T132,T18,T122 | OUTPUT | |
otp_lc_data_o.count[1:0] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[2] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[7:3] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[8] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[11:9] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[12] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[21:13] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[23] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[26:24] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[33:27] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[34] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[36:35] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[38:37] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[53:39] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[54] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[59:55] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[61:60] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[68:62] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[69] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[70] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[73:71] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[92:74] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[93] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[94] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[96] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[97] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[106:98] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[108:107] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[122:109] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[125:124] | Yes | Yes | *T58,*T72,*T169 | Yes | T55,T56,T52 | OUTPUT | |
otp_lc_data_o.count[126] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[127] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[128] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[139:129] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[140] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[145:141] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[146] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[164:147] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[166:165] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[168:167] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[170:169] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[174:171] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[175] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[177:176] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[179] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[180] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[182:181] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[183] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[186:184] | Yes | Yes | *T173,*T174,*T175 | Yes | T176,T173,T174 | OUTPUT | |
otp_lc_data_o.count[187] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[200:188] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[201] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[204:202] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[205] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[209:206] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[210] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[216:211] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[217] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[225:218] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[227] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[228] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[237:229] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[238] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[247:239] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[248] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[253:249] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[256:254] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[258:257] | Yes | Yes | T173,T174,T175 | Yes | T173,T174,T175 | OUTPUT | |
otp_lc_data_o.count[259] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[270:260] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[271] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[273:272] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[274] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[283:275] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[284] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[285] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[286] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[299:287] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[301:300] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[306:302] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[307] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[308] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[312:310] | Yes | Yes | *T173,*T174,*T175 | Yes | T173,T174,T175 | OUTPUT | |
otp_lc_data_o.count[313] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[317:314] | Yes | Yes | *T173,*T174,*T175 | Yes | T173,T174,T175 | OUTPUT | |
otp_lc_data_o.count[318] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[328:319] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[329] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[330] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[331] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[337:332] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[338] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[343:339] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.count[344] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[352:345] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.count[353] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:354] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[8:0] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[9] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[16:10] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.state[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[21:18] | Yes | Yes | *T57,*T55,*T56 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[39:23] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[41:40] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[50:42] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[52:51] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[62:53] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[64:63] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[67:65] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[72:69] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[73] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[76:74] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[77] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[80:78] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[83:81] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[85:84] | Yes | Yes | T55,T56,T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[87:86] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[102:88] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[103] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[132:104] | Yes | Yes | *T57,*T55,*T56 | Yes | T55,T56,T66 | OUTPUT | |
otp_lc_data_o.state[133] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[154:134] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[166:156] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[167] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[168] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[169] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[178:170] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[180:179] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[188:181] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[190] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.state[193:191] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[202:194] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[203] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[204] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[205] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[211:206] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[213:212] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[221:214] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[223:222] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[227:224] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[228] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[241:229] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[242] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[243] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.state[245:244] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[250:246] | Yes | Yes | T55,T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[251] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[252] | Yes | Yes | *T5,*T16,*T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[266:254] | Yes | Yes | *T57,*T58,*T59 | Yes | T132,T18,T55 | OUTPUT | |
otp_lc_data_o.state[267] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[281:268] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.state[282] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[285:283] | Yes | Yes | *T55,*T56,*T67 | Yes | T55,T56,T168 | OUTPUT | |
otp_lc_data_o.state[287:286] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[318:288] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_lc_data_o.state[319] | No | No | No | OUTPUT | |||
otp_lc_data_o.error | Yes | Yes | T5,T41,T68 | Yes | T5,T41,T68 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T18,T55,T56 | Yes | T132,T18,T122 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T18,T55,T56 | Yes | T132,T18,T122 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T6,T96,T15 | Yes | T64,T41,T18 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T16,T53,T17 | Yes | T16,T53,T17 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T177,T178,T179 | Yes | T177,T178,T179 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T180,T181,T182 | Yes | T180,T181,T182 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T16,T53,T17 | Yes | T16,T53,T17 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T177,T178,T179 | Yes | T177,T178,T179 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T180,T181,T183 | Yes | T180,T181,T183 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T16,T53,T17 | Yes | T16,T53,T17 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T16,T15,T64 | Yes | T4,T6,T16 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T41 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T16,T53,T17 | Yes | T16,T53,T17 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T5,T64,T42 | Yes | T5,T6,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[6:0] | Yes | Yes | *T184,*T4,*T5 | Yes | T184,T5,T16 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[7] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[37:8] | Yes | Yes | *T185,*T186,*T187 | Yes | T185,T186,T187 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[38] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[137:39] | Yes | Yes | *T186,*T184,*T185 | Yes | T186,T184,T185 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[138] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[160:139] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[161] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[174:162] | Yes | Yes | *T186,*T184,*T185 | Yes | T186,T184,T185 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[175] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[198:176] | Yes | Yes | *T187,*T188,*T184 | Yes | T187,T188,T184 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[199] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[204:200] | Yes | Yes | *T185,*T187,*T188 | Yes | T185,T187,T188 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[205] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:206] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T64,T189,T18 | Yes | T4,T6,T96 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T16,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[51:0] | Yes | Yes | *T5,*T64,*T41 | Yes | T4,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[52] | No | No | Yes | T188,T190,T191 | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:53] | Yes | Yes | T16,T17,T52 | Yes | T16,T53,T17 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T5,T16,T64 | Yes | T4,T5,T6 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |