Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__prim_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	158796	1			T75	19		T76	11		T79	57
values[2]	4429	1			T75	2		T76	2		T253	3
values[3]	2000	1			T539	1		T586	8		T904	1
values[4]	1416	1			T586	8		T904	1		T689	1
values[5]	1010	1			T586	13		T904	1		T896	6
values[6]	876	1			T586	10		T904	1		T896	1
values[7]	754	1			T586	6		T904	1		T896	4
values[8]	780	1			T586	5		T904	1		T896	5
values[9]	703	1			T586	5		T904	1		T896	1
values[10]	608	1			T586	10		T904	1		T896	1
values[11]	580	1			T586	5		T904	1		T896	3
values[12]	558	1			T586	2		T904	1		T896	3
values[13]	530	1			T586	5		T904	1		T896	4
values[14]	561	1			T586	7		T904	1		T896	2
values[15]	578	1			T586	4		T904	2		T896	1
values[16]	577	1			T586	7		T904	1		T896	2
values[17]	547	1			T586	11		T904	1		T896	2
values[18]	524	1			T586	5		T904	1		T896	1
values[19]	453	1			T586	4		T904	1		T896	1
values[20]	379	1			T586	3		T904	1		T896	1
values[21]	346	1			T586	5		T904	1		T896	2
values[22]	334	1			T586	6		T904	1		T896	3
values[23]	375	1			T586	3		T904	1		T896	1
values[24]	301	1			T586	2		T904	1		T896	1
values[25]	311	1			T586	4		T904	1		T896	2
values[26]	286	1			T586	7		T904	1		T896	2
values[27]	277	1			T586	8		T904	1		T896	1
values[28]	220	1			T586	8		T904	1		T896	4
values[29]	177	1			T586	9		T904	1		T896	6
values[30]	144	1			T586	6		T904	1		T896	1
values[31]	108	1			T586	4		T904	1		T896	4
values[32]	97	1			T586	4		T904	1		T896	4
values[33]	75	1			T586	3		T904	1		T896	7
values[34]	84	1			T586	7		T904	1		T896	7
values[35]	79	1			T586	9		T904	2		T896	2
values[36]	68	1			T586	5		T904	1		T896	4
values[37]	75	1			T586	9		T904	1		T896	6
values[38]	81	1			T586	9		T904	1		T896	4
values[39]	89	1			T586	8		T904	1		T896	4
values[40]	74	1			T586	6		T904	1		T896	3
values[41]	69	1			T586	7		T904	1		T896	3
values[42]	72	1			T586	7		T904	1		T896	3
values[43]	70	1			T586	3		T904	1		T896	1
values[44]	67	1			T586	4		T904	1		T896	3
values[45]	64	1			T586	5		T904	1		T896	6
values[46]	78	1			T586	10		T904	1		T896	9
values[47]	85	1			T586	3		T904	1		T896	5
values[48]	65	1			T586	3		T904	1		T896	2
values[49]	64	1			T586	4		T904	1		T896	5
values[50]	73	1			T586	4		T904	1		T896	7
values[51]	62	1			T586	2		T904	1		T896	4
values[52]	66	1			T586	3		T904	1		T896	2
values[53]	78	1			T586	3		T904	1		T896	4
values[54]	56	1			T586	2		T904	1		T896	1
values[55]	64	1			T586	5		T904	1		T896	4
values[56]	71	1			T586	7		T904	1		T896	3
values[57]	65	1			T586	8		T904	1		T896	1
values[58]	60	1			T586	5		T904	1		T896	4
values[59]	57	1			T586	2		T904	1		T896	1
values[60]	53	1			T586	3		T904	1		T896	1
values[61]	69	1			T586	8		T904	1		T896	2
values[62]	61	1			T586	5		T904	1		T896	2
values[63]	58	1			T586	5		T904	1		T896	2
values[64]	68	1			T586	5		T904	1		T896	2
values[65]	61	1			T586	3		T904	1		T896	4
values[66]	54	1			T586	5		T904	1		T896	2
values[67]	63	1			T586	4		T904	1		T896	4
values[68]	67	1			T586	4		T904	1		T896	2
values[69]	58	1			T586	3		T904	1		T896	2
values[70]	87	1			T586	9		T904	1		T896	1
values[71]	60	1			T586	5		T904	1		T896	3
values[72]	76	1			T586	4		T904	1		T896	6
values[73]	80	1			T586	3		T904	1		T896	8
values[74]	80	1			T586	3		T904	1		T896	6
values[75]	58	1			T586	2		T904	1		T896	2
values[76]	64	1			T586	3		T904	1		T896	3
values[77]	78	1			T586	5		T904	1		T896	3
values[78]	82	1			T586	6		T904	1		T896	1
values[79]	78	1			T586	11		T904	1		T896	2
values[80]	93	1			T586	4		T904	3		T896	2
values[81]	79	1			T586	4		T904	2		T896	3
values[82]	71	1			T586	5		T904	1		T896	3
values[83]	74	1			T586	3		T904	2		T896	1
values[84]	86	1			T586	2		T904	3		T896	2
values[85]	87	1			T586	6		T904	5		T896	2
values[86]	78	1			T586	9		T904	1		T896	2
values[87]	71	1			T586	8		T904	3		T896	2
values[88]	85	1			T586	8		T904	7		T896	4
values[89]	89	1			T586	9		T904	8		T896	1
values[90]	82	1			T586	10		T904	1		T896	1
values[91]	88	1			T586	9		T904	2		T896	2
values[92]	82	1			T586	8		T904	2		T896	5
values[93]	79	1			T586	7		T904	1		T896	5
values[94]	89	1			T586	11		T904	1		T896	4
values[95]	103	1			T586	5		T904	1		T896	3
values[96]	124	1			T586	5		T904	4		T896	8
values[97]	113	1			T586	9		T904	2		T896	7
values[98]	114	1			T586	12		T904	3		T896	3
values[99]	118	1			T586	9		T904	7		T896	1
values[100]	142	1			T586	15		T904	4		T896	4
values[101]	125	1			T586	7		T904	4		T896	4
values[102]	99	1			T586	6		T904	1		T896	5
values[103]	110	1			T586	12		T904	2		T896	2
values[104]	100	1			T586	10		T904	2		T896	3
values[105]	119	1			T586	9		T904	2		T896	4
values[106]	128	1			T586	11		T904	5		T896	9
values[107]	127	1			T586	9		T904	4		T896	12
values[108]	100	1			T586	5		T904	1		T896	9
values[109]	113	1			T586	6		T904	2		T896	6
values[110]	108	1			T586	14		T904	2		T896	5
values[111]	109	1			T586	9		T904	1		T896	3
values[112]	110	1			T586	11		T904	2		T896	5
values[113]	130	1			T586	8		T904	6		T896	5
values[114]	122	1			T586	7		T904	5		T896	6
values[115]	125	1			T586	9		T904	2		T896	6
values[116]	137	1			T586	7		T904	5		T896	13
values[117]	120	1			T586	9		T904	3		T896	9
values[118]	124	1			T586	11		T904	2		T896	2
values[119]	115	1			T586	8		T904	4		T896	5
values[120]	123	1			T586	4		T904	2		T896	6
values[121]	131	1			T586	4		T904	3		T896	3
values[122]	161	1			T586	13		T904	5		T896	6
values[123]	151	1			T586	18		T904	2		T896	3
values[124]	260	1			T586	29		T904	4		T896	8
values[125]	514	1			T586	40		T904	3		T896	30
values[126]	1030	1			T586	48		T904	10		T896	57
values[127]	2832	1			T586	32		T904	116		T896	23
values[128]	4755	1			T586	3		T904	190		T896	1