Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.keymgr_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	150372	1			T74	870		T75	16		T76	15
values[2]	3756	1			T253	2		T398	8		T539	7
values[3]	1991	1			T748	1		T586	14		T702	1
values[4]	1491	1			T586	8		T896	67		T757	26
values[5]	1375	1			T586	29		T896	55		T757	11
values[6]	1300	1			T586	34		T896	56		T757	3
values[7]	1197	1			T586	51		T896	47		T757	5
values[8]	1147	1			T586	57		T896	45		T757	8
values[9]	913	1			T586	66		T896	35		T757	6
values[10]	801	1			T586	44		T896	45		T757	7
values[11]	665	1			T586	25		T896	32		T757	4
values[12]	480	1			T586	17		T896	23		T757	5
values[13]	433	1			T586	17		T896	3		T757	10
values[14]	407	1			T586	12		T757	4		T911	5
values[15]	436	1			T586	23		T757	8		T911	1
values[16]	444	1			T586	13		T757	10		T902	2
values[17]	359	1			T586	16		T757	4		T902	1
values[18]	279	1			T586	18		T757	11		T902	4
values[19]	191	1			T586	7		T757	16		T902	4
values[20]	207	1			T586	1		T757	20		T902	6
values[21]	222	1			T757	27		T902	3		T907	15
values[22]	212	1			T757	30		T902	1		T907	16
values[23]	209	1			T757	31		T902	4		T907	12
values[24]	203	1			T757	33		T902	3		T907	15
values[25]	218	1			T757	11		T902	2		T907	15
values[26]	248	1			T757	18		T902	1		T600	4
values[27]	241	1			T757	24		T902	5		T600	4
values[28]	221	1			T757	2		T902	1		T600	1
values[29]	207	1			T757	1		T902	1		T600	2
values[30]	190	1			T902	3		T600	1		T502	4
values[31]	189	1			T902	4		T600	1		T502	4
values[32]	178	1			T902	3		T600	4		T502	20
values[33]	162	1			T902	3		T600	1		T502	17
values[34]	149	1			T902	1		T600	3		T502	33
values[35]	133	1			T902	2		T600	2		T502	11
values[36]	126	1			T902	1		T600	3		T502	2
values[37]	133	1			T902	2		T600	1		T502	1
values[38]	110	1			T902	3		T600	2		T502	3
values[39]	111	1			T902	2		T600	1		T502	11
values[40]	128	1			T902	1		T600	1		T502	16
values[41]	125	1			T902	2		T600	4		T502	24
values[42]	91	1			T902	1		T600	2		T502	31
values[43]	73	1			T902	2		T600	2		T502	8
values[44]	97	1			T902	5		T600	3		T502	17
values[45]	95	1			T902	2		T600	2		T502	13
values[46]	79	1			T902	1		T600	3		T502	8
values[47]	75	1			T902	1		T600	5		T502	16
values[48]	83	1			T902	1		T600	1		T502	12
values[49]	59	1			T902	3		T600	2		T502	1
values[50]	45	1			T902	2		T600	2		T921	1
values[51]	42	1			T902	1		T600	1		T921	1
values[52]	44	1			T902	1		T600	4		T921	1
values[53]	45	1			T902	1		T600	1		T921	1
values[54]	53	1			T902	3		T600	3		T921	1
values[55]	53	1			T902	2		T600	2		T921	1
values[56]	47	1			T902	5		T600	1		T921	1
values[57]	49	1			T902	6		T600	5		T921	1
values[58]	42	1			T902	4		T600	1		T921	1
values[59]	34	1			T902	2		T600	1		T921	1
values[60]	44	1			T902	1		T600	1		T921	1
values[61]	42	1			T902	2		T600	2		T921	1
values[62]	48	1			T902	2		T600	1		T921	1
values[63]	45	1			T902	2		T600	4		T921	1
values[64]	46	1			T902	1		T600	4		T921	1
values[65]	44	1			T902	1		T600	4		T921	1
values[66]	58	1			T902	6		T600	5		T921	1
values[67]	49	1			T902	4		T600	1		T921	1
values[68]	59	1			T902	2		T600	2		T921	1
values[69]	46	1			T902	4		T600	3		T921	1
values[70]	51	1			T902	3		T600	3		T921	1
values[71]	55	1			T902	4		T600	3		T921	1
values[72]	52	1			T902	4		T600	4		T921	1
values[73]	35	1			T902	3		T600	1		T921	1
values[74]	45	1			T902	2		T600	1		T921	1
values[75]	55	1			T902	3		T600	5		T921	1
values[76]	56	1			T902	3		T600	7		T921	1
values[77]	39	1			T902	1		T600	1		T921	1
values[78]	37	1			T902	1		T600	1		T921	1
values[79]	54	1			T902	4		T600	3		T921	1
values[80]	52	1			T902	3		T600	4		T921	1
values[81]	45	1			T902	3		T600	4		T921	1
values[82]	45	1			T902	6		T600	1		T921	1
values[83]	38	1			T902	1		T600	1		T921	1
values[84]	53	1			T902	8		T600	4		T921	1
values[85]	48	1			T902	3		T600	2		T921	1
values[86]	57	1			T902	7		T600	7		T921	1
values[87]	47	1			T902	3		T600	10		T921	1
values[88]	64	1			T902	5		T600	5		T921	1
values[89]	55	1			T902	4		T600	9		T921	1
values[90]	53	1			T902	3		T600	11		T921	1
values[91]	53	1			T902	5		T600	4		T921	1
values[92]	57	1			T902	4		T600	3		T921	1
values[93]	56	1			T902	2		T600	1		T921	1
values[94]	49	1			T902	4		T600	2		T921	1
values[95]	50	1			T902	3		T600	1		T921	1
values[96]	59	1			T902	2		T600	1		T921	1
values[97]	68	1			T902	7		T600	5		T921	1
values[98]	58	1			T902	4		T600	1		T921	1
values[99]	51	1			T902	3		T600	1		T921	1
values[100]	67	1			T902	3		T600	2		T921	1
values[101]	63	1			T902	8		T600	5		T921	1
values[102]	60	1			T902	10		T600	4		T921	1
values[103]	76	1			T902	11		T600	2		T921	1
values[104]	65	1			T902	6		T600	1		T921	2
values[105]	72	1			T902	1		T600	2		T921	5
values[106]	62	1			T902	2		T600	2		T921	2
values[107]	81	1			T902	9		T600	2		T921	1
values[108]	78	1			T902	1		T600	2		T921	2
values[109]	56	1			T902	2		T600	2		T921	2
values[110]	68	1			T902	4		T600	8		T921	2
values[111]	81	1			T902	7		T600	14		T921	2
values[112]	64	1			T902	4		T600	8		T921	2
values[113]	81	1			T902	7		T600	5		T921	3
values[114]	81	1			T902	9		T600	3		T921	5
values[115]	73	1			T902	1		T600	6		T921	2
values[116]	74	1			T902	2		T600	10		T921	1
values[117]	66	1			T902	3		T600	6		T921	1
values[118]	75	1			T902	7		T600	6		T921	2
values[119]	88	1			T902	1		T600	6		T921	3
values[120]	94	1			T902	3		T600	13		T921	1
values[121]	108	1			T902	2		T600	22		T921	1
values[122]	95	1			T902	3		T600	11		T921	2
values[123]	124	1			T902	4		T600	12		T921	1
values[124]	246	1			T902	21		T600	24		T921	2
values[125]	386	1			T902	33		T600	34		T921	1
values[126]	752	1			T902	50		T600	23		T921	8
values[127]	2254	1			T902	36		T600	22		T921	113
values[128]	3997	1			T902	3		T600	3		T921	195