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Group Instance : tl_agent_pkg.uvm_test_top.env.uart0_agent.cov::m_tl_d_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.uart0_agent.cov::m_tl_d_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 1 0 1 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.uart0_agent.cov::m_tl_d_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_error 2 0 2 100.00 100 1 1 2
cp_opcode 1 0 1 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.uart0_agent.cov::m_tl_d_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_d_chan_cov_cg_cc 1 0 1 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_tl_d_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_tl_d_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 1 0 1 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_tl_d_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_error 2 0 2 100.00 100 1 1 2
cp_opcode 1 0 1 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_tl_d_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_d_chan_cov_cg_cc 1 0 1 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.uart2_agent.cov::m_tl_d_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.uart2_agent.cov::m_tl_d_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 1 0 1 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.uart2_agent.cov::m_tl_d_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_error 2 0 2 100.00 100 1 1 2
cp_opcode 1 0 1 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.uart2_agent.cov::m_tl_d_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_d_chan_cov_cg_cc 1 0 1 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.uart3_agent.cov::m_tl_d_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.uart3_agent.cov::m_tl_d_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 1 0 1 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.uart3_agent.cov::m_tl_d_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_error 2 0 2 100.00 100 1 1 2
cp_opcode 1 0 1 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.uart3_agent.cov::m_tl_d_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_d_chan_cov_cg_cc 1 0 1 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_tl_d_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_tl_d_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 1 0 1 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_tl_d_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_error 2 0 2 100.00 100 1 1 2
cp_opcode 1 0 1 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_tl_d_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_d_chan_cov_cg_cc 1 0 1 100.00 100 1 1 0

Go back
Group Instances:
tl_agent_pkg.uvm_test_top.env.uart0_agent.cov::m_tl_d_chan_cov_cg
tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_tl_d_chan_cov_cg
tl_agent_pkg.uvm_test_top.env.uart2_agent.cov::m_tl_d_chan_cov_cg
tl_agent_pkg.uvm_test_top.env.uart3_agent.cov::m_tl_d_chan_cov_cg
tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_tl_d_chan_cov_cg

Summary for Variable cp_error

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_error

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 115574 1 T75 11 T76 14 T79 31
auto[1] 64447 1 T75 10 T76 4 T79 37



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] 45968 1 T75 8 T76 6 T79 11



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 126232 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 53789 1 T75 8 T76 7 T79 21



Summary for Cross tl_d_chan_cov_cg_cc

Samples crossed: cp_opcode cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for tl_d_chan_cov_cg_cc

Bins
cp_opcodecp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] biggest_size 14372 1 T75 2 T76 2 T79 1


Summary for Variable cp_error

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_error

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 120335 1 T75 10 T76 7 T79 43
auto[1] 61925 1 T75 13 T76 7 T79 10



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] 46677 1 T75 7 T76 5 T79 7



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 127982 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 54278 1 T75 13 T76 4 T79 10



Summary for Cross tl_d_chan_cov_cg_cc

Samples crossed: cp_opcode cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for tl_d_chan_cov_cg_cc

Bins
cp_opcodecp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] biggest_size 14627 1 T75 2 T76 3 T79 1


Summary for Variable cp_error

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_error

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 121763 1 T74 372 T75 9 T76 15
auto[1] 62004 1 T74 97 T75 6 T76 2



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] 46390 1 T74 143 T75 6 T76 3



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 129469 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 54298 1 T74 145 T75 3 T76 7



Summary for Cross tl_d_chan_cov_cg_cc

Samples crossed: cp_opcode cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for tl_d_chan_cov_cg_cc

Bins
cp_opcodecp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] biggest_size 14410 1 T74 52 T75 1 T76 1


Summary for Variable cp_error

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_error

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 121362 1 T75 4 T76 6 T79 66
auto[1] 66725 1 T75 17 T76 7 T79 6



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] 46771 1 T75 11 T76 4 T79 10



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 132221 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 55866 1 T75 6 T76 5 T79 21



Summary for Cross tl_d_chan_cov_cg_cc

Samples crossed: cp_opcode cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for tl_d_chan_cov_cg_cc

Bins
cp_opcodecp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] biggest_size 14552 1 T75 2 T76 2 T79 2


Summary for Variable cp_error

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_error

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 115118 1 T75 5 T76 17 T79 42
auto[1] 64517 1 T75 6 T76 5 T79 18



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] 46441 1 T75 3 T76 8 T79 8



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 125237 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 54398 1 T75 1 T76 9 T79 14



Summary for Cross tl_d_chan_cov_cg_cc

Samples crossed: cp_opcode cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for tl_d_chan_cov_cg_cc

Bins
cp_opcodecp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] biggest_size 14673 1 T76 5 T79 2 T80 1

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