SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.82 | 84.82 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.01 | 85.01 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.01 | 85.01 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.01 | 85.01 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 141 | 85.98 |
Total Bits | 11012 | 9340 | 84.82 |
Total Bits 0->1 | 5506 | 4687 | 85.13 |
Total Bits 1->0 | 5506 | 4653 | 84.51 |
Ports | 164 | 141 | 85.98 |
Port Bits | 11012 | 9340 | 84.82 |
Port Bits 0->1 | 5506 | 4687 | 85.13 |
Port Bits 1->0 | 5506 | 4653 | 84.51 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | INPUT |
edn_i.edn_fips | No | No | Yes | T96,T118,T155 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T8,*T82,*T83 | Yes | T8,T82,T83 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T8,T53,T84 | Yes | T8,T53,T84 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T79,T81,T131 | Yes | T79,T81,T131 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T53,*T156,*T157 | Yes | T53,T156,T157 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T33,*T158,*T52 | Yes | T33,T158,T52 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T53,*T79,*T80 | Yes | T53,T79,T80 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T8,*T82,*T83 | Yes | T8,T82,T83 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T8,T53,T84 | Yes | T8,T53,T84 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T79,T80,T81 | Yes | T79,T81,T131 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T53,T79,T131 | Yes | T53,T79,T80 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T81,T131 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT |
intr_otp_error_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T85,T88,T53 | Yes | T85,T88,T53 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T34,T70,T71 | Yes | T34,T70,T71 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T162 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T85,T88,T162 | Yes | T85,T88,T89 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T85,T163,T164 | Yes | T85,T163,T164 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T85,T165,T166 | Yes | T85,T165,T166 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T85,T88,T53 | Yes | T85,T88,T53 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T85,T88,T53 | Yes | T85,T88,T53 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T34,T70,T71 | Yes | T34,T70,T71 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T85,T163,T164 | Yes | T85,T163,T164 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T85,T165,T166 | Yes | T85,T165,T166 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T85,T88,T53 | Yes | T85,T88,T53 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T126,T127,T85 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[26:0] | No | No | Yes | T167,T168,T169 | INPUT | |
lc_otp_vendor_test_i.ctrl[27] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:28] | No | No | Yes | T167,T169,T168 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[2:0] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[3] | No | No | No | INPUT | ||
lc_otp_program_i.count[6:4] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[8:7] | No | No | No | INPUT | ||
lc_otp_program_i.count[30:9] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[32:31] | No | No | No | INPUT | ||
lc_otp_program_i.count[35:33] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[36] | No | No | No | INPUT | ||
lc_otp_program_i.count[47:37] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | INPUT |
lc_otp_program_i.count[48] | No | No | No | INPUT | ||
lc_otp_program_i.count[64:49] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[66:65] | No | No | No | INPUT | ||
lc_otp_program_i.count[72:67] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | INPUT |
lc_otp_program_i.count[74:73] | No | No | No | INPUT | ||
lc_otp_program_i.count[88:75] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[90:89] | No | No | No | INPUT | ||
lc_otp_program_i.count[91] | Yes | Yes | *T158,*T52,*T49 | Yes | T158,T52,T68 | INPUT |
lc_otp_program_i.count[92] | No | No | No | INPUT | ||
lc_otp_program_i.count[100:93] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.count[101] | No | No | No | INPUT | ||
lc_otp_program_i.count[106:102] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[107] | No | No | No | INPUT | ||
lc_otp_program_i.count[109:108] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[110] | No | No | No | INPUT | ||
lc_otp_program_i.count[115:111] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.count[116] | No | No | No | INPUT | ||
lc_otp_program_i.count[119:117] | Yes | Yes | *T158,*T52,*T49 | Yes | T158,T52,T68 | INPUT |
lc_otp_program_i.count[120] | No | No | No | INPUT | ||
lc_otp_program_i.count[135:121] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[136] | No | No | No | INPUT | ||
lc_otp_program_i.count[139:137] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[140] | No | No | No | INPUT | ||
lc_otp_program_i.count[141] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[142] | No | No | No | INPUT | ||
lc_otp_program_i.count[146:143] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.count[147] | No | No | No | INPUT | ||
lc_otp_program_i.count[187:148] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | INPUT |
lc_otp_program_i.count[188] | No | No | No | INPUT | ||
lc_otp_program_i.count[199:189] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.count[200] | No | No | No | INPUT | ||
lc_otp_program_i.count[206:201] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | INPUT |
lc_otp_program_i.count[207] | No | No | No | INPUT | ||
lc_otp_program_i.count[210:208] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | INPUT |
lc_otp_program_i.count[212:211] | No | No | No | INPUT | ||
lc_otp_program_i.count[214:213] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[215] | No | No | No | INPUT | ||
lc_otp_program_i.count[218:216] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[219] | No | No | No | INPUT | ||
lc_otp_program_i.count[227:220] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.count[228] | No | No | No | INPUT | ||
lc_otp_program_i.count[230:229] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | INPUT |
lc_otp_program_i.count[231] | No | No | No | INPUT | ||
lc_otp_program_i.count[240:232] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[241] | No | No | No | INPUT | ||
lc_otp_program_i.count[253:242] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.count[254] | No | No | No | INPUT | ||
lc_otp_program_i.count[276:255] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[277] | No | No | No | INPUT | ||
lc_otp_program_i.count[278] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[279] | No | No | No | INPUT | ||
lc_otp_program_i.count[281:280] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[282] | No | No | No | INPUT | ||
lc_otp_program_i.count[305:283] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[306] | No | No | No | INPUT | ||
lc_otp_program_i.count[310:307] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.count[312:311] | No | No | No | INPUT | ||
lc_otp_program_i.count[327:313] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[328] | No | No | No | INPUT | ||
lc_otp_program_i.count[330:329] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.count[331] | No | No | No | INPUT | ||
lc_otp_program_i.count[347:332] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[348] | No | No | No | INPUT | ||
lc_otp_program_i.count[358:349] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | INPUT |
lc_otp_program_i.count[359] | No | No | No | INPUT | ||
lc_otp_program_i.count[361:360] | Yes | Yes | T171,T172,T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.count[363:362] | No | No | No | INPUT | ||
lc_otp_program_i.count[364] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | INPUT |
lc_otp_program_i.count[365] | No | No | No | INPUT | ||
lc_otp_program_i.count[370:366] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.count[372:371] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:373] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[0] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[1] | No | No | No | INPUT | ||
lc_otp_program_i.state[6:2] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.state[7] | No | No | No | INPUT | ||
lc_otp_program_i.state[16:8] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[17] | No | No | No | INPUT | ||
lc_otp_program_i.state[19:18] | Yes | Yes | T52,T123,T69 | Yes | T52,T68,T170 | INPUT |
lc_otp_program_i.state[20] | No | No | No | INPUT | ||
lc_otp_program_i.state[21] | Yes | Yes | *T52,*T123,*T69 | Yes | T52,T68,T170 | INPUT |
lc_otp_program_i.state[22] | No | No | No | INPUT | ||
lc_otp_program_i.state[32:23] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[33] | No | No | No | INPUT | ||
lc_otp_program_i.state[38:34] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[39] | No | No | No | INPUT | ||
lc_otp_program_i.state[49:40] | Yes | Yes | *T52,*T123,*T69 | Yes | T52,T68,T170 | INPUT |
lc_otp_program_i.state[50] | No | No | No | INPUT | ||
lc_otp_program_i.state[52:51] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[53] | No | No | No | INPUT | ||
lc_otp_program_i.state[56:54] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[57] | No | No | No | INPUT | ||
lc_otp_program_i.state[61:58] | Yes | Yes | T52,*T123,T69 | Yes | T52,T68,T170 | INPUT |
lc_otp_program_i.state[64:62] | No | No | No | INPUT | ||
lc_otp_program_i.state[69:65] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[70] | No | No | No | INPUT | ||
lc_otp_program_i.state[82:71] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.state[83] | No | No | No | INPUT | ||
lc_otp_program_i.state[88:84] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[89] | No | No | No | INPUT | ||
lc_otp_program_i.state[93:90] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[94] | No | No | No | INPUT | ||
lc_otp_program_i.state[95] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[96] | No | No | No | INPUT | ||
lc_otp_program_i.state[101:97] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[102] | No | No | No | INPUT | ||
lc_otp_program_i.state[103] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[104] | No | No | No | INPUT | ||
lc_otp_program_i.state[110:105] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[111] | No | No | No | INPUT | ||
lc_otp_program_i.state[113:112] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[114] | No | No | No | INPUT | ||
lc_otp_program_i.state[122:115] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[123] | No | No | No | INPUT | ||
lc_otp_program_i.state[124] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[125] | No | No | No | INPUT | ||
lc_otp_program_i.state[129:126] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[130] | No | No | No | INPUT | ||
lc_otp_program_i.state[132:131] | Yes | Yes | T7,T52,T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[133] | No | No | No | INPUT | ||
lc_otp_program_i.state[144:134] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[145] | No | No | No | INPUT | ||
lc_otp_program_i.state[152:146] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[153] | No | No | No | INPUT | ||
lc_otp_program_i.state[157:154] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[158] | No | No | No | INPUT | ||
lc_otp_program_i.state[171:159] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[172] | No | No | No | INPUT | ||
lc_otp_program_i.state[183:173] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[184] | No | No | No | INPUT | ||
lc_otp_program_i.state[186:185] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[187] | No | No | No | INPUT | ||
lc_otp_program_i.state[188] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[189] | No | No | No | INPUT | ||
lc_otp_program_i.state[192:190] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.state[193] | No | No | No | INPUT | ||
lc_otp_program_i.state[200:194] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[201] | No | No | No | INPUT | ||
lc_otp_program_i.state[217:202] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[218] | No | No | No | INPUT | ||
lc_otp_program_i.state[220:219] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[221] | No | No | No | INPUT | ||
lc_otp_program_i.state[232:222] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT |
lc_otp_program_i.state[233] | No | No | No | INPUT | ||
lc_otp_program_i.state[247:234] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.state[248] | No | No | No | INPUT | ||
lc_otp_program_i.state[251:249] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[252] | No | No | No | INPUT | ||
lc_otp_program_i.state[259:253] | Yes | Yes | *T7,*T158,*T174 | Yes | T7,T158,T174 | INPUT |
lc_otp_program_i.state[260] | No | No | No | INPUT | ||
lc_otp_program_i.state[268:261] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[269] | No | No | No | INPUT | ||
lc_otp_program_i.state[271:270] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.state[273:272] | No | No | No | INPUT | ||
lc_otp_program_i.state[298:274] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[299] | No | No | No | INPUT | ||
lc_otp_program_i.state[310:300] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.state[311] | No | No | No | INPUT | ||
lc_otp_program_i.state[313:312] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT |
lc_otp_program_i.state[314] | No | No | No | INPUT | ||
lc_otp_program_i.state[318:315] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT |
lc_otp_program_i.state[319] | No | No | No | INPUT | ||
lc_otp_program_i.req | Yes | Yes | T7,T52,T69 | Yes | T7,T52,T69 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T7,T52,T69 | Yes | T7,T52,T69 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T175,T176,T177 | Yes | T175,T176,T177 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T8,T33,T34 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T34,T70,T71 | Yes | T34,T70,T71 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T7,T52,T68 | Yes | T7,T52,T69 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T7,T126,T174 | Yes | T3,T4,T5 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T174,T178,T179 | Yes | T158,T174,T68 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T8,T33,T71 | Yes | T3,T4,T6 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T8,T33,T70 | Yes | T1,T2,T4 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T174,T178,T179 | Yes | T158,T174,T68 | OUTPUT |
otp_lc_data_o.count[2:0] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[3] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[6:4] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[8:7] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[30:9] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[32:31] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[35:33] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[36] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[47:37] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[48] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[64:49] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[66:65] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[72:67] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[74:73] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[88:75] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[90:89] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[91] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[100:93] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[101] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[106:102] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[107] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[109:108] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[110] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[115:111] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[116] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[119:117] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[120] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[135:121] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[136] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[139:137] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[140] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[141] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[146:143] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[147] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[187:148] | Yes | Yes | *T7,*T52,*T180 | Yes | T7,T52,T181 | OUTPUT |
otp_lc_data_o.count[188] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[199:189] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[200] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[206:201] | Yes | Yes | *T52,*T180,*T182 | Yes | T52,T180,T182 | OUTPUT |
otp_lc_data_o.count[207] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[210:208] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[212:211] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[214:213] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[215] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[218:216] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[219] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[227:220] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[228] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[230:229] | Yes | Yes | T182,T183,T184 | Yes | T52,T180,T182 | OUTPUT |
otp_lc_data_o.count[231] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[240:232] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[241] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[253:242] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[254] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[276:255] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[278] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[279] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[281:280] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[282] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[305:283] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[306] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[310:307] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[312:311] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[327:313] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[328] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[330:329] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[331] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[347:332] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[348] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[358:349] | Yes | Yes | *T182,*T183,*T184 | Yes | T182,T183,T184 | OUTPUT |
otp_lc_data_o.count[359] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[361:360] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[363:362] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[364] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.count[365] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[370:366] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.count[372:371] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:373] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[0] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[1] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[6:2] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.state[7] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[16:8] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[19:18] | Yes | Yes | T52,T123,T69 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[20] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[21] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[32:23] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[33] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[38:34] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[39] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[49:40] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[50] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[52:51] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[53] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[56:54] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[57] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[61:58] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[64:62] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[69:65] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[70] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[82:71] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[88:84] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[89] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[93:90] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | OUTPUT |
otp_lc_data_o.state[94] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[95] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[96] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[101:97] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[102] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[103] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | OUTPUT |
otp_lc_data_o.state[104] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[110:105] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[111] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[113:112] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[114] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[122:115] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | OUTPUT |
otp_lc_data_o.state[123] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[124] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[125] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[129:126] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[130] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[132:131] | Yes | Yes | T7,T52,T123 | Yes | T7,T52,T68 | OUTPUT |
otp_lc_data_o.state[133] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[144:134] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[145] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[152:146] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[157:154] | Yes | Yes | T7,*T52,*T123 | Yes | T7,T52,T68 | OUTPUT |
otp_lc_data_o.state[158] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[171:159] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | OUTPUT |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[183:173] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[184] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[186:185] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[187] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[188] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[192:190] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.state[193] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[200:194] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[201] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[217:202] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[218] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[220:219] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[221] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[232:222] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[233] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[247:234] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.state[248] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[251:249] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[252] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[259:253] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[268:261] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[269] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[271:270] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.state[273:272] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[298:274] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_lc_data_o.state[299] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[310:300] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.state[311] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[313:312] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_lc_data_o.state[314] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[318:315] | Yes | Yes | *T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[319] | No | No | No | OUTPUT | ||
otp_lc_data_o.error | Yes | Yes | T34,T70,T71 | Yes | T34,T70,T71 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T174,T178,T179 | Yes | T158,T174,T68 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T33,T34,T70 | Yes | T1,T3,T33 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T174,T178,T179 | Yes | T158,T174,T68 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T3,T4 | Yes | T33,T34,T70 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T49,T121,T50 | Yes | T49,T121,T50 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T121,T185,T122 | Yes | T121,T185,T122 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T4,T186,T187 | Yes | T4,T186,T187 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T49,T121,T50 | Yes | T49,T121,T50 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T121,T185,T122 | Yes | T121,T185,T122 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T4,T186,T187 | Yes | T4,T186,T187 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T49,T96,T50 | Yes | T49,T96,T50 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T49,T96,T50 | Yes | T49,T96,T50 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T9,T158,T174 | Yes | T1,T2,T5 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[1] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[11:2] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[12] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[13] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[14] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[38:15] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[39] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[54:40] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[55] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[58:56] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[59] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[62:60] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[63] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[94:64] | Yes | Yes | *T130,*T188,*T189 | Yes | T130,T188,T189 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[95] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[143:96] | Yes | Yes | *T190,*T191,*T1 | Yes | T190,T191,T7 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[145:144] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[197:146] | Yes | Yes | *T130,*T188,*T189 | Yes | T130,T188,T189 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[198] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[249:199] | Yes | Yes | *T190,*T1,*T2 | Yes | T190,T7,T8 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[250] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:251] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T7,T8,T70 | Yes | T2,T7,T8 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[39:0] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[40] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[59:41] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[60] | No | No | Yes | T192,T193,T194 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:61] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T10,T11,T12 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 141 | 88.12 |
Total Bits | 10986 | 9339 | 85.01 |
Total Bits 0->1 | 5493 | 4686 | 85.31 |
Total Bits 1->0 | 5493 | 4653 | 84.71 |
Ports | 160 | 141 | 88.12 |
Port Bits | 10986 | 9339 | 85.01 |
Port Bits 0->1 | 5493 | 4686 | 85.31 |
Port Bits 1->0 | 5493 | 4653 | 84.71 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | INPUT | |
edn_i.edn_fips | No | No | Yes | T96,T118,T155 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T8,*T82,*T83 | Yes | T8,T82,T83 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T8,T53,T84 | Yes | T8,T53,T84 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T79,T81,T131 | Yes | T79,T81,T131 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T53,*T156,*T157 | Yes | T53,T156,T157 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T33,*T158,*T52 | Yes | T33,T158,T52 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T53,*T79,*T80 | Yes | T53,T79,T80 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T8,*T82,*T83 | Yes | T8,T82,T83 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T8,T53,T84 | Yes | T8,T53,T84 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T79,T80,T81 | Yes | T79,T81,T131 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T53,T79,T131 | Yes | T53,T79,T80 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T81,T131 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T85,T88,T53 | Yes | T85,T88,T53 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T34,T70,T71 | Yes | T34,T70,T71 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T162 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T85,T88,T162 | Yes | T85,T88,T89 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T85,T163,T164 | Yes | T85,T163,T164 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T85,T165,T166 | Yes | T85,T165,T166 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T85,T88,T53 | Yes | T85,T88,T53 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T85,T88,T89 | Yes | T85,T88,T89 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T85,T88,T53 | Yes | T85,T88,T53 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T34,T70,T71 | Yes | T34,T70,T71 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T85,T163,T164 | Yes | T85,T163,T164 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T85,T165,T166 | Yes | T85,T165,T166 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T85,T88,T53 | Yes | T85,T88,T53 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T126,T127,T85 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[26:0] | No | No | Yes | T167,T168,T169 | INPUT | ||
lc_otp_vendor_test_i.ctrl[27] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:28] | No | No | Yes | T167,T169,T168 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[2:0] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[3] | No | No | No | INPUT | |||
lc_otp_program_i.count[6:4] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[8:7] | No | No | No | INPUT | |||
lc_otp_program_i.count[30:9] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[32:31] | No | No | No | INPUT | |||
lc_otp_program_i.count[35:33] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[36] | No | No | No | INPUT | |||
lc_otp_program_i.count[47:37] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | INPUT | |
lc_otp_program_i.count[48] | No | No | No | INPUT | |||
lc_otp_program_i.count[64:49] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[66:65] | No | No | No | INPUT | |||
lc_otp_program_i.count[72:67] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | INPUT | |
lc_otp_program_i.count[74:73] | No | No | No | INPUT | |||
lc_otp_program_i.count[88:75] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[90:89] | No | No | No | INPUT | |||
lc_otp_program_i.count[91] | Yes | Yes | *T158,*T52,*T49 | Yes | T158,T52,T68 | INPUT | |
lc_otp_program_i.count[92] | No | No | No | INPUT | |||
lc_otp_program_i.count[100:93] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.count[101] | No | No | No | INPUT | |||
lc_otp_program_i.count[106:102] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[107] | No | No | No | INPUT | |||
lc_otp_program_i.count[109:108] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[110] | No | No | No | INPUT | |||
lc_otp_program_i.count[115:111] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.count[116] | No | No | No | INPUT | |||
lc_otp_program_i.count[119:117] | Yes | Yes | *T158,*T52,*T49 | Yes | T158,T52,T68 | INPUT | |
lc_otp_program_i.count[120] | No | No | No | INPUT | |||
lc_otp_program_i.count[135:121] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[136] | No | No | No | INPUT | |||
lc_otp_program_i.count[139:137] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[140] | No | No | No | INPUT | |||
lc_otp_program_i.count[141] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[142] | No | No | No | INPUT | |||
lc_otp_program_i.count[146:143] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.count[147] | No | No | No | INPUT | |||
lc_otp_program_i.count[187:148] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | INPUT | |
lc_otp_program_i.count[188] | No | No | No | INPUT | |||
lc_otp_program_i.count[199:189] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.count[200] | No | No | No | INPUT | |||
lc_otp_program_i.count[206:201] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | INPUT | |
lc_otp_program_i.count[207] | No | No | No | INPUT | |||
lc_otp_program_i.count[210:208] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | INPUT | |
lc_otp_program_i.count[212:211] | No | No | No | INPUT | |||
lc_otp_program_i.count[214:213] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[215] | No | No | No | INPUT | |||
lc_otp_program_i.count[218:216] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[219] | No | No | No | INPUT | |||
lc_otp_program_i.count[227:220] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.count[228] | No | No | No | INPUT | |||
lc_otp_program_i.count[230:229] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | INPUT | |
lc_otp_program_i.count[231] | No | No | No | INPUT | |||
lc_otp_program_i.count[240:232] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[241] | No | No | No | INPUT | |||
lc_otp_program_i.count[253:242] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.count[254] | No | No | No | INPUT | |||
lc_otp_program_i.count[276:255] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[277] | No | No | No | INPUT | |||
lc_otp_program_i.count[278] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[279] | No | No | No | INPUT | |||
lc_otp_program_i.count[281:280] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[282] | No | No | No | INPUT | |||
lc_otp_program_i.count[305:283] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[306] | No | No | No | INPUT | |||
lc_otp_program_i.count[310:307] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.count[312:311] | No | No | No | INPUT | |||
lc_otp_program_i.count[327:313] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[328] | No | No | No | INPUT | |||
lc_otp_program_i.count[330:329] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.count[331] | No | No | No | INPUT | |||
lc_otp_program_i.count[347:332] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[348] | No | No | No | INPUT | |||
lc_otp_program_i.count[358:349] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | INPUT | |
lc_otp_program_i.count[359] | No | No | No | INPUT | |||
lc_otp_program_i.count[361:360] | Yes | Yes | T171,T172,T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.count[363:362] | No | No | No | INPUT | |||
lc_otp_program_i.count[364] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | INPUT | |
lc_otp_program_i.count[365] | No | No | No | INPUT | |||
lc_otp_program_i.count[370:366] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.count[372:371] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:373] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[0] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[1] | No | No | No | INPUT | |||
lc_otp_program_i.state[6:2] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.state[7] | No | No | No | INPUT | |||
lc_otp_program_i.state[16:8] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[17] | No | No | No | INPUT | |||
lc_otp_program_i.state[19:18] | Yes | Yes | T52,T123,T69 | Yes | T52,T68,T170 | INPUT | |
lc_otp_program_i.state[20] | No | No | No | INPUT | |||
lc_otp_program_i.state[21] | Yes | Yes | *T52,*T123,*T69 | Yes | T52,T68,T170 | INPUT | |
lc_otp_program_i.state[22] | No | No | No | INPUT | |||
lc_otp_program_i.state[32:23] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[33] | No | No | No | INPUT | |||
lc_otp_program_i.state[38:34] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[39] | No | No | No | INPUT | |||
lc_otp_program_i.state[49:40] | Yes | Yes | *T52,*T123,*T69 | Yes | T52,T68,T170 | INPUT | |
lc_otp_program_i.state[50] | No | No | No | INPUT | |||
lc_otp_program_i.state[52:51] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[53] | No | No | No | INPUT | |||
lc_otp_program_i.state[56:54] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[57] | No | No | No | INPUT | |||
lc_otp_program_i.state[61:58] | Yes | Yes | T52,*T123,T69 | Yes | T52,T68,T170 | INPUT | |
lc_otp_program_i.state[64:62] | No | No | No | INPUT | |||
lc_otp_program_i.state[69:65] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[70] | No | No | No | INPUT | |||
lc_otp_program_i.state[82:71] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.state[83] | No | No | No | INPUT | |||
lc_otp_program_i.state[88:84] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[89] | No | No | No | INPUT | |||
lc_otp_program_i.state[93:90] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[94] | No | No | No | INPUT | |||
lc_otp_program_i.state[95] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[96] | No | No | No | INPUT | |||
lc_otp_program_i.state[101:97] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[102] | No | No | No | INPUT | |||
lc_otp_program_i.state[103] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[104] | No | No | No | INPUT | |||
lc_otp_program_i.state[110:105] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[111] | No | No | No | INPUT | |||
lc_otp_program_i.state[113:112] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[114] | No | No | No | INPUT | |||
lc_otp_program_i.state[122:115] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[123] | No | No | No | INPUT | |||
lc_otp_program_i.state[124] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[125] | No | No | No | INPUT | |||
lc_otp_program_i.state[129:126] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[130] | No | No | No | INPUT | |||
lc_otp_program_i.state[132:131] | Yes | Yes | T7,T52,T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[133] | No | No | No | INPUT | |||
lc_otp_program_i.state[144:134] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[145] | No | No | No | INPUT | |||
lc_otp_program_i.state[152:146] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[153] | No | No | No | INPUT | |||
lc_otp_program_i.state[157:154] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[158] | No | No | No | INPUT | |||
lc_otp_program_i.state[171:159] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[172] | No | No | No | INPUT | |||
lc_otp_program_i.state[183:173] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[184] | No | No | No | INPUT | |||
lc_otp_program_i.state[186:185] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[187] | No | No | No | INPUT | |||
lc_otp_program_i.state[188] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[189] | No | No | No | INPUT | |||
lc_otp_program_i.state[192:190] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.state[193] | No | No | No | INPUT | |||
lc_otp_program_i.state[200:194] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[201] | No | No | No | INPUT | |||
lc_otp_program_i.state[217:202] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[218] | No | No | No | INPUT | |||
lc_otp_program_i.state[220:219] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[221] | No | No | No | INPUT | |||
lc_otp_program_i.state[232:222] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | INPUT | |
lc_otp_program_i.state[233] | No | No | No | INPUT | |||
lc_otp_program_i.state[247:234] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.state[248] | No | No | No | INPUT | |||
lc_otp_program_i.state[251:249] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[252] | No | No | No | INPUT | |||
lc_otp_program_i.state[259:253] | Yes | Yes | *T7,*T158,*T174 | Yes | T7,T158,T174 | INPUT | |
lc_otp_program_i.state[260] | No | No | No | INPUT | |||
lc_otp_program_i.state[268:261] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[269] | No | No | No | INPUT | |||
lc_otp_program_i.state[271:270] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.state[273:272] | No | No | No | INPUT | |||
lc_otp_program_i.state[298:274] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[299] | No | No | No | INPUT | |||
lc_otp_program_i.state[310:300] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.state[311] | No | No | No | INPUT | |||
lc_otp_program_i.state[313:312] | Yes | Yes | *T171,*T172,*T173 | Yes | T171,T172,T173 | INPUT | |
lc_otp_program_i.state[314] | No | No | No | INPUT | |||
lc_otp_program_i.state[318:315] | Yes | Yes | T52,T69,T68 | Yes | T52,T69,T68 | INPUT | |
lc_otp_program_i.state[319] | No | No | No | INPUT | |||
lc_otp_program_i.req | Yes | Yes | T7,T52,T69 | Yes | T7,T52,T69 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T7,T52,T69 | Yes | T7,T52,T69 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T175,T176,T177 | Yes | T175,T176,T177 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T8,T33,T34 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T34,T70,T71 | Yes | T34,T70,T71 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T7,T52,T68 | Yes | T7,T52,T69 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T7,T126,T174 | Yes | T3,T4,T5 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T174,T178,T179 | Yes | T158,T174,T68 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T8,T33,T71 | Yes | T3,T4,T6 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T8,T33,T70 | Yes | T1,T2,T4 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T174,T178,T179 | Yes | T158,T174,T68 | OUTPUT | |
otp_lc_data_o.count[2:0] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[3] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[6:4] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[8:7] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[30:9] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[32:31] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[35:33] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[36] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[47:37] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[48] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[64:49] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[66:65] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[72:67] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[74:73] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[88:75] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[90:89] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[91] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[100:93] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[101] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[106:102] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[107] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[109:108] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[110] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[115:111] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[116] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[119:117] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[120] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[135:121] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[136] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[139:137] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[140] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[141] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[146:143] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[147] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[187:148] | Yes | Yes | *T7,*T52,*T180 | Yes | T7,T52,T181 | OUTPUT | |
otp_lc_data_o.count[188] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[199:189] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[200] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[206:201] | Yes | Yes | *T52,*T180,*T182 | Yes | T52,T180,T182 | OUTPUT | |
otp_lc_data_o.count[207] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[210:208] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[212:211] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[214:213] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[215] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[218:216] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[219] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[227:220] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[228] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[230:229] | Yes | Yes | T182,T183,T184 | Yes | T52,T180,T182 | OUTPUT | |
otp_lc_data_o.count[231] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[240:232] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[241] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[253:242] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[254] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[276:255] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[278] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[279] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[281:280] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[282] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[305:283] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[306] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[310:307] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[312:311] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[327:313] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[328] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[330:329] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[331] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[347:332] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[348] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[358:349] | Yes | Yes | *T182,*T183,*T184 | Yes | T182,T183,T184 | OUTPUT | |
otp_lc_data_o.count[359] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[361:360] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[363:362] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[364] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.count[365] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[370:366] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.count[372:371] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:373] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[0] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[1] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[6:2] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.state[7] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[16:8] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[19:18] | Yes | Yes | T52,T123,T69 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[20] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[21] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[32:23] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[33] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[38:34] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[39] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[49:40] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[50] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[52:51] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[53] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[56:54] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[57] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[61:58] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[64:62] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[69:65] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[70] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[82:71] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[88:84] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[89] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[93:90] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | OUTPUT | |
otp_lc_data_o.state[94] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[95] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[96] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[101:97] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[102] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[103] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | OUTPUT | |
otp_lc_data_o.state[104] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[110:105] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[111] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[113:112] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[114] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[122:115] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | OUTPUT | |
otp_lc_data_o.state[123] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[124] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[125] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[129:126] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[130] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[132:131] | Yes | Yes | T7,T52,T123 | Yes | T7,T52,T68 | OUTPUT | |
otp_lc_data_o.state[133] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[144:134] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[145] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[152:146] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[157:154] | Yes | Yes | T7,*T52,*T123 | Yes | T7,T52,T68 | OUTPUT | |
otp_lc_data_o.state[158] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[171:159] | Yes | Yes | *T7,*T52,*T123 | Yes | T7,T52,T68 | OUTPUT | |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[183:173] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[184] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[186:185] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[187] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[188] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[192:190] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.state[193] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[200:194] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[201] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[217:202] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[218] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[220:219] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[221] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[232:222] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[233] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[247:234] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.state[248] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[251:249] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[252] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[259:253] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[268:261] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[269] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[271:270] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.state[273:272] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[298:274] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_lc_data_o.state[299] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[310:300] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.state[311] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[313:312] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_lc_data_o.state[314] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[318:315] | Yes | Yes | *T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[319] | No | No | No | OUTPUT | |||
otp_lc_data_o.error | Yes | Yes | T34,T70,T71 | Yes | T34,T70,T71 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T174,T178,T179 | Yes | T158,T174,T68 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T33,T34,T70 | Yes | T1,T3,T33 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T174,T178,T179 | Yes | T158,T174,T68 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T3,T4 | Yes | T33,T34,T70 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T49,T121,T50 | Yes | T49,T121,T50 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T121,T185,T122 | Yes | T121,T185,T122 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T4,T186,T187 | Yes | T4,T186,T187 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T49,T121,T50 | Yes | T49,T121,T50 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T121,T185,T122 | Yes | T121,T185,T122 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T4,T186,T187 | Yes | T4,T186,T187 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T49,T96,T50 | Yes | T49,T96,T50 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T7,T33,T34 | Yes | T1,T3,T4 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T4,T5 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T3,T4 | Yes | T3,T4,T6 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T49,T96,T50 | Yes | T49,T96,T50 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T9,T158,T174 | Yes | T1,T2,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[1] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[11:2] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[12] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[13] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[14] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[38:15] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[39] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[54:40] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[55] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[58:56] | Yes | Yes | *T1,*T2,*T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[59] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[62:60] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[63] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[94:64] | Yes | Yes | *T130,*T188,*T189 | Yes | T130,T188,T189 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[95] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[143:96] | Yes | Yes | *T190,*T191,*T1 | Yes | T190,T191,T7 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[145:144] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[197:146] | Yes | Yes | *T130,*T188,*T189 | Yes | T130,T188,T189 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[198] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[249:199] | Yes | Yes | *T190,*T1,*T2 | Yes | T190,T7,T8 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[250] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:251] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T7,T8,T70 | Yes | T2,T7,T8 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T7,T8,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[39:0] | Yes | Yes | *T52,*T69,*T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[40] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[59:41] | Yes | Yes | *T7,*T8,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[60] | No | No | Yes | T192,T193,T194 | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:61] | Yes | Yes | T52,T69,T68 | Yes | T52,T68,T170 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T7,T8,T33 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |