SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.44 | 84.44 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 84.63 | 84.63 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.63 | 84.63 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.63 | 84.63 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 141 | 85.98 |
Total Bits | 11012 | 9299 | 84.44 |
Total Bits 0->1 | 5506 | 4663 | 84.69 |
Total Bits 1->0 | 5506 | 4636 | 84.20 |
Ports | 164 | 141 | 85.98 |
Port Bits | 11012 | 9299 | 84.44 |
Port Bits 0->1 | 5506 | 4663 | 84.69 |
Port Bits 1->0 | 5506 | 4636 | 84.20 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T146,T147,T148 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T85,*T86,*T87 | Yes | T85,T86,T87 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T75,*T76,*T77 | Yes | T75,T76,T77 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T75,T88,T51 | Yes | T75,T88,T51 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T85,T87,T124 | Yes | T85,T87,T124 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T85,T87,T124 | Yes | T85,T87,T124 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T149,*T150,*T151 | Yes | T149,T150,T151 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T85,T87,T124 | Yes | T85,T87,T124 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T96,*T123,*T152 | Yes | T96,T123,T152 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T85,*T86,*T87 | Yes | T85,T86,T87 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T85,*T86,*T87 | Yes | T85,T86,T87 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T75,*T76,*T77 | Yes | T75,T76,T77 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T75,T88,T51 | Yes | T75,T88,T51 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT |
intr_otp_error_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T65,T89,T156 | Yes | T65,T89,T156 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T89,T156,T90 | Yes | T89,T156,T90 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T89,T156,T90 | Yes | T89,T156,T90 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T4,T70,T71 | Yes | T4,T70,T71 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T89,T90,T157 | Yes | T89,T90,T157 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T89,T90,T157 | Yes | T89,T90,T157 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T70,T152,T65 | Yes | T70,T152,T65 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T89,T156,T90 | Yes | T89,T156,T90 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T89,T156,T90 | Yes | T89,T156,T90 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T65,T89,T90 | Yes | T65,T89,T90 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T89,T90,T158 | Yes | T89,T90,T158 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T89,T90,T158 | Yes | T89,T90,T158 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T65,T89,T90 | Yes | T65,T89,T90 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T89,T90,T157 | Yes | T89,T90,T157 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T89,T90,T157 | Yes | T89,T90,T157 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T65,T89,T156 | Yes | T65,T89,T156 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T4,T70,T71 | Yes | T4,T70,T71 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T70,T152,T65 | Yes | T70,T152,T65 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T65,T89,T90 | Yes | T65,T89,T90 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T65,T89,T90 | Yes | T65,T89,T90 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T28,T120,T15 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[0] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[4:1] | No | No | Yes | T159,T160 | INPUT | |
lc_otp_vendor_test_i.ctrl[6:5] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[14:7] | No | No | Yes | T159,T161,T160 | INPUT | |
lc_otp_vendor_test_i.ctrl[15] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[22:16] | No | No | Yes | T159,T160,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[23] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[24] | No | No | Yes | T159,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[25] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[28:26] | No | No | Yes | T159,T161,T160 | INPUT | |
lc_otp_vendor_test_i.ctrl[29] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:30] | No | No | Yes | T161,T160,T159 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[1:0] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[2] | No | No | No | INPUT | ||
lc_otp_program_i.count[8:3] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[9] | No | No | No | INPUT | ||
lc_otp_program_i.count[10] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[11] | No | No | No | INPUT | ||
lc_otp_program_i.count[15:12] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[16] | No | No | No | INPUT | ||
lc_otp_program_i.count[21:17] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[22] | No | No | No | INPUT | ||
lc_otp_program_i.count[30:23] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[31] | No | No | No | INPUT | ||
lc_otp_program_i.count[40:32] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[41] | No | No | No | INPUT | ||
lc_otp_program_i.count[42] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[44:43] | No | No | No | INPUT | ||
lc_otp_program_i.count[47:45] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[48] | No | No | No | INPUT | ||
lc_otp_program_i.count[54:49] | Yes | Yes | *T163,*T42,*T45 | Yes | T163,T45,T46 | INPUT |
lc_otp_program_i.count[55] | No | No | No | INPUT | ||
lc_otp_program_i.count[57:56] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[58] | No | No | No | INPUT | ||
lc_otp_program_i.count[59] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[61:60] | No | No | No | INPUT | ||
lc_otp_program_i.count[62] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[65:63] | No | No | No | INPUT | ||
lc_otp_program_i.count[68:66] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[73:69] | No | No | No | INPUT | ||
lc_otp_program_i.count[78:74] | Yes | Yes | *T42,*T45,*T46 | Yes | T45,T46,T164 | INPUT |
lc_otp_program_i.count[79] | No | No | No | INPUT | ||
lc_otp_program_i.count[98:80] | Yes | Yes | *T163,*T45,*T46 | Yes | T163,T45,T46 | INPUT |
lc_otp_program_i.count[99] | No | No | No | INPUT | ||
lc_otp_program_i.count[105:100] | Yes | Yes | *T42,*T96,*T6 | Yes | T96,T6,T40 | INPUT |
lc_otp_program_i.count[106] | No | No | No | INPUT | ||
lc_otp_program_i.count[109:107] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[110] | No | No | No | INPUT | ||
lc_otp_program_i.count[116:111] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[117] | No | No | No | INPUT | ||
lc_otp_program_i.count[120:118] | Yes | Yes | *T42,*T96,*T6 | Yes | T96,T6,T40 | INPUT |
lc_otp_program_i.count[121] | No | No | No | INPUT | ||
lc_otp_program_i.count[122] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[123] | No | No | No | INPUT | ||
lc_otp_program_i.count[140:124] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[141] | No | No | No | INPUT | ||
lc_otp_program_i.count[146:142] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[147] | No | No | No | INPUT | ||
lc_otp_program_i.count[162:148] | Yes | Yes | *T163,*T1,*T2 | Yes | T163,T3,T4 | INPUT |
lc_otp_program_i.count[164:163] | No | No | No | INPUT | ||
lc_otp_program_i.count[171:165] | Yes | Yes | *T163,*T1,*T2 | Yes | T163,T3,T4 | INPUT |
lc_otp_program_i.count[173:172] | No | No | No | INPUT | ||
lc_otp_program_i.count[179:174] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[181:180] | No | No | No | INPUT | ||
lc_otp_program_i.count[183:182] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[184] | No | No | No | INPUT | ||
lc_otp_program_i.count[185] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[186] | No | No | No | INPUT | ||
lc_otp_program_i.count[187] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[189:188] | No | No | No | INPUT | ||
lc_otp_program_i.count[195:190] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[196] | No | No | No | INPUT | ||
lc_otp_program_i.count[198:197] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[199] | No | No | No | INPUT | ||
lc_otp_program_i.count[202:200] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[203] | No | No | No | INPUT | ||
lc_otp_program_i.count[210:204] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[211] | No | No | No | INPUT | ||
lc_otp_program_i.count[223:212] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[224] | No | No | No | INPUT | ||
lc_otp_program_i.count[225] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[226] | No | No | No | INPUT | ||
lc_otp_program_i.count[231:227] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[232] | No | No | No | INPUT | ||
lc_otp_program_i.count[237:233] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[238] | No | No | No | INPUT | ||
lc_otp_program_i.count[240:239] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[241] | No | No | No | INPUT | ||
lc_otp_program_i.count[249:242] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[250] | No | No | No | INPUT | ||
lc_otp_program_i.count[275:251] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[276] | No | No | No | INPUT | ||
lc_otp_program_i.count[286:277] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[288:287] | No | No | No | INPUT | ||
lc_otp_program_i.count[294:289] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[295] | No | No | No | INPUT | ||
lc_otp_program_i.count[298:296] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[299] | No | No | No | INPUT | ||
lc_otp_program_i.count[315:300] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[316] | No | No | No | INPUT | ||
lc_otp_program_i.count[317] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[318] | No | No | No | INPUT | ||
lc_otp_program_i.count[328:319] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[330:329] | No | No | No | INPUT | ||
lc_otp_program_i.count[331] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[333:332] | No | No | No | INPUT | ||
lc_otp_program_i.count[338:334] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[339] | No | No | No | INPUT | ||
lc_otp_program_i.count[347:340] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[348] | No | No | No | INPUT | ||
lc_otp_program_i.count[354:349] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[355] | No | No | No | INPUT | ||
lc_otp_program_i.count[358:356] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[359] | No | No | No | INPUT | ||
lc_otp_program_i.count[361:360] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[362] | No | No | No | INPUT | ||
lc_otp_program_i.count[368:363] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[369] | No | No | No | INPUT | ||
lc_otp_program_i.count[372:370] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.count[373] | No | No | No | INPUT | ||
lc_otp_program_i.count[376:374] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.count[377] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:378] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[10:0] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[13:11] | No | No | No | INPUT | ||
lc_otp_program_i.state[25:14] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[26] | No | No | No | INPUT | ||
lc_otp_program_i.state[29:27] | Yes | Yes | T69,T45,T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[31:30] | No | No | No | INPUT | ||
lc_otp_program_i.state[42:32] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[43] | No | No | No | INPUT | ||
lc_otp_program_i.state[52:44] | Yes | Yes | *T42,*T69,*T48 | Yes | T45,T46,T164 | INPUT |
lc_otp_program_i.state[54:53] | No | No | No | INPUT | ||
lc_otp_program_i.state[60:55] | Yes | Yes | *T42,T69,*T48 | Yes | T45,T46,T164 | INPUT |
lc_otp_program_i.state[61] | No | No | No | INPUT | ||
lc_otp_program_i.state[65:62] | Yes | Yes | *T42,*T69,*T48 | Yes | T45,T46,T164 | INPUT |
lc_otp_program_i.state[66] | No | No | No | INPUT | ||
lc_otp_program_i.state[69:67] | Yes | Yes | T69,T45,T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[70] | No | No | No | INPUT | ||
lc_otp_program_i.state[73:71] | Yes | Yes | *T42,T69,*T48 | Yes | T44,T45,T46 | INPUT |
lc_otp_program_i.state[74] | No | No | No | INPUT | ||
lc_otp_program_i.state[84:75] | Yes | Yes | T69,T45,T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[85] | No | No | No | INPUT | ||
lc_otp_program_i.state[94:86] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT |
lc_otp_program_i.state[95] | No | No | No | INPUT | ||
lc_otp_program_i.state[99:96] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[100] | No | No | No | INPUT | ||
lc_otp_program_i.state[103:101] | Yes | Yes | T69,T45,T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[104] | No | No | No | INPUT | ||
lc_otp_program_i.state[108:105] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[109] | No | No | No | INPUT | ||
lc_otp_program_i.state[112:110] | Yes | Yes | *T42,T69,*T48 | Yes | T44,T45,T46 | INPUT |
lc_otp_program_i.state[113] | No | No | No | INPUT | ||
lc_otp_program_i.state[115:114] | Yes | Yes | T163,*T69,*T45 | Yes | T163,T45,T46 | INPUT |
lc_otp_program_i.state[116] | No | No | No | INPUT | ||
lc_otp_program_i.state[134:117] | Yes | Yes | *T163,*T42,*T69 | Yes | T163,T44,T45 | INPUT |
lc_otp_program_i.state[135] | No | No | No | INPUT | ||
lc_otp_program_i.state[146:136] | Yes | Yes | *T163,*T69,*T45 | Yes | T163,T45,T46 | INPUT |
lc_otp_program_i.state[147] | No | No | No | INPUT | ||
lc_otp_program_i.state[152:148] | Yes | Yes | T69,T45,T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[153] | No | No | No | INPUT | ||
lc_otp_program_i.state[154] | Yes | Yes | *T163 | Yes | T163 | INPUT |
lc_otp_program_i.state[155] | No | No | No | INPUT | ||
lc_otp_program_i.state[169:156] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT |
lc_otp_program_i.state[170] | No | No | No | INPUT | ||
lc_otp_program_i.state[172:171] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT |
lc_otp_program_i.state[173] | No | No | No | INPUT | ||
lc_otp_program_i.state[180:174] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[181] | No | No | No | INPUT | ||
lc_otp_program_i.state[196:182] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT |
lc_otp_program_i.state[198:197] | No | No | No | INPUT | ||
lc_otp_program_i.state[219:199] | Yes | Yes | *T163,*T42,*T69 | Yes | T163,T44,T45 | INPUT |
lc_otp_program_i.state[220] | No | No | No | INPUT | ||
lc_otp_program_i.state[223:221] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[224] | No | No | No | INPUT | ||
lc_otp_program_i.state[225] | Yes | Yes | *T163 | Yes | T163 | INPUT |
lc_otp_program_i.state[226] | No | No | No | INPUT | ||
lc_otp_program_i.state[254:227] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT |
lc_otp_program_i.state[255] | No | No | No | INPUT | ||
lc_otp_program_i.state[265:256] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[266] | No | No | No | INPUT | ||
lc_otp_program_i.state[270:267] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT |
lc_otp_program_i.state[271] | No | No | No | INPUT | ||
lc_otp_program_i.state[273:272] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.state[274] | No | No | No | INPUT | ||
lc_otp_program_i.state[278:275] | Yes | Yes | *T163,*T1,*T2 | Yes | T163,T3,T4 | INPUT |
lc_otp_program_i.state[279] | No | No | No | INPUT | ||
lc_otp_program_i.state[283:280] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT |
lc_otp_program_i.state[284] | No | No | No | INPUT | ||
lc_otp_program_i.state[301:285] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[302] | No | No | No | INPUT | ||
lc_otp_program_i.state[315:303] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT |
lc_otp_program_i.state[316] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:317] | Yes | Yes | T42,T96,T123 | Yes | T96,T123,T6 | INPUT |
lc_otp_program_i.req | Yes | Yes | T69,T44,T45 | Yes | T69,T44,T45 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T69,T44,T45 | Yes | T69,T44,T45 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T69,T165,T166 | Yes | T69,T165,T166 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T4,T70,T71 | Yes | T4,T70,T71 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T69,T44,T45 | Yes | T69,T44,T45 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T3,T4,T28 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T167,T164,T168 | Yes | T96,T123,T169 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T28,T70 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T4,T70,T125 | Yes | T2,T4,T42 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T167,T164,T168 | Yes | T96,T123,T169 | OUTPUT |
otp_lc_data_o.count[1:0] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[2] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[8:3] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[9] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[10] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[11] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[15:12] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[16] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[21:17] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[30:23] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[40:32] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[41] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[42] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[44:43] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[47:45] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[48] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[54:49] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[55] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[57:56] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[58] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[59] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[61:60] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[62] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[65:63] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[68:66] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[73:69] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[78:74] | Yes | Yes | *T42,*T45,*T46 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[79] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[98:80] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[105:100] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[106] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[109:107] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[110] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[116:111] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[117] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[120:118] | Yes | Yes | *T42,T96,*T6 | Yes | T96,T6,T40 | OUTPUT |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[122] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[140:124] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[146:142] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[147] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[162:148] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[164:163] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[171:165] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[173:172] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[179:174] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[181:180] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[183:182] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[184] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[185] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[186] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[187] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[189:188] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[195:190] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[196] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[198:197] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[202:200] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[203] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[210:204] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[223:212] | Yes | Yes | *T45,*T170,*T171 | Yes | T69,T45,T170 | OUTPUT |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[225] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[231:227] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[232] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[237:233] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[238] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[240:239] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[241] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[249:242] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[250] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[275:251] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[276] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[286:277] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[288:287] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[294:289] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[295] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[298:296] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[299] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[315:300] | Yes | Yes | *T170,*T171,*T172 | Yes | T69,T170,T165 | OUTPUT |
otp_lc_data_o.count[316] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[317] | Yes | Yes | *T170,*T171,*T172 | Yes | T69,T170,T165 | OUTPUT |
otp_lc_data_o.count[318] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[328:319] | Yes | Yes | *T170,*T171,*T172 | Yes | T69,T170,T165 | OUTPUT |
otp_lc_data_o.count[330:329] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[331] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[333:332] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[338:334] | Yes | Yes | *T170,*T171,*T172 | Yes | T69,T170,T165 | OUTPUT |
otp_lc_data_o.count[339] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[347:340] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[348] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[354:349] | Yes | Yes | *T170,*T171,*T172 | Yes | T69,T170,T165 | OUTPUT |
otp_lc_data_o.count[355] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[358:356] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[359] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[361:360] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.count[362] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[368:363] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[369] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[372:370] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.count[373] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[376:374] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[377] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:378] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[10:0] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[13:11] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[25:14] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[26] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[29:27] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[31:30] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[42:32] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[52:44] | Yes | Yes | *T42,*T48,*T45 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[54:53] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[60:55] | Yes | Yes | *T42,*T48,*T45 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[61] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[65:62] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[66] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[69:67] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[70] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[73:71] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[74] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[84:75] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[85] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[94:86] | Yes | Yes | *T42,*T48,*T44 | Yes | T44,T45,T46 | OUTPUT |
otp_lc_data_o.state[95] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[99:96] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[100] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[103:101] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[104] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[108:105] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[109] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[112:110] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[115:114] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.state[116] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[134:117] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.state[135] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[146:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.state[147] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[152:148] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[154] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[169:156] | Yes | Yes | *T42,*T48,*T44 | Yes | T44,T45,T46 | OUTPUT |
otp_lc_data_o.state[170] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[172:171] | Yes | Yes | T42,*T48,*T44 | Yes | T44,T45,T46 | OUTPUT |
otp_lc_data_o.state[173] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[180:174] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[181] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[196:182] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[198:197] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[219:199] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.state[220] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[223:221] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[224] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[225] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.state[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[254:227] | Yes | Yes | *T42,*T48,*T44 | Yes | T44,T45,T46 | OUTPUT |
otp_lc_data_o.state[255] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[265:256] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[270:267] | Yes | Yes | *T42,*T48,*T44 | Yes | T44,T45,T46 | OUTPUT |
otp_lc_data_o.state[271] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[273:272] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.state[274] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[278:275] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.state[279] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[283:280] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_lc_data_o.state[284] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[301:285] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[302] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[315:303] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT |
otp_lc_data_o.state[316] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:317] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T4,T70,T71 | Yes | T4,T70,T71 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T167,T164,T168 | Yes | T96,T123,T169 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T70,T5,T69 | Yes | T94,T70,T96 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T167,T164,T168 | Yes | T96,T123,T169 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T3,T4 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T42,T43,T6 | Yes | T42,T43,T6 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T28,T116,T173 | Yes | T28,T116,T173 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T174,T175,T176 | Yes | T174,T175,T176 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T42,T43,T6 | Yes | T42,T43,T6 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T28,T116,T173 | Yes | T28,T116,T173 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T176,T177,T178 | Yes | T176,T177,T178 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T42,T43,T6 | Yes | T42,T43,T6 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T42,T43,T6 | Yes | T42,T43,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T3,T70,T96 | Yes | T3,T94,T70 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[1] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[117:2] | Yes | Yes | *T179,*T180,*T174 | Yes | T179,T180,T174 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[118] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[142:119] | Yes | Yes | *T179,*T180,*T174 | Yes | T179,T180,T174 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[143] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[190:144] | Yes | Yes | *T181,*T182,*T1 | Yes | T181,T182,T3 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[191] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:192] | Yes | Yes | T179,T180,T174 | Yes | T179,T180,T174 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T4,T28,T70 | Yes | T1,T94,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[11:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[12] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:13] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T7,T8,T9 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 141 | 88.12 |
Total Bits | 10986 | 9298 | 84.63 |
Total Bits 0->1 | 5493 | 4662 | 84.87 |
Total Bits 1->0 | 5493 | 4636 | 84.40 |
Ports | 160 | 141 | 88.12 |
Port Bits | 10986 | 9298 | 84.63 |
Port Bits 0->1 | 5493 | 4662 | 84.87 |
Port Bits 1->0 | 5493 | 4636 | 84.40 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T146,T147,T148 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T85,*T86,*T87 | Yes | T85,T86,T87 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T75,*T76,*T77 | Yes | T75,T76,T77 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T75,T88,T51 | Yes | T75,T88,T51 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T85,T87,T124 | Yes | T85,T87,T124 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T85,T87,T124 | Yes | T85,T87,T124 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T149,*T150,*T151 | Yes | T149,T150,T151 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T85,T87,T124 | Yes | T85,T87,T124 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T96,*T123,*T152 | Yes | T96,T123,T152 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T85,*T86,*T87 | Yes | T85,T86,T87 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T85,*T86,*T87 | Yes | T85,T86,T87 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T75,*T76,*T77 | Yes | T75,T76,T77 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T75,T88,T51 | Yes | T75,T88,T51 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T65,T89,T156 | Yes | T65,T89,T156 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T89,T156,T90 | Yes | T89,T156,T90 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T89,T156,T90 | Yes | T89,T156,T90 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T4,T70,T71 | Yes | T4,T70,T71 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T89,T90,T157 | Yes | T89,T90,T157 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T89,T90,T157 | Yes | T89,T90,T157 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T70,T152,T65 | Yes | T70,T152,T65 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T89,T156,T90 | Yes | T89,T156,T90 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T89,T156,T90 | Yes | T89,T156,T90 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T65,T89,T90 | Yes | T65,T89,T90 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T89,T90,T158 | Yes | T89,T90,T158 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T89,T90,T158 | Yes | T89,T90,T158 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T65,T89,T90 | Yes | T65,T89,T90 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T89,T90,T157 | Yes | T89,T90,T157 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T89,T90,T157 | Yes | T89,T90,T157 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T65,T89,T156 | Yes | T65,T89,T156 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T4,T70,T71 | Yes | T4,T70,T71 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T70,T152,T65 | Yes | T70,T152,T65 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T65,T89,T90 | Yes | T65,T89,T90 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T65,T89,T90 | Yes | T65,T89,T90 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T28,T120,T15 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[0] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[4:1] | No | No | Yes | T159,T160 | INPUT | ||
lc_otp_vendor_test_i.ctrl[6:5] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[14:7] | No | No | Yes | T159,T161,T160 | INPUT | ||
lc_otp_vendor_test_i.ctrl[15] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[22:16] | No | No | Yes | T159,T160,T161 | INPUT | ||
lc_otp_vendor_test_i.ctrl[23] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[24] | No | No | Yes | T159,T161 | INPUT | ||
lc_otp_vendor_test_i.ctrl[25] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[28:26] | No | No | Yes | T159,T161,T160 | INPUT | ||
lc_otp_vendor_test_i.ctrl[29] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:30] | No | No | Yes | T161,T160,T159 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[1:0] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[2] | No | No | No | INPUT | |||
lc_otp_program_i.count[8:3] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[9] | No | No | No | INPUT | |||
lc_otp_program_i.count[10] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[11] | No | No | No | INPUT | |||
lc_otp_program_i.count[15:12] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[16] | No | No | No | INPUT | |||
lc_otp_program_i.count[21:17] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[22] | No | No | No | INPUT | |||
lc_otp_program_i.count[30:23] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[31] | No | No | No | INPUT | |||
lc_otp_program_i.count[40:32] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[41] | No | No | No | INPUT | |||
lc_otp_program_i.count[42] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[44:43] | No | No | No | INPUT | |||
lc_otp_program_i.count[47:45] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[48] | No | No | No | INPUT | |||
lc_otp_program_i.count[54:49] | Yes | Yes | *T163,*T42,*T45 | Yes | T163,T45,T46 | INPUT | |
lc_otp_program_i.count[55] | No | No | No | INPUT | |||
lc_otp_program_i.count[57:56] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[58] | No | No | No | INPUT | |||
lc_otp_program_i.count[59] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[61:60] | No | No | No | INPUT | |||
lc_otp_program_i.count[62] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[65:63] | No | No | No | INPUT | |||
lc_otp_program_i.count[68:66] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[73:69] | No | No | No | INPUT | |||
lc_otp_program_i.count[78:74] | Yes | Yes | *T42,*T45,*T46 | Yes | T45,T46,T164 | INPUT | |
lc_otp_program_i.count[79] | No | No | No | INPUT | |||
lc_otp_program_i.count[98:80] | Yes | Yes | *T163,*T45,*T46 | Yes | T163,T45,T46 | INPUT | |
lc_otp_program_i.count[99] | No | No | No | INPUT | |||
lc_otp_program_i.count[105:100] | Yes | Yes | *T42,*T96,*T6 | Yes | T96,T6,T40 | INPUT | |
lc_otp_program_i.count[106] | No | No | No | INPUT | |||
lc_otp_program_i.count[109:107] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[110] | No | No | No | INPUT | |||
lc_otp_program_i.count[116:111] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[117] | No | No | No | INPUT | |||
lc_otp_program_i.count[120:118] | Yes | Yes | *T42,*T96,*T6 | Yes | T96,T6,T40 | INPUT | |
lc_otp_program_i.count[121] | No | No | No | INPUT | |||
lc_otp_program_i.count[122] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[123] | No | No | No | INPUT | |||
lc_otp_program_i.count[140:124] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[141] | No | No | No | INPUT | |||
lc_otp_program_i.count[146:142] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[147] | No | No | No | INPUT | |||
lc_otp_program_i.count[162:148] | Yes | Yes | *T163,*T1,*T2 | Yes | T163,T3,T4 | INPUT | |
lc_otp_program_i.count[164:163] | No | No | No | INPUT | |||
lc_otp_program_i.count[171:165] | Yes | Yes | *T163,*T1,*T2 | Yes | T163,T3,T4 | INPUT | |
lc_otp_program_i.count[173:172] | No | No | No | INPUT | |||
lc_otp_program_i.count[179:174] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[181:180] | No | No | No | INPUT | |||
lc_otp_program_i.count[183:182] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[184] | No | No | No | INPUT | |||
lc_otp_program_i.count[185] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[186] | No | No | No | INPUT | |||
lc_otp_program_i.count[187] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[189:188] | No | No | No | INPUT | |||
lc_otp_program_i.count[195:190] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[196] | No | No | No | INPUT | |||
lc_otp_program_i.count[198:197] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[199] | No | No | No | INPUT | |||
lc_otp_program_i.count[202:200] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[203] | No | No | No | INPUT | |||
lc_otp_program_i.count[210:204] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[211] | No | No | No | INPUT | |||
lc_otp_program_i.count[223:212] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[224] | No | No | No | INPUT | |||
lc_otp_program_i.count[225] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[226] | No | No | No | INPUT | |||
lc_otp_program_i.count[231:227] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[232] | No | No | No | INPUT | |||
lc_otp_program_i.count[237:233] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[238] | No | No | No | INPUT | |||
lc_otp_program_i.count[240:239] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[241] | No | No | No | INPUT | |||
lc_otp_program_i.count[249:242] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[250] | No | No | No | INPUT | |||
lc_otp_program_i.count[275:251] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[276] | No | No | No | INPUT | |||
lc_otp_program_i.count[286:277] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[288:287] | No | No | No | INPUT | |||
lc_otp_program_i.count[294:289] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[295] | No | No | No | INPUT | |||
lc_otp_program_i.count[298:296] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[299] | No | No | No | INPUT | |||
lc_otp_program_i.count[315:300] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[316] | No | No | No | INPUT | |||
lc_otp_program_i.count[317] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[318] | No | No | No | INPUT | |||
lc_otp_program_i.count[328:319] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[330:329] | No | No | No | INPUT | |||
lc_otp_program_i.count[331] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[333:332] | No | No | No | INPUT | |||
lc_otp_program_i.count[338:334] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[339] | No | No | No | INPUT | |||
lc_otp_program_i.count[347:340] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[348] | No | No | No | INPUT | |||
lc_otp_program_i.count[354:349] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[355] | No | No | No | INPUT | |||
lc_otp_program_i.count[358:356] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[359] | No | No | No | INPUT | |||
lc_otp_program_i.count[361:360] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[362] | No | No | No | INPUT | |||
lc_otp_program_i.count[368:363] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[369] | No | No | No | INPUT | |||
lc_otp_program_i.count[372:370] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.count[373] | No | No | No | INPUT | |||
lc_otp_program_i.count[376:374] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.count[377] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:378] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[10:0] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[13:11] | No | No | No | INPUT | |||
lc_otp_program_i.state[25:14] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[26] | No | No | No | INPUT | |||
lc_otp_program_i.state[29:27] | Yes | Yes | T69,T45,T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[31:30] | No | No | No | INPUT | |||
lc_otp_program_i.state[42:32] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[43] | No | No | No | INPUT | |||
lc_otp_program_i.state[52:44] | Yes | Yes | *T42,*T69,*T48 | Yes | T45,T46,T164 | INPUT | |
lc_otp_program_i.state[54:53] | No | No | No | INPUT | |||
lc_otp_program_i.state[60:55] | Yes | Yes | *T42,T69,*T48 | Yes | T45,T46,T164 | INPUT | |
lc_otp_program_i.state[61] | No | No | No | INPUT | |||
lc_otp_program_i.state[65:62] | Yes | Yes | *T42,*T69,*T48 | Yes | T45,T46,T164 | INPUT | |
lc_otp_program_i.state[66] | No | No | No | INPUT | |||
lc_otp_program_i.state[69:67] | Yes | Yes | T69,T45,T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[70] | No | No | No | INPUT | |||
lc_otp_program_i.state[73:71] | Yes | Yes | *T42,T69,*T48 | Yes | T44,T45,T46 | INPUT | |
lc_otp_program_i.state[74] | No | No | No | INPUT | |||
lc_otp_program_i.state[84:75] | Yes | Yes | T69,T45,T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[85] | No | No | No | INPUT | |||
lc_otp_program_i.state[94:86] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT | |
lc_otp_program_i.state[95] | No | No | No | INPUT | |||
lc_otp_program_i.state[99:96] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[100] | No | No | No | INPUT | |||
lc_otp_program_i.state[103:101] | Yes | Yes | T69,T45,T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[104] | No | No | No | INPUT | |||
lc_otp_program_i.state[108:105] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[109] | No | No | No | INPUT | |||
lc_otp_program_i.state[112:110] | Yes | Yes | *T42,T69,*T48 | Yes | T44,T45,T46 | INPUT | |
lc_otp_program_i.state[113] | No | No | No | INPUT | |||
lc_otp_program_i.state[115:114] | Yes | Yes | T163,*T69,*T45 | Yes | T163,T45,T46 | INPUT | |
lc_otp_program_i.state[116] | No | No | No | INPUT | |||
lc_otp_program_i.state[134:117] | Yes | Yes | *T163,*T42,*T69 | Yes | T163,T44,T45 | INPUT | |
lc_otp_program_i.state[135] | No | No | No | INPUT | |||
lc_otp_program_i.state[146:136] | Yes | Yes | *T163,*T69,*T45 | Yes | T163,T45,T46 | INPUT | |
lc_otp_program_i.state[147] | No | No | No | INPUT | |||
lc_otp_program_i.state[152:148] | Yes | Yes | T69,T45,T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[153] | No | No | No | INPUT | |||
lc_otp_program_i.state[154] | Yes | Yes | *T163 | Yes | T163 | INPUT | |
lc_otp_program_i.state[155] | No | No | No | INPUT | |||
lc_otp_program_i.state[169:156] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT | |
lc_otp_program_i.state[170] | No | No | No | INPUT | |||
lc_otp_program_i.state[172:171] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT | |
lc_otp_program_i.state[173] | No | No | No | INPUT | |||
lc_otp_program_i.state[180:174] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[181] | No | No | No | INPUT | |||
lc_otp_program_i.state[196:182] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT | |
lc_otp_program_i.state[198:197] | No | No | No | INPUT | |||
lc_otp_program_i.state[219:199] | Yes | Yes | *T163,*T42,*T69 | Yes | T163,T44,T45 | INPUT | |
lc_otp_program_i.state[220] | No | No | No | INPUT | |||
lc_otp_program_i.state[223:221] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[224] | No | No | No | INPUT | |||
lc_otp_program_i.state[225] | Yes | Yes | *T163 | Yes | T163 | INPUT | |
lc_otp_program_i.state[226] | No | No | No | INPUT | |||
lc_otp_program_i.state[254:227] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT | |
lc_otp_program_i.state[255] | No | No | No | INPUT | |||
lc_otp_program_i.state[265:256] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[266] | No | No | No | INPUT | |||
lc_otp_program_i.state[270:267] | Yes | Yes | *T42,*T69,*T48 | Yes | T44,T45,T46 | INPUT | |
lc_otp_program_i.state[271] | No | No | No | INPUT | |||
lc_otp_program_i.state[273:272] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.state[274] | No | No | No | INPUT | |||
lc_otp_program_i.state[278:275] | Yes | Yes | *T163,*T1,*T2 | Yes | T163,T3,T4 | INPUT | |
lc_otp_program_i.state[279] | No | No | No | INPUT | |||
lc_otp_program_i.state[283:280] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | INPUT | |
lc_otp_program_i.state[284] | No | No | No | INPUT | |||
lc_otp_program_i.state[301:285] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[302] | No | No | No | INPUT | |||
lc_otp_program_i.state[315:303] | Yes | Yes | *T69,*T45,*T46 | Yes | T45,T46,T162 | INPUT | |
lc_otp_program_i.state[316] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:317] | Yes | Yes | T42,T96,T123 | Yes | T96,T123,T6 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T69,T44,T45 | Yes | T69,T44,T45 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T69,T44,T45 | Yes | T69,T44,T45 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T69,T165,T166 | Yes | T69,T165,T166 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T4,T70,T71 | Yes | T4,T70,T71 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T69,T44,T45 | Yes | T69,T44,T45 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T3,T4,T28 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T167,T164,T168 | Yes | T96,T123,T169 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T28,T70 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T4,T70,T125 | Yes | T2,T4,T42 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T167,T164,T168 | Yes | T96,T123,T169 | OUTPUT | |
otp_lc_data_o.count[1:0] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[2] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[8:3] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[9] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[10] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[11] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[15:12] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[16] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[21:17] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[30:23] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[40:32] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[41] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[42] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[44:43] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[47:45] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[48] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[54:49] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[55] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[57:56] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[58] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[59] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[61:60] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[62] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[65:63] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[68:66] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[73:69] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[78:74] | Yes | Yes | *T42,*T45,*T46 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[79] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[98:80] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[105:100] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[106] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[109:107] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[110] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[116:111] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[117] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[120:118] | Yes | Yes | *T42,T96,*T6 | Yes | T96,T6,T40 | OUTPUT | |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[122] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[140:124] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[146:142] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[147] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[162:148] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[164:163] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[171:165] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[173:172] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[179:174] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[181:180] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[183:182] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[184] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[185] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[186] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[187] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[189:188] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[195:190] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[196] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[198:197] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[202:200] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[203] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[210:204] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[223:212] | Yes | Yes | *T45,*T170,*T171 | Yes | T69,T45,T170 | OUTPUT | |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[225] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[231:227] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[232] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[237:233] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[238] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[240:239] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[241] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[249:242] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[250] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[275:251] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[276] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[286:277] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[288:287] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[294:289] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[295] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[298:296] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[299] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[315:300] | Yes | Yes | *T170,*T171,*T172 | Yes | T69,T170,T165 | OUTPUT | |
otp_lc_data_o.count[316] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[317] | Yes | Yes | *T170,*T171,*T172 | Yes | T69,T170,T165 | OUTPUT | |
otp_lc_data_o.count[318] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[328:319] | Yes | Yes | *T170,*T171,*T172 | Yes | T69,T170,T165 | OUTPUT | |
otp_lc_data_o.count[330:329] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[331] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[333:332] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[338:334] | Yes | Yes | *T170,*T171,*T172 | Yes | T69,T170,T165 | OUTPUT | |
otp_lc_data_o.count[339] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[347:340] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[348] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[354:349] | Yes | Yes | *T170,*T171,*T172 | Yes | T69,T170,T165 | OUTPUT | |
otp_lc_data_o.count[355] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[358:356] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[359] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[361:360] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.count[362] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[368:363] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[369] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[372:370] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.count[373] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[376:374] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[377] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:378] | Yes | Yes | T45,T46,T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[10:0] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[13:11] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[25:14] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[26] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[29:27] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[31:30] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[42:32] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[52:44] | Yes | Yes | *T42,*T48,*T45 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[54:53] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[60:55] | Yes | Yes | *T42,*T48,*T45 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[61] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[65:62] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[66] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[69:67] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[70] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[73:71] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[74] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[84:75] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[85] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[94:86] | Yes | Yes | *T42,*T48,*T44 | Yes | T44,T45,T46 | OUTPUT | |
otp_lc_data_o.state[95] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[99:96] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[100] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[103:101] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[104] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[108:105] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[109] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[112:110] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[115:114] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.state[116] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[134:117] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.state[135] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[146:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.state[147] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[152:148] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[154] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[169:156] | Yes | Yes | *T42,*T48,*T44 | Yes | T44,T45,T46 | OUTPUT | |
otp_lc_data_o.state[170] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[172:171] | Yes | Yes | T42,*T48,*T44 | Yes | T44,T45,T46 | OUTPUT | |
otp_lc_data_o.state[173] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[180:174] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[181] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[196:182] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[198:197] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[219:199] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.state[220] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[223:221] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[224] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[225] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.state[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[254:227] | Yes | Yes | *T42,*T48,*T44 | Yes | T44,T45,T46 | OUTPUT | |
otp_lc_data_o.state[255] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[265:256] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[270:267] | Yes | Yes | *T42,*T48,*T44 | Yes | T44,T45,T46 | OUTPUT | |
otp_lc_data_o.state[271] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[273:272] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.state[274] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[278:275] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.state[279] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[283:280] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_lc_data_o.state[284] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[301:285] | Yes | Yes | *T3,*T4,*T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[302] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[315:303] | Yes | Yes | *T45,*T46,*T162 | Yes | T45,T46,T164 | OUTPUT | |
otp_lc_data_o.state[316] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:317] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T4,T70,T71 | Yes | T4,T70,T71 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T167,T164,T168 | Yes | T96,T123,T169 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T70,T5,T69 | Yes | T94,T70,T96 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T167,T164,T168 | Yes | T96,T123,T169 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T3,T4 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T42,T43,T6 | Yes | T42,T43,T6 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T28,T116,T173 | Yes | T28,T116,T173 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T174,T175,T176 | Yes | T174,T175,T176 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T42,T43,T6 | Yes | T42,T43,T6 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T28,T116,T173 | Yes | T28,T116,T173 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T176,T177,T178 | Yes | T176,T177,T178 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T42,T43,T6 | Yes | T42,T43,T6 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T4,T28,T42 | Yes | T1,T94,T4 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T94 | Yes | T3,T4,T28 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T42,T43,T6 | Yes | T42,T43,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T3,T70,T96 | Yes | T3,T94,T70 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[1] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[117:2] | Yes | Yes | *T179,*T180,*T174 | Yes | T179,T180,T174 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[118] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[142:119] | Yes | Yes | *T179,*T180,*T174 | Yes | T179,T180,T174 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[143] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[190:144] | Yes | Yes | *T181,*T182,*T1 | Yes | T181,T182,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[191] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:192] | Yes | Yes | T179,T180,T174 | Yes | T179,T180,T174 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T4,T28,T70 | Yes | T1,T94,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[11:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T4,T28 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[12] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:13] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T3,T4,T28 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |