SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.68 | 84.68 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 84.87 | 84.87 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.87 | 84.87 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.87 | 84.87 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9325 | 84.68 |
Total Bits 0->1 | 5506 | 4678 | 84.96 |
Total Bits 1->0 | 5506 | 4647 | 84.40 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9325 | 84.68 |
Port Bits 0->1 | 5506 | 4678 | 84.96 |
Port Bits 1->0 | 5506 | 4647 | 84.40 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T137,T94,T138 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T71,*T72,*T73 | Yes | T71,T72,T73 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T7,*T64,*T74 | Yes | T7,T64,T74 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T71,T72,T73 | Yes | T71,T72,T73 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T75,T76,T46 | Yes | T75,T76,T46 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T71,T72,T73 | Yes | T71,T72,T73 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T71,T72,T73 | Yes | T71,T72,T73 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T7,*T64,*T139 | Yes | T7,T64,T139 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T71,T73,T77 | Yes | T71,T73,T77 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T5,*T7,*T104 | Yes | T5,T7,T104 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T71,*T72,*T73 | Yes | T71,T72,T73 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T46,*T47,*T71 | Yes | T46,T47,T71 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T7,*T64,*T74 | Yes | T7,T64,T74 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T71,T72,T73 | Yes | T71,T72,T73 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T75,T76,T46 | Yes | T75,T76,T46 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T71,T73,T77 | Yes | T71,T73,T77 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T46,*T47,T71 | Yes | T46,T47,T71 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T71,T72,T73 | Yes | T71,T73,T77 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T140,T141,T142 | Yes | T140,T141,T142 | OUTPUT |
intr_otp_error_o | Yes | Yes | T140,T141,T142 | Yes | T140,T141,T142 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T78,T46,T48 | Yes | T78,T46,T48 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T78,T81,T82 | Yes | T78,T81,T143 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T78,T81,T143 | Yes | T78,T81,T82 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T2,T4,T60 | Yes | T2,T4,T60 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T78,T144,T81 | Yes | T78,T144,T81 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T78,T144,T81 | Yes | T78,T144,T81 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T1,T78,T145 | Yes | T1,T78,T145 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T78,T144,T146 | Yes | T78,T144,T81 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T78,T144,T81 | Yes | T78,T144,T146 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T78,T147,T48 | Yes | T78,T147,T48 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T78,T81,T82 | Yes | T78,T81,T82 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T78,T81,T82 | Yes | T78,T81,T82 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T78,T48,T81 | Yes | T78,T48,T81 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T78,T81,T82 | Yes | T78,T81,T82 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T78,T81,T82 | Yes | T78,T81,T82 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T78,T46,T48 | Yes | T78,T46,T48 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T2,T4,T60 | Yes | T2,T4,T60 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T1,T78,T145 | Yes | T1,T78,T145 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T78,T147,T48 | Yes | T78,T147,T48 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T78,T48,T81 | Yes | T78,T48,T81 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T16,T108,T78 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[0] | No | No | Yes | T148 | INPUT | |
lc_otp_vendor_test_i.ctrl[1] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[12:2] | No | No | Yes | T149,T148,T150 | INPUT | |
lc_otp_vendor_test_i.ctrl[13] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[30:14] | No | No | Yes | T150,T148,T149 | INPUT | |
lc_otp_vendor_test_i.ctrl[31] | No | No | No | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[3:0] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[5:4] | No | No | No | INPUT | ||
lc_otp_program_i.count[20:6] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.count[21] | No | No | No | INPUT | ||
lc_otp_program_i.count[28:22] | Yes | Yes | T5,T64,*T61 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[29] | No | No | No | INPUT | ||
lc_otp_program_i.count[37:30] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[39:38] | No | No | No | INPUT | ||
lc_otp_program_i.count[55:40] | Yes | Yes | *T5,*T64,*T61 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[56] | No | No | No | INPUT | ||
lc_otp_program_i.count[68:57] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[69] | No | No | No | INPUT | ||
lc_otp_program_i.count[74:70] | Yes | Yes | T5,T64,*T61 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[75] | No | No | No | INPUT | ||
lc_otp_program_i.count[78:76] | Yes | Yes | T5,T64,*T61 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[80:79] | No | No | No | INPUT | ||
lc_otp_program_i.count[91:81] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[92] | No | No | No | INPUT | ||
lc_otp_program_i.count[94:93] | Yes | Yes | T5,*T42,T64 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[95] | No | No | No | INPUT | ||
lc_otp_program_i.count[96] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[97] | No | No | No | INPUT | ||
lc_otp_program_i.count[107:98] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[108] | No | No | No | INPUT | ||
lc_otp_program_i.count[110:109] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.count[111] | No | No | No | INPUT | ||
lc_otp_program_i.count[113:112] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[114] | No | No | No | INPUT | ||
lc_otp_program_i.count[121:115] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.count[122] | No | No | No | INPUT | ||
lc_otp_program_i.count[135:123] | Yes | Yes | *T5,*T42,*T64 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[136] | No | No | No | INPUT | ||
lc_otp_program_i.count[139:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT |
lc_otp_program_i.count[140] | No | No | No | INPUT | ||
lc_otp_program_i.count[141] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT |
lc_otp_program_i.count[142] | No | No | No | INPUT | ||
lc_otp_program_i.count[147:143] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[148] | No | No | No | INPUT | ||
lc_otp_program_i.count[168:149] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[170:169] | No | No | No | INPUT | ||
lc_otp_program_i.count[176:171] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[177] | No | No | No | INPUT | ||
lc_otp_program_i.count[178] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT |
lc_otp_program_i.count[179] | No | No | No | INPUT | ||
lc_otp_program_i.count[198:180] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[199] | No | No | No | INPUT | ||
lc_otp_program_i.count[210:200] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[211] | No | No | No | INPUT | ||
lc_otp_program_i.count[219:212] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT |
lc_otp_program_i.count[220] | No | No | No | INPUT | ||
lc_otp_program_i.count[223:221] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT |
lc_otp_program_i.count[224] | No | No | No | INPUT | ||
lc_otp_program_i.count[230:225] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.count[232:231] | No | No | No | INPUT | ||
lc_otp_program_i.count[242:233] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[243] | No | No | No | INPUT | ||
lc_otp_program_i.count[247:244] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.count[248] | No | No | No | INPUT | ||
lc_otp_program_i.count[250:249] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.count[252:251] | No | No | No | INPUT | ||
lc_otp_program_i.count[256:253] | Yes | Yes | *T152,*T1,*T2 | Yes | T152,T2,T5 | INPUT |
lc_otp_program_i.count[257] | No | No | No | INPUT | ||
lc_otp_program_i.count[259:258] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[260] | No | No | No | INPUT | ||
lc_otp_program_i.count[278:261] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT |
lc_otp_program_i.count[279] | No | No | No | INPUT | ||
lc_otp_program_i.count[281:280] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[282] | No | No | No | INPUT | ||
lc_otp_program_i.count[290:283] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[291] | No | No | No | INPUT | ||
lc_otp_program_i.count[312:292] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[313] | No | No | No | INPUT | ||
lc_otp_program_i.count[314] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[315] | No | No | No | INPUT | ||
lc_otp_program_i.count[319:316] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.count[320] | No | No | No | INPUT | ||
lc_otp_program_i.count[343:321] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[344] | No | No | No | INPUT | ||
lc_otp_program_i.count[353:345] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.count[354] | No | No | No | INPUT | ||
lc_otp_program_i.count[355] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT |
lc_otp_program_i.count[356] | No | No | No | INPUT | ||
lc_otp_program_i.count[359:357] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT |
lc_otp_program_i.count[360] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:361] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[0] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[1] | No | No | No | INPUT | ||
lc_otp_program_i.state[3:2] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[5:4] | No | No | No | INPUT | ||
lc_otp_program_i.state[8:6] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[9] | No | No | No | INPUT | ||
lc_otp_program_i.state[13:10] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.state[14] | No | No | No | INPUT | ||
lc_otp_program_i.state[15] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[16] | No | No | No | INPUT | ||
lc_otp_program_i.state[21:17] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[23:22] | No | No | No | INPUT | ||
lc_otp_program_i.state[28:24] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[29] | No | No | No | INPUT | ||
lc_otp_program_i.state[30] | Yes | Yes | *T5,*T64,*T61 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[31] | No | No | No | INPUT | ||
lc_otp_program_i.state[34:32] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[35] | No | No | No | INPUT | ||
lc_otp_program_i.state[53:36] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.state[54] | No | No | No | INPUT | ||
lc_otp_program_i.state[57:55] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[58] | No | No | No | INPUT | ||
lc_otp_program_i.state[64:59] | Yes | Yes | *T5,*T64,*T61 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[65] | No | No | No | INPUT | ||
lc_otp_program_i.state[71:66] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[72] | No | No | No | INPUT | ||
lc_otp_program_i.state[76:73] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[77] | No | No | No | INPUT | ||
lc_otp_program_i.state[94:78] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.state[95] | No | No | No | INPUT | ||
lc_otp_program_i.state[97:96] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[98] | No | No | No | INPUT | ||
lc_otp_program_i.state[105:99] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[106] | No | No | No | INPUT | ||
lc_otp_program_i.state[107] | Yes | Yes | *T152 | Yes | T152 | INPUT |
lc_otp_program_i.state[109:108] | No | No | No | INPUT | ||
lc_otp_program_i.state[113:110] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[114] | No | No | No | INPUT | ||
lc_otp_program_i.state[119:115] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[120] | No | No | No | INPUT | ||
lc_otp_program_i.state[122:121] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.state[123] | No | No | No | INPUT | ||
lc_otp_program_i.state[127:124] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[128] | No | No | No | INPUT | ||
lc_otp_program_i.state[131:129] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[132] | No | No | No | INPUT | ||
lc_otp_program_i.state[157:133] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[158] | No | No | No | INPUT | ||
lc_otp_program_i.state[160:159] | Yes | Yes | *T152,*T5,*T44 | Yes | T152,T5,T44 | INPUT |
lc_otp_program_i.state[161] | No | No | No | INPUT | ||
lc_otp_program_i.state[162] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[163] | No | No | No | INPUT | ||
lc_otp_program_i.state[164] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[165] | No | No | No | INPUT | ||
lc_otp_program_i.state[175:166] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[177:176] | No | No | No | INPUT | ||
lc_otp_program_i.state[181:178] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[182] | No | No | No | INPUT | ||
lc_otp_program_i.state[192:183] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[193] | No | No | No | INPUT | ||
lc_otp_program_i.state[196:194] | Yes | Yes | T5,T44,T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[197] | No | No | No | INPUT | ||
lc_otp_program_i.state[199:198] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[200] | No | No | No | INPUT | ||
lc_otp_program_i.state[213:201] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[214] | No | No | No | INPUT | ||
lc_otp_program_i.state[226:215] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT |
lc_otp_program_i.state[227] | No | No | No | INPUT | ||
lc_otp_program_i.state[234:228] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[235] | No | No | No | INPUT | ||
lc_otp_program_i.state[240:236] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[241] | No | No | No | INPUT | ||
lc_otp_program_i.state[245:242] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[247:246] | No | No | No | INPUT | ||
lc_otp_program_i.state[269:248] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[270] | No | No | No | INPUT | ||
lc_otp_program_i.state[272:271] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.state[273] | No | No | No | INPUT | ||
lc_otp_program_i.state[280:274] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT |
lc_otp_program_i.state[281] | No | No | No | INPUT | ||
lc_otp_program_i.state[284:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT |
lc_otp_program_i.state[285] | No | No | No | INPUT | ||
lc_otp_program_i.state[290:286] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT |
lc_otp_program_i.state[291] | No | No | No | INPUT | ||
lc_otp_program_i.state[294:292] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[296:295] | No | No | No | INPUT | ||
lc_otp_program_i.state[297] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[298] | No | No | No | INPUT | ||
lc_otp_program_i.state[308:299] | Yes | Yes | *T5,*T42,*T7 | Yes | T5,T7,T44 | INPUT |
lc_otp_program_i.state[309] | No | No | No | INPUT | ||
lc_otp_program_i.state[310] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.state[312:311] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:313] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT |
lc_otp_program_i.req | Yes | Yes | T5,T7,T44 | Yes | T5,T7,T44 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T5,T7,T44 | Yes | T5,T7,T44 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T2,T4,T60 | Yes | T2,T4,T60 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T5,T7,T44 | Yes | T5,T7,T44 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T1,T85,T86 | Yes | T60,T6,T16 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T156,T157,T158 | Yes | T104,T159,T160 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T3,T87 | Yes | T5,T4,T60 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T156,T157,T158 | Yes | T104,T159,T160 | OUTPUT |
otp_lc_data_o.count[3:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[5:4] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[20:6] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[21] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[28:22] | Yes | Yes | T5,*T64,*T61 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[29] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[37:30] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[39:38] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[55:40] | Yes | Yes | T5,*T64,*T61 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[56] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[68:57] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[69] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[74:70] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[75] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[78:76] | Yes | Yes | T5,T64,*T61 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[80:79] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[91:81] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[94:93] | Yes | Yes | T5,*T42,*T64 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[96] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[97] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[107:98] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[108] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[110:109] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[111] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[113:112] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[114] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[121:115] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[122] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[135:123] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[136] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[139:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[140] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[141] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[147:143] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[148] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[168:149] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[170:169] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[176:171] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[177] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[178] | Yes | Yes | *T5,*T97,*T161 | Yes | T5,T44,T97 | OUTPUT |
otp_lc_data_o.count[179] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[198:180] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[210:200] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[219:212] | Yes | Yes | T5,*T97,*T161 | Yes | T5,T97,T161 | OUTPUT |
otp_lc_data_o.count[220] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[223:221] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[230:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[232:231] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[242:233] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[243] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[247:244] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[248] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[250:249] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[252:251] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[256:253] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[257] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[259:258] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[260] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[278:261] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[279] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[281:280] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[282] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[290:283] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[291] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[312:292] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[313] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[314] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[315] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[319:316] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[320] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[343:321] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[344] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[353:345] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[355] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[356] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[359:357] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.count[360] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:361] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.state[0] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.state[1] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[3:2] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.state[5:4] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[8:6] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.state[9] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[13:10] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.state[14] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[15] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[16] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[21:17] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[23:22] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[28:24] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[29] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[30] | Yes | Yes | *T5,*T64,*T61 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.state[31] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[34:32] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.state[35] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[53:36] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.state[54] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[57:55] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.state[58] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[64:59] | Yes | Yes | T5,*T64,*T61 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.state[65] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[71:66] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[72] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[76:73] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[77] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[94:78] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.state[95] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[97:96] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | OUTPUT |
otp_lc_data_o.state[98] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[105:99] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[106] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[107] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.state[109:108] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[113:110] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[114] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[119:115] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[120] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[122:121] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.state[123] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[127:124] | Yes | Yes | T5,*T44,*T64 | Yes | T5,T44,T64 | OUTPUT |
otp_lc_data_o.state[128] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[131:129] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[157:133] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[158] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[160:159] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.state[161] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[162] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[163] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[164] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[165] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[175:166] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[177:176] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[181:178] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[182] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[192:183] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[193] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[196:194] | Yes | Yes | T5,*T44,*T64 | Yes | T5,T44,T64 | OUTPUT |
otp_lc_data_o.state[197] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[199:198] | Yes | Yes | T5,*T44,*T64 | Yes | T5,T44,T64 | OUTPUT |
otp_lc_data_o.state[200] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[213:201] | Yes | Yes | T5,*T44,*T64 | Yes | T5,T44,T64 | OUTPUT |
otp_lc_data_o.state[214] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[226:215] | Yes | Yes | T5,*T44,*T64 | Yes | T5,T44,T64 | OUTPUT |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[234:228] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[235] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[240:236] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[241] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[245:242] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.state[247:246] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[269:248] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[272:271] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.state[273] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[280:274] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.state[281] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[284:282] | Yes | Yes | *T97,*T161,*T162 | Yes | T97,T161,T162 | OUTPUT |
otp_lc_data_o.state[285] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[290:286] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_lc_data_o.state[291] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[294:292] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[296:295] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[297] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.state[298] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[308:299] | Yes | Yes | *T5,*T42,*T7 | Yes | T5,T7,T44 | OUTPUT |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[310] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[312:311] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:313] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T2,T4,T60 | Yes | T2,T4,T60 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T156,T157,T158 | Yes | T104,T159,T160 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T3,T85,T86 | Yes | T4,T60,T6 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T156,T157,T158 | Yes | T104,T159,T160 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T2,T86 | Yes | T2,T4,T60 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T42,T6,T43 | Yes | T42,T6,T64 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T163,T164,T165 | Yes | T163,T164,T165 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T105,T166,T167 | Yes | T105,T166,T167 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T42,T6,T43 | Yes | T42,T6,T43 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T163,T164,T165 | Yes | T163,T164,T165 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T105,T166,T168 | Yes | T105,T166,T168 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T42,T6,T43 | Yes | T42,T6,T43 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T42,T6,T43 | Yes | T42,T6,T43 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T85,T5,T4 | Yes | T5,T4,T169 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[11:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[12] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[46:13] | Yes | Yes | *T170,*T167,*T117 | Yes | T170,T167,T117 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[47] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[54:48] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[55] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[95:56] | Yes | Yes | *T158,*T170,*T167 | Yes | T158,T170,T167 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[97:96] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[135:98] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[136] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[161:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[162] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[180:163] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[181] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[205:182] | Yes | Yes | *T171,*T172,*T170 | Yes | T171,T172,T170 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[206] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[239:207] | Yes | Yes | *T170,*T167,*T117 | Yes | T170,T167,T117 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[240] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[246:241] | Yes | Yes | *T158,*T171,*T172 | Yes | T158,T171,T172 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[247] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[252:248] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[253] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:254] | Yes | Yes | T170,T167,T117 | Yes | T170,T167,T117 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T167,T173,T174 | Yes | T170,T167,T175 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T8,T9,T10 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9324 | 84.87 |
Total Bits 0->1 | 5493 | 4677 | 85.14 |
Total Bits 1->0 | 5493 | 4647 | 84.60 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9324 | 84.87 |
Port Bits 0->1 | 5493 | 4677 | 85.14 |
Port Bits 1->0 | 5493 | 4647 | 84.60 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T137,T94,T138 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T71,*T72,*T73 | Yes | T71,T72,T73 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T7,*T64,*T74 | Yes | T7,T64,T74 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T71,T72,T73 | Yes | T71,T72,T73 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T75,T76,T46 | Yes | T75,T76,T46 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T71,T72,T73 | Yes | T71,T72,T73 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T71,T72,T73 | Yes | T71,T72,T73 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T7,*T64,*T139 | Yes | T7,T64,T139 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T71,T73,T77 | Yes | T71,T73,T77 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T5,*T7,*T104 | Yes | T5,T7,T104 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T71,*T72,*T73 | Yes | T71,T72,T73 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T46,*T47,*T71 | Yes | T46,T47,T71 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T7,*T64,*T74 | Yes | T7,T64,T74 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T71,T72,T73 | Yes | T71,T72,T73 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T75,T76,T46 | Yes | T75,T76,T46 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T71,T73,T77 | Yes | T71,T73,T77 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T46,*T47,T71 | Yes | T46,T47,T71 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T71,T72,T73 | Yes | T71,T73,T77 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T46,T47,T71 | Yes | T46,T47,T71 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T140,T141,T142 | Yes | T140,T141,T142 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T140,T141,T142 | Yes | T140,T141,T142 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T78,T46,T48 | Yes | T78,T46,T48 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T78,T81,T82 | Yes | T78,T81,T143 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T78,T81,T143 | Yes | T78,T81,T82 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T2,T4,T60 | Yes | T2,T4,T60 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T78,T144,T81 | Yes | T78,T144,T81 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T78,T144,T81 | Yes | T78,T144,T81 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T1,T78,T145 | Yes | T1,T78,T145 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T78,T144,T146 | Yes | T78,T144,T81 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T78,T144,T81 | Yes | T78,T144,T146 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T78,T147,T48 | Yes | T78,T147,T48 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T78,T81,T82 | Yes | T78,T81,T82 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T78,T81,T82 | Yes | T78,T81,T82 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T78,T48,T81 | Yes | T78,T48,T81 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T78,T81,T82 | Yes | T78,T81,T82 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T78,T81,T82 | Yes | T78,T81,T82 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T78,T46,T48 | Yes | T78,T46,T48 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T2,T4,T60 | Yes | T2,T4,T60 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T1,T78,T145 | Yes | T1,T78,T145 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T78,T147,T48 | Yes | T78,T147,T48 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T78,T48,T81 | Yes | T78,T48,T81 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T16,T108,T78 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[0] | No | No | Yes | T148 | INPUT | ||
lc_otp_vendor_test_i.ctrl[1] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[12:2] | No | No | Yes | T149,T148,T150 | INPUT | ||
lc_otp_vendor_test_i.ctrl[13] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[30:14] | No | No | Yes | T150,T148,T149 | INPUT | ||
lc_otp_vendor_test_i.ctrl[31] | No | No | No | INPUT | |||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[3:0] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[5:4] | No | No | No | INPUT | |||
lc_otp_program_i.count[20:6] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.count[21] | No | No | No | INPUT | |||
lc_otp_program_i.count[28:22] | Yes | Yes | T5,T64,*T61 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[29] | No | No | No | INPUT | |||
lc_otp_program_i.count[37:30] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[39:38] | No | No | No | INPUT | |||
lc_otp_program_i.count[55:40] | Yes | Yes | *T5,*T64,*T61 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[56] | No | No | No | INPUT | |||
lc_otp_program_i.count[68:57] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[69] | No | No | No | INPUT | |||
lc_otp_program_i.count[74:70] | Yes | Yes | T5,T64,*T61 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[75] | No | No | No | INPUT | |||
lc_otp_program_i.count[78:76] | Yes | Yes | T5,T64,*T61 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[80:79] | No | No | No | INPUT | |||
lc_otp_program_i.count[91:81] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[92] | No | No | No | INPUT | |||
lc_otp_program_i.count[94:93] | Yes | Yes | T5,*T42,T64 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[95] | No | No | No | INPUT | |||
lc_otp_program_i.count[96] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[97] | No | No | No | INPUT | |||
lc_otp_program_i.count[107:98] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[108] | No | No | No | INPUT | |||
lc_otp_program_i.count[110:109] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.count[111] | No | No | No | INPUT | |||
lc_otp_program_i.count[113:112] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[114] | No | No | No | INPUT | |||
lc_otp_program_i.count[121:115] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.count[122] | No | No | No | INPUT | |||
lc_otp_program_i.count[135:123] | Yes | Yes | *T5,*T42,*T64 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[136] | No | No | No | INPUT | |||
lc_otp_program_i.count[139:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT | |
lc_otp_program_i.count[140] | No | No | No | INPUT | |||
lc_otp_program_i.count[141] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT | |
lc_otp_program_i.count[142] | No | No | No | INPUT | |||
lc_otp_program_i.count[147:143] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[148] | No | No | No | INPUT | |||
lc_otp_program_i.count[168:149] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[170:169] | No | No | No | INPUT | |||
lc_otp_program_i.count[176:171] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[177] | No | No | No | INPUT | |||
lc_otp_program_i.count[178] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT | |
lc_otp_program_i.count[179] | No | No | No | INPUT | |||
lc_otp_program_i.count[198:180] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[199] | No | No | No | INPUT | |||
lc_otp_program_i.count[210:200] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[211] | No | No | No | INPUT | |||
lc_otp_program_i.count[219:212] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT | |
lc_otp_program_i.count[220] | No | No | No | INPUT | |||
lc_otp_program_i.count[223:221] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT | |
lc_otp_program_i.count[224] | No | No | No | INPUT | |||
lc_otp_program_i.count[230:225] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.count[232:231] | No | No | No | INPUT | |||
lc_otp_program_i.count[242:233] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[243] | No | No | No | INPUT | |||
lc_otp_program_i.count[247:244] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.count[248] | No | No | No | INPUT | |||
lc_otp_program_i.count[250:249] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.count[252:251] | No | No | No | INPUT | |||
lc_otp_program_i.count[256:253] | Yes | Yes | *T152,*T1,*T2 | Yes | T152,T2,T5 | INPUT | |
lc_otp_program_i.count[257] | No | No | No | INPUT | |||
lc_otp_program_i.count[259:258] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[260] | No | No | No | INPUT | |||
lc_otp_program_i.count[278:261] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT | |
lc_otp_program_i.count[279] | No | No | No | INPUT | |||
lc_otp_program_i.count[281:280] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[282] | No | No | No | INPUT | |||
lc_otp_program_i.count[290:283] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[291] | No | No | No | INPUT | |||
lc_otp_program_i.count[312:292] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[313] | No | No | No | INPUT | |||
lc_otp_program_i.count[314] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[315] | No | No | No | INPUT | |||
lc_otp_program_i.count[319:316] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.count[320] | No | No | No | INPUT | |||
lc_otp_program_i.count[343:321] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[344] | No | No | No | INPUT | |||
lc_otp_program_i.count[353:345] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.count[354] | No | No | No | INPUT | |||
lc_otp_program_i.count[355] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT | |
lc_otp_program_i.count[356] | No | No | No | INPUT | |||
lc_otp_program_i.count[359:357] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT | |
lc_otp_program_i.count[360] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:361] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[0] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[1] | No | No | No | INPUT | |||
lc_otp_program_i.state[3:2] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[5:4] | No | No | No | INPUT | |||
lc_otp_program_i.state[8:6] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[9] | No | No | No | INPUT | |||
lc_otp_program_i.state[13:10] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.state[14] | No | No | No | INPUT | |||
lc_otp_program_i.state[15] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[16] | No | No | No | INPUT | |||
lc_otp_program_i.state[21:17] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[23:22] | No | No | No | INPUT | |||
lc_otp_program_i.state[28:24] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[29] | No | No | No | INPUT | |||
lc_otp_program_i.state[30] | Yes | Yes | *T5,*T64,*T61 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[31] | No | No | No | INPUT | |||
lc_otp_program_i.state[34:32] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[35] | No | No | No | INPUT | |||
lc_otp_program_i.state[53:36] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.state[54] | No | No | No | INPUT | |||
lc_otp_program_i.state[57:55] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[58] | No | No | No | INPUT | |||
lc_otp_program_i.state[64:59] | Yes | Yes | *T5,*T64,*T61 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[65] | No | No | No | INPUT | |||
lc_otp_program_i.state[71:66] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[72] | No | No | No | INPUT | |||
lc_otp_program_i.state[76:73] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[77] | No | No | No | INPUT | |||
lc_otp_program_i.state[94:78] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.state[95] | No | No | No | INPUT | |||
lc_otp_program_i.state[97:96] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[98] | No | No | No | INPUT | |||
lc_otp_program_i.state[105:99] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[106] | No | No | No | INPUT | |||
lc_otp_program_i.state[107] | Yes | Yes | *T152 | Yes | T152 | INPUT | |
lc_otp_program_i.state[109:108] | No | No | No | INPUT | |||
lc_otp_program_i.state[113:110] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[114] | No | No | No | INPUT | |||
lc_otp_program_i.state[119:115] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[120] | No | No | No | INPUT | |||
lc_otp_program_i.state[122:121] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.state[123] | No | No | No | INPUT | |||
lc_otp_program_i.state[127:124] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[128] | No | No | No | INPUT | |||
lc_otp_program_i.state[131:129] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[132] | No | No | No | INPUT | |||
lc_otp_program_i.state[157:133] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[158] | No | No | No | INPUT | |||
lc_otp_program_i.state[160:159] | Yes | Yes | *T152,*T5,*T44 | Yes | T152,T5,T44 | INPUT | |
lc_otp_program_i.state[161] | No | No | No | INPUT | |||
lc_otp_program_i.state[162] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[163] | No | No | No | INPUT | |||
lc_otp_program_i.state[164] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[165] | No | No | No | INPUT | |||
lc_otp_program_i.state[175:166] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[177:176] | No | No | No | INPUT | |||
lc_otp_program_i.state[181:178] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[182] | No | No | No | INPUT | |||
lc_otp_program_i.state[192:183] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[193] | No | No | No | INPUT | |||
lc_otp_program_i.state[196:194] | Yes | Yes | T5,T44,T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[197] | No | No | No | INPUT | |||
lc_otp_program_i.state[199:198] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[200] | No | No | No | INPUT | |||
lc_otp_program_i.state[213:201] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[214] | No | No | No | INPUT | |||
lc_otp_program_i.state[226:215] | Yes | Yes | *T5,*T44,*T64 | Yes | T5,T44,T64 | INPUT | |
lc_otp_program_i.state[227] | No | No | No | INPUT | |||
lc_otp_program_i.state[234:228] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[235] | No | No | No | INPUT | |||
lc_otp_program_i.state[240:236] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[241] | No | No | No | INPUT | |||
lc_otp_program_i.state[245:242] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[247:246] | No | No | No | INPUT | |||
lc_otp_program_i.state[269:248] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[270] | No | No | No | INPUT | |||
lc_otp_program_i.state[272:271] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.state[273] | No | No | No | INPUT | |||
lc_otp_program_i.state[280:274] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT | |
lc_otp_program_i.state[281] | No | No | No | INPUT | |||
lc_otp_program_i.state[284:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | INPUT | |
lc_otp_program_i.state[285] | No | No | No | INPUT | |||
lc_otp_program_i.state[290:286] | Yes | Yes | *T152,*T5,*T64 | Yes | T152,T5,T64 | INPUT | |
lc_otp_program_i.state[291] | No | No | No | INPUT | |||
lc_otp_program_i.state[294:292] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[296:295] | No | No | No | INPUT | |||
lc_otp_program_i.state[297] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[298] | No | No | No | INPUT | |||
lc_otp_program_i.state[308:299] | Yes | Yes | *T5,*T42,*T7 | Yes | T5,T7,T44 | INPUT | |
lc_otp_program_i.state[309] | No | No | No | INPUT | |||
lc_otp_program_i.state[310] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.state[312:311] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:313] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T5,T7,T44 | Yes | T5,T7,T44 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T5,T7,T44 | Yes | T5,T7,T44 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T2,T4,T60 | Yes | T2,T4,T60 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T5,T7,T44 | Yes | T5,T7,T44 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T1,T85,T86 | Yes | T60,T6,T16 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T156,T157,T158 | Yes | T104,T159,T160 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T3,T87 | Yes | T5,T4,T60 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T156,T157,T158 | Yes | T104,T159,T160 | OUTPUT | |
otp_lc_data_o.count[3:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[5:4] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[20:6] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[21] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[28:22] | Yes | Yes | T5,*T64,*T61 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[29] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[37:30] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[39:38] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[55:40] | Yes | Yes | T5,*T64,*T61 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[56] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[68:57] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[69] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[74:70] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[75] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[78:76] | Yes | Yes | T5,T64,*T61 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[80:79] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[91:81] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[94:93] | Yes | Yes | T5,*T42,*T64 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[96] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[97] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[107:98] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[108] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[110:109] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[111] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[113:112] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[114] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[121:115] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[122] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[135:123] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[136] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[139:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[140] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[141] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[147:143] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[148] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[168:149] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[170:169] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[176:171] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[177] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[178] | Yes | Yes | *T5,*T97,*T161 | Yes | T5,T44,T97 | OUTPUT | |
otp_lc_data_o.count[179] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[198:180] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[210:200] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[219:212] | Yes | Yes | T5,*T97,*T161 | Yes | T5,T97,T161 | OUTPUT | |
otp_lc_data_o.count[220] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[223:221] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[230:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[232:231] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[242:233] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[243] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[247:244] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[248] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[250:249] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[252:251] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[256:253] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[257] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[259:258] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[260] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[278:261] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[279] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[281:280] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[282] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[290:283] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[291] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[312:292] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[313] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[314] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[315] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[319:316] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[320] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[343:321] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[344] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[353:345] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[355] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[356] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[359:357] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.count[360] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:361] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.state[0] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.state[1] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[3:2] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.state[5:4] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[8:6] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.state[9] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[13:10] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.state[14] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[15] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[16] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[21:17] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[23:22] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[28:24] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[29] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[30] | Yes | Yes | *T5,*T64,*T61 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.state[31] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[34:32] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.state[35] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[53:36] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.state[54] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[57:55] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.state[58] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[64:59] | Yes | Yes | T5,*T64,*T61 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.state[65] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[71:66] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[72] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[76:73] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[77] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[94:78] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.state[95] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[97:96] | Yes | Yes | T5,*T44,T64 | Yes | T5,T44,T64 | OUTPUT | |
otp_lc_data_o.state[98] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[105:99] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[106] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[107] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.state[109:108] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[113:110] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[114] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[119:115] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[120] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[122:121] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.state[123] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[127:124] | Yes | Yes | T5,*T44,*T64 | Yes | T5,T44,T64 | OUTPUT | |
otp_lc_data_o.state[128] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[131:129] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[157:133] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[158] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[160:159] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.state[161] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[162] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[163] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[164] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[165] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[175:166] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[177:176] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[181:178] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[182] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[192:183] | Yes | Yes | *T2,T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[193] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[196:194] | Yes | Yes | T5,*T44,*T64 | Yes | T5,T44,T64 | OUTPUT | |
otp_lc_data_o.state[197] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[199:198] | Yes | Yes | T5,*T44,*T64 | Yes | T5,T44,T64 | OUTPUT | |
otp_lc_data_o.state[200] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[213:201] | Yes | Yes | T5,*T44,*T64 | Yes | T5,T44,T64 | OUTPUT | |
otp_lc_data_o.state[214] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[226:215] | Yes | Yes | T5,*T44,*T64 | Yes | T5,T44,T64 | OUTPUT | |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[234:228] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[235] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[240:236] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[241] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[245:242] | Yes | Yes | T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.state[247:246] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[269:248] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[272:271] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.state[273] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[280:274] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.state[281] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[284:282] | Yes | Yes | *T97,*T161,*T162 | Yes | T97,T161,T162 | OUTPUT | |
otp_lc_data_o.state[285] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[290:286] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_lc_data_o.state[291] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[294:292] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[296:295] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[297] | Yes | Yes | *T5,*T64,*T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.state[298] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[308:299] | Yes | Yes | *T5,*T42,*T7 | Yes | T5,T7,T44 | OUTPUT | |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[310] | Yes | Yes | *T2,*T5,*T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[312:311] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:313] | Yes | Yes | T5,T64,T151 | Yes | T5,T64,T151 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T2,T4,T60 | Yes | T2,T4,T60 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T156,T157,T158 | Yes | T104,T159,T160 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T3,T85,T86 | Yes | T4,T60,T6 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T156,T157,T158 | Yes | T104,T159,T160 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T2,T86 | Yes | T2,T4,T60 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T42,T6,T43 | Yes | T42,T6,T64 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T163,T164,T165 | Yes | T163,T164,T165 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T105,T166,T167 | Yes | T105,T166,T167 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T42,T6,T43 | Yes | T42,T6,T43 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T163,T164,T165 | Yes | T163,T164,T165 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T105,T166,T168 | Yes | T105,T166,T168 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T42,T6,T43 | Yes | T42,T6,T43 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T2,T4,T60 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T4,T60,T42 | Yes | T3,T85,T86 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T3,T85,T86 | Yes | T86,T5,T4 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T42,T6,T43 | Yes | T42,T6,T43 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T85,T5,T4 | Yes | T5,T4,T169 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[11:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[12] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[46:13] | Yes | Yes | *T170,*T167,*T117 | Yes | T170,T167,T117 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[47] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[54:48] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[55] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[95:56] | Yes | Yes | *T158,*T170,*T167 | Yes | T158,T170,T167 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[97:96] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[135:98] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[136] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[161:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[162] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[180:163] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[181] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[205:182] | Yes | Yes | *T171,*T172,*T170 | Yes | T171,T172,T170 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[206] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[239:207] | Yes | Yes | *T170,*T167,*T117 | Yes | T170,T167,T117 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[240] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[246:241] | Yes | Yes | *T158,*T171,*T172 | Yes | T158,T171,T172 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[247] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[252:248] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[253] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:254] | Yes | Yes | T170,T167,T117 | Yes | T170,T167,T117 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T5,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T167,T173,T174 | Yes | T170,T167,T175 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T2,T5,T4 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |