SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.68 | 84.68 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 84.87 | 84.87 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.87 | 84.87 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.87 | 84.87 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.91 | 92.47 | 89.25 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 141 | 85.98 |
Total Bits | 11012 | 9325 | 84.68 |
Total Bits 0->1 | 5506 | 4678 | 84.96 |
Total Bits 1->0 | 5506 | 4647 | 84.40 |
Ports | 164 | 141 | 85.98 |
Port Bits | 11012 | 9325 | 84.68 |
Port Bits 0->1 | 5506 | 4678 | 84.96 |
Port Bits 1->0 | 5506 | 4647 | 84.40 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T149,T150,T151 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T73,*T74,*T75 | Yes | T73,T74,T75 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T45,*T68,*T76 | Yes | T45,T68,T76 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T68,T77,T78 | Yes | T68,T77,T78 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T73,T75,T152 | Yes | T73,T75,T152 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T153,*T154,*T155 | Yes | T153,T154,T155 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T123,*T156,*T157 | Yes | T123,T156,T157 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T73,*T74,*T75 | Yes | T73,T74,T75 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T49,*T73,*T74 | Yes | T49,T73,T74 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T45,*T68,*T76 | Yes | T45,T68,T76 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T68,T77,T78 | Yes | T68,T77,T78 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T49,T73,T74 | Yes | T49,T73,T74 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T157,T158,T159 | Yes | T157,T158,T159 | OUTPUT |
intr_otp_error_o | Yes | Yes | T157,T158,T159 | Yes | T157,T158,T159 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T160,T50,T51 | Yes | T160,T50,T51 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T82,T83,T84 | Yes | T82,T83,T161 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T82,T83,T161 | Yes | T82,T83,T84 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T1,T46,T62 | Yes | T1,T46,T62 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T82,T83,T84 | Yes | T82,T83,T84 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T82,T83,T84 | Yes | T82,T83,T84 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T156,T162,T163 | Yes | T156,T162,T163 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T82,T83,T84 | Yes | T82,T83,T84 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T82,T83,T84 | Yes | T82,T83,T84 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T104,T164,T165 | Yes | T104,T164,T165 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T165,T82,T83 | Yes | T82,T83,T84 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T82,T83,T84 | Yes | T165,T82,T83 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T166,T50,T51 | Yes | T166,T50,T51 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T166,T82,T83 | Yes | T166,T82,T83 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T166,T82,T83 | Yes | T166,T82,T83 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T160,T50,T51 | Yes | T160,T50,T51 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T1,T46,T62 | Yes | T1,T46,T62 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T156,T162,T163 | Yes | T156,T162,T163 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T104,T164,T165 | Yes | T104,T164,T165 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T166,T50,T51 | Yes | T166,T50,T51 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T1,T116,T117 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[3:0] | No | No | Yes | T167 | INPUT | |
lc_otp_vendor_test_i.ctrl[5:4] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[11:6] | No | No | Yes | T168,T169,T167 | INPUT | |
lc_otp_vendor_test_i.ctrl[12] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[19:13] | No | No | Yes | T167,T169,T168 | INPUT | |
lc_otp_vendor_test_i.ctrl[20] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:21] | No | No | Yes | T167,T168,T169 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[4:0] | Yes | Yes | T170,T171,T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[5] | No | No | No | INPUT | ||
lc_otp_program_i.count[18:6] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.count[19] | No | No | No | INPUT | ||
lc_otp_program_i.count[21:20] | Yes | Yes | T160,T170,T171 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.count[22] | No | No | No | INPUT | ||
lc_otp_program_i.count[23] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[24] | No | No | No | INPUT | ||
lc_otp_program_i.count[29:25] | Yes | Yes | *T42,*T172,*T43 | Yes | T42,T43,T173 | INPUT |
lc_otp_program_i.count[30] | No | No | No | INPUT | ||
lc_otp_program_i.count[32:31] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[33] | No | No | No | INPUT | ||
lc_otp_program_i.count[41:34] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.count[42] | No | No | No | INPUT | ||
lc_otp_program_i.count[56:43] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[57] | No | No | No | INPUT | ||
lc_otp_program_i.count[58] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.count[59] | No | No | No | INPUT | ||
lc_otp_program_i.count[74:60] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.count[75] | No | No | No | INPUT | ||
lc_otp_program_i.count[76] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.count[77] | No | No | No | INPUT | ||
lc_otp_program_i.count[91:78] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.count[92] | No | No | No | INPUT | ||
lc_otp_program_i.count[99:93] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[100] | No | No | No | INPUT | ||
lc_otp_program_i.count[116:101] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.count[117] | No | No | No | INPUT | ||
lc_otp_program_i.count[126:118] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.count[127] | No | No | No | INPUT | ||
lc_otp_program_i.count[131:128] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[132] | No | No | No | INPUT | ||
lc_otp_program_i.count[138:133] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[139] | No | No | No | INPUT | ||
lc_otp_program_i.count[141:140] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[142] | No | No | No | INPUT | ||
lc_otp_program_i.count[144:143] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[146:145] | No | No | No | INPUT | ||
lc_otp_program_i.count[163:147] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[165:164] | No | No | No | INPUT | ||
lc_otp_program_i.count[167:166] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[169:168] | No | No | No | INPUT | ||
lc_otp_program_i.count[173:170] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[174] | No | No | No | INPUT | ||
lc_otp_program_i.count[179:175] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.count[180] | No | No | No | INPUT | ||
lc_otp_program_i.count[197:181] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.count[198] | No | No | No | INPUT | ||
lc_otp_program_i.count[207:199] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[208] | No | No | No | INPUT | ||
lc_otp_program_i.count[210:209] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.count[211] | No | No | No | INPUT | ||
lc_otp_program_i.count[223:212] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[224] | No | No | No | INPUT | ||
lc_otp_program_i.count[231:225] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[234:232] | No | No | No | INPUT | ||
lc_otp_program_i.count[241:235] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[242] | No | No | No | INPUT | ||
lc_otp_program_i.count[250:243] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.count[251] | No | No | No | INPUT | ||
lc_otp_program_i.count[269:252] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.count[270] | No | No | No | INPUT | ||
lc_otp_program_i.count[273:271] | Yes | Yes | T160,T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.count[274] | No | No | No | INPUT | ||
lc_otp_program_i.count[277:275] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.count[278] | No | No | No | INPUT | ||
lc_otp_program_i.count[279] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.count[280] | No | No | No | INPUT | ||
lc_otp_program_i.count[282:281] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[284:283] | No | No | No | INPUT | ||
lc_otp_program_i.count[286:285] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[287] | No | No | No | INPUT | ||
lc_otp_program_i.count[288] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[289] | No | No | No | INPUT | ||
lc_otp_program_i.count[306:290] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[307] | No | No | No | INPUT | ||
lc_otp_program_i.count[313:308] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[314] | No | No | No | INPUT | ||
lc_otp_program_i.count[315] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[316] | No | No | No | INPUT | ||
lc_otp_program_i.count[323:317] | Yes | Yes | T170,T171,T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[324] | No | No | No | INPUT | ||
lc_otp_program_i.count[328:325] | Yes | Yes | T170,T171,T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[329] | No | No | No | INPUT | ||
lc_otp_program_i.count[333:330] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[334] | No | No | No | INPUT | ||
lc_otp_program_i.count[336:335] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | INPUT |
lc_otp_program_i.count[337] | No | No | No | INPUT | ||
lc_otp_program_i.count[345:338] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.count[346] | No | No | No | INPUT | ||
lc_otp_program_i.count[370:347] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.count[371] | No | No | No | INPUT | ||
lc_otp_program_i.count[378:372] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.count[379] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:380] | Yes | Yes | T160,T170,T171 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[10:0] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[11] | No | No | No | INPUT | ||
lc_otp_program_i.state[13:12] | Yes | Yes | T60,T170,T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[15:14] | No | No | No | INPUT | ||
lc_otp_program_i.state[23:16] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[25:24] | No | No | No | INPUT | ||
lc_otp_program_i.state[27:26] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T160,T43 | INPUT |
lc_otp_program_i.state[28] | No | No | No | INPUT | ||
lc_otp_program_i.state[29] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.state[30] | No | No | No | INPUT | ||
lc_otp_program_i.state[40:31] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[41] | No | No | No | INPUT | ||
lc_otp_program_i.state[44:42] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T173 | INPUT |
lc_otp_program_i.state[45] | No | No | No | INPUT | ||
lc_otp_program_i.state[49:46] | Yes | Yes | *T160,T60,T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[50] | No | No | No | INPUT | ||
lc_otp_program_i.state[60:51] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T160,T43 | INPUT |
lc_otp_program_i.state[61] | No | No | No | INPUT | ||
lc_otp_program_i.state[67:62] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T173 | INPUT |
lc_otp_program_i.state[68] | No | No | No | INPUT | ||
lc_otp_program_i.state[80:69] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[81] | No | No | No | INPUT | ||
lc_otp_program_i.state[90:82] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[92:91] | No | No | No | INPUT | ||
lc_otp_program_i.state[102:93] | Yes | Yes | *T160,T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[103] | No | No | No | INPUT | ||
lc_otp_program_i.state[110:104] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[111] | No | No | No | INPUT | ||
lc_otp_program_i.state[120:112] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T160,T43 | INPUT |
lc_otp_program_i.state[121] | No | No | No | INPUT | ||
lc_otp_program_i.state[122] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[123] | No | No | No | INPUT | ||
lc_otp_program_i.state[141:124] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T160,T43 | INPUT |
lc_otp_program_i.state[143:142] | No | No | No | INPUT | ||
lc_otp_program_i.state[150:144] | Yes | Yes | T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[151] | No | No | No | INPUT | ||
lc_otp_program_i.state[154:152] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[155] | No | No | No | INPUT | ||
lc_otp_program_i.state[157:156] | Yes | Yes | T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.state[160:158] | No | No | No | INPUT | ||
lc_otp_program_i.state[174:161] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T160,T43 | INPUT |
lc_otp_program_i.state[175] | No | No | No | INPUT | ||
lc_otp_program_i.state[176] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.state[177] | No | No | No | INPUT | ||
lc_otp_program_i.state[178] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[179] | No | No | No | INPUT | ||
lc_otp_program_i.state[184:180] | Yes | Yes | T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[185] | No | No | No | INPUT | ||
lc_otp_program_i.state[194:186] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[195] | No | No | No | INPUT | ||
lc_otp_program_i.state[205:196] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[206] | No | No | No | INPUT | ||
lc_otp_program_i.state[215:207] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.state[216] | No | No | No | INPUT | ||
lc_otp_program_i.state[217] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[219:218] | No | No | No | INPUT | ||
lc_otp_program_i.state[223:220] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[224] | No | No | No | INPUT | ||
lc_otp_program_i.state[227:225] | Yes | Yes | *T160,T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[228] | No | No | No | INPUT | ||
lc_otp_program_i.state[243:229] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T61 | INPUT |
lc_otp_program_i.state[246:244] | No | No | No | INPUT | ||
lc_otp_program_i.state[259:247] | Yes | Yes | T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[260] | No | No | No | INPUT | ||
lc_otp_program_i.state[261] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[262] | No | No | No | INPUT | ||
lc_otp_program_i.state[269:263] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.state[270] | No | No | No | INPUT | ||
lc_otp_program_i.state[274:271] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[275] | No | No | No | INPUT | ||
lc_otp_program_i.state[284:276] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[286:285] | No | No | No | INPUT | ||
lc_otp_program_i.state[293:287] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT |
lc_otp_program_i.state[294] | No | No | No | INPUT | ||
lc_otp_program_i.state[302:295] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.state[303] | No | No | No | INPUT | ||
lc_otp_program_i.state[308:304] | Yes | Yes | *T45,*T123,*T42 | Yes | T123,T42,T105 | INPUT |
lc_otp_program_i.state[309] | No | No | No | INPUT | ||
lc_otp_program_i.state[315:310] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT |
lc_otp_program_i.state[316] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:317] | Yes | Yes | T160,T174,T175 | Yes | T160,T174,T175 | INPUT |
lc_otp_program_i.req | Yes | Yes | T48,T60,T61 | Yes | T48,T60,T61 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T48,T60,T61 | Yes | T48,T60,T61 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T60,T176,T177 | Yes | T60,T176,T177 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T1,T46,T62 | Yes | T1,T46,T62 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T48,T60,T61 | Yes | T48,T60,T61 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T7,T156,T47 | Yes | T3,T45,T88 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T7,T105,T178 | Yes | T123,T7,T125 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T45,T4,T88 | Yes | T6,T123,T62 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T44,T88,T6 | Yes | T6,T123,T7 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T7,T105,T178 | Yes | T123,T7,T125 | OUTPUT |
otp_lc_data_o.count[4:0] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[5] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[18:6] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[21:20] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[23] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[24] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[29:25] | Yes | Yes | *T42,*T172,*T43 | Yes | T42,T43,T173 | OUTPUT |
otp_lc_data_o.count[30] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[32:31] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[33] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[41:34] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[42] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[56:43] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[57] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[58] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[59] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[74:60] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[75] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[76] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[77] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[91:78] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[99:93] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[100] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[116:101] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[117] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[126:118] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[127] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[131:128] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[138:133] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[139] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[141:140] | Yes | Yes | *T48,*T61,*T148 | Yes | T48,T60,T61 | OUTPUT |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[144:143] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[146:145] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[163:147] | Yes | Yes | *T48,*T61,*T148 | Yes | T48,T60,T61 | OUTPUT |
otp_lc_data_o.count[165:164] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[167:166] | Yes | Yes | *T48,*T61,*T148 | Yes | T48,T60,T61 | OUTPUT |
otp_lc_data_o.count[169:168] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[173:170] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[174] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[179:175] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[180] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[197:181] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[198] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[207:199] | Yes | Yes | *T48,*T181,*T182 | Yes | T48,T60,T176 | OUTPUT |
otp_lc_data_o.count[208] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[210:209] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[223:212] | Yes | Yes | *T48,*T181,*T182 | Yes | T48,T60,T176 | OUTPUT |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[231:225] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[234:232] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[241:235] | Yes | Yes | *T48,*T181,*T183 | Yes | T48,T60,T176 | OUTPUT |
otp_lc_data_o.count[242] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[250:243] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[251] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[269:252] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[270] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[273:271] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[274] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[277:275] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[278] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[279] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[280] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[282:281] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[284:283] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[286:285] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[288] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[289] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[306:290] | Yes | Yes | *T48,*T181,*T183 | Yes | T48,T60,T176 | OUTPUT |
otp_lc_data_o.count[307] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[313:308] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[314] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[315] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[316] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[323:317] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[324] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[328:325] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[329] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[333:330] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[336:335] | Yes | Yes | *T48,*T181,*T183 | Yes | T48,T60,T176 | OUTPUT |
otp_lc_data_o.count[337] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[345:338] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.count[346] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[370:347] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[371] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[378:372] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:380] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[10:0] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[11] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[13:12] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[15:14] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[23:16] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[25:24] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[27:26] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[28] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[29] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.state[30] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[40:31] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[41] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[44:42] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T173 | OUTPUT |
otp_lc_data_o.state[45] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[49:46] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[50] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[60:51] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[61] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[67:62] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T173 | OUTPUT |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[80:69] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[81] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[90:82] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[92:91] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[102:93] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[103] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[110:104] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[111] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[120:112] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[122] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[123] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[141:124] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[143:142] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[150:144] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[151] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[154:152] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[157:156] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.state[160:158] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[174:161] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[175] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[176] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.state[177] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[178] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[184:180] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[185] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[194:186] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[195] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[205:196] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[206] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[215:207] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.state[216] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[217] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[219:218] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[223:220] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[224] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[227:225] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[228] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[243:229] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T61 | OUTPUT |
otp_lc_data_o.state[246:244] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[259:247] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[261] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[262] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[269:263] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[274:271] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[275] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[284:276] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[286:285] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[293:287] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT |
otp_lc_data_o.state[294] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[302:295] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.state[303] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[308:304] | Yes | Yes | *T45,*T123,*T42 | Yes | T123,T42,T105 | OUTPUT |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[315:310] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[316] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:317] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T1,T46,T62 | Yes | T1,T46,T62 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T7,T105,T178 | Yes | T123,T7,T125 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T2,T4,T88 | Yes | T6,T7,T42 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T7,T105,T178 | Yes | T123,T7,T125 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T116 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T44,T45,T7 | Yes | T44,T45,T7 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T98,T184,T185 | Yes | T98,T184,T185 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T93,T186,T187 | Yes | T93,T186,T187 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T44,T45,T7 | Yes | T44,T45,T7 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T98,T184,T185 | Yes | T98,T184,T185 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T93,T187,T188 | Yes | T93,T187,T188 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T44,T7,T189 | Yes | T44,T7,T189 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T44,T7,T189 | Yes | T44,T7,T189 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T5,T123,T42 | Yes | T44,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[5:0] | Yes | Yes | *T178,*T190,*T1 | Yes | T178,T190,T1 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[6] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[17:7] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[18] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[39:19] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[40] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[75:41] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[76] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[159:77] | Yes | Yes | *T178,*T186,*T191 | Yes | T178,T186,T191 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[160] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:161] | Yes | Yes | T178,T190,T192 | Yes | T178,T190,T192 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T6,T42,T62 | Yes | T2,T44,T45 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[0] | No | No | Yes | T193,T194,T195 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[41:1] | Yes | Yes | *T44,*T45,*T7 | Yes | T7,T42,T43 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[42] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[50:43] | Yes | Yes | *T44,*T45,*T7 | Yes | T7,T42,T43 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[51] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:52] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T8,T9,T10 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 141 | 88.12 |
Total Bits | 10986 | 9324 | 84.87 |
Total Bits 0->1 | 5493 | 4677 | 85.14 |
Total Bits 1->0 | 5493 | 4647 | 84.60 |
Ports | 160 | 141 | 88.12 |
Port Bits | 10986 | 9324 | 84.87 |
Port Bits 0->1 | 5493 | 4677 | 85.14 |
Port Bits 1->0 | 5493 | 4647 | 84.60 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T149,T150,T151 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T73,*T74,*T75 | Yes | T73,T74,T75 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T45,*T68,*T76 | Yes | T45,T68,T76 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T68,T77,T78 | Yes | T68,T77,T78 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T73,T75,T152 | Yes | T73,T75,T152 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T153,*T154,*T155 | Yes | T153,T154,T155 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T123,*T156,*T157 | Yes | T123,T156,T157 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T73,*T74,*T75 | Yes | T73,T74,T75 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T49,*T73,*T74 | Yes | T49,T73,T74 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T45,*T68,*T76 | Yes | T45,T68,T76 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T68,T77,T78 | Yes | T68,T77,T78 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T49,T73,T74 | Yes | T49,T73,T74 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T73,T74,T75 | Yes | T73,T74,T75 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T49,T73,T74 | Yes | T49,T73,T74 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T157,T158,T159 | Yes | T157,T158,T159 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T157,T158,T159 | Yes | T157,T158,T159 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T160,T50,T51 | Yes | T160,T50,T51 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T82,T83,T84 | Yes | T82,T83,T161 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T82,T83,T161 | Yes | T82,T83,T84 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T1,T46,T62 | Yes | T1,T46,T62 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T82,T83,T84 | Yes | T82,T83,T84 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T82,T83,T84 | Yes | T82,T83,T84 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T156,T162,T163 | Yes | T156,T162,T163 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T82,T83,T84 | Yes | T82,T83,T84 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T82,T83,T84 | Yes | T82,T83,T84 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T104,T164,T165 | Yes | T104,T164,T165 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T165,T82,T83 | Yes | T82,T83,T84 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T82,T83,T84 | Yes | T165,T82,T83 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T166,T50,T51 | Yes | T166,T50,T51 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T166,T82,T83 | Yes | T166,T82,T83 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T166,T82,T83 | Yes | T166,T82,T83 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T160,T50,T51 | Yes | T160,T50,T51 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T1,T46,T62 | Yes | T1,T46,T62 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T156,T162,T163 | Yes | T156,T162,T163 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T104,T164,T165 | Yes | T104,T164,T165 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T166,T50,T51 | Yes | T166,T50,T51 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T1,T116,T117 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[3:0] | No | No | Yes | T167 | INPUT | ||
lc_otp_vendor_test_i.ctrl[5:4] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[11:6] | No | No | Yes | T168,T169,T167 | INPUT | ||
lc_otp_vendor_test_i.ctrl[12] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[19:13] | No | No | Yes | T167,T169,T168 | INPUT | ||
lc_otp_vendor_test_i.ctrl[20] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:21] | No | No | Yes | T167,T168,T169 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[4:0] | Yes | Yes | T170,T171,T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[5] | No | No | No | INPUT | |||
lc_otp_program_i.count[18:6] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.count[19] | No | No | No | INPUT | |||
lc_otp_program_i.count[21:20] | Yes | Yes | T160,T170,T171 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.count[22] | No | No | No | INPUT | |||
lc_otp_program_i.count[23] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[24] | No | No | No | INPUT | |||
lc_otp_program_i.count[29:25] | Yes | Yes | *T42,*T172,*T43 | Yes | T42,T43,T173 | INPUT | |
lc_otp_program_i.count[30] | No | No | No | INPUT | |||
lc_otp_program_i.count[32:31] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[33] | No | No | No | INPUT | |||
lc_otp_program_i.count[41:34] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.count[42] | No | No | No | INPUT | |||
lc_otp_program_i.count[56:43] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[57] | No | No | No | INPUT | |||
lc_otp_program_i.count[58] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.count[59] | No | No | No | INPUT | |||
lc_otp_program_i.count[74:60] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.count[75] | No | No | No | INPUT | |||
lc_otp_program_i.count[76] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.count[77] | No | No | No | INPUT | |||
lc_otp_program_i.count[91:78] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.count[92] | No | No | No | INPUT | |||
lc_otp_program_i.count[99:93] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[100] | No | No | No | INPUT | |||
lc_otp_program_i.count[116:101] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.count[117] | No | No | No | INPUT | |||
lc_otp_program_i.count[126:118] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.count[127] | No | No | No | INPUT | |||
lc_otp_program_i.count[131:128] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[132] | No | No | No | INPUT | |||
lc_otp_program_i.count[138:133] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[139] | No | No | No | INPUT | |||
lc_otp_program_i.count[141:140] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[142] | No | No | No | INPUT | |||
lc_otp_program_i.count[144:143] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[146:145] | No | No | No | INPUT | |||
lc_otp_program_i.count[163:147] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[165:164] | No | No | No | INPUT | |||
lc_otp_program_i.count[167:166] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[169:168] | No | No | No | INPUT | |||
lc_otp_program_i.count[173:170] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[174] | No | No | No | INPUT | |||
lc_otp_program_i.count[179:175] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.count[180] | No | No | No | INPUT | |||
lc_otp_program_i.count[197:181] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.count[198] | No | No | No | INPUT | |||
lc_otp_program_i.count[207:199] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[208] | No | No | No | INPUT | |||
lc_otp_program_i.count[210:209] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.count[211] | No | No | No | INPUT | |||
lc_otp_program_i.count[223:212] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[224] | No | No | No | INPUT | |||
lc_otp_program_i.count[231:225] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[234:232] | No | No | No | INPUT | |||
lc_otp_program_i.count[241:235] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[242] | No | No | No | INPUT | |||
lc_otp_program_i.count[250:243] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.count[251] | No | No | No | INPUT | |||
lc_otp_program_i.count[269:252] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.count[270] | No | No | No | INPUT | |||
lc_otp_program_i.count[273:271] | Yes | Yes | T160,T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.count[274] | No | No | No | INPUT | |||
lc_otp_program_i.count[277:275] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.count[278] | No | No | No | INPUT | |||
lc_otp_program_i.count[279] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.count[280] | No | No | No | INPUT | |||
lc_otp_program_i.count[282:281] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[284:283] | No | No | No | INPUT | |||
lc_otp_program_i.count[286:285] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[287] | No | No | No | INPUT | |||
lc_otp_program_i.count[288] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[289] | No | No | No | INPUT | |||
lc_otp_program_i.count[306:290] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[307] | No | No | No | INPUT | |||
lc_otp_program_i.count[313:308] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[314] | No | No | No | INPUT | |||
lc_otp_program_i.count[315] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[316] | No | No | No | INPUT | |||
lc_otp_program_i.count[323:317] | Yes | Yes | T170,T171,T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[324] | No | No | No | INPUT | |||
lc_otp_program_i.count[328:325] | Yes | Yes | T170,T171,T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[329] | No | No | No | INPUT | |||
lc_otp_program_i.count[333:330] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[334] | No | No | No | INPUT | |||
lc_otp_program_i.count[336:335] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | INPUT | |
lc_otp_program_i.count[337] | No | No | No | INPUT | |||
lc_otp_program_i.count[345:338] | Yes | Yes | *T170,*T171,*T97 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.count[346] | No | No | No | INPUT | |||
lc_otp_program_i.count[370:347] | Yes | Yes | *T160,*T170,*T171 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.count[371] | No | No | No | INPUT | |||
lc_otp_program_i.count[378:372] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.count[379] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:380] | Yes | Yes | T160,T170,T171 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[10:0] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[11] | No | No | No | INPUT | |||
lc_otp_program_i.state[13:12] | Yes | Yes | T60,T170,T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[15:14] | No | No | No | INPUT | |||
lc_otp_program_i.state[23:16] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[25:24] | No | No | No | INPUT | |||
lc_otp_program_i.state[27:26] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T160,T43 | INPUT | |
lc_otp_program_i.state[28] | No | No | No | INPUT | |||
lc_otp_program_i.state[29] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.state[30] | No | No | No | INPUT | |||
lc_otp_program_i.state[40:31] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[41] | No | No | No | INPUT | |||
lc_otp_program_i.state[44:42] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T173 | INPUT | |
lc_otp_program_i.state[45] | No | No | No | INPUT | |||
lc_otp_program_i.state[49:46] | Yes | Yes | *T160,T60,T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[50] | No | No | No | INPUT | |||
lc_otp_program_i.state[60:51] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T160,T43 | INPUT | |
lc_otp_program_i.state[61] | No | No | No | INPUT | |||
lc_otp_program_i.state[67:62] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T173 | INPUT | |
lc_otp_program_i.state[68] | No | No | No | INPUT | |||
lc_otp_program_i.state[80:69] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[81] | No | No | No | INPUT | |||
lc_otp_program_i.state[90:82] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[92:91] | No | No | No | INPUT | |||
lc_otp_program_i.state[102:93] | Yes | Yes | *T160,T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[103] | No | No | No | INPUT | |||
lc_otp_program_i.state[110:104] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[111] | No | No | No | INPUT | |||
lc_otp_program_i.state[120:112] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T160,T43 | INPUT | |
lc_otp_program_i.state[121] | No | No | No | INPUT | |||
lc_otp_program_i.state[122] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[123] | No | No | No | INPUT | |||
lc_otp_program_i.state[141:124] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T160,T43 | INPUT | |
lc_otp_program_i.state[143:142] | No | No | No | INPUT | |||
lc_otp_program_i.state[150:144] | Yes | Yes | T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[151] | No | No | No | INPUT | |||
lc_otp_program_i.state[154:152] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[155] | No | No | No | INPUT | |||
lc_otp_program_i.state[157:156] | Yes | Yes | T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.state[160:158] | No | No | No | INPUT | |||
lc_otp_program_i.state[174:161] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T160,T43 | INPUT | |
lc_otp_program_i.state[175] | No | No | No | INPUT | |||
lc_otp_program_i.state[176] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.state[177] | No | No | No | INPUT | |||
lc_otp_program_i.state[178] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[179] | No | No | No | INPUT | |||
lc_otp_program_i.state[184:180] | Yes | Yes | T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[185] | No | No | No | INPUT | |||
lc_otp_program_i.state[194:186] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[195] | No | No | No | INPUT | |||
lc_otp_program_i.state[205:196] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[206] | No | No | No | INPUT | |||
lc_otp_program_i.state[215:207] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.state[216] | No | No | No | INPUT | |||
lc_otp_program_i.state[217] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[219:218] | No | No | No | INPUT | |||
lc_otp_program_i.state[223:220] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[224] | No | No | No | INPUT | |||
lc_otp_program_i.state[227:225] | Yes | Yes | *T160,T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[228] | No | No | No | INPUT | |||
lc_otp_program_i.state[243:229] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T61 | INPUT | |
lc_otp_program_i.state[246:244] | No | No | No | INPUT | |||
lc_otp_program_i.state[259:247] | Yes | Yes | T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[260] | No | No | No | INPUT | |||
lc_otp_program_i.state[261] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[262] | No | No | No | INPUT | |||
lc_otp_program_i.state[269:263] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.state[270] | No | No | No | INPUT | |||
lc_otp_program_i.state[274:271] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[275] | No | No | No | INPUT | |||
lc_otp_program_i.state[284:276] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[286:285] | No | No | No | INPUT | |||
lc_otp_program_i.state[293:287] | Yes | Yes | *T60,*T170,*T176 | Yes | T170,T171,T97 | INPUT | |
lc_otp_program_i.state[294] | No | No | No | INPUT | |||
lc_otp_program_i.state[302:295] | Yes | Yes | *T160,*T174,*T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.state[303] | No | No | No | INPUT | |||
lc_otp_program_i.state[308:304] | Yes | Yes | *T45,*T123,*T42 | Yes | T123,T42,T105 | INPUT | |
lc_otp_program_i.state[309] | No | No | No | INPUT | |||
lc_otp_program_i.state[315:310] | Yes | Yes | *T160,*T60,*T170 | Yes | T160,T170,T171 | INPUT | |
lc_otp_program_i.state[316] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:317] | Yes | Yes | T160,T174,T175 | Yes | T160,T174,T175 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T48,T60,T61 | Yes | T48,T60,T61 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T48,T60,T61 | Yes | T48,T60,T61 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T60,T176,T177 | Yes | T60,T176,T177 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T1,T46,T62 | Yes | T1,T46,T62 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T48,T60,T61 | Yes | T48,T60,T61 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T7,T156,T47 | Yes | T3,T45,T88 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T7,T105,T178 | Yes | T123,T7,T125 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T45,T4,T88 | Yes | T6,T123,T62 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T44,T88,T6 | Yes | T6,T123,T7 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T7,T105,T178 | Yes | T123,T7,T125 | OUTPUT | |
otp_lc_data_o.count[4:0] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[5] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[18:6] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[21:20] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[23] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[24] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[29:25] | Yes | Yes | *T42,*T172,*T43 | Yes | T42,T43,T173 | OUTPUT | |
otp_lc_data_o.count[30] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[32:31] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[33] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[41:34] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[42] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[56:43] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[57] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[58] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[59] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[74:60] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[75] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[76] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[77] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[91:78] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[99:93] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[100] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[116:101] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[117] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[126:118] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[127] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[131:128] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[138:133] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[139] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[141:140] | Yes | Yes | *T48,*T61,*T148 | Yes | T48,T60,T61 | OUTPUT | |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[144:143] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[146:145] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[163:147] | Yes | Yes | *T48,*T61,*T148 | Yes | T48,T60,T61 | OUTPUT | |
otp_lc_data_o.count[165:164] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[167:166] | Yes | Yes | *T48,*T61,*T148 | Yes | T48,T60,T61 | OUTPUT | |
otp_lc_data_o.count[169:168] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[173:170] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[174] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[179:175] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[180] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[197:181] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[198] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[207:199] | Yes | Yes | *T48,*T181,*T182 | Yes | T48,T60,T176 | OUTPUT | |
otp_lc_data_o.count[208] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[210:209] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[223:212] | Yes | Yes | *T48,*T181,*T182 | Yes | T48,T60,T176 | OUTPUT | |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[231:225] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[234:232] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[241:235] | Yes | Yes | *T48,*T181,*T183 | Yes | T48,T60,T176 | OUTPUT | |
otp_lc_data_o.count[242] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[250:243] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[251] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[269:252] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[270] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[273:271] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[274] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[277:275] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[278] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[279] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[280] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[282:281] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[284:283] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[286:285] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[288] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[289] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[306:290] | Yes | Yes | *T48,*T181,*T183 | Yes | T48,T60,T176 | OUTPUT | |
otp_lc_data_o.count[307] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[313:308] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[314] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[315] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[316] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[323:317] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[324] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[328:325] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[329] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[333:330] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[336:335] | Yes | Yes | *T48,*T181,*T183 | Yes | T48,T60,T176 | OUTPUT | |
otp_lc_data_o.count[337] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[345:338] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.count[346] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[370:347] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[371] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[378:372] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:380] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[10:0] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[11] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[13:12] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[15:14] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[23:16] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[25:24] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[27:26] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[28] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[29] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.state[30] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[40:31] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[41] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[44:42] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T173 | OUTPUT | |
otp_lc_data_o.state[45] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[49:46] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[50] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[60:51] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[61] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[67:62] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T173 | OUTPUT | |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[80:69] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[81] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[90:82] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[92:91] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[102:93] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[103] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[110:104] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[111] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[120:112] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[122] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[123] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[141:124] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[143:142] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[150:144] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[151] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[154:152] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[157:156] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.state[160:158] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[174:161] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[175] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[176] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.state[177] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[178] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[184:180] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[185] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[194:186] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[195] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[205:196] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[206] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[215:207] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.state[216] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[217] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[219:218] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[223:220] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[224] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[227:225] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[228] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[243:229] | Yes | Yes | *T42,*T67,*T172 | Yes | T42,T43,T61 | OUTPUT | |
otp_lc_data_o.state[246:244] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[259:247] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[261] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[262] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[269:263] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[274:271] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[275] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[284:276] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[286:285] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[293:287] | Yes | Yes | *T170,*T171,*T97 | Yes | T179,T154,T180 | OUTPUT | |
otp_lc_data_o.state[294] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[302:295] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.state[303] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[308:304] | Yes | Yes | *T45,*T123,*T42 | Yes | T123,T42,T105 | OUTPUT | |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[315:310] | Yes | Yes | *T1,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[316] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:317] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T1,T46,T62 | Yes | T1,T46,T62 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T7,T105,T178 | Yes | T123,T7,T125 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T2,T4,T88 | Yes | T6,T7,T42 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T7,T105,T178 | Yes | T123,T7,T125 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T116 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T44,T45,T7 | Yes | T44,T45,T7 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T98,T184,T185 | Yes | T98,T184,T185 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T93,T186,T187 | Yes | T93,T186,T187 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T44,T45,T7 | Yes | T44,T45,T7 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T98,T184,T185 | Yes | T98,T184,T185 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T93,T187,T188 | Yes | T93,T187,T188 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T44,T7,T189 | Yes | T44,T7,T189 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T44 | Yes | T1,T2,T44 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T44,T7,T189 | Yes | T44,T7,T189 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T5,T123,T42 | Yes | T44,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[5:0] | Yes | Yes | *T178,*T190,*T1 | Yes | T178,T190,T1 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[6] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[17:7] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[18] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[39:19] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[40] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[75:41] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[76] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[159:77] | Yes | Yes | *T178,*T186,*T191 | Yes | T178,T186,T191 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[160] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:161] | Yes | Yes | T178,T190,T192 | Yes | T178,T190,T192 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T6,T42,T62 | Yes | T2,T44,T45 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[0] | No | No | Yes | T193,T194,T195 | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[41:1] | Yes | Yes | *T44,*T45,*T7 | Yes | T7,T42,T43 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[42] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[50:43] | Yes | Yes | *T44,*T45,*T7 | Yes | T7,T42,T43 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[51] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:52] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T6 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T1,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |