SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.40 | 84.40 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 84.59 | 84.59 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.59 | 84.59 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.59 | 84.59 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9294 | 84.40 |
Total Bits 0->1 | 5506 | 4655 | 84.54 |
Total Bits 1->0 | 5506 | 4639 | 84.25 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9294 | 84.40 |
Port Bits 0->1 | 5506 | 4655 | 84.54 |
Port Bits 1->0 | 5506 | 4639 | 84.25 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T129,T111,T113 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T45,*T46,*T79 | Yes | T45,T46,T79 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T46,T80,T81 | Yes | T46,T80,T81 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T45,*T63,*T150 | Yes | T45,T63,T150 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T45,*T151,*T152 | Yes | T45,T151,T152 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T45,*T46,*T79 | Yes | T45,T46,T79 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T46,T80,T81 | Yes | T46,T80,T81 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT |
intr_otp_error_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T83,T156,T48 | Yes | T83,T156,T48 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T29,T65,T44 | Yes | T29,T65,T44 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T83,T157,T158 | Yes | T83,T157,T158 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T83,T158,T84 | Yes | T83,T84,T159 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T83,T84,T159 | Yes | T83,T158,T84 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T83,T160,T48 | Yes | T83,T160,T48 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T83,T48,T84 | Yes | T83,T48,T84 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T83,T156,T48 | Yes | T83,T156,T48 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T29,T65,T44 | Yes | T29,T65,T44 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T83,T157,T158 | Yes | T83,T157,T158 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T83,T160,T48 | Yes | T83,T160,T48 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T83,T48,T84 | Yes | T83,T48,T84 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[1:0] | Yes | Yes | T161 | Yes | T162,T163,T161 | INPUT |
lc_otp_vendor_test_i.ctrl[4:2] | No | No | Yes | T162,T163,T164 | INPUT | |
lc_otp_vendor_test_i.ctrl[8:5] | Yes | Yes | T161 | Yes | T162,T161,T164 | INPUT |
lc_otp_vendor_test_i.ctrl[9] | No | No | Yes | T162,T163,T164 | INPUT | |
lc_otp_vendor_test_i.ctrl[10] | Yes | Yes | *T161 | Yes | T163,T161 | INPUT |
lc_otp_vendor_test_i.ctrl[11] | No | No | Yes | T163 | INPUT | |
lc_otp_vendor_test_i.ctrl[12] | Yes | Yes | *T161 | Yes | T164,T161 | INPUT |
lc_otp_vendor_test_i.ctrl[13] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[14] | No | No | Yes | T164 | INPUT | |
lc_otp_vendor_test_i.ctrl[16:15] | Yes | Yes | T161 | Yes | T162,T161,T164 | INPUT |
lc_otp_vendor_test_i.ctrl[17] | No | No | Yes | T162,T164 | INPUT | |
lc_otp_vendor_test_i.ctrl[18] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[19] | No | No | Yes | T162,T163,T164 | INPUT | |
lc_otp_vendor_test_i.ctrl[22:20] | Yes | Yes | T161 | Yes | T163,T164,T161 | INPUT |
lc_otp_vendor_test_i.ctrl[23] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[27:24] | No | No | Yes | T162,T163,T164 | INPUT | |
lc_otp_vendor_test_i.ctrl[28] | Yes | Yes | *T161 | Yes | T164,T161 | INPUT |
lc_otp_vendor_test_i.ctrl[30:29] | No | No | Yes | T162,T163,T164 | INPUT | |
lc_otp_vendor_test_i.ctrl[31] | Yes | Yes | T161 | Yes | T162,T163,T161 | INPUT |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[2:0] | Yes | Yes | T45,T118,T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[3] | No | No | No | INPUT | ||
lc_otp_program_i.count[6:4] | Yes | Yes | T45,T156,T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[7] | No | No | No | INPUT | ||
lc_otp_program_i.count[9:8] | Yes | Yes | T45,T156,T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[11:10] | No | No | No | INPUT | ||
lc_otp_program_i.count[14:12] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[17:15] | No | No | No | INPUT | ||
lc_otp_program_i.count[20:18] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[21] | No | No | No | INPUT | ||
lc_otp_program_i.count[35:22] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.count[36] | No | No | No | INPUT | ||
lc_otp_program_i.count[45:37] | Yes | Yes | T45,T118,T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[46] | No | No | No | INPUT | ||
lc_otp_program_i.count[50:47] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[51] | No | No | No | INPUT | ||
lc_otp_program_i.count[64:52] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[65] | No | No | No | INPUT | ||
lc_otp_program_i.count[78:66] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[79] | No | No | No | INPUT | ||
lc_otp_program_i.count[92:80] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.count[94:93] | No | No | No | INPUT | ||
lc_otp_program_i.count[99:95] | Yes | Yes | T45,T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[100] | No | No | No | INPUT | ||
lc_otp_program_i.count[101] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[102] | No | No | No | INPUT | ||
lc_otp_program_i.count[105:103] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[106] | No | No | No | INPUT | ||
lc_otp_program_i.count[109:107] | Yes | Yes | T45,T156,T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[111:110] | No | No | No | INPUT | ||
lc_otp_program_i.count[114:112] | Yes | Yes | T45,*T168,*T152 | Yes | T45,T41,T156 | INPUT |
lc_otp_program_i.count[115] | No | No | No | INPUT | ||
lc_otp_program_i.count[117:116] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T41,T156 | INPUT |
lc_otp_program_i.count[118] | No | No | No | INPUT | ||
lc_otp_program_i.count[120:119] | Yes | Yes | *T45,T156,T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[121] | No | No | No | INPUT | ||
lc_otp_program_i.count[126:122] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T41,T42 | INPUT |
lc_otp_program_i.count[127] | No | No | No | INPUT | ||
lc_otp_program_i.count[135:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT |
lc_otp_program_i.count[136] | No | No | No | INPUT | ||
lc_otp_program_i.count[140:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT |
lc_otp_program_i.count[141] | No | No | No | INPUT | ||
lc_otp_program_i.count[148:142] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[150:149] | No | No | No | INPUT | ||
lc_otp_program_i.count[163:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT |
lc_otp_program_i.count[164] | No | No | No | INPUT | ||
lc_otp_program_i.count[167:165] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.count[168] | No | No | No | INPUT | ||
lc_otp_program_i.count[175:169] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[177:176] | No | No | No | INPUT | ||
lc_otp_program_i.count[182:178] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT |
lc_otp_program_i.count[183] | No | No | No | INPUT | ||
lc_otp_program_i.count[185:184] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[186] | No | No | No | INPUT | ||
lc_otp_program_i.count[191:187] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[192] | No | No | No | INPUT | ||
lc_otp_program_i.count[194:193] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[195] | No | No | No | INPUT | ||
lc_otp_program_i.count[197:196] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[198] | No | No | No | INPUT | ||
lc_otp_program_i.count[207:199] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT |
lc_otp_program_i.count[208] | No | No | No | INPUT | ||
lc_otp_program_i.count[220:209] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[221] | No | No | No | INPUT | ||
lc_otp_program_i.count[225:222] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.count[226] | No | No | No | INPUT | ||
lc_otp_program_i.count[228:227] | Yes | Yes | T156,T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.count[229] | No | No | No | INPUT | ||
lc_otp_program_i.count[240:230] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[244:241] | No | No | No | INPUT | ||
lc_otp_program_i.count[245] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[246] | No | No | No | INPUT | ||
lc_otp_program_i.count[252:247] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[253] | No | No | No | INPUT | ||
lc_otp_program_i.count[254] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[255] | No | No | No | INPUT | ||
lc_otp_program_i.count[262:256] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[263] | No | No | No | INPUT | ||
lc_otp_program_i.count[280:264] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT |
lc_otp_program_i.count[281] | No | No | No | INPUT | ||
lc_otp_program_i.count[290:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT |
lc_otp_program_i.count[291] | No | No | No | INPUT | ||
lc_otp_program_i.count[295:292] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[296] | No | No | No | INPUT | ||
lc_otp_program_i.count[300:297] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[302:301] | No | No | No | INPUT | ||
lc_otp_program_i.count[305:303] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[306] | No | No | No | INPUT | ||
lc_otp_program_i.count[318:307] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[319] | No | No | No | INPUT | ||
lc_otp_program_i.count[322:320] | Yes | Yes | *T45,T156,T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[323] | No | No | No | INPUT | ||
lc_otp_program_i.count[329:324] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT |
lc_otp_program_i.count[330] | No | No | No | INPUT | ||
lc_otp_program_i.count[337:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT |
lc_otp_program_i.count[338] | No | No | No | INPUT | ||
lc_otp_program_i.count[353:339] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.count[354] | No | No | No | INPUT | ||
lc_otp_program_i.count[356:355] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | INPUT |
lc_otp_program_i.count[357] | No | No | No | INPUT | ||
lc_otp_program_i.count[363:358] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.count[364] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:365] | Yes | Yes | T45,T118,T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[21:0] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[22] | No | No | No | INPUT | ||
lc_otp_program_i.state[24:23] | Yes | Yes | T45,T118,T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[25] | No | No | No | INPUT | ||
lc_otp_program_i.state[26] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T42,T119 | INPUT |
lc_otp_program_i.state[27] | No | No | No | INPUT | ||
lc_otp_program_i.state[29:28] | Yes | Yes | T45,T168,T152 | Yes | T45,T42,T119 | INPUT |
lc_otp_program_i.state[30] | No | No | No | INPUT | ||
lc_otp_program_i.state[44:31] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[45] | No | No | No | INPUT | ||
lc_otp_program_i.state[49:46] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.state[51:50] | No | No | No | INPUT | ||
lc_otp_program_i.state[60:52] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[62:61] | No | No | No | INPUT | ||
lc_otp_program_i.state[73:63] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[74] | No | No | No | INPUT | ||
lc_otp_program_i.state[77:75] | Yes | Yes | T45,T168,T152 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[78] | No | No | No | INPUT | ||
lc_otp_program_i.state[83:79] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.state[84] | No | No | No | INPUT | ||
lc_otp_program_i.state[86:85] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[87] | No | No | No | INPUT | ||
lc_otp_program_i.state[90:88] | Yes | Yes | T45,*T168,*T152 | Yes | T45,T42,T119 | INPUT |
lc_otp_program_i.state[91] | No | No | No | INPUT | ||
lc_otp_program_i.state[97:92] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[98] | No | No | No | INPUT | ||
lc_otp_program_i.state[104:99] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.state[106:105] | No | No | No | INPUT | ||
lc_otp_program_i.state[116:107] | Yes | Yes | T45,*T168,*T152 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[117] | No | No | No | INPUT | ||
lc_otp_program_i.state[121:118] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[122] | No | No | No | INPUT | ||
lc_otp_program_i.state[125:123] | Yes | Yes | *T45,T156,T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[126] | No | No | No | INPUT | ||
lc_otp_program_i.state[136:127] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[137] | No | No | No | INPUT | ||
lc_otp_program_i.state[138] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[139] | No | No | No | INPUT | ||
lc_otp_program_i.state[148:140] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.state[149] | No | No | No | INPUT | ||
lc_otp_program_i.state[158:150] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[159] | No | No | No | INPUT | ||
lc_otp_program_i.state[167:160] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.state[168] | No | No | No | INPUT | ||
lc_otp_program_i.state[176:169] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.state[177] | No | No | No | INPUT | ||
lc_otp_program_i.state[185:178] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[186] | No | No | No | INPUT | ||
lc_otp_program_i.state[188:187] | Yes | Yes | T45,T118,T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[189] | No | No | No | INPUT | ||
lc_otp_program_i.state[194:190] | Yes | Yes | T45,T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[195] | No | No | No | INPUT | ||
lc_otp_program_i.state[209:196] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.state[210] | No | No | No | INPUT | ||
lc_otp_program_i.state[217:211] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[219:218] | No | No | No | INPUT | ||
lc_otp_program_i.state[220] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[221] | No | No | No | INPUT | ||
lc_otp_program_i.state[222] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[224:223] | No | No | No | INPUT | ||
lc_otp_program_i.state[226:225] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.state[227] | No | No | No | INPUT | ||
lc_otp_program_i.state[230:228] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[231] | No | No | No | INPUT | ||
lc_otp_program_i.state[238:232] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[239] | No | No | No | INPUT | ||
lc_otp_program_i.state[246:240] | Yes | Yes | T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.state[247] | No | No | No | INPUT | ||
lc_otp_program_i.state[252:248] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT |
lc_otp_program_i.state[253] | No | No | No | INPUT | ||
lc_otp_program_i.state[259:254] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T63,T41 | INPUT |
lc_otp_program_i.state[260] | No | No | No | INPUT | ||
lc_otp_program_i.state[261] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T63,T64 | INPUT |
lc_otp_program_i.state[262] | No | No | No | INPUT | ||
lc_otp_program_i.state[264:263] | Yes | Yes | T45,*T168,*T152 | Yes | T45,T63,T64 | INPUT |
lc_otp_program_i.state[265] | No | No | No | INPUT | ||
lc_otp_program_i.state[280:266] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[283:281] | No | No | No | INPUT | ||
lc_otp_program_i.state[294:284] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[295] | No | No | No | INPUT | ||
lc_otp_program_i.state[305:296] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.state[306] | No | No | No | INPUT | ||
lc_otp_program_i.state[315:307] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT |
lc_otp_program_i.state[316] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:317] | Yes | Yes | T45,T156,T166 | Yes | T45,T156,T166 | INPUT |
lc_otp_program_i.req | Yes | Yes | T45,T63,T64 | Yes | T45,T63,T64 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T45,T63,T64 | Yes | T45,T63,T64 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T169,T170,T171 | Yes | T169,T170,T171 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T29,T65,T44 | Yes | T29,T65,T44 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T45,T63,T64 | Yes | T45,T63,T64 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T2,T29,T47 | Yes | T2,T29,T47 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T172,T173,T174 | Yes | T151,T130,T175 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T3,T86 | Yes | T47,T6,T44 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T62,T86 | Yes | T62,T29,T30 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T172,T173,T174 | Yes | T151,T130,T175 | OUTPUT |
otp_lc_data_o.count[2:0] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[3] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[6:4] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[7] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[9:8] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[11:10] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[14:12] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[17:15] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[20:18] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[21] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[35:22] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.count[36] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[45:37] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[46] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[50:47] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[51] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[64:52] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[65] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[78:66] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[79] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[92:80] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.count[94:93] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[99:95] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[100] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[101] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[102] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[105:103] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[106] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[109:107] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[111:110] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[114:112] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[115] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[117:116] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[118] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[120:119] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[126:122] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T41,T42 | OUTPUT |
otp_lc_data_o.count[127] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[135:128] | Yes | Yes | *T63,*T64,*T119 | Yes | T63,T64,T172 | OUTPUT |
otp_lc_data_o.count[136] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[140:137] | Yes | Yes | *T63,*T64,*T119 | Yes | T63,T64,T172 | OUTPUT |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[148:142] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[150:149] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[163:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.count[164] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[167:165] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.count[168] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[175:169] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[177:176] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[182:178] | Yes | Yes | *T64,*T119,*T177 | Yes | T64,T119,T177 | OUTPUT |
otp_lc_data_o.count[183] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[185:184] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[186] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[191:187] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[192] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[194:193] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[195] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[197:196] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[198] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[207:199] | Yes | Yes | *T64,*T119,*T177 | Yes | T64,T119,T177 | OUTPUT |
otp_lc_data_o.count[208] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[220:209] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[221] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[225:222] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[228:227] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.count[229] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[240:230] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[244:241] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[245] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[246] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[252:247] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[253] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[254] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[262:256] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[280:264] | Yes | Yes | *T64,*T119,*T177 | Yes | T64,T119,T177 | OUTPUT |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[290:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.count[291] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[295:292] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[296] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[300:297] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[302:301] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[305:303] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[306] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[318:307] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[319] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[322:320] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[329:324] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.count[330] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[337:331] | Yes | Yes | *T64,*T119,*T177 | Yes | T64,T119,T177 | OUTPUT |
otp_lc_data_o.count[338] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[353:339] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[356:355] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.count[357] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[363:358] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[364] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:365] | Yes | Yes | T45,T118,T165 | Yes | T45,T173,T176 | OUTPUT |
otp_lc_data_o.state[21:0] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[24:23] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[25] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[26] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T42,T119 | OUTPUT |
otp_lc_data_o.state[27] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[29:28] | Yes | Yes | T45,T168,T152 | Yes | T45,T42,T119 | OUTPUT |
otp_lc_data_o.state[30] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[44:31] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[45] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[49:46] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.state[51:50] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[60:52] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[62:61] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[73:63] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[74] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[77:75] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[78] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[83:79] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.state[84] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[86:85] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[87] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[90:88] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T42,T119 | OUTPUT |
otp_lc_data_o.state[91] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[97:92] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[98] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[104:99] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.state[106:105] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[116:107] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[117] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[121:118] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[122] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[125:123] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[126] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[136:127] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[138] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[139] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[148:140] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[158:150] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[159] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[167:160] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.state[168] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[176:169] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.state[177] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[185:178] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[186] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[188:187] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[194:190] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[195] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[209:196] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.state[210] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[217:211] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[219:218] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[220] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[221] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[222] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[224:223] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[226:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[230:228] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[231] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[238:232] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[239] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[246:240] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.state[247] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[252:248] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[259:254] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T63,T41 | OUTPUT |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[261] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[262] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[264:263] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[265] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[280:266] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[283:281] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[294:284] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[295] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[305:296] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[306] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[315:307] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT |
otp_lc_data_o.state[316] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:317] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T29,T65,T44 | Yes | T29,T65,T44 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T172,T173,T174 | Yes | T151,T130,T175 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T172,T173,T174 | Yes | T151,T130,T175 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T2,T29,T47 | Yes | T2,T86,T88 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T43,T40,T41 | Yes | T45,T43,T40 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T178,T179,T180 | Yes | T178,T179,T180 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T181,T182,T183 | Yes | T181,T182,T183 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T43,T40,T41 | Yes | T43,T40,T41 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T178,T179,T180 | Yes | T178,T179,T180 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T181,T183,T184 | Yes | T181,T183,T184 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T129,T43,T97 | Yes | T129,T43,T97 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T129,T43,T97 | Yes | T129,T43,T97 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T47,T6,T44 | Yes | T87,T47,T82 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[11:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[12] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[13] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[14] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[17:15] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[18] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[24:19] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[25] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[30:26] | Yes | Yes | *T172,*T182,*T185 | Yes | T172,T182,T185 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[31] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[36:32] | Yes | Yes | *T172,*T186,*T1 | Yes | T172,T186,T2 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[37] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[48:38] | Yes | Yes | *T172,*T187,*T186 | Yes | T172,T187,T186 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[49] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[55:50] | Yes | Yes | *T182,*T185,*T188 | Yes | T182,T185,T188 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[56] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[75:57] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[76] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[135:77] | Yes | Yes | *T172,*T187,*T182 | Yes | T172,T187,T182 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[136] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[141:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[142] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[183:143] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[184] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[226:185] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[227] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[237:228] | Yes | Yes | *T187,*T186,*T1 | Yes | T187,T186,T2 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[238] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[245:239] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[246] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:247] | Yes | Yes | T172,T187,T186 | Yes | T172,T187,T186 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T2,T62,T87 | Yes | T2,T62,T47 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T7,T8,T9 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9293 | 84.59 |
Total Bits 0->1 | 5493 | 4654 | 84.73 |
Total Bits 1->0 | 5493 | 4639 | 84.45 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9293 | 84.59 |
Port Bits 0->1 | 5493 | 4654 | 84.73 |
Port Bits 1->0 | 5493 | 4639 | 84.45 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T129,T111,T113 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T45,*T46,*T79 | Yes | T45,T46,T79 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T46,T80,T81 | Yes | T46,T80,T81 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T45,*T63,*T150 | Yes | T45,T63,T150 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T45,*T151,*T152 | Yes | T45,T151,T152 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T45,*T46,*T79 | Yes | T45,T46,T79 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T46,T80,T81 | Yes | T46,T80,T81 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T153,T154,T155 | Yes | T153,T154,T155 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T83,T156,T48 | Yes | T83,T156,T48 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T29,T65,T44 | Yes | T29,T65,T44 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T83,T157,T158 | Yes | T83,T157,T158 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T83,T158,T84 | Yes | T83,T84,T159 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T83,T84,T159 | Yes | T83,T158,T84 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T83,T160,T48 | Yes | T83,T160,T48 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T83,T48,T84 | Yes | T83,T48,T84 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T83,T156,T48 | Yes | T83,T156,T48 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T29,T65,T44 | Yes | T29,T65,T44 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T83,T157,T158 | Yes | T83,T157,T158 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T83,T160,T48 | Yes | T83,T160,T48 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T83,T48,T84 | Yes | T83,T48,T84 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[1:0] | Yes | Yes | T161 | Yes | T162,T163,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[4:2] | No | No | Yes | T162,T163,T164 | INPUT | ||
lc_otp_vendor_test_i.ctrl[8:5] | Yes | Yes | T161 | Yes | T162,T161,T164 | INPUT | |
lc_otp_vendor_test_i.ctrl[9] | No | No | Yes | T162,T163,T164 | INPUT | ||
lc_otp_vendor_test_i.ctrl[10] | Yes | Yes | *T161 | Yes | T163,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[11] | No | No | Yes | T163 | INPUT | ||
lc_otp_vendor_test_i.ctrl[12] | Yes | Yes | *T161 | Yes | T164,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[13] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[14] | No | No | Yes | T164 | INPUT | ||
lc_otp_vendor_test_i.ctrl[16:15] | Yes | Yes | T161 | Yes | T162,T161,T164 | INPUT | |
lc_otp_vendor_test_i.ctrl[17] | No | No | Yes | T162,T164 | INPUT | ||
lc_otp_vendor_test_i.ctrl[18] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[19] | No | No | Yes | T162,T163,T164 | INPUT | ||
lc_otp_vendor_test_i.ctrl[22:20] | Yes | Yes | T161 | Yes | T163,T164,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[23] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[27:24] | No | No | Yes | T162,T163,T164 | INPUT | ||
lc_otp_vendor_test_i.ctrl[28] | Yes | Yes | *T161 | Yes | T164,T161 | INPUT | |
lc_otp_vendor_test_i.ctrl[30:29] | No | No | Yes | T162,T163,T164 | INPUT | ||
lc_otp_vendor_test_i.ctrl[31] | Yes | Yes | T161 | Yes | T162,T163,T161 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[2:0] | Yes | Yes | T45,T118,T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[3] | No | No | No | INPUT | |||
lc_otp_program_i.count[6:4] | Yes | Yes | T45,T156,T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[7] | No | No | No | INPUT | |||
lc_otp_program_i.count[9:8] | Yes | Yes | T45,T156,T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[11:10] | No | No | No | INPUT | |||
lc_otp_program_i.count[14:12] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[17:15] | No | No | No | INPUT | |||
lc_otp_program_i.count[20:18] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[21] | No | No | No | INPUT | |||
lc_otp_program_i.count[35:22] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.count[36] | No | No | No | INPUT | |||
lc_otp_program_i.count[45:37] | Yes | Yes | T45,T118,T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[46] | No | No | No | INPUT | |||
lc_otp_program_i.count[50:47] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[51] | No | No | No | INPUT | |||
lc_otp_program_i.count[64:52] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[65] | No | No | No | INPUT | |||
lc_otp_program_i.count[78:66] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[79] | No | No | No | INPUT | |||
lc_otp_program_i.count[92:80] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.count[94:93] | No | No | No | INPUT | |||
lc_otp_program_i.count[99:95] | Yes | Yes | T45,T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[100] | No | No | No | INPUT | |||
lc_otp_program_i.count[101] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[102] | No | No | No | INPUT | |||
lc_otp_program_i.count[105:103] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[106] | No | No | No | INPUT | |||
lc_otp_program_i.count[109:107] | Yes | Yes | T45,T156,T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[111:110] | No | No | No | INPUT | |||
lc_otp_program_i.count[114:112] | Yes | Yes | T45,*T168,*T152 | Yes | T45,T41,T156 | INPUT | |
lc_otp_program_i.count[115] | No | No | No | INPUT | |||
lc_otp_program_i.count[117:116] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T41,T156 | INPUT | |
lc_otp_program_i.count[118] | No | No | No | INPUT | |||
lc_otp_program_i.count[120:119] | Yes | Yes | *T45,T156,T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[121] | No | No | No | INPUT | |||
lc_otp_program_i.count[126:122] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T41,T42 | INPUT | |
lc_otp_program_i.count[127] | No | No | No | INPUT | |||
lc_otp_program_i.count[135:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT | |
lc_otp_program_i.count[136] | No | No | No | INPUT | |||
lc_otp_program_i.count[140:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT | |
lc_otp_program_i.count[141] | No | No | No | INPUT | |||
lc_otp_program_i.count[148:142] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[150:149] | No | No | No | INPUT | |||
lc_otp_program_i.count[163:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT | |
lc_otp_program_i.count[164] | No | No | No | INPUT | |||
lc_otp_program_i.count[167:165] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.count[168] | No | No | No | INPUT | |||
lc_otp_program_i.count[175:169] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[177:176] | No | No | No | INPUT | |||
lc_otp_program_i.count[182:178] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT | |
lc_otp_program_i.count[183] | No | No | No | INPUT | |||
lc_otp_program_i.count[185:184] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[186] | No | No | No | INPUT | |||
lc_otp_program_i.count[191:187] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[192] | No | No | No | INPUT | |||
lc_otp_program_i.count[194:193] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[195] | No | No | No | INPUT | |||
lc_otp_program_i.count[197:196] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[198] | No | No | No | INPUT | |||
lc_otp_program_i.count[207:199] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT | |
lc_otp_program_i.count[208] | No | No | No | INPUT | |||
lc_otp_program_i.count[220:209] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[221] | No | No | No | INPUT | |||
lc_otp_program_i.count[225:222] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.count[226] | No | No | No | INPUT | |||
lc_otp_program_i.count[228:227] | Yes | Yes | T156,T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.count[229] | No | No | No | INPUT | |||
lc_otp_program_i.count[240:230] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[244:241] | No | No | No | INPUT | |||
lc_otp_program_i.count[245] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[246] | No | No | No | INPUT | |||
lc_otp_program_i.count[252:247] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[253] | No | No | No | INPUT | |||
lc_otp_program_i.count[254] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[255] | No | No | No | INPUT | |||
lc_otp_program_i.count[262:256] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[263] | No | No | No | INPUT | |||
lc_otp_program_i.count[280:264] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT | |
lc_otp_program_i.count[281] | No | No | No | INPUT | |||
lc_otp_program_i.count[290:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT | |
lc_otp_program_i.count[291] | No | No | No | INPUT | |||
lc_otp_program_i.count[295:292] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[296] | No | No | No | INPUT | |||
lc_otp_program_i.count[300:297] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[302:301] | No | No | No | INPUT | |||
lc_otp_program_i.count[305:303] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[306] | No | No | No | INPUT | |||
lc_otp_program_i.count[318:307] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[319] | No | No | No | INPUT | |||
lc_otp_program_i.count[322:320] | Yes | Yes | *T45,T156,T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[323] | No | No | No | INPUT | |||
lc_otp_program_i.count[329:324] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT | |
lc_otp_program_i.count[330] | No | No | No | INPUT | |||
lc_otp_program_i.count[337:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | INPUT | |
lc_otp_program_i.count[338] | No | No | No | INPUT | |||
lc_otp_program_i.count[353:339] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.count[354] | No | No | No | INPUT | |||
lc_otp_program_i.count[356:355] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | INPUT | |
lc_otp_program_i.count[357] | No | No | No | INPUT | |||
lc_otp_program_i.count[363:358] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.count[364] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:365] | Yes | Yes | T45,T118,T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[21:0] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[22] | No | No | No | INPUT | |||
lc_otp_program_i.state[24:23] | Yes | Yes | T45,T118,T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[25] | No | No | No | INPUT | |||
lc_otp_program_i.state[26] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T42,T119 | INPUT | |
lc_otp_program_i.state[27] | No | No | No | INPUT | |||
lc_otp_program_i.state[29:28] | Yes | Yes | T45,T168,T152 | Yes | T45,T42,T119 | INPUT | |
lc_otp_program_i.state[30] | No | No | No | INPUT | |||
lc_otp_program_i.state[44:31] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[45] | No | No | No | INPUT | |||
lc_otp_program_i.state[49:46] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.state[51:50] | No | No | No | INPUT | |||
lc_otp_program_i.state[60:52] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[62:61] | No | No | No | INPUT | |||
lc_otp_program_i.state[73:63] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[74] | No | No | No | INPUT | |||
lc_otp_program_i.state[77:75] | Yes | Yes | T45,T168,T152 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[78] | No | No | No | INPUT | |||
lc_otp_program_i.state[83:79] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.state[84] | No | No | No | INPUT | |||
lc_otp_program_i.state[86:85] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[87] | No | No | No | INPUT | |||
lc_otp_program_i.state[90:88] | Yes | Yes | T45,*T168,*T152 | Yes | T45,T42,T119 | INPUT | |
lc_otp_program_i.state[91] | No | No | No | INPUT | |||
lc_otp_program_i.state[97:92] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[98] | No | No | No | INPUT | |||
lc_otp_program_i.state[104:99] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.state[106:105] | No | No | No | INPUT | |||
lc_otp_program_i.state[116:107] | Yes | Yes | T45,*T168,*T152 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[117] | No | No | No | INPUT | |||
lc_otp_program_i.state[121:118] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[122] | No | No | No | INPUT | |||
lc_otp_program_i.state[125:123] | Yes | Yes | *T45,T156,T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[126] | No | No | No | INPUT | |||
lc_otp_program_i.state[136:127] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[137] | No | No | No | INPUT | |||
lc_otp_program_i.state[138] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[139] | No | No | No | INPUT | |||
lc_otp_program_i.state[148:140] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.state[149] | No | No | No | INPUT | |||
lc_otp_program_i.state[158:150] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[159] | No | No | No | INPUT | |||
lc_otp_program_i.state[167:160] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.state[168] | No | No | No | INPUT | |||
lc_otp_program_i.state[176:169] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.state[177] | No | No | No | INPUT | |||
lc_otp_program_i.state[185:178] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[186] | No | No | No | INPUT | |||
lc_otp_program_i.state[188:187] | Yes | Yes | T45,T118,T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[189] | No | No | No | INPUT | |||
lc_otp_program_i.state[194:190] | Yes | Yes | T45,T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[195] | No | No | No | INPUT | |||
lc_otp_program_i.state[209:196] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.state[210] | No | No | No | INPUT | |||
lc_otp_program_i.state[217:211] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[219:218] | No | No | No | INPUT | |||
lc_otp_program_i.state[220] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[221] | No | No | No | INPUT | |||
lc_otp_program_i.state[222] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[224:223] | No | No | No | INPUT | |||
lc_otp_program_i.state[226:225] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.state[227] | No | No | No | INPUT | |||
lc_otp_program_i.state[230:228] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[231] | No | No | No | INPUT | |||
lc_otp_program_i.state[238:232] | Yes | Yes | T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[239] | No | No | No | INPUT | |||
lc_otp_program_i.state[246:240] | Yes | Yes | T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.state[247] | No | No | No | INPUT | |||
lc_otp_program_i.state[252:248] | Yes | Yes | *T156,*T166,*T167 | Yes | T156,T166,T167 | INPUT | |
lc_otp_program_i.state[253] | No | No | No | INPUT | |||
lc_otp_program_i.state[259:254] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T63,T41 | INPUT | |
lc_otp_program_i.state[260] | No | No | No | INPUT | |||
lc_otp_program_i.state[261] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T63,T64 | INPUT | |
lc_otp_program_i.state[262] | No | No | No | INPUT | |||
lc_otp_program_i.state[264:263] | Yes | Yes | T45,*T168,*T152 | Yes | T45,T63,T64 | INPUT | |
lc_otp_program_i.state[265] | No | No | No | INPUT | |||
lc_otp_program_i.state[280:266] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[283:281] | No | No | No | INPUT | |||
lc_otp_program_i.state[294:284] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[295] | No | No | No | INPUT | |||
lc_otp_program_i.state[305:296] | Yes | Yes | *T45,*T156,*T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.state[306] | No | No | No | INPUT | |||
lc_otp_program_i.state[315:307] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T118,T165 | INPUT | |
lc_otp_program_i.state[316] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:317] | Yes | Yes | T45,T156,T166 | Yes | T45,T156,T166 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T45,T63,T64 | Yes | T45,T63,T64 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T45,T63,T64 | Yes | T45,T63,T64 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T169,T170,T171 | Yes | T169,T170,T171 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T29,T65,T44 | Yes | T29,T65,T44 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T45,T63,T64 | Yes | T45,T63,T64 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T2,T29,T47 | Yes | T2,T29,T47 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T172,T173,T174 | Yes | T151,T130,T175 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T3,T86 | Yes | T47,T6,T44 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T62,T86 | Yes | T62,T29,T30 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T172,T173,T174 | Yes | T151,T130,T175 | OUTPUT | |
otp_lc_data_o.count[2:0] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[3] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[6:4] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[7] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[9:8] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[11:10] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[14:12] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[17:15] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[20:18] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[21] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[35:22] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.count[36] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[45:37] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[46] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[50:47] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[51] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[64:52] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[65] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[78:66] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[79] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[92:80] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.count[94:93] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[99:95] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[100] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[101] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[102] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[105:103] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[106] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[109:107] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[111:110] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[114:112] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[115] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[117:116] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[118] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[120:119] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[126:122] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T41,T42 | OUTPUT | |
otp_lc_data_o.count[127] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[135:128] | Yes | Yes | *T63,*T64,*T119 | Yes | T63,T64,T172 | OUTPUT | |
otp_lc_data_o.count[136] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[140:137] | Yes | Yes | *T63,*T64,*T119 | Yes | T63,T64,T172 | OUTPUT | |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[148:142] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[150:149] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[163:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.count[164] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[167:165] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.count[168] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[175:169] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[177:176] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[182:178] | Yes | Yes | *T64,*T119,*T177 | Yes | T64,T119,T177 | OUTPUT | |
otp_lc_data_o.count[183] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[185:184] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[186] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[191:187] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[192] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[194:193] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[195] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[197:196] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[198] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[207:199] | Yes | Yes | *T64,*T119,*T177 | Yes | T64,T119,T177 | OUTPUT | |
otp_lc_data_o.count[208] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[220:209] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[221] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[225:222] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[228:227] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.count[229] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[240:230] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[244:241] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[245] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[246] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[252:247] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[253] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[254] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[262:256] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[280:264] | Yes | Yes | *T64,*T119,*T177 | Yes | T64,T119,T177 | OUTPUT | |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[290:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.count[291] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[295:292] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[296] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[300:297] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[302:301] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[305:303] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[306] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[318:307] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[319] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[322:320] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[329:324] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.count[330] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[337:331] | Yes | Yes | *T64,*T119,*T177 | Yes | T64,T119,T177 | OUTPUT | |
otp_lc_data_o.count[338] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[353:339] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[356:355] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.count[357] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[363:358] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[364] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:365] | Yes | Yes | T45,T118,T165 | Yes | T45,T173,T176 | OUTPUT | |
otp_lc_data_o.state[21:0] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[24:23] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[25] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[26] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T42,T119 | OUTPUT | |
otp_lc_data_o.state[27] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[29:28] | Yes | Yes | T45,T168,T152 | Yes | T45,T42,T119 | OUTPUT | |
otp_lc_data_o.state[30] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[44:31] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[45] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[49:46] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.state[51:50] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[60:52] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[62:61] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[73:63] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[74] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[77:75] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[78] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[83:79] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.state[84] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[86:85] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[87] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[90:88] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T42,T119 | OUTPUT | |
otp_lc_data_o.state[91] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[97:92] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[98] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[104:99] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.state[106:105] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[116:107] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[117] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[121:118] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[122] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[125:123] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[126] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[136:127] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[138] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[139] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[148:140] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[158:150] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[159] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[167:160] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.state[168] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[176:169] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.state[177] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[185:178] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[186] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[188:187] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[194:190] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[195] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[209:196] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.state[210] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[217:211] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[219:218] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[220] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[221] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[222] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[224:223] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[226:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[230:228] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[231] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[238:232] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[239] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[246:240] | Yes | Yes | *T1,T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.state[247] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[252:248] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[259:254] | Yes | Yes | *T45,*T168,*T152 | Yes | T45,T63,T41 | OUTPUT | |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[261] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[262] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[264:263] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[265] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[280:266] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[283:281] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[294:284] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[295] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[305:296] | Yes | Yes | *T2,*T62,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[306] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[315:307] | Yes | Yes | *T45,*T118,*T165 | Yes | T45,T119,T173 | OUTPUT | |
otp_lc_data_o.state[316] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:317] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T29,T65,T44 | Yes | T29,T65,T44 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T172,T173,T174 | Yes | T151,T130,T175 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T172,T173,T174 | Yes | T151,T130,T175 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T2,T29,T47 | Yes | T2,T86,T88 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T43,T40,T41 | Yes | T45,T43,T40 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T178,T179,T180 | Yes | T178,T179,T180 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T181,T182,T183 | Yes | T181,T182,T183 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T43,T40,T41 | Yes | T43,T40,T41 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T178,T179,T180 | Yes | T178,T179,T180 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T181,T183,T184 | Yes | T181,T183,T184 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T129,T43,T97 | Yes | T129,T43,T97 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T2,T62 | Yes | T1,T2,T4 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T33 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T129,T43,T97 | Yes | T129,T43,T97 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T47,T6,T44 | Yes | T87,T47,T82 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[11:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[12] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[13] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[14] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[17:15] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[18] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[24:19] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[25] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[30:26] | Yes | Yes | *T172,*T182,*T185 | Yes | T172,T182,T185 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[31] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[36:32] | Yes | Yes | *T172,*T186,*T1 | Yes | T172,T186,T2 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[37] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[48:38] | Yes | Yes | *T172,*T187,*T186 | Yes | T172,T187,T186 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[49] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[55:50] | Yes | Yes | *T182,*T185,*T188 | Yes | T182,T185,T188 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[56] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[75:57] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[76] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[135:77] | Yes | Yes | *T172,*T187,*T182 | Yes | T172,T187,T182 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[136] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[141:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[142] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[183:143] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[184] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[226:185] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[227] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[237:228] | Yes | Yes | *T187,*T186,*T1 | Yes | T187,T186,T2 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[238] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[245:239] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[246] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:247] | Yes | Yes | T172,T187,T186 | Yes | T172,T187,T186 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T2,T62,T87 | Yes | T2,T62,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T62,T33 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T2,T62,T33 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |