| SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 | 
| NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| adc_ctrl_aon_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| aes_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| aes_recov_ctrl_update_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| aon_timer_aon_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| clkmgr_aon_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| clkmgr_aon_recov_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| csrng_fatal_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| csrng_recov_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| edn0_fatal_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| edn0_recov_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| edn1_fatal_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| edn1_recov_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| entropy_src_fatal_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| entropy_src_recov_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| flash_ctrl_fatal_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| flash_ctrl_fatal_prim_flash_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| flash_ctrl_fatal_std_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| flash_ctrl_recov_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| flash_ctrl_recov_prim_flash_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| gpio_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| hmac_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| i2c0_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| i2c1_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| i2c2_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| keymgr_fatal_fault_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| keymgr_recov_operation_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| kmac_fatal_fault_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| kmac_recov_operation_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| lc_ctrl_fatal_bus_integ_error | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| lc_ctrl_fatal_prog_error | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| lc_ctrl_fatal_state_error | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| otbn_fatal | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| otbn_recov | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| otp_ctrl_fatal_bus_integ_error | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| otp_ctrl_fatal_check_error | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| otp_ctrl_fatal_macro_error | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| otp_ctrl_fatal_prim_otp_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| otp_ctrl_recov_prim_otp_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| pattgen_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| pinmux_aon_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| pwm_aon_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| pwrmgr_aon_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| rom_ctrl_fatal | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| rstmgr_aon_fatal_cnsty_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| rstmgr_aon_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| rv_core_ibex_fatal_hw_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| rv_core_ibex_fatal_sw_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| rv_core_ibex_recov_hw_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| rv_core_ibex_recov_sw_err | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| rv_dm_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| rv_plic_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| rv_timer_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| sensor_ctrl_aon_fatal_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| sensor_ctrl_aon_recov_alert | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| spi_device_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| spi_host0_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| spi_host1_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| sram_ctrl_main_fatal_error | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| sram_ctrl_ret_aon_fatal_error | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| sysrst_ctrl_aon_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| uart0_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| uart1_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| uart2_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| uart3_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| usbdev_fatal_fault | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 1 | 0 | 1 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| triggered_cp | 1 | 0 | 1 | 100.00 | 100 | 1 | 1 | 2 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 4014 | 1 | T54 | 1 | T215 | 820 | T86 | 44 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 121464 | 1 | T4 | 601 | T54 | 1 | T6 | 46 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 196 | 1 | T54 | 1 | T86 | 37 | T60 | 1 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 3891 | 1 | T54 | 1 | T86 | 34 | T731 | 509 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 2659 | 1 | T54 | 1 | T86 | 33 | T340 | 808 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 832 | 1 | T54 | 1 | T86 | 33 | T373 | 103 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 3017 | 1 | T54 | 1 | T86 | 37 | T744 | 1122 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 186 | 1 | T54 | 1 | T258 | 1 | T86 | 35 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 3021 | 1 | T54 | 1 | T86 | 37 | T712 | 1088 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 197 | 1 | T54 | 1 | T258 | 1 | T86 | 37 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 4089 | 1 | T54 | 1 | T86 | 37 | T375 | 1107 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 190 | 1 | T54 | 1 | T86 | 37 | T163 | 30 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 4733 | 1 | T54 | 1 | T86 | 36 | T163 | 28 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 199 | 1 | T54 | 1 | T86 | 45 | T163 | 38 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 8595 | 1 | T54 | 1 | T194 | 1729 | T86 | 35 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 8631 | 1 | T54 | 1 | T86 | 33 | T374 | 1106 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 7094 | 1 | T54 | 1 | T107 | 1735 | T86 | 21 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 399 | 1 | T54 | 1 | T403 | 2 | T86 | 33 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 204 | 1 | T54 | 1 | T86 | 25 | T163 | 38 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 3692 | 1 | T54 | 1 | T86 | 30 | T163 | 36 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 2539 | 1 | T54 | 1 | T86 | 28 | T745 | 1134 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 5052 | 1 | T54 | 1 | T86 | 36 | T726 | 538 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 2851 | 1 | T54 | 1 | T86 | 44 | T728 | 503 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 3113 | 1 | T54 | 1 | T66 | 500 | T86 | 37 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 7053 | 1 | T54 | 1 | T86 | 38 | T163 | 37 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 171 | 1 | T54 | 1 | T86 | 38 | T163 | 23 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 123733 | 1 | T4 | 601 | T54 | 1 | T65 | 1157 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 189 | 1 | T54 | 1 | T86 | 32 | T163 | 31 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 2072 | 1 | T54 | 1 | T86 | 31 | T730 | 517 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 1918 | 1 | T54 | 1 | T86 | 36 | T173 | 564 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 7523 | 1 | T54 | 1 | T86 | 26 | T169 | 822 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 1398593 | 1 | T4 | 601 | T54 | 1 | T6 | 46 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 214 | 1 | T54 | 1 | T86 | 30 | T261 | 1 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 2876 | 1 | T54 | 1 | T86 | 36 | T163 | 42 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 55897 | 1 | T4 | 283 | T54 | 1 | T6 | 22 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 1027 | 1 | T54 | 1 | T86 | 34 | T163 | 37 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 2069 | 1 | T54 | 1 | T164 | 518 | T86 | 38 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 206 | 1 | T54 | 1 | T86 | 28 | T163 | 29 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 1019 | 1 | T54 | 1 | T86 | 32 | T163 | 32 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 4278 | 1 | T54 | 1 | T86 | 33 | T91 | 818 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 3934 | 1 | T54 | 1 | T86 | 33 | T734 | 530 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 10414 | 1 | T54 | 1 | T67 | 1 | T68 | 816 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 5925 | 1 | T54 | 1 | T86 | 36 | T60 | 1 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 4103 | 1 | T4 | 818 | T54 | 1 | T86 | 33 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 5799 | 1 | T54 | 1 | T735 | 518 | T86 | 37 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 40048 | 1 | T2 | 791 | T54 | 1 | T122 | 266 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 9932 | 1 | T54 | 1 | T86 | 31 | T331 | 1732 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 151 | 1 | T54 | 1 | T86 | 18 | T163 | 22 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 312 | 1 | T54 | 1 | T86 | 35 | T73 | 1 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 9225 | 1 | T86 | 30 | T705 | 1721 | T746 | 1730 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 6968 | 1 | T54 | 1 | T86 | 30 | T283 | 1731 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 1848 | 1 | T54 | 1 | T86 | 31 | T163 | 49 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 5538 | 1 | T54 | 1 | T105 | 161 | T86 | 25 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 33638 | 1 | T54 | 1 | T130 | 1010 | T105 | 106 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 2365 | 1 | T54 | 1 | T86 | 29 | T738 | 525 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 5833 | 1 | T54 | 1 | T86 | 32 | T747 | 1685 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 7409 | 1 | T54 | 1 | T86 | 44 | T292 | 1307 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 7074 | 1 | T54 | 1 | T86 | 40 | T217 | 1716 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 197 | 1 | T54 | 1 | T86 | 30 | T163 | 26 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 3684 | 1 | T54 | 1 | T86 | 23 | T330 | 815 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 3057 | 1 | T54 | 1 | T86 | 34 | T739 | 809 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 3154 | 1 | T54 | 1 | T86 | 26 | T740 | 812 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 1586 | 1 | T54 | 1 | T86 | 42 | T722 | 539 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 2073 | 1 | T54 | 1 | T86 | 25 | T742 | 817 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 1 | 0 | 1 | 100.00 | 
| NAME | COUNT | STATUS | 
| ignore | 0 | Excluded | 
| [auto[0]] | 0 | Excluded | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[1] | 1519 | 1 | T54 | 1 | T110 | 1319 | T86 | 24 | 
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |