SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.01 | 85.01 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl![]() |
85.20 | 85.20 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.20 | 85.20 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.20 | 85.20 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey![]() |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 141 | 85.98 |
Total Bits | 11012 | 9361 | 85.01 |
Total Bits 0->1 | 5506 | 4695 | 85.27 |
Total Bits 1->0 | 5506 | 4666 | 84.74 |
Ports | 164 | 141 | 85.98 |
Port Bits | 11012 | 9361 | 85.01 |
Port Bits 0->1 | 5506 | 4695 | 85.27 |
Port Bits 1->0 | 5506 | 4666 | 84.74 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T121,T155,T156 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T49,*T72,*T82 | Yes | T49,T72,T82 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T60,T83,T84 | Yes | T60,T83,T84 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T79,T81,T85 | Yes | T79,T80,T81 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T79,T81,T85 | Yes | T79,T81,T85 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T157,*T158,*T53 | Yes | T157,T158,T53 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T79,T81,T85 | Yes | T79,T81,T85 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T54,*T7,*T159 | Yes | T7,T159,T106 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T53,*T79,*T80 | Yes | T53,T79,T80 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T49,*T72,*T82 | Yes | T49,T72,T82 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T60,T83,T84 | Yes | T60,T83,T84 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T160,T161,T162 | Yes | T160,T161,T162 | OUTPUT |
intr_otp_error_o | Yes | Yes | T160,T161,T162 | Yes | T160,T161,T162 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T1,T4,T54 | Yes | T1,T4,T54 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T1,T86,T163 | Yes | T1,T86,T163 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T1,T86,T163 | Yes | T1,T86,T163 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T1,T54,T164 | Yes | T1,T54,T164 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T1,T86,T163 | Yes | T1,T86,T163 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T1,T86,T163 | Yes | T1,T86,T163 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T1,T4,T54 | Yes | T1,T4,T54 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T1,T54,T164 | Yes | T1,T54,T164 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T64,T130,T86 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[0] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[10:1] | No | No | Yes | T165,T166,T167 | INPUT | |
lc_otp_vendor_test_i.ctrl[11] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[13:12] | No | No | Yes | T165,T166,T167 | INPUT | |
lc_otp_vendor_test_i.ctrl[14] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[23:15] | No | No | Yes | T165,T166,T167 | INPUT | |
lc_otp_vendor_test_i.ctrl[24] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[30:25] | No | No | Yes | T167,T165,T166 | INPUT | |
lc_otp_vendor_test_i.ctrl[31] | No | No | No | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[1:0] | Yes | Yes | T50,T127,T168 | Yes | T50,T127,T168 | INPUT |
lc_otp_program_i.count[2] | No | No | No | INPUT | ||
lc_otp_program_i.count[5:3] | Yes | Yes | T50,*T169,T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[6] | No | No | No | INPUT | ||
lc_otp_program_i.count[20:7] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[21] | No | No | No | INPUT | ||
lc_otp_program_i.count[30:22] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[31] | No | No | No | INPUT | ||
lc_otp_program_i.count[32] | Yes | Yes | *T52,*T45,*T50 | Yes | T45,T50,T169 | INPUT |
lc_otp_program_i.count[33] | No | No | No | INPUT | ||
lc_otp_program_i.count[48:34] | Yes | Yes | *T52,*T45,*T50 | Yes | T45,T50,T127 | INPUT |
lc_otp_program_i.count[49] | No | No | No | INPUT | ||
lc_otp_program_i.count[59:50] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[60] | No | No | No | INPUT | ||
lc_otp_program_i.count[66:61] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[67] | No | No | No | INPUT | ||
lc_otp_program_i.count[83:68] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | INPUT |
lc_otp_program_i.count[84] | No | No | No | INPUT | ||
lc_otp_program_i.count[98:85] | Yes | Yes | *T48,*T52,*T45 | Yes | T45,T50,T9 | INPUT |
lc_otp_program_i.count[99] | No | No | No | INPUT | ||
lc_otp_program_i.count[109:100] | Yes | Yes | *T48,*T52,*T45 | Yes | T45,T50,T9 | INPUT |
lc_otp_program_i.count[110] | No | No | No | INPUT | ||
lc_otp_program_i.count[122:111] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[123] | No | No | No | INPUT | ||
lc_otp_program_i.count[126:124] | Yes | Yes | *T48,*T52,*T45 | Yes | T45,T50,T9 | INPUT |
lc_otp_program_i.count[128:127] | No | No | No | INPUT | ||
lc_otp_program_i.count[141:129] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT |
lc_otp_program_i.count[142] | No | No | No | INPUT | ||
lc_otp_program_i.count[155:143] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[156] | No | No | No | INPUT | ||
lc_otp_program_i.count[162:157] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[163] | No | No | No | INPUT | ||
lc_otp_program_i.count[169:164] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT |
lc_otp_program_i.count[170] | No | No | No | INPUT | ||
lc_otp_program_i.count[173:171] | Yes | Yes | T169,T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[174] | No | No | No | INPUT | ||
lc_otp_program_i.count[181:175] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[182] | No | No | No | INPUT | ||
lc_otp_program_i.count[186:183] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[187] | No | No | No | INPUT | ||
lc_otp_program_i.count[205:188] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | INPUT |
lc_otp_program_i.count[206] | No | No | No | INPUT | ||
lc_otp_program_i.count[212:207] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[213] | No | No | No | INPUT | ||
lc_otp_program_i.count[216:214] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT |
lc_otp_program_i.count[217] | No | No | No | INPUT | ||
lc_otp_program_i.count[222:218] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[223] | No | No | No | INPUT | ||
lc_otp_program_i.count[238:224] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[240:239] | No | No | No | INPUT | ||
lc_otp_program_i.count[245:241] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | INPUT |
lc_otp_program_i.count[246] | No | No | No | INPUT | ||
lc_otp_program_i.count[253:247] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | INPUT |
lc_otp_program_i.count[254] | No | No | No | INPUT | ||
lc_otp_program_i.count[259:255] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[260] | No | No | No | INPUT | ||
lc_otp_program_i.count[280:261] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[281] | No | No | No | INPUT | ||
lc_otp_program_i.count[284:282] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[285] | No | No | No | INPUT | ||
lc_otp_program_i.count[308:286] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[309] | No | No | No | INPUT | ||
lc_otp_program_i.count[312:310] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT |
lc_otp_program_i.count[313] | No | No | No | INPUT | ||
lc_otp_program_i.count[315:314] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.count[316] | No | No | No | INPUT | ||
lc_otp_program_i.count[329:317] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[330] | No | No | No | INPUT | ||
lc_otp_program_i.count[336:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT |
lc_otp_program_i.count[337] | No | No | No | INPUT | ||
lc_otp_program_i.count[350:338] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[353:351] | No | No | No | INPUT | ||
lc_otp_program_i.count[364:354] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[365] | No | No | No | INPUT | ||
lc_otp_program_i.count[366] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT |
lc_otp_program_i.count[367] | No | No | No | INPUT | ||
lc_otp_program_i.count[371:368] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[372] | No | No | No | INPUT | ||
lc_otp_program_i.count[374:373] | Yes | Yes | *T50,T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.count[375] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:376] | Yes | Yes | T50,T127,T168 | Yes | T50,T127,T168 | INPUT |
lc_otp_program_i.state[0] | No | No | No | INPUT | ||
lc_otp_program_i.state[5:1] | Yes | Yes | T50,T127,T172 | Yes | T50,T127,T172 | INPUT |
lc_otp_program_i.state[6] | No | No | No | INPUT | ||
lc_otp_program_i.state[10:7] | Yes | Yes | T50,*T169,T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.state[11] | No | No | No | INPUT | ||
lc_otp_program_i.state[26:12] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT |
lc_otp_program_i.state[27] | No | No | No | INPUT | ||
lc_otp_program_i.state[36:28] | Yes | Yes | T50,*T169,T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.state[37] | No | No | No | INPUT | ||
lc_otp_program_i.state[42:38] | Yes | Yes | *T52,*T45,*T50 | Yes | T45,T50,T127 | INPUT |
lc_otp_program_i.state[43] | No | No | No | INPUT | ||
lc_otp_program_i.state[47:44] | Yes | Yes | *T52,*T45,T50 | Yes | T45,T50,T169 | INPUT |
lc_otp_program_i.state[48] | No | No | No | INPUT | ||
lc_otp_program_i.state[54:49] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT |
lc_otp_program_i.state[55] | No | No | No | INPUT | ||
lc_otp_program_i.state[62:56] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT |
lc_otp_program_i.state[63] | No | No | No | INPUT | ||
lc_otp_program_i.state[68:64] | Yes | Yes | T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.state[69] | No | No | No | INPUT | ||
lc_otp_program_i.state[70] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT |
lc_otp_program_i.state[72:71] | No | No | No | INPUT | ||
lc_otp_program_i.state[80:73] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.state[81] | No | No | No | INPUT | ||
lc_otp_program_i.state[104:82] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT |
lc_otp_program_i.state[105] | No | No | No | INPUT | ||
lc_otp_program_i.state[108:106] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT |
lc_otp_program_i.state[109] | No | No | No | INPUT | ||
lc_otp_program_i.state[113:110] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.state[114] | No | No | No | INPUT | ||
lc_otp_program_i.state[117:115] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT |
lc_otp_program_i.state[118] | No | No | No | INPUT | ||
lc_otp_program_i.state[121:119] | Yes | Yes | T50,T127,T172 | Yes | T50,T127,T172 | INPUT |
lc_otp_program_i.state[123:122] | No | No | No | INPUT | ||
lc_otp_program_i.state[131:124] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT |
lc_otp_program_i.state[132] | No | No | No | INPUT | ||
lc_otp_program_i.state[137:133] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT |
lc_otp_program_i.state[138] | No | No | No | INPUT | ||
lc_otp_program_i.state[154:139] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.state[155] | No | No | No | INPUT | ||
lc_otp_program_i.state[162:156] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.state[163] | No | No | No | INPUT | ||
lc_otp_program_i.state[172:164] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT |
lc_otp_program_i.state[173] | No | No | No | INPUT | ||
lc_otp_program_i.state[187:174] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.state[188] | No | No | No | INPUT | ||
lc_otp_program_i.state[189] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT |
lc_otp_program_i.state[190] | No | No | No | INPUT | ||
lc_otp_program_i.state[196:191] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT |
lc_otp_program_i.state[197] | No | No | No | INPUT | ||
lc_otp_program_i.state[202:198] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT |
lc_otp_program_i.state[203] | No | No | No | INPUT | ||
lc_otp_program_i.state[214:204] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.state[215] | No | No | No | INPUT | ||
lc_otp_program_i.state[224:216] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT |
lc_otp_program_i.state[225] | No | No | No | INPUT | ||
lc_otp_program_i.state[231:226] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT |
lc_otp_program_i.state[234:232] | No | No | No | INPUT | ||
lc_otp_program_i.state[244:235] | Yes | Yes | T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.state[246:245] | No | No | No | INPUT | ||
lc_otp_program_i.state[252:247] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.state[253] | No | No | No | INPUT | ||
lc_otp_program_i.state[256:254] | Yes | Yes | T169,T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.state[258:257] | No | No | No | INPUT | ||
lc_otp_program_i.state[264:259] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT |
lc_otp_program_i.state[265] | No | No | No | INPUT | ||
lc_otp_program_i.state[266] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.state[267] | No | No | No | INPUT | ||
lc_otp_program_i.state[274:268] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT |
lc_otp_program_i.state[275] | No | No | No | INPUT | ||
lc_otp_program_i.state[278:276] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT |
lc_otp_program_i.state[279] | No | No | No | INPUT | ||
lc_otp_program_i.state[284:280] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT |
lc_otp_program_i.state[285] | No | No | No | INPUT | ||
lc_otp_program_i.state[286] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT |
lc_otp_program_i.state[287] | No | No | No | INPUT | ||
lc_otp_program_i.state[288] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.state[289] | No | No | No | INPUT | ||
lc_otp_program_i.state[297:290] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.state[298] | No | No | No | INPUT | ||
lc_otp_program_i.state[303:299] | Yes | Yes | *T48,*T6,*T52 | Yes | T6,T7,T45 | INPUT |
lc_otp_program_i.state[305:304] | No | No | No | INPUT | ||
lc_otp_program_i.state[309:306] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT |
lc_otp_program_i.state[310] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:311] | Yes | Yes | T48,T6,T52 | Yes | T6,T7,T45 | INPUT |
lc_otp_program_i.req | Yes | Yes | T6,T50,T51 | Yes | T6,T50,T51 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T6,T50,T51 | Yes | T6,T50,T51 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T173,T174,T175 | Yes | T173,T174,T175 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T4,T67,T68 | Yes | T4,T6,T67 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T6,T50,T51 | Yes | T6,T50,T51 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T4,T64,T6 | Yes | T1,T3,T4 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T50,T176,T168 | Yes | T159,T106,T50 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T3,T48 | Yes | T34,T138,T130 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T122,T138 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T50,T176,T168 | Yes | T159,T106,T50 | OUTPUT |
otp_lc_data_o.count[1:0] | Yes | Yes | T50,T127,T168 | Yes | T50,T127,T168 | OUTPUT |
otp_lc_data_o.count[2] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[5:3] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[6] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[20:7] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[21] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[30:22] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[32] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[33] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[48:34] | Yes | Yes | *T52,*T45,*T50 | Yes | T45,T50,T127 | OUTPUT |
otp_lc_data_o.count[49] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[59:50] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[60] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[66:61] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[67] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[83:68] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | OUTPUT |
otp_lc_data_o.count[84] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[98:85] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[109:100] | Yes | Yes | *T48,*T52,*T45 | Yes | T45,T50,T9 | OUTPUT |
otp_lc_data_o.count[110] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[122:111] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[126:124] | Yes | Yes | T48,*T52,*T45 | Yes | T45,T50,T9 | OUTPUT |
otp_lc_data_o.count[128:127] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[141:129] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[155:143] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[162:157] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[163] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[169:164] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[170] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[173:171] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[174] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[181:175] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[182] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[186:183] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[187] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[205:188] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | OUTPUT |
otp_lc_data_o.count[206] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[212:207] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[213] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[216:214] | Yes | Yes | T6,*T51,*T172 | Yes | T6,T51,T172 | OUTPUT |
otp_lc_data_o.count[217] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[222:218] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[223] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[238:224] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[240:239] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[245:241] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | OUTPUT |
otp_lc_data_o.count[246] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[253:247] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | OUTPUT |
otp_lc_data_o.count[254] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[259:255] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[260] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[280:261] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[284:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[285] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[308:286] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[312:310] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[313] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[315:314] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[316] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[329:317] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[330] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[336:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[337] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350:338] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[353:351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[364:354] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[365] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[366] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.count[367] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[371:368] | Yes | Yes | T4,T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[372] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[374:373] | Yes | Yes | T4,T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[375] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:376] | Yes | Yes | T50,T127,T168 | Yes | T50,T127,T168 | OUTPUT |
otp_lc_data_o.state[0] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[5:1] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT |
otp_lc_data_o.state[6] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[10:7] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[11] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[26:12] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT |
otp_lc_data_o.state[27] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[36:28] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[37] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[42:38] | Yes | Yes | *T52,*T45,*T50 | Yes | T45,T50,T127 | OUTPUT |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[47:44] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[48] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[54:49] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | OUTPUT |
otp_lc_data_o.state[55] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[62:56] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT |
otp_lc_data_o.state[63] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[68:64] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.state[69] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[70] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | OUTPUT |
otp_lc_data_o.state[72:71] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[80:73] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.state[81] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[104:82] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT |
otp_lc_data_o.state[105] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[108:106] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[109] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[113:110] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.state[114] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[117:115] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[118] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[121:119] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT |
otp_lc_data_o.state[123:122] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[131:124] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[137:133] | Yes | Yes | T6,*T52,*T45 | Yes | T6,T45,T50 | OUTPUT |
otp_lc_data_o.state[138] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[154:139] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[162:156] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[163] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[172:164] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT |
otp_lc_data_o.state[173] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[187:174] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.state[188] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[189] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT |
otp_lc_data_o.state[190] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[196:191] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[197] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[202:198] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT |
otp_lc_data_o.state[203] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[214:204] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.state[215] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[224:216] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT |
otp_lc_data_o.state[225] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[231:226] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[234:232] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[244:235] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[246:245] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[252:247] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[256:254] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.state[258:257] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[264:259] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | OUTPUT |
otp_lc_data_o.state[265] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[266] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[267] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[274:268] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | OUTPUT |
otp_lc_data_o.state[275] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[278:276] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT |
otp_lc_data_o.state[279] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[284:280] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[285] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[286] | Yes | Yes | *T6,*T45,*T51 | Yes | T6,T45,T51 | OUTPUT |
otp_lc_data_o.state[287] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[288] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.state[289] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[297:290] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.state[298] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[303:299] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[305:304] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[309:306] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_lc_data_o.state[310] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:311] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T4,T67,T68 | Yes | T4,T6,T67 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T50,T176,T168 | Yes | T159,T106,T50 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T64,T68,T122 | Yes | T1,T135,T64 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T50,T176,T168 | Yes | T159,T106,T50 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T4,T64,T122 | Yes | T2,T4,T5 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T48,T49,T122 | Yes | T48,T49,T122 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T122,T177,T125 | Yes | T122,T177,T125 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T178,T112,T179 | Yes | T178,T112,T179 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T48,T49,T122 | Yes | T48,T49,T122 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T122,T177,T125 | Yes | T122,T177,T125 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T178,T112,T179 | Yes | T178,T112,T179 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T2,T48,T46 | Yes | T2,T48,T46 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T2,T48,T46 | Yes | T2,T48,T46 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[55:0] | Yes | Yes | *T180,*T1,*T2 | Yes | T180,T4,T34 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[56] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[69:57] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[70] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[117:71] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[118] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[135:119] | Yes | Yes | *T181,*T134,*T182 | Yes | T181,T134,T182 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[136] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[179:137] | Yes | Yes | *T181,*T134,*T182 | Yes | T181,T134,T182 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[180] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[188:181] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[189] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[210:190] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[211] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[237:212] | Yes | Yes | *T181,*T134,*T182 | Yes | T181,T134,T182 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[238] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:239] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T4,T67,T138 | Yes | T3,T4,T54 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[43:0] | Yes | Yes | *T183,*T184,*T185 | Yes | T181,T186,T183 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[44] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:45] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T9,T10,T11 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 141 | 88.12 |
Total Bits | 10986 | 9360 | 85.20 |
Total Bits 0->1 | 5493 | 4694 | 85.45 |
Total Bits 1->0 | 5493 | 4666 | 84.94 |
Ports | 160 | 141 | 88.12 |
Port Bits | 10986 | 9360 | 85.20 |
Port Bits 0->1 | 5493 | 4694 | 85.45 |
Port Bits 1->0 | 5493 | 4666 | 84.94 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T121,T155,T156 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T49,*T72,*T82 | Yes | T49,T72,T82 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T60,T83,T84 | Yes | T60,T83,T84 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T79,T81,T85 | Yes | T79,T80,T81 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T79,T81,T85 | Yes | T79,T81,T85 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T157,*T158,*T53 | Yes | T157,T158,T53 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T79,T81,T85 | Yes | T79,T81,T85 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T54,*T7,*T159 | Yes | T7,T159,T106 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T53,*T79,*T80 | Yes | T53,T79,T80 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T49,*T72,*T82 | Yes | T49,T72,T82 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T60,T83,T84 | Yes | T60,T83,T84 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T53,T79,T80 | Yes | T53,T79,T80 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T160,T161,T162 | Yes | T160,T161,T162 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T160,T161,T162 | Yes | T160,T161,T162 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T1,T4,T54 | Yes | T1,T4,T54 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T1,T86,T163 | Yes | T1,T86,T163 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T1,T86,T163 | Yes | T1,T86,T163 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T1,T54,T164 | Yes | T1,T54,T164 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T1,T86,T163 | Yes | T1,T86,T163 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T1,T86,T163 | Yes | T1,T86,T163 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T1,T86,T87 | Yes | T1,T86,T87 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T1,T4,T54 | Yes | T1,T4,T54 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T1,T54,T164 | Yes | T1,T54,T164 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T1,T54,T86 | Yes | T1,T54,T86 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T64,T130,T86 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[0] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[10:1] | No | No | Yes | T165,T166,T167 | INPUT | ||
lc_otp_vendor_test_i.ctrl[11] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[13:12] | No | No | Yes | T165,T166,T167 | INPUT | ||
lc_otp_vendor_test_i.ctrl[14] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[23:15] | No | No | Yes | T165,T166,T167 | INPUT | ||
lc_otp_vendor_test_i.ctrl[24] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[30:25] | No | No | Yes | T167,T165,T166 | INPUT | ||
lc_otp_vendor_test_i.ctrl[31] | No | No | No | INPUT | |||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[1:0] | Yes | Yes | T50,T127,T168 | Yes | T50,T127,T168 | INPUT | |
lc_otp_program_i.count[2] | No | No | No | INPUT | |||
lc_otp_program_i.count[5:3] | Yes | Yes | T50,*T169,T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[6] | No | No | No | INPUT | |||
lc_otp_program_i.count[20:7] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[21] | No | No | No | INPUT | |||
lc_otp_program_i.count[30:22] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[31] | No | No | No | INPUT | |||
lc_otp_program_i.count[32] | Yes | Yes | *T52,*T45,*T50 | Yes | T45,T50,T169 | INPUT | |
lc_otp_program_i.count[33] | No | No | No | INPUT | |||
lc_otp_program_i.count[48:34] | Yes | Yes | *T52,*T45,*T50 | Yes | T45,T50,T127 | INPUT | |
lc_otp_program_i.count[49] | No | No | No | INPUT | |||
lc_otp_program_i.count[59:50] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[60] | No | No | No | INPUT | |||
lc_otp_program_i.count[66:61] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[67] | No | No | No | INPUT | |||
lc_otp_program_i.count[83:68] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | INPUT | |
lc_otp_program_i.count[84] | No | No | No | INPUT | |||
lc_otp_program_i.count[98:85] | Yes | Yes | *T48,*T52,*T45 | Yes | T45,T50,T9 | INPUT | |
lc_otp_program_i.count[99] | No | No | No | INPUT | |||
lc_otp_program_i.count[109:100] | Yes | Yes | *T48,*T52,*T45 | Yes | T45,T50,T9 | INPUT | |
lc_otp_program_i.count[110] | No | No | No | INPUT | |||
lc_otp_program_i.count[122:111] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[123] | No | No | No | INPUT | |||
lc_otp_program_i.count[126:124] | Yes | Yes | *T48,*T52,*T45 | Yes | T45,T50,T9 | INPUT | |
lc_otp_program_i.count[128:127] | No | No | No | INPUT | |||
lc_otp_program_i.count[141:129] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT | |
lc_otp_program_i.count[142] | No | No | No | INPUT | |||
lc_otp_program_i.count[155:143] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[156] | No | No | No | INPUT | |||
lc_otp_program_i.count[162:157] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[163] | No | No | No | INPUT | |||
lc_otp_program_i.count[169:164] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT | |
lc_otp_program_i.count[170] | No | No | No | INPUT | |||
lc_otp_program_i.count[173:171] | Yes | Yes | T169,T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[174] | No | No | No | INPUT | |||
lc_otp_program_i.count[181:175] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[182] | No | No | No | INPUT | |||
lc_otp_program_i.count[186:183] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[187] | No | No | No | INPUT | |||
lc_otp_program_i.count[205:188] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | INPUT | |
lc_otp_program_i.count[206] | No | No | No | INPUT | |||
lc_otp_program_i.count[212:207] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[213] | No | No | No | INPUT | |||
lc_otp_program_i.count[216:214] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT | |
lc_otp_program_i.count[217] | No | No | No | INPUT | |||
lc_otp_program_i.count[222:218] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[223] | No | No | No | INPUT | |||
lc_otp_program_i.count[238:224] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[240:239] | No | No | No | INPUT | |||
lc_otp_program_i.count[245:241] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | INPUT | |
lc_otp_program_i.count[246] | No | No | No | INPUT | |||
lc_otp_program_i.count[253:247] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | INPUT | |
lc_otp_program_i.count[254] | No | No | No | INPUT | |||
lc_otp_program_i.count[259:255] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[260] | No | No | No | INPUT | |||
lc_otp_program_i.count[280:261] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[281] | No | No | No | INPUT | |||
lc_otp_program_i.count[284:282] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[285] | No | No | No | INPUT | |||
lc_otp_program_i.count[308:286] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[309] | No | No | No | INPUT | |||
lc_otp_program_i.count[312:310] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT | |
lc_otp_program_i.count[313] | No | No | No | INPUT | |||
lc_otp_program_i.count[315:314] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.count[316] | No | No | No | INPUT | |||
lc_otp_program_i.count[329:317] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[330] | No | No | No | INPUT | |||
lc_otp_program_i.count[336:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT | |
lc_otp_program_i.count[337] | No | No | No | INPUT | |||
lc_otp_program_i.count[350:338] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[353:351] | No | No | No | INPUT | |||
lc_otp_program_i.count[364:354] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[365] | No | No | No | INPUT | |||
lc_otp_program_i.count[366] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT | |
lc_otp_program_i.count[367] | No | No | No | INPUT | |||
lc_otp_program_i.count[371:368] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[372] | No | No | No | INPUT | |||
lc_otp_program_i.count[374:373] | Yes | Yes | *T50,T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.count[375] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:376] | Yes | Yes | T50,T127,T168 | Yes | T50,T127,T168 | INPUT | |
lc_otp_program_i.state[0] | No | No | No | INPUT | |||
lc_otp_program_i.state[5:1] | Yes | Yes | T50,T127,T172 | Yes | T50,T127,T172 | INPUT | |
lc_otp_program_i.state[6] | No | No | No | INPUT | |||
lc_otp_program_i.state[10:7] | Yes | Yes | T50,*T169,T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.state[11] | No | No | No | INPUT | |||
lc_otp_program_i.state[26:12] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT | |
lc_otp_program_i.state[27] | No | No | No | INPUT | |||
lc_otp_program_i.state[36:28] | Yes | Yes | T50,*T169,T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.state[37] | No | No | No | INPUT | |||
lc_otp_program_i.state[42:38] | Yes | Yes | *T52,*T45,*T50 | Yes | T45,T50,T127 | INPUT | |
lc_otp_program_i.state[43] | No | No | No | INPUT | |||
lc_otp_program_i.state[47:44] | Yes | Yes | *T52,*T45,T50 | Yes | T45,T50,T169 | INPUT | |
lc_otp_program_i.state[48] | No | No | No | INPUT | |||
lc_otp_program_i.state[54:49] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT | |
lc_otp_program_i.state[55] | No | No | No | INPUT | |||
lc_otp_program_i.state[62:56] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT | |
lc_otp_program_i.state[63] | No | No | No | INPUT | |||
lc_otp_program_i.state[68:64] | Yes | Yes | T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.state[69] | No | No | No | INPUT | |||
lc_otp_program_i.state[70] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT | |
lc_otp_program_i.state[72:71] | No | No | No | INPUT | |||
lc_otp_program_i.state[80:73] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.state[81] | No | No | No | INPUT | |||
lc_otp_program_i.state[104:82] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT | |
lc_otp_program_i.state[105] | No | No | No | INPUT | |||
lc_otp_program_i.state[108:106] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT | |
lc_otp_program_i.state[109] | No | No | No | INPUT | |||
lc_otp_program_i.state[113:110] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.state[114] | No | No | No | INPUT | |||
lc_otp_program_i.state[117:115] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT | |
lc_otp_program_i.state[118] | No | No | No | INPUT | |||
lc_otp_program_i.state[121:119] | Yes | Yes | T50,T127,T172 | Yes | T50,T127,T172 | INPUT | |
lc_otp_program_i.state[123:122] | No | No | No | INPUT | |||
lc_otp_program_i.state[131:124] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT | |
lc_otp_program_i.state[132] | No | No | No | INPUT | |||
lc_otp_program_i.state[137:133] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT | |
lc_otp_program_i.state[138] | No | No | No | INPUT | |||
lc_otp_program_i.state[154:139] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.state[155] | No | No | No | INPUT | |||
lc_otp_program_i.state[162:156] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.state[163] | No | No | No | INPUT | |||
lc_otp_program_i.state[172:164] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT | |
lc_otp_program_i.state[173] | No | No | No | INPUT | |||
lc_otp_program_i.state[187:174] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.state[188] | No | No | No | INPUT | |||
lc_otp_program_i.state[189] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT | |
lc_otp_program_i.state[190] | No | No | No | INPUT | |||
lc_otp_program_i.state[196:191] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT | |
lc_otp_program_i.state[197] | No | No | No | INPUT | |||
lc_otp_program_i.state[202:198] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT | |
lc_otp_program_i.state[203] | No | No | No | INPUT | |||
lc_otp_program_i.state[214:204] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.state[215] | No | No | No | INPUT | |||
lc_otp_program_i.state[224:216] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT | |
lc_otp_program_i.state[225] | No | No | No | INPUT | |||
lc_otp_program_i.state[231:226] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT | |
lc_otp_program_i.state[234:232] | No | No | No | INPUT | |||
lc_otp_program_i.state[244:235] | Yes | Yes | T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.state[246:245] | No | No | No | INPUT | |||
lc_otp_program_i.state[252:247] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.state[253] | No | No | No | INPUT | |||
lc_otp_program_i.state[256:254] | Yes | Yes | T169,T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.state[258:257] | No | No | No | INPUT | |||
lc_otp_program_i.state[264:259] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT | |
lc_otp_program_i.state[265] | No | No | No | INPUT | |||
lc_otp_program_i.state[266] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.state[267] | No | No | No | INPUT | |||
lc_otp_program_i.state[274:268] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | INPUT | |
lc_otp_program_i.state[275] | No | No | No | INPUT | |||
lc_otp_program_i.state[278:276] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | INPUT | |
lc_otp_program_i.state[279] | No | No | No | INPUT | |||
lc_otp_program_i.state[284:280] | Yes | Yes | *T50,*T169,*T127 | Yes | T50,T169,T127 | INPUT | |
lc_otp_program_i.state[285] | No | No | No | INPUT | |||
lc_otp_program_i.state[286] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | INPUT | |
lc_otp_program_i.state[287] | No | No | No | INPUT | |||
lc_otp_program_i.state[288] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.state[289] | No | No | No | INPUT | |||
lc_otp_program_i.state[297:290] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.state[298] | No | No | No | INPUT | |||
lc_otp_program_i.state[303:299] | Yes | Yes | *T48,*T6,*T52 | Yes | T6,T7,T45 | INPUT | |
lc_otp_program_i.state[305:304] | No | No | No | INPUT | |||
lc_otp_program_i.state[309:306] | Yes | Yes | *T169,*T170,*T171 | Yes | T169,T170,T171 | INPUT | |
lc_otp_program_i.state[310] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:311] | Yes | Yes | T48,T6,T52 | Yes | T6,T7,T45 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T6,T50,T51 | Yes | T6,T50,T51 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T6,T50,T51 | Yes | T6,T50,T51 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T173,T174,T175 | Yes | T173,T174,T175 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T4,T67,T68 | Yes | T4,T6,T67 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T6,T50,T51 | Yes | T6,T50,T51 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T4,T64,T6 | Yes | T1,T3,T4 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T50,T176,T168 | Yes | T159,T106,T50 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T3,T48 | Yes | T34,T138,T130 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T122,T138 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T50,T176,T168 | Yes | T159,T106,T50 | OUTPUT | |
otp_lc_data_o.count[1:0] | Yes | Yes | T50,T127,T168 | Yes | T50,T127,T168 | OUTPUT | |
otp_lc_data_o.count[2] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[5:3] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[6] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[20:7] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[21] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[30:22] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[32] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[33] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[48:34] | Yes | Yes | *T52,*T45,*T50 | Yes | T45,T50,T127 | OUTPUT | |
otp_lc_data_o.count[49] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[59:50] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[60] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[66:61] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[67] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[83:68] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | OUTPUT | |
otp_lc_data_o.count[84] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[98:85] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[109:100] | Yes | Yes | *T48,*T52,*T45 | Yes | T45,T50,T9 | OUTPUT | |
otp_lc_data_o.count[110] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[122:111] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[126:124] | Yes | Yes | T48,*T52,*T45 | Yes | T45,T50,T9 | OUTPUT | |
otp_lc_data_o.count[128:127] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[141:129] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[155:143] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[162:157] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[163] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[169:164] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[170] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[173:171] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[174] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[181:175] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[182] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[186:183] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[187] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[205:188] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | OUTPUT | |
otp_lc_data_o.count[206] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[212:207] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[213] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[216:214] | Yes | Yes | T6,*T51,*T172 | Yes | T6,T51,T172 | OUTPUT | |
otp_lc_data_o.count[217] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[222:218] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[223] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[238:224] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[240:239] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[245:241] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | OUTPUT | |
otp_lc_data_o.count[246] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[253:247] | Yes | Yes | *T50,*T127,*T168 | Yes | T50,T127,T168 | OUTPUT | |
otp_lc_data_o.count[254] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[259:255] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[260] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[280:261] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[284:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[285] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[308:286] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[312:310] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[313] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[315:314] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[316] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[329:317] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[330] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[336:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[337] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350:338] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[353:351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[364:354] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[365] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[366] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.count[367] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[371:368] | Yes | Yes | T4,T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[372] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[374:373] | Yes | Yes | T4,T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[375] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:376] | Yes | Yes | T50,T127,T168 | Yes | T50,T127,T168 | OUTPUT | |
otp_lc_data_o.state[0] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[5:1] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT | |
otp_lc_data_o.state[6] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[10:7] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[11] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[26:12] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT | |
otp_lc_data_o.state[27] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[36:28] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[37] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[42:38] | Yes | Yes | *T52,*T45,*T50 | Yes | T45,T50,T127 | OUTPUT | |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[47:44] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[48] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[54:49] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | OUTPUT | |
otp_lc_data_o.state[55] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[62:56] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT | |
otp_lc_data_o.state[63] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[68:64] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.state[69] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[70] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | OUTPUT | |
otp_lc_data_o.state[72:71] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[80:73] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.state[81] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[104:82] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT | |
otp_lc_data_o.state[105] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[108:106] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[109] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[113:110] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.state[114] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[117:115] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[118] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[121:119] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT | |
otp_lc_data_o.state[123:122] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[131:124] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[137:133] | Yes | Yes | T6,*T52,*T45 | Yes | T6,T45,T50 | OUTPUT | |
otp_lc_data_o.state[138] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[154:139] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[162:156] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[163] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[172:164] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT | |
otp_lc_data_o.state[173] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[187:174] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.state[188] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[189] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT | |
otp_lc_data_o.state[190] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[196:191] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[197] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[202:198] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT | |
otp_lc_data_o.state[203] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[214:204] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.state[215] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[224:216] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT | |
otp_lc_data_o.state[225] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[231:226] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[234:232] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[244:235] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[246:245] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[252:247] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[256:254] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.state[258:257] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[264:259] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | OUTPUT | |
otp_lc_data_o.state[265] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[266] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[267] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[274:268] | Yes | Yes | *T6,*T52,*T45 | Yes | T6,T45,T50 | OUTPUT | |
otp_lc_data_o.state[275] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[278:276] | Yes | Yes | *T50,*T127,*T172 | Yes | T50,T127,T172 | OUTPUT | |
otp_lc_data_o.state[279] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[284:280] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[285] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[286] | Yes | Yes | *T6,*T45,*T51 | Yes | T6,T45,T51 | OUTPUT | |
otp_lc_data_o.state[287] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[288] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.state[289] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[297:290] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.state[298] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[303:299] | Yes | Yes | *T4,*T34,*T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[305:304] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[309:306] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_lc_data_o.state[310] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:311] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T4,T67,T68 | Yes | T4,T6,T67 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T50,T176,T168 | Yes | T159,T106,T50 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T64,T68,T122 | Yes | T1,T135,T64 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T50,T176,T168 | Yes | T159,T106,T50 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T4,T64,T122 | Yes | T2,T4,T5 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T48,T49,T122 | Yes | T48,T49,T122 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T122,T177,T125 | Yes | T122,T177,T125 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T178,T112,T179 | Yes | T178,T112,T179 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T48,T49,T122 | Yes | T48,T49,T122 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T122,T177,T125 | Yes | T122,T177,T125 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T178,T112,T179 | Yes | T178,T112,T179 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T2,T48,T46 | Yes | T2,T48,T46 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T4,T54 | Yes | T1,T2,T4 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T48,T90 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T2,T48,T46 | Yes | T2,T48,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[55:0] | Yes | Yes | *T180,*T1,*T2 | Yes | T180,T4,T34 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[56] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[69:57] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[70] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[117:71] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[118] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[135:119] | Yes | Yes | *T181,*T134,*T182 | Yes | T181,T134,T182 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[136] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[179:137] | Yes | Yes | *T181,*T134,*T182 | Yes | T181,T134,T182 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[180] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[188:181] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[189] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[210:190] | Yes | Yes | *T1,*T2,*T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[211] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[237:212] | Yes | Yes | *T181,*T134,*T182 | Yes | T181,T134,T182 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[238] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:239] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T4,T67,T138 | Yes | T3,T4,T54 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[43:0] | Yes | Yes | *T183,*T184,*T185 | Yes | T181,T186,T183 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[44] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:45] | Yes | Yes | T1,T2,T3 | Yes | T4,T34,T64 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T4,T34,T64 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |