SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.48 | 84.48 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 84.67 | 84.67 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.67 | 84.67 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.67 | 84.67 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.82 | 92.11 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9303 | 84.48 |
Total Bits 0->1 | 5506 | 4668 | 84.78 |
Total Bits 1->0 | 5506 | 4635 | 84.18 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9303 | 84.48 |
Port Bits 0->1 | 5506 | 4668 | 84.78 |
Port Bits 1->0 | 5506 | 4635 | 84.18 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T162,T163,T164 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T55,*T70,*T71 | Yes | T55,T70,T71 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T73,T82,T56 | Yes | T73,T82,T56 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T137 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T137 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T71,*T165,*T166 | Yes | T71,T165,T166 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T137 | Yes | T79,T80,T137 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T87,*T122,*T52 | Yes | T87,T122,T52 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T56,*T79,*T80 | Yes | T56,T79,T80 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T55,*T70,*T71 | Yes | T55,T70,T71 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T73,T82,T56 | Yes | T73,T82,T56 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T56,T79,T80 | Yes | T56,T79,T80 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
intr_otp_error_o | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T6,T35,T66 | Yes | T6,T35,T66 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T57,T171,T83 | Yes | T57,T171,T83 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T6,T35,T66 | Yes | T6,T35,T66 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T57,T171,T83 | Yes | T57,T171,T83 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T130,T131,T132 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[3:0] | No | No | Yes | T172,T173,T174 | INPUT | |
lc_otp_vendor_test_i.ctrl[4] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:5] | No | No | Yes | T173,T174,T172 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[2:0] | Yes | Yes | T52,T175,T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[3] | No | No | No | INPUT | ||
lc_otp_program_i.count[11:4] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[12] | No | No | No | INPUT | ||
lc_otp_program_i.count[23:13] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[26:24] | No | No | No | INPUT | ||
lc_otp_program_i.count[34:27] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[35] | No | No | No | INPUT | ||
lc_otp_program_i.count[43:36] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT |
lc_otp_program_i.count[45:44] | No | No | No | INPUT | ||
lc_otp_program_i.count[52:46] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[53] | No | No | No | INPUT | ||
lc_otp_program_i.count[57:54] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[58] | No | No | No | INPUT | ||
lc_otp_program_i.count[60:59] | Yes | Yes | T52,*T111,T175 | Yes | T52,T175,T133 | INPUT |
lc_otp_program_i.count[61] | No | No | No | INPUT | ||
lc_otp_program_i.count[67:62] | Yes | Yes | T52,*T111,T175 | Yes | T52,T175,T133 | INPUT |
lc_otp_program_i.count[69:68] | No | No | No | INPUT | ||
lc_otp_program_i.count[70] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[71] | No | No | No | INPUT | ||
lc_otp_program_i.count[72] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[74:73] | No | No | No | INPUT | ||
lc_otp_program_i.count[75] | Yes | Yes | *T52,*T111,*T175 | Yes | T52,T175,T133 | INPUT |
lc_otp_program_i.count[76] | No | No | No | INPUT | ||
lc_otp_program_i.count[78:77] | Yes | Yes | T52,T175,T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[79] | No | No | No | INPUT | ||
lc_otp_program_i.count[90:80] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[91] | No | No | No | INPUT | ||
lc_otp_program_i.count[93:92] | Yes | Yes | T52,T175,T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[94] | No | No | No | INPUT | ||
lc_otp_program_i.count[113:95] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[114] | No | No | No | INPUT | ||
lc_otp_program_i.count[118:115] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[119] | No | No | No | INPUT | ||
lc_otp_program_i.count[129:120] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[130] | No | No | No | INPUT | ||
lc_otp_program_i.count[135:131] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[137:136] | No | No | No | INPUT | ||
lc_otp_program_i.count[152:138] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT |
lc_otp_program_i.count[153] | No | No | No | INPUT | ||
lc_otp_program_i.count[155:154] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[156] | No | No | No | INPUT | ||
lc_otp_program_i.count[177:157] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[178] | No | No | No | INPUT | ||
lc_otp_program_i.count[193:179] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT |
lc_otp_program_i.count[194] | No | No | No | INPUT | ||
lc_otp_program_i.count[199:195] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[200] | No | No | No | INPUT | ||
lc_otp_program_i.count[201] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[202] | No | No | No | INPUT | ||
lc_otp_program_i.count[207:203] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[208] | No | No | No | INPUT | ||
lc_otp_program_i.count[222:209] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[223] | No | No | No | INPUT | ||
lc_otp_program_i.count[234:224] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT |
lc_otp_program_i.count[235] | No | No | No | INPUT | ||
lc_otp_program_i.count[253:236] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[254] | No | No | No | INPUT | ||
lc_otp_program_i.count[256:255] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT |
lc_otp_program_i.count[257] | No | No | No | INPUT | ||
lc_otp_program_i.count[262:258] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[263] | No | No | No | INPUT | ||
lc_otp_program_i.count[265:264] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[266] | No | No | No | INPUT | ||
lc_otp_program_i.count[276:267] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[277] | No | No | No | INPUT | ||
lc_otp_program_i.count[279:278] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[280] | No | No | No | INPUT | ||
lc_otp_program_i.count[283:281] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[284] | No | No | No | INPUT | ||
lc_otp_program_i.count[286:285] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[287] | No | No | No | INPUT | ||
lc_otp_program_i.count[291:288] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[292] | No | No | No | INPUT | ||
lc_otp_program_i.count[298:293] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[300:299] | No | No | No | INPUT | ||
lc_otp_program_i.count[304:301] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[305] | No | No | No | INPUT | ||
lc_otp_program_i.count[309:306] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[310] | No | No | No | INPUT | ||
lc_otp_program_i.count[314:311] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[316:315] | No | No | No | INPUT | ||
lc_otp_program_i.count[333:317] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[334] | No | No | No | INPUT | ||
lc_otp_program_i.count[347:335] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[349:348] | No | No | No | INPUT | ||
lc_otp_program_i.count[350] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[351] | No | No | No | INPUT | ||
lc_otp_program_i.count[352] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[354:353] | No | No | No | INPUT | ||
lc_otp_program_i.count[365:355] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.count[366] | No | No | No | INPUT | ||
lc_otp_program_i.count[373:367] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[374] | No | No | No | INPUT | ||
lc_otp_program_i.count[378:375] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.count[379] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:380] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | INPUT |
lc_otp_program_i.state[0] | No | No | No | INPUT | ||
lc_otp_program_i.state[10:1] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[11] | No | No | No | INPUT | ||
lc_otp_program_i.state[12] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[13] | No | No | No | INPUT | ||
lc_otp_program_i.state[27:14] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[28] | No | No | No | INPUT | ||
lc_otp_program_i.state[32:29] | Yes | Yes | *T35,*T52,*T126 | Yes | T52,T175,T133 | INPUT |
lc_otp_program_i.state[34:33] | No | No | No | INPUT | ||
lc_otp_program_i.state[38:35] | Yes | Yes | *T35,*T52,*T126 | Yes | T52,T175,T133 | INPUT |
lc_otp_program_i.state[39] | No | No | No | INPUT | ||
lc_otp_program_i.state[42:40] | Yes | Yes | T35,T52,T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[43] | No | No | No | INPUT | ||
lc_otp_program_i.state[46:44] | Yes | Yes | T35,T52,T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[47] | No | No | No | INPUT | ||
lc_otp_program_i.state[50:48] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[51] | No | No | No | INPUT | ||
lc_otp_program_i.state[64:52] | Yes | Yes | *T35,*T52,*T126 | Yes | T52,T175,T133 | INPUT |
lc_otp_program_i.state[65] | No | No | No | INPUT | ||
lc_otp_program_i.state[75:66] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[76] | No | No | No | INPUT | ||
lc_otp_program_i.state[77] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT |
lc_otp_program_i.state[78] | No | No | No | INPUT | ||
lc_otp_program_i.state[80:79] | Yes | Yes | T35,T52,*T53 | Yes | T52,T53,T125 | INPUT |
lc_otp_program_i.state[81] | No | No | No | INPUT | ||
lc_otp_program_i.state[89:82] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT |
lc_otp_program_i.state[91:90] | No | No | No | INPUT | ||
lc_otp_program_i.state[100:92] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT |
lc_otp_program_i.state[101] | No | No | No | INPUT | ||
lc_otp_program_i.state[112:102] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT |
lc_otp_program_i.state[113] | No | No | No | INPUT | ||
lc_otp_program_i.state[131:114] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[132] | No | No | No | INPUT | ||
lc_otp_program_i.state[136:133] | Yes | Yes | T35,T52,T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[137] | No | No | No | INPUT | ||
lc_otp_program_i.state[146:138] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT |
lc_otp_program_i.state[147] | No | No | No | INPUT | ||
lc_otp_program_i.state[150:148] | Yes | Yes | T35,T52,T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[151] | No | No | No | INPUT | ||
lc_otp_program_i.state[155:152] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[156] | No | No | No | INPUT | ||
lc_otp_program_i.state[157] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT |
lc_otp_program_i.state[160:158] | No | No | No | INPUT | ||
lc_otp_program_i.state[166:161] | Yes | Yes | T35,T52,*T53 | Yes | T52,T53,T125 | INPUT |
lc_otp_program_i.state[167] | No | No | No | INPUT | ||
lc_otp_program_i.state[171:168] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT |
lc_otp_program_i.state[172] | No | No | No | INPUT | ||
lc_otp_program_i.state[177:173] | Yes | Yes | T35,T52,*T53 | Yes | T52,T53,T125 | INPUT |
lc_otp_program_i.state[178] | No | No | No | INPUT | ||
lc_otp_program_i.state[197:179] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT |
lc_otp_program_i.state[199:198] | No | No | No | INPUT | ||
lc_otp_program_i.state[218:200] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[219] | No | No | No | INPUT | ||
lc_otp_program_i.state[225:220] | Yes | Yes | T35,T52,T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[226] | No | No | No | INPUT | ||
lc_otp_program_i.state[231:227] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[232] | No | No | No | INPUT | ||
lc_otp_program_i.state[233] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT |
lc_otp_program_i.state[234] | No | No | No | INPUT | ||
lc_otp_program_i.state[239:235] | Yes | Yes | T35,T52,*T53 | Yes | T52,T53,T125 | INPUT |
lc_otp_program_i.state[240] | No | No | No | INPUT | ||
lc_otp_program_i.state[257:241] | Yes | Yes | *T35,*T7,*T8 | Yes | T7,T52,T53 | INPUT |
lc_otp_program_i.state[259:258] | No | No | No | INPUT | ||
lc_otp_program_i.state[263:260] | Yes | Yes | T35,*T7,T52 | Yes | T7,T52,T53 | INPUT |
lc_otp_program_i.state[265:264] | No | No | No | INPUT | ||
lc_otp_program_i.state[274:266] | Yes | Yes | *T35,*T7,*T52 | Yes | T7,T52,T53 | INPUT |
lc_otp_program_i.state[275] | No | No | No | INPUT | ||
lc_otp_program_i.state[283:276] | Yes | Yes | T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[284] | No | No | No | INPUT | ||
lc_otp_program_i.state[286:285] | Yes | Yes | T177,T178,T179 | Yes | T177,T178,T179 | INPUT |
lc_otp_program_i.state[287] | No | No | No | INPUT | ||
lc_otp_program_i.state[294:288] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[295] | No | No | No | INPUT | ||
lc_otp_program_i.state[300:296] | Yes | Yes | T35,*T7,*T8 | Yes | T7,T52,T53 | INPUT |
lc_otp_program_i.state[302:301] | No | No | No | INPUT | ||
lc_otp_program_i.state[305:303] | Yes | Yes | T35,*T7,*T8 | Yes | T7,T52,T53 | INPUT |
lc_otp_program_i.state[306] | No | No | No | INPUT | ||
lc_otp_program_i.state[307] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[308] | No | No | No | INPUT | ||
lc_otp_program_i.state[313:309] | Yes | Yes | T35,*T7,*T8 | Yes | T7,T52,T53 | INPUT |
lc_otp_program_i.state[314] | No | No | No | INPUT | ||
lc_otp_program_i.state[318:315] | Yes | Yes | T35,T52,*T175 | Yes | T52,T175,T176 | INPUT |
lc_otp_program_i.state[319] | No | No | No | INPUT | ||
lc_otp_program_i.req | Yes | Yes | T35,T52,T53 | Yes | T35,T52,T53 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T35,T52,T53 | Yes | T35,T52,T53 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T35,T180,T181 | Yes | T35,T180,T181 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T6,T35,T66 | Yes | T6,T35,T66 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T35,T52,T53 | Yes | T35,T52,T53 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T2,T87,T35 | Yes | T35,T7,T8 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T52,T182,T176 | Yes | T122,T52,T123 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T122,T52 | Yes | T1,T2,T87 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T6,T66,T52 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T52,T182,T176 | Yes | T122,T52,T123 | OUTPUT |
otp_lc_data_o.count[2:0] | Yes | Yes | T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[3] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[11:4] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[12] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[23:13] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[26:24] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[34:27] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[35] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[43:36] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[45:44] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[52:46] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[53] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[57:54] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[58] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[60:59] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[61] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[67:62] | Yes | Yes | *T52,*T111,*T175 | Yes | T52,T175,T133 | OUTPUT |
otp_lc_data_o.count[69:68] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[70] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[71] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[72] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[74:73] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[75] | Yes | Yes | *T52,*T111,*T175 | Yes | T52,T175,T133 | OUTPUT |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[78:77] | Yes | Yes | T52,T175,T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[79] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[90:80] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[91] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[93:92] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[94] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[113:95] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[114] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[118:115] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[129:120] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[130] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[135:131] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[137:136] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[152:138] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[155:154] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[177:157] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[193:179] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[194] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[199:195] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[200] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[201] | Yes | Yes | *T175,*T183,*T184 | Yes | T35,T175,T183 | OUTPUT |
otp_lc_data_o.count[202] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[207:203] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[208] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[222:209] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[223] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[234:224] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[253:236] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[254] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[256:255] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[257] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[262:258] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[265:264] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[266] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[276:267] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[279:278] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[280] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[283:281] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[284] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[286:285] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[291:288] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[298:293] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[300:299] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[304:301] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[305] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[309:306] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[310] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[314:311] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[316:315] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[333:317] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[347:335] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[349:348] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[352] | Yes | Yes | *T184,*T185,*T186 | Yes | T35,T184,T185 | OUTPUT |
otp_lc_data_o.count[354:353] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[365:355] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.count[366] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[373:367] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.count[374] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[378:375] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:380] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.state[0] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[10:1] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.state[11] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[12] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.state[13] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[27:14] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[28] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[32:29] | Yes | Yes | *T52,*T126,*T111 | Yes | T52,T175,T133 | OUTPUT |
otp_lc_data_o.state[34:33] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[38:35] | Yes | Yes | *T52,*T126,*T111 | Yes | T52,T175,T133 | OUTPUT |
otp_lc_data_o.state[39] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[42:40] | Yes | Yes | T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[46:44] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[47] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[50:48] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[51] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[64:52] | Yes | Yes | *T52,*T126,*T111 | Yes | T52,T175,T133 | OUTPUT |
otp_lc_data_o.state[65] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[75:66] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.state[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[77] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[78] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[80:79] | Yes | Yes | T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT |
otp_lc_data_o.state[81] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[89:82] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.state[91:90] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[100:92] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[101] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[112:102] | Yes | Yes | *T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[131:114] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[136:133] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[146:138] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[147] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[150:148] | Yes | Yes | T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.state[151] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[155:152] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[157] | Yes | Yes | *T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT |
otp_lc_data_o.state[160:158] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[166:161] | Yes | Yes | T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT |
otp_lc_data_o.state[167] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[171:168] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[177:173] | Yes | Yes | T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT |
otp_lc_data_o.state[178] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[197:179] | Yes | Yes | *T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT |
otp_lc_data_o.state[199:198] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[218:200] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[219] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[225:220] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[231:227] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[232] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[233] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.state[234] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[239:235] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[240] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[257:241] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[259:258] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[263:260] | Yes | Yes | *T7,*T52,*T53 | Yes | T7,T52,T53 | OUTPUT |
otp_lc_data_o.state[265:264] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[274:266] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[275] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[283:276] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.state[284] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[286:285] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT |
otp_lc_data_o.state[287] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[294:288] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.state[295] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[300:296] | Yes | Yes | *T7,*T8,T52 | Yes | T7,T52,T53 | OUTPUT |
otp_lc_data_o.state[302:301] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[305:303] | Yes | Yes | *T7,*T8,*T52 | Yes | T7,T52,T53 | OUTPUT |
otp_lc_data_o.state[306] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[307] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT |
otp_lc_data_o.state[308] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[313:309] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[314] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[318:315] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[319] | No | No | No | OUTPUT | ||
otp_lc_data_o.error | Yes | Yes | T6,T35,T66 | Yes | T6,T35,T66 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T52,T182,T176 | Yes | T122,T52,T123 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T35,T122 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T52,T182,T176 | Yes | T122,T52,T123 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T6,T8,T122 | Yes | T4,T6,T8 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T7,T50,T51 | Yes | T7,T50,T51 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T109,T187,T188 | Yes | T109,T187,T188 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T189,T190,T191 | Yes | T189,T190,T191 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T7,T50,T51 | Yes | T7,T50,T51 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T109,T187,T188 | Yes | T109,T187,T188 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T189,T192,T193 | Yes | T189,T192,T193 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T7,T50,T51 | Yes | T7,T50,T51 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T7,T50,T51 | Yes | T7,T50,T51 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T3,T4 | Yes | T1,T6,T8 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[22:1] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[23] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[57:24] | Yes | Yes | *T194,*T195,*T196 | Yes | T194,T195,T196 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[58] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[79:59] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[107:81] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[108] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[112:109] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[113] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[180:114] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[182:181] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[237:183] | Yes | Yes | *T133,*T194,*T190 | Yes | T133,T194,T190 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[238] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[250:239] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[251] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:252] | Yes | Yes | T195,T194,T1 | Yes | T195,T194,T1 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T7,T8 | Yes | T1,T87,T5 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T133,T194,T195 | Yes | T133,T194,T195 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T9,T10,T11 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9302 | 84.67 |
Total Bits 0->1 | 5493 | 4667 | 84.96 |
Total Bits 1->0 | 5493 | 4635 | 84.38 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9302 | 84.67 |
Port Bits 0->1 | 5493 | 4667 | 84.96 |
Port Bits 1->0 | 5493 | 4635 | 84.38 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T162,T163,T164 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T55,*T70,*T71 | Yes | T55,T70,T71 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T73,T82,T56 | Yes | T73,T82,T56 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T137 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T137 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T71,*T165,*T166 | Yes | T71,T165,T166 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T137 | Yes | T79,T80,T137 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T87,*T122,*T52 | Yes | T87,T122,T52 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T79,*T80,*T81 | Yes | T79,T80,T81 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T56,*T79,*T80 | Yes | T56,T79,T80 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T55,*T70,*T71 | Yes | T55,T70,T71 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T73,T82,T56 | Yes | T73,T82,T56 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T56,T79,T80 | Yes | T56,T79,T80 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T81 | Yes | T79,T80,T81 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T56,T79,T80 | Yes | T56,T79,T80 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T167,T168,T169 | Yes | T167,T168,T169 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T6,T35,T66 | Yes | T6,T35,T66 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T57,T171,T83 | Yes | T57,T171,T83 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T83,T85,T170 | Yes | T83,T85,T170 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T6,T35,T66 | Yes | T6,T35,T66 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T57,T171,T83 | Yes | T57,T171,T83 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T57,T83,T58 | Yes | T57,T83,T58 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T130,T131,T132 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[3:0] | No | No | Yes | T172,T173,T174 | INPUT | ||
lc_otp_vendor_test_i.ctrl[4] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:5] | No | No | Yes | T173,T174,T172 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[2:0] | Yes | Yes | T52,T175,T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[3] | No | No | No | INPUT | |||
lc_otp_program_i.count[11:4] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[12] | No | No | No | INPUT | |||
lc_otp_program_i.count[23:13] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[26:24] | No | No | No | INPUT | |||
lc_otp_program_i.count[34:27] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[35] | No | No | No | INPUT | |||
lc_otp_program_i.count[43:36] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT | |
lc_otp_program_i.count[45:44] | No | No | No | INPUT | |||
lc_otp_program_i.count[52:46] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[53] | No | No | No | INPUT | |||
lc_otp_program_i.count[57:54] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[58] | No | No | No | INPUT | |||
lc_otp_program_i.count[60:59] | Yes | Yes | T52,*T111,T175 | Yes | T52,T175,T133 | INPUT | |
lc_otp_program_i.count[61] | No | No | No | INPUT | |||
lc_otp_program_i.count[67:62] | Yes | Yes | T52,*T111,T175 | Yes | T52,T175,T133 | INPUT | |
lc_otp_program_i.count[69:68] | No | No | No | INPUT | |||
lc_otp_program_i.count[70] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[71] | No | No | No | INPUT | |||
lc_otp_program_i.count[72] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[74:73] | No | No | No | INPUT | |||
lc_otp_program_i.count[75] | Yes | Yes | *T52,*T111,*T175 | Yes | T52,T175,T133 | INPUT | |
lc_otp_program_i.count[76] | No | No | No | INPUT | |||
lc_otp_program_i.count[78:77] | Yes | Yes | T52,T175,T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[79] | No | No | No | INPUT | |||
lc_otp_program_i.count[90:80] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[91] | No | No | No | INPUT | |||
lc_otp_program_i.count[93:92] | Yes | Yes | T52,T175,T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[94] | No | No | No | INPUT | |||
lc_otp_program_i.count[113:95] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[114] | No | No | No | INPUT | |||
lc_otp_program_i.count[118:115] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[119] | No | No | No | INPUT | |||
lc_otp_program_i.count[129:120] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[130] | No | No | No | INPUT | |||
lc_otp_program_i.count[135:131] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[137:136] | No | No | No | INPUT | |||
lc_otp_program_i.count[152:138] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT | |
lc_otp_program_i.count[153] | No | No | No | INPUT | |||
lc_otp_program_i.count[155:154] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[156] | No | No | No | INPUT | |||
lc_otp_program_i.count[177:157] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[178] | No | No | No | INPUT | |||
lc_otp_program_i.count[193:179] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT | |
lc_otp_program_i.count[194] | No | No | No | INPUT | |||
lc_otp_program_i.count[199:195] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[200] | No | No | No | INPUT | |||
lc_otp_program_i.count[201] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[202] | No | No | No | INPUT | |||
lc_otp_program_i.count[207:203] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[208] | No | No | No | INPUT | |||
lc_otp_program_i.count[222:209] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[223] | No | No | No | INPUT | |||
lc_otp_program_i.count[234:224] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT | |
lc_otp_program_i.count[235] | No | No | No | INPUT | |||
lc_otp_program_i.count[253:236] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[254] | No | No | No | INPUT | |||
lc_otp_program_i.count[256:255] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT | |
lc_otp_program_i.count[257] | No | No | No | INPUT | |||
lc_otp_program_i.count[262:258] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[263] | No | No | No | INPUT | |||
lc_otp_program_i.count[265:264] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[266] | No | No | No | INPUT | |||
lc_otp_program_i.count[276:267] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[277] | No | No | No | INPUT | |||
lc_otp_program_i.count[279:278] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[280] | No | No | No | INPUT | |||
lc_otp_program_i.count[283:281] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[284] | No | No | No | INPUT | |||
lc_otp_program_i.count[286:285] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[287] | No | No | No | INPUT | |||
lc_otp_program_i.count[291:288] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[292] | No | No | No | INPUT | |||
lc_otp_program_i.count[298:293] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[300:299] | No | No | No | INPUT | |||
lc_otp_program_i.count[304:301] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[305] | No | No | No | INPUT | |||
lc_otp_program_i.count[309:306] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[310] | No | No | No | INPUT | |||
lc_otp_program_i.count[314:311] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[316:315] | No | No | No | INPUT | |||
lc_otp_program_i.count[333:317] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[334] | No | No | No | INPUT | |||
lc_otp_program_i.count[347:335] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[349:348] | No | No | No | INPUT | |||
lc_otp_program_i.count[350] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[351] | No | No | No | INPUT | |||
lc_otp_program_i.count[352] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[354:353] | No | No | No | INPUT | |||
lc_otp_program_i.count[365:355] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.count[366] | No | No | No | INPUT | |||
lc_otp_program_i.count[373:367] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[374] | No | No | No | INPUT | |||
lc_otp_program_i.count[378:375] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.count[379] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:380] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | INPUT | |
lc_otp_program_i.state[0] | No | No | No | INPUT | |||
lc_otp_program_i.state[10:1] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[11] | No | No | No | INPUT | |||
lc_otp_program_i.state[12] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[13] | No | No | No | INPUT | |||
lc_otp_program_i.state[27:14] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[28] | No | No | No | INPUT | |||
lc_otp_program_i.state[32:29] | Yes | Yes | *T35,*T52,*T126 | Yes | T52,T175,T133 | INPUT | |
lc_otp_program_i.state[34:33] | No | No | No | INPUT | |||
lc_otp_program_i.state[38:35] | Yes | Yes | *T35,*T52,*T126 | Yes | T52,T175,T133 | INPUT | |
lc_otp_program_i.state[39] | No | No | No | INPUT | |||
lc_otp_program_i.state[42:40] | Yes | Yes | T35,T52,T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[43] | No | No | No | INPUT | |||
lc_otp_program_i.state[46:44] | Yes | Yes | T35,T52,T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[47] | No | No | No | INPUT | |||
lc_otp_program_i.state[50:48] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[51] | No | No | No | INPUT | |||
lc_otp_program_i.state[64:52] | Yes | Yes | *T35,*T52,*T126 | Yes | T52,T175,T133 | INPUT | |
lc_otp_program_i.state[65] | No | No | No | INPUT | |||
lc_otp_program_i.state[75:66] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[76] | No | No | No | INPUT | |||
lc_otp_program_i.state[77] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT | |
lc_otp_program_i.state[78] | No | No | No | INPUT | |||
lc_otp_program_i.state[80:79] | Yes | Yes | T35,T52,*T53 | Yes | T52,T53,T125 | INPUT | |
lc_otp_program_i.state[81] | No | No | No | INPUT | |||
lc_otp_program_i.state[89:82] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT | |
lc_otp_program_i.state[91:90] | No | No | No | INPUT | |||
lc_otp_program_i.state[100:92] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT | |
lc_otp_program_i.state[101] | No | No | No | INPUT | |||
lc_otp_program_i.state[112:102] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT | |
lc_otp_program_i.state[113] | No | No | No | INPUT | |||
lc_otp_program_i.state[131:114] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[132] | No | No | No | INPUT | |||
lc_otp_program_i.state[136:133] | Yes | Yes | T35,T52,T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[137] | No | No | No | INPUT | |||
lc_otp_program_i.state[146:138] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT | |
lc_otp_program_i.state[147] | No | No | No | INPUT | |||
lc_otp_program_i.state[150:148] | Yes | Yes | T35,T52,T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[151] | No | No | No | INPUT | |||
lc_otp_program_i.state[155:152] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[156] | No | No | No | INPUT | |||
lc_otp_program_i.state[157] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT | |
lc_otp_program_i.state[160:158] | No | No | No | INPUT | |||
lc_otp_program_i.state[166:161] | Yes | Yes | T35,T52,*T53 | Yes | T52,T53,T125 | INPUT | |
lc_otp_program_i.state[167] | No | No | No | INPUT | |||
lc_otp_program_i.state[171:168] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT | |
lc_otp_program_i.state[172] | No | No | No | INPUT | |||
lc_otp_program_i.state[177:173] | Yes | Yes | T35,T52,*T53 | Yes | T52,T53,T125 | INPUT | |
lc_otp_program_i.state[178] | No | No | No | INPUT | |||
lc_otp_program_i.state[197:179] | Yes | Yes | *T35,*T52,*T53 | Yes | T52,T53,T125 | INPUT | |
lc_otp_program_i.state[199:198] | No | No | No | INPUT | |||
lc_otp_program_i.state[218:200] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[219] | No | No | No | INPUT | |||
lc_otp_program_i.state[225:220] | Yes | Yes | T35,T52,T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[226] | No | No | No | INPUT | |||
lc_otp_program_i.state[231:227] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[232] | No | No | No | INPUT | |||
lc_otp_program_i.state[233] | Yes | Yes | *T177,*T178,*T179 | Yes | T177,T178,T179 | INPUT | |
lc_otp_program_i.state[234] | No | No | No | INPUT | |||
lc_otp_program_i.state[239:235] | Yes | Yes | T35,T52,*T53 | Yes | T52,T53,T125 | INPUT | |
lc_otp_program_i.state[240] | No | No | No | INPUT | |||
lc_otp_program_i.state[257:241] | Yes | Yes | *T35,*T7,*T8 | Yes | T7,T52,T53 | INPUT | |
lc_otp_program_i.state[259:258] | No | No | No | INPUT | |||
lc_otp_program_i.state[263:260] | Yes | Yes | T35,*T7,T52 | Yes | T7,T52,T53 | INPUT | |
lc_otp_program_i.state[265:264] | No | No | No | INPUT | |||
lc_otp_program_i.state[274:266] | Yes | Yes | *T35,*T7,*T52 | Yes | T7,T52,T53 | INPUT | |
lc_otp_program_i.state[275] | No | No | No | INPUT | |||
lc_otp_program_i.state[283:276] | Yes | Yes | T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[284] | No | No | No | INPUT | |||
lc_otp_program_i.state[286:285] | Yes | Yes | T177,T178,T179 | Yes | T177,T178,T179 | INPUT | |
lc_otp_program_i.state[287] | No | No | No | INPUT | |||
lc_otp_program_i.state[294:288] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[295] | No | No | No | INPUT | |||
lc_otp_program_i.state[300:296] | Yes | Yes | T35,*T7,*T8 | Yes | T7,T52,T53 | INPUT | |
lc_otp_program_i.state[302:301] | No | No | No | INPUT | |||
lc_otp_program_i.state[305:303] | Yes | Yes | T35,*T7,*T8 | Yes | T7,T52,T53 | INPUT | |
lc_otp_program_i.state[306] | No | No | No | INPUT | |||
lc_otp_program_i.state[307] | Yes | Yes | *T35,*T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[308] | No | No | No | INPUT | |||
lc_otp_program_i.state[313:309] | Yes | Yes | T35,*T7,*T8 | Yes | T7,T52,T53 | INPUT | |
lc_otp_program_i.state[314] | No | No | No | INPUT | |||
lc_otp_program_i.state[318:315] | Yes | Yes | T35,T52,*T175 | Yes | T52,T175,T176 | INPUT | |
lc_otp_program_i.state[319] | No | No | No | INPUT | |||
lc_otp_program_i.req | Yes | Yes | T35,T52,T53 | Yes | T35,T52,T53 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T35,T52,T53 | Yes | T35,T52,T53 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T35,T180,T181 | Yes | T35,T180,T181 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T6,T35,T66 | Yes | T6,T35,T66 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T35,T52,T53 | Yes | T35,T52,T53 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T2,T87,T35 | Yes | T35,T7,T8 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T52,T182,T176 | Yes | T122,T52,T123 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T122,T52 | Yes | T1,T2,T87 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T6,T66,T52 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T52,T182,T176 | Yes | T122,T52,T123 | OUTPUT | |
otp_lc_data_o.count[2:0] | Yes | Yes | T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[3] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[11:4] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[12] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[23:13] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[26:24] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[34:27] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[35] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[43:36] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[45:44] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[52:46] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[53] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[57:54] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[58] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[60:59] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[61] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[67:62] | Yes | Yes | *T52,*T111,*T175 | Yes | T52,T175,T133 | OUTPUT | |
otp_lc_data_o.count[69:68] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[70] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[71] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[72] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[74:73] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[75] | Yes | Yes | *T52,*T111,*T175 | Yes | T52,T175,T133 | OUTPUT | |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[78:77] | Yes | Yes | T52,T175,T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[79] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[90:80] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[91] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[93:92] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[94] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[113:95] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[114] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[118:115] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[129:120] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[130] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[135:131] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[137:136] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[152:138] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[155:154] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[177:157] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[193:179] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[194] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[199:195] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[200] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[201] | Yes | Yes | *T175,*T183,*T184 | Yes | T35,T175,T183 | OUTPUT | |
otp_lc_data_o.count[202] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[207:203] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[208] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[222:209] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[223] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[234:224] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[253:236] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[254] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[256:255] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[257] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[262:258] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[265:264] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[266] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[276:267] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[279:278] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[280] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[283:281] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[284] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[286:285] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[291:288] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[298:293] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[300:299] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[304:301] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[305] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[309:306] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[310] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[314:311] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[316:315] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[333:317] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[347:335] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[349:348] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[352] | Yes | Yes | *T184,*T185,*T186 | Yes | T35,T184,T185 | OUTPUT | |
otp_lc_data_o.count[354:353] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[365:355] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.count[366] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[373:367] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.count[374] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[378:375] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:380] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.state[0] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[10:1] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.state[11] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[12] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.state[13] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[27:14] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[28] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[32:29] | Yes | Yes | *T52,*T126,*T111 | Yes | T52,T175,T133 | OUTPUT | |
otp_lc_data_o.state[34:33] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[38:35] | Yes | Yes | *T52,*T126,*T111 | Yes | T52,T175,T133 | OUTPUT | |
otp_lc_data_o.state[39] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[42:40] | Yes | Yes | T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[46:44] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[47] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[50:48] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[51] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[64:52] | Yes | Yes | *T52,*T126,*T111 | Yes | T52,T175,T133 | OUTPUT | |
otp_lc_data_o.state[65] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[75:66] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.state[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[77] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[78] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[80:79] | Yes | Yes | T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT | |
otp_lc_data_o.state[81] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[89:82] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.state[91:90] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[100:92] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[101] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[112:102] | Yes | Yes | *T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT | |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[131:114] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[136:133] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[146:138] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[147] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[150:148] | Yes | Yes | T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.state[151] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[155:152] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[157] | Yes | Yes | *T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT | |
otp_lc_data_o.state[160:158] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[166:161] | Yes | Yes | T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT | |
otp_lc_data_o.state[167] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[171:168] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[177:173] | Yes | Yes | T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT | |
otp_lc_data_o.state[178] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[197:179] | Yes | Yes | *T52,*T53,*T126 | Yes | T52,T53,T125 | OUTPUT | |
otp_lc_data_o.state[199:198] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[218:200] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[219] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[225:220] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[231:227] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[232] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[233] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.state[234] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[239:235] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[240] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[257:241] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[259:258] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[263:260] | Yes | Yes | *T7,*T52,*T53 | Yes | T7,T52,T53 | OUTPUT | |
otp_lc_data_o.state[265:264] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[274:266] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[275] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[283:276] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.state[284] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[286:285] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_lc_data_o.state[287] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[294:288] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.state[295] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[300:296] | Yes | Yes | *T7,*T8,T52 | Yes | T7,T52,T53 | OUTPUT | |
otp_lc_data_o.state[302:301] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[305:303] | Yes | Yes | *T7,*T8,*T52 | Yes | T7,T52,T53 | OUTPUT | |
otp_lc_data_o.state[306] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[307] | Yes | Yes | *T52,*T175,*T176 | Yes | T52,T175,T176 | OUTPUT | |
otp_lc_data_o.state[308] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[313:309] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[314] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[318:315] | Yes | Yes | *T1,*T6,*T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[319] | No | No | No | OUTPUT | |||
otp_lc_data_o.error | Yes | Yes | T6,T35,T66 | Yes | T6,T35,T66 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T52,T182,T176 | Yes | T122,T52,T123 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T35,T122 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T52,T182,T176 | Yes | T122,T52,T123 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T6,T8,T122 | Yes | T4,T6,T8 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T7,T50,T51 | Yes | T7,T50,T51 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T109,T187,T188 | Yes | T109,T187,T188 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T189,T190,T191 | Yes | T189,T190,T191 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T7,T50,T51 | Yes | T7,T50,T51 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T109,T187,T188 | Yes | T109,T187,T188 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T189,T192,T193 | Yes | T189,T192,T193 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T7,T50,T51 | Yes | T7,T50,T51 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T87,T5 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T6 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T7,T50,T51 | Yes | T7,T50,T51 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T3,T4 | Yes | T1,T6,T8 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[22:1] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[23] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[57:24] | Yes | Yes | *T194,*T195,*T196 | Yes | T194,T195,T196 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[58] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[79:59] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[107:81] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[108] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[112:109] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[113] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[180:114] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[182:181] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[237:183] | Yes | Yes | *T133,*T194,*T190 | Yes | T133,T194,T190 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[238] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[250:239] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[251] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:252] | Yes | Yes | T195,T194,T1 | Yes | T195,T194,T1 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T7,T8 | Yes | T1,T87,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T6,T35 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T133,T194,T195 | Yes | T133,T194,T195 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T1,T6,T35 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |