SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
83.28 | 83.28 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 83.47 | 83.47 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
83.47 | 83.47 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
83.47 | 83.47 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.22 | 92.47 | 87.18 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 121 | 73.78 |
Total Bits | 11012 | 9171 | 83.28 |
Total Bits 0->1 | 5506 | 4601 | 83.56 |
Total Bits 1->0 | 5506 | 4570 | 83.00 |
Ports | 164 | 121 | 73.78 |
Port Bits | 11012 | 9171 | 83.28 |
Port Bits 0->1 | 5506 | 4601 | 83.56 |
Port Bits 1->0 | 5506 | 4570 | 83.00 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T139,T200,T201 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[2:1] | No | No | No | INPUT | ||
core_tl_i.a_user.instr_type[3] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[1:0] | No | No | No | INPUT | ||
core_tl_i.a_address[11:2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T7,*T10,*T14 | Yes | T7,T10,T14 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T49,T50,T51 | Yes | T49,T50,T51 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[0] | Yes | Yes | *T99,*T100,*T101 | Yes | T99,T100,T101 | INPUT |
core_tl_i.a_opcode[1] | No | No | No | INPUT | ||
core_tl_i.a_opcode[2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | No | No | No | OUTPUT | ||
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[1:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[3:2] | No | No | No | OUTPUT | ||
core_tl_o.d_user.rsp_intg[5:4] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6] | No | No | No | OUTPUT | ||
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | No | No | No | OUTPUT | ||
core_tl_o.d_source[1:0] | Yes | Yes | *T10,*T174,*T202 | Yes | T10,T174,T202 | OUTPUT |
core_tl_o.d_source[5:2] | No | No | No | OUTPUT | ||
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[0] | No | No | No | OUTPUT | ||
core_tl_o.d_size[1] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T5,*T155,*T134 | Yes | T5,T155,T134 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | No | No | No | INPUT | ||
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[2:1] | No | No | No | INPUT | ||
prim_tl_i.a_user.instr_type[3] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | No | No | No | INPUT | ||
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[1:0] | No | No | No | INPUT | ||
prim_tl_i.a_address[4:2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[15] | No | No | No | INPUT | ||
prim_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T7,*T10,*T14 | Yes | T7,T10,T14 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T49,T50,T51 | Yes | T49,T50,T51 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[0] | Yes | Yes | *T99,*T100,*T101 | Yes | T99,T100,T101 | INPUT |
prim_tl_i.a_opcode[1] | No | No | No | INPUT | ||
prim_tl_i.a_opcode[2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_valid | No | No | No | INPUT | ||
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | No | No | No | OUTPUT | ||
prim_tl_o.d_user.rsp_intg[1:0] | No | No | No | OUTPUT | ||
prim_tl_o.d_user.rsp_intg[2] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
prim_tl_o.d_user.rsp_intg[4:3] | No | No | No | OUTPUT | ||
prim_tl_o.d_user.rsp_intg[5] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6] | No | No | No | OUTPUT | ||
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT |
prim_tl_o.d_sink | No | No | No | OUTPUT | ||
prim_tl_o.d_source[5:0] | No | No | No | OUTPUT | ||
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | No | No | No | OUTPUT | ||
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | No | No | No | OUTPUT | ||
intr_otp_operation_done_o | Yes | Yes | T155,T160,T161 | Yes | T155,T160,T161 | OUTPUT |
intr_otp_error_o | Yes | Yes | T155,T160,T161 | Yes | T155,T160,T161 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T19,T21,T22 | Yes | T21,T22,T23 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T21,T22,T23 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T1,T92,T93 | Yes | T1,T92,T93 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T1,T92,T93 | Yes | T1,T92,T93 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T25,T88,T127 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[8:0] | No | No | Yes | T203,T204,T205 | INPUT | |
lc_otp_vendor_test_i.ctrl[9] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[13:10] | No | No | Yes | T204,T203,T205 | INPUT | |
lc_otp_vendor_test_i.ctrl[15:14] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[27:16] | No | No | Yes | T203,T205,T204 | INPUT | |
lc_otp_vendor_test_i.ctrl[28] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:29] | No | No | Yes | T205,T203,T204 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[26:0] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[27] | No | No | No | INPUT | ||
lc_otp_program_i.count[30:28] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[31] | No | No | No | INPUT | ||
lc_otp_program_i.count[43:32] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | INPUT |
lc_otp_program_i.count[44] | No | No | No | INPUT | ||
lc_otp_program_i.count[59:45] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | INPUT |
lc_otp_program_i.count[60] | No | No | No | INPUT | ||
lc_otp_program_i.count[64:61] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | INPUT |
lc_otp_program_i.count[66:65] | No | No | No | INPUT | ||
lc_otp_program_i.count[70:67] | Yes | Yes | T90,T91,*T209 | Yes | T10,T210,T211 | INPUT |
lc_otp_program_i.count[72:71] | No | No | No | INPUT | ||
lc_otp_program_i.count[83:73] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[84] | No | No | No | INPUT | ||
lc_otp_program_i.count[97:85] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[98] | No | No | No | INPUT | ||
lc_otp_program_i.count[105:99] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[106] | No | No | No | INPUT | ||
lc_otp_program_i.count[112:107] | Yes | Yes | *T74,*T90,*T91 | Yes | T10,T210,T211 | INPUT |
lc_otp_program_i.count[113] | No | No | No | INPUT | ||
lc_otp_program_i.count[115:114] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[116] | No | No | No | INPUT | ||
lc_otp_program_i.count[121:117] | Yes | Yes | *T74,T90,T91 | Yes | T10,T210,T211 | INPUT |
lc_otp_program_i.count[124:122] | No | No | No | INPUT | ||
lc_otp_program_i.count[132:125] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[133] | No | No | No | INPUT | ||
lc_otp_program_i.count[150:134] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[151] | No | No | No | INPUT | ||
lc_otp_program_i.count[167:152] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[168] | No | No | No | INPUT | ||
lc_otp_program_i.count[170:169] | Yes | Yes | T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[171] | No | No | No | INPUT | ||
lc_otp_program_i.count[182:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT |
lc_otp_program_i.count[185:183] | No | No | No | INPUT | ||
lc_otp_program_i.count[191:186] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[193:192] | No | No | No | INPUT | ||
lc_otp_program_i.count[202:194] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[204:203] | No | No | No | INPUT | ||
lc_otp_program_i.count[214:205] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[215] | No | No | No | INPUT | ||
lc_otp_program_i.count[225:216] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[226] | No | No | No | INPUT | ||
lc_otp_program_i.count[227] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[229:228] | No | No | No | INPUT | ||
lc_otp_program_i.count[234:230] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT |
lc_otp_program_i.count[235] | No | No | No | INPUT | ||
lc_otp_program_i.count[238:236] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT |
lc_otp_program_i.count[239] | No | No | No | INPUT | ||
lc_otp_program_i.count[247:240] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[248] | No | No | No | INPUT | ||
lc_otp_program_i.count[249] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[250] | No | No | No | INPUT | ||
lc_otp_program_i.count[256:251] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[257] | No | No | No | INPUT | ||
lc_otp_program_i.count[276:258] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT |
lc_otp_program_i.count[277] | No | No | No | INPUT | ||
lc_otp_program_i.count[286:278] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[287] | No | No | No | INPUT | ||
lc_otp_program_i.count[289:288] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[290] | No | No | No | INPUT | ||
lc_otp_program_i.count[306:291] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[307] | No | No | No | INPUT | ||
lc_otp_program_i.count[313:308] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT |
lc_otp_program_i.count[315:314] | No | No | No | INPUT | ||
lc_otp_program_i.count[320:316] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[321] | No | No | No | INPUT | ||
lc_otp_program_i.count[325:322] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.count[326] | No | No | No | INPUT | ||
lc_otp_program_i.count[340:327] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT |
lc_otp_program_i.count[341] | No | No | No | INPUT | ||
lc_otp_program_i.count[356:342] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[357] | No | No | No | INPUT | ||
lc_otp_program_i.count[359:358] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | INPUT |
lc_otp_program_i.count[360] | No | No | No | INPUT | ||
lc_otp_program_i.count[376:361] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT |
lc_otp_program_i.count[378:377] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:379] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[7:0] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[8] | No | No | No | INPUT | ||
lc_otp_program_i.state[15:9] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[16] | No | No | No | INPUT | ||
lc_otp_program_i.state[17] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[19:18] | No | No | No | INPUT | ||
lc_otp_program_i.state[24:20] | Yes | Yes | T90,T91,*T209 | Yes | T10,T210,T211 | INPUT |
lc_otp_program_i.state[26:25] | No | No | No | INPUT | ||
lc_otp_program_i.state[35:27] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[36] | No | No | No | INPUT | ||
lc_otp_program_i.state[51:37] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[53:52] | No | No | No | INPUT | ||
lc_otp_program_i.state[69:54] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[70] | No | No | No | INPUT | ||
lc_otp_program_i.state[71] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[72] | No | No | No | INPUT | ||
lc_otp_program_i.state[75:73] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[76] | No | No | No | INPUT | ||
lc_otp_program_i.state[87:77] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T10,T212 | INPUT |
lc_otp_program_i.state[88] | No | No | No | INPUT | ||
lc_otp_program_i.state[89] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[91:90] | No | No | No | INPUT | ||
lc_otp_program_i.state[96:92] | Yes | Yes | T90,T91,*T209 | Yes | T70,T71,T10 | INPUT |
lc_otp_program_i.state[97] | No | No | No | INPUT | ||
lc_otp_program_i.state[110:98] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[111] | No | No | No | INPUT | ||
lc_otp_program_i.state[120:112] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | INPUT |
lc_otp_program_i.state[121] | No | No | No | INPUT | ||
lc_otp_program_i.state[123:122] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[124] | No | No | No | INPUT | ||
lc_otp_program_i.state[129:125] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[130] | No | No | No | INPUT | ||
lc_otp_program_i.state[147:131] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[149:148] | No | No | No | INPUT | ||
lc_otp_program_i.state[152:150] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | INPUT |
lc_otp_program_i.state[155:153] | No | No | No | INPUT | ||
lc_otp_program_i.state[156] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[157] | No | No | No | INPUT | ||
lc_otp_program_i.state[159:158] | Yes | Yes | T90,T91,T209 | Yes | T70,T71,T10 | INPUT |
lc_otp_program_i.state[160] | No | No | No | INPUT | ||
lc_otp_program_i.state[167:161] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[168] | No | No | No | INPUT | ||
lc_otp_program_i.state[175:169] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[176] | No | No | No | INPUT | ||
lc_otp_program_i.state[188:177] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | INPUT |
lc_otp_program_i.state[189] | No | No | No | INPUT | ||
lc_otp_program_i.state[196:190] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[198:197] | No | No | No | INPUT | ||
lc_otp_program_i.state[209:199] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | INPUT |
lc_otp_program_i.state[210] | No | No | No | INPUT | ||
lc_otp_program_i.state[216:211] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | INPUT |
lc_otp_program_i.state[217] | No | No | No | INPUT | ||
lc_otp_program_i.state[221:218] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[222] | No | No | No | INPUT | ||
lc_otp_program_i.state[225:223] | Yes | Yes | T90,T91,*T209 | Yes | T70,T71,T10 | INPUT |
lc_otp_program_i.state[227:226] | No | No | No | INPUT | ||
lc_otp_program_i.state[229:228] | Yes | Yes | T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[230] | No | No | No | INPUT | ||
lc_otp_program_i.state[244:231] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[245] | No | No | No | INPUT | ||
lc_otp_program_i.state[257:246] | Yes | Yes | *T134,*T90,*T91 | Yes | T134,T70,T71 | INPUT |
lc_otp_program_i.state[259:258] | No | No | No | INPUT | ||
lc_otp_program_i.state[261:260] | Yes | Yes | T90,T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[263:262] | No | No | No | INPUT | ||
lc_otp_program_i.state[282:264] | Yes | Yes | *T72,*T73,*T74 | Yes | T70,T71,T10 | INPUT |
lc_otp_program_i.state[283] | No | No | No | INPUT | ||
lc_otp_program_i.state[288:284] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[289] | No | No | No | INPUT | ||
lc_otp_program_i.state[291:290] | Yes | Yes | T72,T73,T74 | Yes | T134,T70,T71 | INPUT |
lc_otp_program_i.state[292] | No | No | No | INPUT | ||
lc_otp_program_i.state[298:293] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT |
lc_otp_program_i.state[300:299] | No | No | No | INPUT | ||
lc_otp_program_i.state[309:301] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[311:310] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:312] | Yes | Yes | T72,T73,T74 | Yes | T134,T70,T71 | INPUT |
lc_otp_program_i.req | Yes | Yes | T90,T91,T70 | Yes | T90,T91,T70 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T90,T91,T70 | Yes | T90,T91,T70 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T213,T214,T215 | Yes | T213,T214,T215 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T1,T92,T93 | Yes | T1,T92,T93 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T70,T71,T10 | Yes | T90,T91,T70 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T1,T5,T93 | Yes | T1,T24,T5 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T191,T210,T216 | Yes | T5,T134,T135 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T24,T34,T4 | Yes | T4,T5,T164 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T5,T164 | Yes | T1,T24,T5 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T191,T210,T216 | Yes | T5,T134,T135 | OUTPUT |
otp_lc_data_o.count[26:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[27] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[30:28] | Yes | Yes | T90,T91,T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[43:32] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[44] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[59:45] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[60] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[64:61] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[66:65] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[70:67] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[72:71] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[83:73] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[84] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[97:85] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[98] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[105:99] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[106] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[112:107] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[115:114] | Yes | Yes | T90,T91,T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[116] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[121:117] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[124:122] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[132:125] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[133] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[150:134] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[151] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[167:152] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[168] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[170:169] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[171] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[182:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[185:183] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[191:186] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[193:192] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[202:194] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[204:203] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[214:205] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[215] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[225:216] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[227] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[229:228] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[234:230] | Yes | Yes | *T71,*T217,*T113 | Yes | T71,T217,T213 | OUTPUT |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[238:236] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[239] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[247:240] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[248] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[249] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[250] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[256:251] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[257] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[276:258] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[286:278] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[289:288] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.count[290] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[306:291] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[307] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[313:308] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[315:314] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[320:316] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[321] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[325:322] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[326] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[340:327] | Yes | Yes | *T71,*T217,*T113 | Yes | T71,T217,T213 | OUTPUT |
otp_lc_data_o.count[341] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[356:342] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[357] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[359:358] | Yes | Yes | T71,T217,T113 | Yes | T71,T217,T213 | OUTPUT |
otp_lc_data_o.count[360] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[376:361] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.count[378:377] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:379] | Yes | Yes | T90,T91,T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[7:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.state[8] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[15:9] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[16] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[17] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[19:18] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[24:20] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[26:25] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[35:27] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[36] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[51:37] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[53:52] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[69:54] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[70] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[71] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[72] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[75:73] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[87:77] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[88] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[89] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.state[91:90] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[96:92] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT |
otp_lc_data_o.state[97] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[110:98] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[111] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[120:112] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT |
otp_lc_data_o.state[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[123:122] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[124] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[129:125] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[130] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[147:131] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[149:148] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[152:150] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT |
otp_lc_data_o.state[155:153] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[156] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[157] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[159:158] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT |
otp_lc_data_o.state[160] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[167:161] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[168] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[175:169] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[176] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[188:177] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[196:190] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[198:197] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[209:199] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT |
otp_lc_data_o.state[210] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[216:211] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[217] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[221:218] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[222] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[225:223] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT |
otp_lc_data_o.state[227:226] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[229:228] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.state[230] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[244:231] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[245] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[257:246] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[259:258] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[261:260] | Yes | Yes | T90,T91,*T10 | Yes | T10,T210,T211 | OUTPUT |
otp_lc_data_o.state[263:262] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[282:264] | Yes | Yes | *T72,*T73,*T74 | Yes | T70,T71,T10 | OUTPUT |
otp_lc_data_o.state[283] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[288:284] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.state[289] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[291:290] | Yes | Yes | T72,T73,T74 | Yes | T134,T70,T71 | OUTPUT |
otp_lc_data_o.state[292] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[298:293] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[300:299] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[309:301] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_lc_data_o.state[311:310] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:312] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T1,T92,T93 | Yes | T1,T92,T93 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T191,T210,T216 | Yes | T5,T134,T135 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T92 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T191,T210,T216 | Yes | T5,T134,T135 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T4,T5,T93 | Yes | T3,T103,T4 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T67,T68,T120 | Yes | T67,T68,T120 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T120,T129,T218 | Yes | T120,T129,T218 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T219,T220,T221 | Yes | T219,T220,T221 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T67,T68,T120 | Yes | T67,T68,T120 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T120,T129,T218 | Yes | T120,T129,T218 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T219,T220,T221 | Yes | T219,T220,T221 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T67,T68,T69 | Yes | T67,T68,T69 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T67,T68,T69 | Yes | T67,T68,T69 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T4,T25 | Yes | T1,T34,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[8:0] | Yes | Yes | *T222,*T223,*T1 | Yes | T222,T223,T1 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[9] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[23:10] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[24] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[79:25] | Yes | Yes | *T222,*T1,*T2 | Yes | T222,T1,T4 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[98:81] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[99] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[131:100] | Yes | Yes | *T188,*T224,*T225 | Yes | T188,T224,T225 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[132] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[141:133] | Yes | Yes | *T188,*T224,*T222 | Yes | T188,T224,T222 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[142] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[231:143] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[232] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[251:233] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[252] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:253] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T3,T34,T103 | Yes | T4,T5,T92 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[11:0] | Yes | Yes | *T64,*T188,*T65 | Yes | T166,T67,T68 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[12] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[25:13] | Yes | Yes | *T188,*T224,*T222 | Yes | T188,T224,T222 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[26] | No | No | Yes | T224,T226,T227 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:27] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T28,T29,T30 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 121 | 75.62 |
Total Bits | 10986 | 9170 | 83.47 |
Total Bits 0->1 | 5493 | 4600 | 83.74 |
Total Bits 1->0 | 5493 | 4570 | 83.20 |
Ports | 160 | 121 | 75.62 |
Port Bits | 10986 | 9170 | 83.47 |
Port Bits 0->1 | 5493 | 4600 | 83.74 |
Port Bits 1->0 | 5493 | 4570 | 83.20 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T139,T200,T201 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[2:1] | No | No | No | INPUT | |||
core_tl_i.a_user.instr_type[3] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[1:0] | No | No | No | INPUT | |||
core_tl_i.a_address[11:2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T7,*T10,*T14 | Yes | T7,T10,T14 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T49,T50,T51 | Yes | T49,T50,T51 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[0] | Yes | Yes | *T99,*T100,*T101 | Yes | T99,T100,T101 | INPUT | |
core_tl_i.a_opcode[1] | No | No | No | INPUT | |||
core_tl_i.a_opcode[2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | No | No | No | OUTPUT | |||
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[1:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[3:2] | No | No | No | OUTPUT | |||
core_tl_o.d_user.rsp_intg[5:4] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6] | No | No | No | OUTPUT | |||
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | No | No | No | OUTPUT | |||
core_tl_o.d_source[1:0] | Yes | Yes | *T10,*T174,*T202 | Yes | T10,T174,T202 | OUTPUT | |
core_tl_o.d_source[5:2] | No | No | No | OUTPUT | |||
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[0] | No | No | No | OUTPUT | |||
core_tl_o.d_size[1] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T5,*T155,*T134 | Yes | T5,T155,T134 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | No | No | No | INPUT | |||
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[2:1] | No | No | No | INPUT | |||
prim_tl_i.a_user.instr_type[3] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | No | No | No | INPUT | |||
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[1:0] | No | No | No | INPUT | |||
prim_tl_i.a_address[4:2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[15] | No | No | No | INPUT | |||
prim_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T7,*T10,*T14 | Yes | T7,T10,T14 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T49,T50,T51 | Yes | T49,T50,T51 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[0] | Yes | Yes | *T99,*T100,*T101 | Yes | T99,T100,T101 | INPUT | |
prim_tl_i.a_opcode[1] | No | No | No | INPUT | |||
prim_tl_i.a_opcode[2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_valid | No | No | No | INPUT | |||
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | No | No | No | OUTPUT | |||
prim_tl_o.d_user.rsp_intg[1:0] | No | No | No | OUTPUT | |||
prim_tl_o.d_user.rsp_intg[2] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[4:3] | No | No | No | OUTPUT | |||
prim_tl_o.d_user.rsp_intg[5] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6] | No | No | No | OUTPUT | |||
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT | |
prim_tl_o.d_sink | No | No | No | OUTPUT | |||
prim_tl_o.d_source[5:0] | No | No | No | OUTPUT | |||
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | No | No | No | OUTPUT | |||
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | No | No | No | OUTPUT | |||
intr_otp_operation_done_o | Yes | Yes | T155,T160,T161 | Yes | T155,T160,T161 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T155,T160,T161 | Yes | T155,T160,T161 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T19,T21,T22 | Yes | T21,T22,T23 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T21,T22,T23 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T1,T92,T93 | Yes | T1,T92,T93 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T1,T92,T93 | Yes | T1,T92,T93 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T19,T21,T22 | Yes | T19,T21,T22 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T25,T88,T127 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[8:0] | No | No | Yes | T203,T204,T205 | INPUT | ||
lc_otp_vendor_test_i.ctrl[9] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[13:10] | No | No | Yes | T204,T203,T205 | INPUT | ||
lc_otp_vendor_test_i.ctrl[15:14] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[27:16] | No | No | Yes | T203,T205,T204 | INPUT | ||
lc_otp_vendor_test_i.ctrl[28] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:29] | No | No | Yes | T205,T203,T204 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[26:0] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[27] | No | No | No | INPUT | |||
lc_otp_program_i.count[30:28] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[31] | No | No | No | INPUT | |||
lc_otp_program_i.count[43:32] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | INPUT | |
lc_otp_program_i.count[44] | No | No | No | INPUT | |||
lc_otp_program_i.count[59:45] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | INPUT | |
lc_otp_program_i.count[60] | No | No | No | INPUT | |||
lc_otp_program_i.count[64:61] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | INPUT | |
lc_otp_program_i.count[66:65] | No | No | No | INPUT | |||
lc_otp_program_i.count[70:67] | Yes | Yes | T90,T91,*T209 | Yes | T10,T210,T211 | INPUT | |
lc_otp_program_i.count[72:71] | No | No | No | INPUT | |||
lc_otp_program_i.count[83:73] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[84] | No | No | No | INPUT | |||
lc_otp_program_i.count[97:85] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[98] | No | No | No | INPUT | |||
lc_otp_program_i.count[105:99] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[106] | No | No | No | INPUT | |||
lc_otp_program_i.count[112:107] | Yes | Yes | *T74,*T90,*T91 | Yes | T10,T210,T211 | INPUT | |
lc_otp_program_i.count[113] | No | No | No | INPUT | |||
lc_otp_program_i.count[115:114] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[116] | No | No | No | INPUT | |||
lc_otp_program_i.count[121:117] | Yes | Yes | *T74,T90,T91 | Yes | T10,T210,T211 | INPUT | |
lc_otp_program_i.count[124:122] | No | No | No | INPUT | |||
lc_otp_program_i.count[132:125] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[133] | No | No | No | INPUT | |||
lc_otp_program_i.count[150:134] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[151] | No | No | No | INPUT | |||
lc_otp_program_i.count[167:152] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[168] | No | No | No | INPUT | |||
lc_otp_program_i.count[170:169] | Yes | Yes | T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[171] | No | No | No | INPUT | |||
lc_otp_program_i.count[182:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT | |
lc_otp_program_i.count[185:183] | No | No | No | INPUT | |||
lc_otp_program_i.count[191:186] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[193:192] | No | No | No | INPUT | |||
lc_otp_program_i.count[202:194] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[204:203] | No | No | No | INPUT | |||
lc_otp_program_i.count[214:205] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[215] | No | No | No | INPUT | |||
lc_otp_program_i.count[225:216] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[226] | No | No | No | INPUT | |||
lc_otp_program_i.count[227] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[229:228] | No | No | No | INPUT | |||
lc_otp_program_i.count[234:230] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT | |
lc_otp_program_i.count[235] | No | No | No | INPUT | |||
lc_otp_program_i.count[238:236] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT | |
lc_otp_program_i.count[239] | No | No | No | INPUT | |||
lc_otp_program_i.count[247:240] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[248] | No | No | No | INPUT | |||
lc_otp_program_i.count[249] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[250] | No | No | No | INPUT | |||
lc_otp_program_i.count[256:251] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[257] | No | No | No | INPUT | |||
lc_otp_program_i.count[276:258] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT | |
lc_otp_program_i.count[277] | No | No | No | INPUT | |||
lc_otp_program_i.count[286:278] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[287] | No | No | No | INPUT | |||
lc_otp_program_i.count[289:288] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[290] | No | No | No | INPUT | |||
lc_otp_program_i.count[306:291] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[307] | No | No | No | INPUT | |||
lc_otp_program_i.count[313:308] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT | |
lc_otp_program_i.count[315:314] | No | No | No | INPUT | |||
lc_otp_program_i.count[320:316] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[321] | No | No | No | INPUT | |||
lc_otp_program_i.count[325:322] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.count[326] | No | No | No | INPUT | |||
lc_otp_program_i.count[340:327] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT | |
lc_otp_program_i.count[341] | No | No | No | INPUT | |||
lc_otp_program_i.count[356:342] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[357] | No | No | No | INPUT | |||
lc_otp_program_i.count[359:358] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | INPUT | |
lc_otp_program_i.count[360] | No | No | No | INPUT | |||
lc_otp_program_i.count[376:361] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | INPUT | |
lc_otp_program_i.count[378:377] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:379] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[7:0] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[8] | No | No | No | INPUT | |||
lc_otp_program_i.state[15:9] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[16] | No | No | No | INPUT | |||
lc_otp_program_i.state[17] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[19:18] | No | No | No | INPUT | |||
lc_otp_program_i.state[24:20] | Yes | Yes | T90,T91,*T209 | Yes | T10,T210,T211 | INPUT | |
lc_otp_program_i.state[26:25] | No | No | No | INPUT | |||
lc_otp_program_i.state[35:27] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[36] | No | No | No | INPUT | |||
lc_otp_program_i.state[51:37] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[53:52] | No | No | No | INPUT | |||
lc_otp_program_i.state[69:54] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[70] | No | No | No | INPUT | |||
lc_otp_program_i.state[71] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[72] | No | No | No | INPUT | |||
lc_otp_program_i.state[75:73] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[76] | No | No | No | INPUT | |||
lc_otp_program_i.state[87:77] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T10,T212 | INPUT | |
lc_otp_program_i.state[88] | No | No | No | INPUT | |||
lc_otp_program_i.state[89] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[91:90] | No | No | No | INPUT | |||
lc_otp_program_i.state[96:92] | Yes | Yes | T90,T91,*T209 | Yes | T70,T71,T10 | INPUT | |
lc_otp_program_i.state[97] | No | No | No | INPUT | |||
lc_otp_program_i.state[110:98] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[111] | No | No | No | INPUT | |||
lc_otp_program_i.state[120:112] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | INPUT | |
lc_otp_program_i.state[121] | No | No | No | INPUT | |||
lc_otp_program_i.state[123:122] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[124] | No | No | No | INPUT | |||
lc_otp_program_i.state[129:125] | Yes | Yes | T90,T91,T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[130] | No | No | No | INPUT | |||
lc_otp_program_i.state[147:131] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[149:148] | No | No | No | INPUT | |||
lc_otp_program_i.state[152:150] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | INPUT | |
lc_otp_program_i.state[155:153] | No | No | No | INPUT | |||
lc_otp_program_i.state[156] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[157] | No | No | No | INPUT | |||
lc_otp_program_i.state[159:158] | Yes | Yes | T90,T91,T209 | Yes | T70,T71,T10 | INPUT | |
lc_otp_program_i.state[160] | No | No | No | INPUT | |||
lc_otp_program_i.state[167:161] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[168] | No | No | No | INPUT | |||
lc_otp_program_i.state[175:169] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[176] | No | No | No | INPUT | |||
lc_otp_program_i.state[188:177] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | INPUT | |
lc_otp_program_i.state[189] | No | No | No | INPUT | |||
lc_otp_program_i.state[196:190] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[198:197] | No | No | No | INPUT | |||
lc_otp_program_i.state[209:199] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | INPUT | |
lc_otp_program_i.state[210] | No | No | No | INPUT | |||
lc_otp_program_i.state[216:211] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | INPUT | |
lc_otp_program_i.state[217] | No | No | No | INPUT | |||
lc_otp_program_i.state[221:218] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[222] | No | No | No | INPUT | |||
lc_otp_program_i.state[225:223] | Yes | Yes | T90,T91,*T209 | Yes | T70,T71,T10 | INPUT | |
lc_otp_program_i.state[227:226] | No | No | No | INPUT | |||
lc_otp_program_i.state[229:228] | Yes | Yes | T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[230] | No | No | No | INPUT | |||
lc_otp_program_i.state[244:231] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[245] | No | No | No | INPUT | |||
lc_otp_program_i.state[257:246] | Yes | Yes | *T134,*T90,*T91 | Yes | T134,T70,T71 | INPUT | |
lc_otp_program_i.state[259:258] | No | No | No | INPUT | |||
lc_otp_program_i.state[261:260] | Yes | Yes | T90,T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[263:262] | No | No | No | INPUT | |||
lc_otp_program_i.state[282:264] | Yes | Yes | *T72,*T73,*T74 | Yes | T70,T71,T10 | INPUT | |
lc_otp_program_i.state[283] | No | No | No | INPUT | |||
lc_otp_program_i.state[288:284] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[289] | No | No | No | INPUT | |||
lc_otp_program_i.state[291:290] | Yes | Yes | T72,T73,T74 | Yes | T134,T70,T71 | INPUT | |
lc_otp_program_i.state[292] | No | No | No | INPUT | |||
lc_otp_program_i.state[298:293] | Yes | Yes | *T90,*T91,*T10 | Yes | T90,T91,T10 | INPUT | |
lc_otp_program_i.state[300:299] | No | No | No | INPUT | |||
lc_otp_program_i.state[309:301] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[311:310] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:312] | Yes | Yes | T72,T73,T74 | Yes | T134,T70,T71 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T90,T91,T70 | Yes | T90,T91,T70 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T90,T91,T70 | Yes | T90,T91,T70 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T213,T214,T215 | Yes | T213,T214,T215 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T1,T92,T93 | Yes | T1,T92,T93 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T70,T71,T10 | Yes | T90,T91,T70 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T1,T5,T93 | Yes | T1,T24,T5 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T191,T210,T216 | Yes | T5,T134,T135 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T24,T34,T4 | Yes | T4,T5,T164 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T5,T164 | Yes | T1,T24,T5 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T191,T210,T216 | Yes | T5,T134,T135 | OUTPUT | |
otp_lc_data_o.count[26:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[27] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[30:28] | Yes | Yes | T90,T91,T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[43:32] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[44] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[59:45] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[60] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[64:61] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[66:65] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[70:67] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[72:71] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[83:73] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[84] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[97:85] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[98] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[105:99] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[106] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[112:107] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[115:114] | Yes | Yes | T90,T91,T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[116] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[121:117] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[124:122] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[132:125] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[133] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[150:134] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[151] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[167:152] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[168] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[170:169] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[171] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[182:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[185:183] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[191:186] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[193:192] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[202:194] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[204:203] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[214:205] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[215] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[225:216] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[227] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[229:228] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[234:230] | Yes | Yes | *T71,*T217,*T113 | Yes | T71,T217,T213 | OUTPUT | |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[238:236] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[239] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[247:240] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[248] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[249] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[250] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[256:251] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[257] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[276:258] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[286:278] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[289:288] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.count[290] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[306:291] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[307] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[313:308] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[315:314] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[320:316] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[321] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[325:322] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[326] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[340:327] | Yes | Yes | *T71,*T217,*T113 | Yes | T71,T217,T213 | OUTPUT | |
otp_lc_data_o.count[341] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[356:342] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[357] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[359:358] | Yes | Yes | T71,T217,T113 | Yes | T71,T217,T213 | OUTPUT | |
otp_lc_data_o.count[360] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[376:361] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.count[378:377] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:379] | Yes | Yes | T90,T91,T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[7:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.state[8] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[15:9] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[16] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[17] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[19:18] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[24:20] | Yes | Yes | *T90,*T91,*T209 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[26:25] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[35:27] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[36] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[51:37] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[53:52] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[69:54] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[70] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[71] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[72] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[75:73] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[87:77] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[88] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[89] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.state[91:90] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[96:92] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT | |
otp_lc_data_o.state[97] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[110:98] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[111] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[120:112] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT | |
otp_lc_data_o.state[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[123:122] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[124] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[129:125] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[130] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[147:131] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[149:148] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[152:150] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT | |
otp_lc_data_o.state[155:153] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[156] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[157] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[159:158] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT | |
otp_lc_data_o.state[160] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[167:161] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[168] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[175:169] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[176] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[188:177] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[196:190] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[198:197] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[209:199] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT | |
otp_lc_data_o.state[210] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[216:211] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[217] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[221:218] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[222] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[225:223] | Yes | Yes | *T90,*T91,*T209 | Yes | T70,T71,T10 | OUTPUT | |
otp_lc_data_o.state[227:226] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[229:228] | Yes | Yes | T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.state[230] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[244:231] | Yes | Yes | *T90,*T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[245] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[257:246] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[259:258] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[261:260] | Yes | Yes | T90,T91,*T10 | Yes | T10,T210,T211 | OUTPUT | |
otp_lc_data_o.state[263:262] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[282:264] | Yes | Yes | *T72,*T73,*T74 | Yes | T70,T71,T10 | OUTPUT | |
otp_lc_data_o.state[283] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[288:284] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.state[289] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[291:290] | Yes | Yes | T72,T73,T74 | Yes | T134,T70,T71 | OUTPUT | |
otp_lc_data_o.state[292] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[298:293] | Yes | Yes | *T1,*T4,*T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[300:299] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[309:301] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_lc_data_o.state[311:310] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:312] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T1,T92,T93 | Yes | T1,T92,T93 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T191,T210,T216 | Yes | T5,T134,T135 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T5,T92 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T191,T210,T216 | Yes | T5,T134,T135 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T4,T5,T93 | Yes | T3,T103,T4 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T67,T68,T120 | Yes | T67,T68,T120 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T120,T129,T218 | Yes | T120,T129,T218 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T219,T220,T221 | Yes | T219,T220,T221 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T67,T68,T120 | Yes | T67,T68,T120 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T120,T129,T218 | Yes | T120,T129,T218 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T219,T220,T221 | Yes | T219,T220,T221 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T67,T68,T69 | Yes | T67,T68,T69 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T4,T92 | Yes | T1,T3,T34 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T3,T24 | Yes | T1,T4,T5 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T67,T68,T69 | Yes | T67,T68,T69 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T4,T25 | Yes | T1,T34,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[8:0] | Yes | Yes | *T222,*T223,*T1 | Yes | T222,T223,T1 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[9] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[23:10] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[24] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[79:25] | Yes | Yes | *T222,*T1,*T2 | Yes | T222,T1,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[98:81] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[99] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[131:100] | Yes | Yes | *T188,*T224,*T225 | Yes | T188,T224,T225 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[132] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[141:133] | Yes | Yes | *T188,*T224,*T222 | Yes | T188,T224,T222 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[142] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[231:143] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[232] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[251:233] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[252] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:253] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T3,T34,T103 | Yes | T4,T5,T92 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[11:0] | Yes | Yes | *T64,*T188,*T65 | Yes | T166,T67,T68 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[12] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[25:13] | Yes | Yes | *T188,*T224,*T222 | Yes | T188,T224,T222 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[26] | No | No | Yes | T224,T226,T227 | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:27] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |