| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 2 | 0 | 2 | 100.00 | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| falling | 534769 | 1 | T72 | 129 | T454 | 565 | T455 | 1800 | ||||
| rising | 534764 | 1 | T72 | 128 | T454 | 564 | T455 | 1800 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 971372 | 1 | T72 | 241 | T454 | 992 | T455 | 3268 | ||||
| auto[1] | 1218402 | 1 | T72 | 311 | T454 | 1279 | T455 | 4146 | 
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |