Line Coverage for Module : 
rv_plic
 | Line No. | Total | Covered | Percent | 
| TOTAL |  | 575 | 574 | 99.83 | 
| CONT_ASSIGN | 74 | 1 | 1 | 100.00 | 
| ALWAYS | 77 | 4 | 4 | 100.00 | 
| ALWAYS | 83 | 4 | 4 | 100.00 | 
| CONT_ASSIGN | 99 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 100 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 101 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 102 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 103 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 104 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 105 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 106 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 107 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 108 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 109 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 110 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 111 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 112 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 113 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 114 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 115 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 116 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 117 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 118 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 119 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 121 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 122 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 123 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 124 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 125 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 126 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 127 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 128 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 129 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 130 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 131 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 132 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 133 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 134 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 135 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 136 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 137 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 138 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 139 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 140 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 141 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 142 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 143 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 144 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 145 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 146 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 147 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 148 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 149 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 150 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 151 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 152 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 153 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 154 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 155 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 156 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 157 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 158 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 159 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 160 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 161 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 162 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 163 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 164 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 165 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 166 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 167 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 168 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 169 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 170 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 171 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 172 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 173 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 174 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 175 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 176 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 177 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 178 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 179 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 180 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 181 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 182 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 183 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 184 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 185 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 186 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 187 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 188 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 189 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 190 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 191 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 192 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 193 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 194 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 195 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 196 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 197 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 198 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 199 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 200 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 201 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 202 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 203 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 204 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 205 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 206 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 207 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 208 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 209 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 210 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 211 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 212 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 213 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 214 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 215 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 216 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 217 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 218 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 219 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 220 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 221 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 222 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 223 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 224 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 225 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 226 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 227 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 228 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 229 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 230 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 231 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 232 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 233 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 234 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 235 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 236 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 237 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 238 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 239 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 240 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 241 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 242 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 243 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 244 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 245 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 246 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 247 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 248 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 249 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 250 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 251 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 252 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 253 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 254 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 255 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 256 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 257 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 258 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 259 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 260 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 261 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 262 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 263 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 264 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 265 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 266 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 267 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 268 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 269 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 270 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 271 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 272 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 273 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 274 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 275 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 276 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 277 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 278 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 279 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 280 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 281 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 282 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 283 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 284 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 290 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 296 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 301 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 302 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 303 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 304 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 305 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 310 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 0 | 0.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 317 | 1 | 1 | 100.00 | 
| CONT_ASSIGN | 379 | 1 | 1 | 100.00 | 
Click here to see the source line report.
Cond Coverage for Module : 
rv_plic
 | Total | Covered | Percent | 
| Conditions | 3 | 3 | 100.00 | 
| Logical | 3 | 3 | 100.00 | 
| Non-Logical | 0 | 0 |  | 
| Event | 0 | 0 |  | 
 LINE       379
 SUB-EXPRESSION (reg2hw.alert_test.q & reg2hw.alert_test.qe)
                 ---------1---------   ----------2---------
| -1- | -2- | Status | Tests |                       
| 0 | 1 | Covered | T35 | 
| 1 | 0 | Covered | T3,T4,T5 | 
| 1 | 1 | Covered | T76,T77,T78 | 
Toggle Coverage for Module : 
rv_plic
 | Total | Covered | Percent | 
| Totals | 
33 | 
33 | 
100.00 | 
| Total Bits | 
716 | 
716 | 
100.00 | 
| Total Bits 0->1 | 
358 | 
358 | 
100.00 | 
| Total Bits 1->0 | 
358 | 
358 | 
100.00 | 
 |  |  |  | 
| Ports | 
33 | 
33 | 
100.00 | 
| Port Bits | 
716 | 
716 | 
100.00 | 
| Port Bits 0->1 | 
358 | 
358 | 
100.00 | 
| Port Bits 1->0 | 
358 | 
358 | 
100.00 | 
Port Details
| Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | 
| clk_i | 
Yes | 
Yes | 
T1,T2,T3 | 
Yes | 
T1,T2,T3 | 
INPUT | 
| rst_ni | 
Yes | 
Yes | 
T6,T33,T31 | 
Yes | 
T1,T2,T3 | 
INPUT | 
| tl_i.d_ready | 
Yes | 
Yes | 
T3,T6,T4 | 
Yes | 
T1,T2,T3 | 
INPUT | 
| tl_i.a_user.data_intg[6:0] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
INPUT | 
| tl_i.a_user.cmd_intg[6:0] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
INPUT | 
| tl_i.a_user.instr_type[3:0] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
INPUT | 
| tl_i.a_user.rsvd[4:0] | 
Unreachable | 
Unreachable | 
 | 
Unreachable | 
 | 
INPUT | 
| tl_i.a_data[31:0] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
INPUT | 
| tl_i.a_mask[3:0] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
INPUT | 
| tl_i.a_address[27:0] | 
Yes | 
Yes | 
*T94,*T95,*T99 | 
Yes | 
T94,T95,T99 | 
INPUT | 
| tl_i.a_address[29:28] | 
Unreachable | 
Unreachable | 
 | 
Unreachable | 
 | 
INPUT | 
| tl_i.a_address[30] | 
Yes | 
Yes | 
*T3,*T4,*T5 | 
Yes | 
T3,T4,T5 | 
INPUT | 
| tl_i.a_address[31] | 
Unreachable | 
Unreachable | 
 | 
Unreachable | 
 | 
INPUT | 
| tl_i.a_source[5:0] | 
Yes | 
Yes | 
*T35,*T94,*T95 | 
Yes | 
T35,T94,T95 | 
INPUT | 
| tl_i.a_source[7:6] | 
Unreachable | 
Unreachable | 
 | 
Unreachable | 
 | 
INPUT | 
| tl_i.a_size[1:0] | 
Yes | 
Yes | 
T94,T95,T99 | 
Yes | 
T94,T95,T99 | 
INPUT | 
| tl_i.a_param[2:0] | 
Unreachable | 
Unreachable | 
 | 
Unreachable | 
 | 
INPUT | 
| tl_i.a_opcode[2:0] | 
Yes | 
Yes | 
T94,T95,T96 | 
Yes | 
T94,T95,T96 | 
INPUT | 
| tl_i.a_valid | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
INPUT | 
| tl_o.a_ready | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
OUTPUT | 
| tl_o.d_error | 
Yes | 
Yes | 
T94,T95,T99 | 
Yes | 
T94,T99,T184 | 
OUTPUT | 
| tl_o.d_user.data_intg[6:0] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
OUTPUT | 
| tl_o.d_user.rsp_intg[6:0] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
OUTPUT | 
| tl_o.d_data[31:0] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
OUTPUT | 
| tl_o.d_sink | 
Yes | 
Yes | 
T94,T95,T96 | 
Yes | 
T94,T99,T184 | 
OUTPUT | 
| tl_o.d_source[5:0] | 
Yes | 
Yes | 
*T35,*T94,*T96 | 
Yes | 
T35,T94,T95 | 
OUTPUT | 
| tl_o.d_source[7:6] | 
Unreachable | 
Unreachable | 
 | 
Unreachable | 
 | 
OUTPUT | 
| tl_o.d_size[1:0] | 
Yes | 
Yes | 
T94,T95,T99 | 
Yes | 
T94,T95,T99 | 
OUTPUT | 
| tl_o.d_param[2:0] | 
Unreachable | 
Unreachable | 
 | 
Unreachable | 
 | 
OUTPUT | 
| tl_o.d_opcode[0] | 
Yes | 
Yes | 
*T3,*T4,*T5 | 
Yes | 
T3,T4,T5 | 
OUTPUT | 
| tl_o.d_opcode[2:1] | 
Unreachable | 
Unreachable | 
 | 
Unreachable | 
 | 
OUTPUT | 
| tl_o.d_valid | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
OUTPUT | 
| intr_src_i[0] | 
Unreachable | 
Unreachable | 
 | 
Unreachable | 
 | 
INPUT | 
| intr_src_i[185:1] | 
Yes | 
Yes | 
T127,T128,T331 | 
Yes | 
T127,T128,T331 | 
INPUT | 
| alert_rx_i[0].ack_n | 
Yes | 
Yes | 
T1,T2,T3 | 
Yes | 
T1,T2,T3 | 
INPUT | 
| alert_rx_i[0].ack_p | 
Yes | 
Yes | 
T100,T76,T101 | 
Yes | 
T100,T76,T101 | 
INPUT | 
| alert_rx_i[0].ping_n | 
Yes | 
Yes | 
T100,T101,T102 | 
Yes | 
T100,T101,T194 | 
INPUT | 
| alert_rx_i[0].ping_p | 
Yes | 
Yes | 
T100,T101,T194 | 
Yes | 
T100,T101,T102 | 
INPUT | 
| alert_tx_o[0].alert_n | 
Yes | 
Yes | 
T1,T2,T3 | 
Yes | 
T1,T2,T3 | 
OUTPUT | 
| alert_tx_o[0].alert_p | 
Yes | 
Yes | 
T100,T76,T101 | 
Yes | 
T100,T76,T101 | 
OUTPUT | 
| irq_o | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
OUTPUT | 
| irq_id_o[0][0] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
OUTPUT | 
| irq_id_o[0][1] | 
Yes | 
Yes | 
T3,T5,T29 | 
Yes | 
T3,T5,T29 | 
OUTPUT | 
| irq_id_o[0][2] | 
Yes | 
Yes | 
T3,T5,T118 | 
Yes | 
T3,T5,T118 | 
OUTPUT | 
| irq_id_o[0][3] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
OUTPUT | 
| irq_id_o[0][4] | 
Yes | 
Yes | 
T3,T4,T5 | 
Yes | 
T3,T4,T5 | 
OUTPUT | 
| irq_id_o[0][5] | 
Yes | 
Yes | 
T29,T118,T27 | 
Yes | 
T29,T118,T27 | 
OUTPUT | 
| irq_id_o[0][6] | 
Yes | 
Yes | 
T5,T29,T27 | 
Yes | 
T5,T29,T27 | 
OUTPUT | 
| irq_id_o[0][7] | 
Yes | 
Yes | 
T4,T118,T13 | 
Yes | 
T4,T118,T13 | 
OUTPUT | 
| msip_o | 
Yes | 
Yes | 
T287,T72,T35 | 
Yes | 
T287,T72,T35 | 
OUTPUT | 
*Tests covering at least one bit in the range
Branch Coverage for Module : 
rv_plic
 | Line No. | Total | Covered | Percent | 
| Branches | 
 | 
4 | 
4 | 
100.00 | 
| IF | 
79 | 
2 | 
2 | 
100.00 | 
| IF | 
85 | 
2 | 
2 | 
100.00 | 
79               if (claim_re[i]) claim[claim_id[i]] = 1'b1;
                 -1-  
                 ==>
                 MISSING_ELSE
                 ==>
Branches:
| -1- | Status | Tests | 
| 1 | 
Covered | 
T3,T4,T5 | 
| 0 | 
Covered | 
T3,T4,T5 | 
85               if (complete_we[i]) complete[complete_id[i]] = 1'b1;
                 -1-  
                 ==>
                 MISSING_ELSE
                 ==>
Branches:
| -1- | Status | Tests | 
| 1 | 
Covered | 
T3,T4,T5 | 
| 0 | 
Covered | 
T3,T4,T5 | 
Assert Coverage for Module : 
rv_plic
Assertion Details
FpvSecCmBusIntegrity_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
471096855 | 
0 | 
0 | 
0 | 
FpvSecCmRegWeOnehotCheck_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
471096855 | 
6 | 
0 | 
0 | 
| T102 | 
132092 | 
0 | 
0 | 
0 | 
| T263 | 
419024 | 
0 | 
0 | 
0 | 
| T312 | 
0 | 
1 | 
0 | 
0 | 
| T358 | 
330468 | 
0 | 
0 | 
0 | 
| T442 | 
151868 | 
1 | 
0 | 
0 | 
| T443 | 
0 | 
1 | 
0 | 
0 | 
| T444 | 
0 | 
1 | 
0 | 
0 | 
| T445 | 
0 | 
1 | 
0 | 
0 | 
| T446 | 
0 | 
1 | 
0 | 
0 | 
| T447 | 
123240 | 
0 | 
0 | 
0 | 
| T448 | 
130205 | 
0 | 
0 | 
0 | 
| T449 | 
195880 | 
0 | 
0 | 
0 | 
| T450 | 
135392 | 
0 | 
0 | 
0 | 
| T451 | 
81457 | 
0 | 
0 | 
0 | 
| T452 | 
119515 | 
0 | 
0 | 
0 | 
Irq0Tied_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
471096855 | 
470993279 | 
0 | 
0 | 
| T1 | 
79194 | 
79143 | 
0 | 
0 | 
| T2 | 
59963 | 
59905 | 
0 | 
0 | 
| T3 | 
211087 | 
211036 | 
0 | 
0 | 
| T4 | 
123510 | 
123459 | 
0 | 
0 | 
| T5 | 
294721 | 
294670 | 
0 | 
0 | 
| T6 | 
96786 | 
96724 | 
0 | 
0 | 
| T29 | 
74935 | 
74880 | 
0 | 
0 | 
| T33 | 
96569 | 
96459 | 
0 | 
0 | 
| T103 | 
42263 | 
42208 | 
0 | 
0 | 
| T104 | 
63494 | 
63432 | 
0 | 
0 | 
IrqKnownO_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
471096855 | 
470993279 | 
0 | 
0 | 
| T1 | 
79194 | 
79143 | 
0 | 
0 | 
| T2 | 
59963 | 
59905 | 
0 | 
0 | 
| T3 | 
211087 | 
211036 | 
0 | 
0 | 
| T4 | 
123510 | 
123459 | 
0 | 
0 | 
| T5 | 
294721 | 
294670 | 
0 | 
0 | 
| T6 | 
96786 | 
96724 | 
0 | 
0 | 
| T29 | 
74935 | 
74880 | 
0 | 
0 | 
| T33 | 
96569 | 
96459 | 
0 | 
0 | 
| T103 | 
42263 | 
42208 | 
0 | 
0 | 
| T104 | 
63494 | 
63432 | 
0 | 
0 | 
MsipKnownO_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
471096855 | 
470993279 | 
0 | 
0 | 
| T1 | 
79194 | 
79143 | 
0 | 
0 | 
| T2 | 
59963 | 
59905 | 
0 | 
0 | 
| T3 | 
211087 | 
211036 | 
0 | 
0 | 
| T4 | 
123510 | 
123459 | 
0 | 
0 | 
| T5 | 
294721 | 
294670 | 
0 | 
0 | 
| T6 | 
96786 | 
96724 | 
0 | 
0 | 
| T29 | 
74935 | 
74880 | 
0 | 
0 | 
| T33 | 
96569 | 
96459 | 
0 | 
0 | 
| T103 | 
42263 | 
42208 | 
0 | 
0 | 
| T104 | 
63494 | 
63432 | 
0 | 
0 | 
TlAReadyKnownO_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
471096855 | 
470993279 | 
0 | 
0 | 
| T1 | 
79194 | 
79143 | 
0 | 
0 | 
| T2 | 
59963 | 
59905 | 
0 | 
0 | 
| T3 | 
211087 | 
211036 | 
0 | 
0 | 
| T4 | 
123510 | 
123459 | 
0 | 
0 | 
| T5 | 
294721 | 
294670 | 
0 | 
0 | 
| T6 | 
96786 | 
96724 | 
0 | 
0 | 
| T29 | 
74935 | 
74880 | 
0 | 
0 | 
| T33 | 
96569 | 
96459 | 
0 | 
0 | 
| T103 | 
42263 | 
42208 | 
0 | 
0 | 
| T104 | 
63494 | 
63432 | 
0 | 
0 | 
TlDValidKnownO_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
471096855 | 
470993279 | 
0 | 
0 | 
| T1 | 
79194 | 
79143 | 
0 | 
0 | 
| T2 | 
59963 | 
59905 | 
0 | 
0 | 
| T3 | 
211087 | 
211036 | 
0 | 
0 | 
| T4 | 
123510 | 
123459 | 
0 | 
0 | 
| T5 | 
294721 | 
294670 | 
0 | 
0 | 
| T6 | 
96786 | 
96724 | 
0 | 
0 | 
| T29 | 
74935 | 
74880 | 
0 | 
0 | 
| T33 | 
96569 | 
96459 | 
0 | 
0 | 
| T103 | 
42263 | 
42208 | 
0 | 
0 | 
| T104 | 
63494 | 
63432 | 
0 | 
0 | 
gen_irq_id_known[0].IrqIdKnownO_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
471096855 | 
470993279 | 
0 | 
0 | 
| T1 | 
79194 | 
79143 | 
0 | 
0 | 
| T2 | 
59963 | 
59905 | 
0 | 
0 | 
| T3 | 
211087 | 
211036 | 
0 | 
0 | 
| T4 | 
123510 | 
123459 | 
0 | 
0 | 
| T5 | 
294721 | 
294670 | 
0 | 
0 | 
| T6 | 
96786 | 
96724 | 
0 | 
0 | 
| T29 | 
74935 | 
74880 | 
0 | 
0 | 
| T33 | 
96569 | 
96459 | 
0 | 
0 | 
| T103 | 
42263 | 
42208 | 
0 | 
0 | 
| T104 | 
63494 | 
63432 | 
0 | 
0 | 
onehot0Claim
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
471096855 | 
470993279 | 
0 | 
0 | 
| T1 | 
79194 | 
79143 | 
0 | 
0 | 
| T2 | 
59963 | 
59905 | 
0 | 
0 | 
| T3 | 
211087 | 
211036 | 
0 | 
0 | 
| T4 | 
123510 | 
123459 | 
0 | 
0 | 
| T5 | 
294721 | 
294670 | 
0 | 
0 | 
| T6 | 
96786 | 
96724 | 
0 | 
0 | 
| T29 | 
74935 | 
74880 | 
0 | 
0 | 
| T33 | 
96569 | 
96459 | 
0 | 
0 | 
| T103 | 
42263 | 
42208 | 
0 | 
0 | 
| T104 | 
63494 | 
63432 | 
0 | 
0 | 
onehot0Complete
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
471096855 | 
470993279 | 
0 | 
0 | 
| T1 | 
79194 | 
79143 | 
0 | 
0 | 
| T2 | 
59963 | 
59905 | 
0 | 
0 | 
| T3 | 
211087 | 
211036 | 
0 | 
0 | 
| T4 | 
123510 | 
123459 | 
0 | 
0 | 
| T5 | 
294721 | 
294670 | 
0 | 
0 | 
| T6 | 
96786 | 
96724 | 
0 | 
0 | 
| T29 | 
74935 | 
74880 | 
0 | 
0 | 
| T33 | 
96569 | 
96459 | 
0 | 
0 | 
| T103 | 
42263 | 
42208 | 
0 | 
0 | 
| T104 | 
63494 | 
63432 | 
0 | 
0 |