SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.11 | 85.11 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.30 | 85.30 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.30 | 85.30 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.30 | 85.30 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.82 | 92.11 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9372 | 85.11 |
Total Bits 0->1 | 5506 | 4699 | 85.34 |
Total Bits 1->0 | 5506 | 4673 | 84.87 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9372 | 85.11 |
Port Bits 0->1 | 5506 | 4699 | 85.34 |
Port Bits 1->0 | 5506 | 4673 | 84.87 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
edn_i.edn_fips | No | No | Yes | T143,T175,T176 | INPUT | |
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T94,*T95,*T96 | Yes | T94,T95,T96 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T87,*T37,*T59 | Yes | T87,T37,T59 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T94,T95,T96 | Yes | T94,T95,T96 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T37,T59,T97 | Yes | T37,T59,T97 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T94,T95,T96 | Yes | T95,T96,T177 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T96,T98,T158 | Yes | T94,T95,T96 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T59,*T178,*T179 | Yes | T59,T178,T179 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T94,T95,T96 | Yes | T94,T95,T96 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T180,*T181,*T58 | Yes | T180,T181,T182 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T59,T94,T95 | Yes | T59,T94,T95 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T59,T94,T95 | Yes | T59,T94,T95 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T94,*T95,*T96 | Yes | T94,T95,T96 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T59,*T94,*T95 | Yes | T59,T94,T95 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T87,*T37,*T59 | Yes | T87,T37,T59 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T94,T95,T96 | Yes | T94,T95,T96 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T37,T59,T97 | Yes | T37,T59,T97 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T59,T94,T95 | Yes | T59,T94,T95 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T3,T4 | Yes | T43,T38,T44 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T94,T95,T96 | Yes | T94,T95,T96 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T59,T94,T95 | Yes | T59,T94,T95 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T3,T4 | Yes | T43,T38,T44 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T95,T96,T98 | Yes | T94,T95,T96 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T59,T95,T96 | Yes | T59,T95,T96 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T94,T95,T96 | Yes | T95,T96,T98 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T3,*T4 | Yes | T43,T38,T44 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T59,T94,T95 | Yes | T59,T94,T95 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T120,T183,T184 | Yes | T120,T183,T184 | OUTPUT |
intr_otp_error_o | Yes | Yes | T120,T183,T184 | Yes | T120,T183,T184 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T185,T73,T99 | Yes | T185,T73,T99 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T43,T33,T38 | Yes | T43,T33,T38 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T73,T99,T186 | Yes | T73,T99,T186 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T73,T99,T100 | Yes | T73,T99,T100 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T73,T99,T100 | Yes | T73,T99,T100 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T185,T73,T99 | Yes | T185,T73,T99 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T43,T33,T38 | Yes | T43,T33,T38 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T73,T99,T186 | Yes | T73,T99,T186 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T73,T99,T100 | Yes | T73,T99,T100 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T73,T99,T100 | Yes | T73,T99,T100 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T151,T152,T18 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T43,T33,T34 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[0] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[9:1] | No | No | Yes | T187,T58,T188 | INPUT | |
lc_otp_vendor_test_i.ctrl[10] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[14:11] | No | No | Yes | T188,T58,T187 | INPUT | |
lc_otp_vendor_test_i.ctrl[17:15] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[22:18] | No | No | Yes | T58,T188,T187 | INPUT | |
lc_otp_vendor_test_i.ctrl[23] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[25:24] | No | No | Yes | T58 | INPUT | |
lc_otp_vendor_test_i.ctrl[26] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[28:27] | No | No | Yes | T58,T188,T187 | INPUT | |
lc_otp_vendor_test_i.ctrl[29] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:30] | No | No | Yes | T58,T187,T188 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[13:0] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT |
lc_otp_program_i.count[14] | No | No | No | INPUT | ||
lc_otp_program_i.count[15] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[16] | No | No | No | INPUT | ||
lc_otp_program_i.count[35:17] | Yes | Yes | *T185,*T190,*T34 | Yes | T185,T190,T34 | INPUT |
lc_otp_program_i.count[36] | No | No | No | INPUT | ||
lc_otp_program_i.count[41:37] | Yes | Yes | *T5,T34,T80 | Yes | T185,T189,T154 | INPUT |
lc_otp_program_i.count[42] | No | No | No | INPUT | ||
lc_otp_program_i.count[51:43] | Yes | Yes | *T5,*T34,*T80 | Yes | T185,T189,T154 | INPUT |
lc_otp_program_i.count[53:52] | No | No | No | INPUT | ||
lc_otp_program_i.count[55:54] | Yes | Yes | *T34,*T80,T185 | Yes | T34,T80,T185 | INPUT |
lc_otp_program_i.count[56] | No | No | No | INPUT | ||
lc_otp_program_i.count[70:57] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[71] | No | No | No | INPUT | ||
lc_otp_program_i.count[75:72] | Yes | Yes | *T5,T34,T80 | Yes | T189,T154,T191 | INPUT |
lc_otp_program_i.count[76] | No | No | No | INPUT | ||
lc_otp_program_i.count[91:77] | Yes | Yes | *T5,*T34,*T80 | Yes | T185,T189,T154 | INPUT |
lc_otp_program_i.count[92] | No | No | No | INPUT | ||
lc_otp_program_i.count[96:93] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[97] | No | No | No | INPUT | ||
lc_otp_program_i.count[98] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT |
lc_otp_program_i.count[99] | No | No | No | INPUT | ||
lc_otp_program_i.count[104:100] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[105] | No | No | No | INPUT | ||
lc_otp_program_i.count[107:106] | Yes | Yes | T34,T80,*T185 | Yes | T34,T80,T185 | INPUT |
lc_otp_program_i.count[108] | No | No | No | INPUT | ||
lc_otp_program_i.count[135:109] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[136] | No | No | No | INPUT | ||
lc_otp_program_i.count[146:137] | Yes | Yes | *T185,*T190,*T1 | Yes | T185,T190,T43 | INPUT |
lc_otp_program_i.count[147] | No | No | No | INPUT | ||
lc_otp_program_i.count[155:148] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT |
lc_otp_program_i.count[156] | No | No | No | INPUT | ||
lc_otp_program_i.count[160:157] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT |
lc_otp_program_i.count[162:161] | No | No | No | INPUT | ||
lc_otp_program_i.count[164:163] | Yes | Yes | T185,*T190,*T34 | Yes | T185,T190,T34 | INPUT |
lc_otp_program_i.count[165] | No | No | No | INPUT | ||
lc_otp_program_i.count[178:166] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT |
lc_otp_program_i.count[179] | No | No | No | INPUT | ||
lc_otp_program_i.count[195:180] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT |
lc_otp_program_i.count[196] | No | No | No | INPUT | ||
lc_otp_program_i.count[202:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT |
lc_otp_program_i.count[203] | No | No | No | INPUT | ||
lc_otp_program_i.count[213:204] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT |
lc_otp_program_i.count[214] | No | No | No | INPUT | ||
lc_otp_program_i.count[232:215] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT |
lc_otp_program_i.count[233] | No | No | No | INPUT | ||
lc_otp_program_i.count[234] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT |
lc_otp_program_i.count[235] | No | No | No | INPUT | ||
lc_otp_program_i.count[241:236] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT |
lc_otp_program_i.count[242] | No | No | No | INPUT | ||
lc_otp_program_i.count[243] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[244] | No | No | No | INPUT | ||
lc_otp_program_i.count[246:245] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT |
lc_otp_program_i.count[247] | No | No | No | INPUT | ||
lc_otp_program_i.count[263:248] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[264] | No | No | No | INPUT | ||
lc_otp_program_i.count[269:265] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[270] | No | No | No | INPUT | ||
lc_otp_program_i.count[280:271] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT |
lc_otp_program_i.count[281] | No | No | No | INPUT | ||
lc_otp_program_i.count[303:282] | Yes | Yes | *T185,*T190,*T34 | Yes | T185,T190,T34 | INPUT |
lc_otp_program_i.count[304] | No | No | No | INPUT | ||
lc_otp_program_i.count[310:305] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[311] | No | No | No | INPUT | ||
lc_otp_program_i.count[321:312] | Yes | Yes | *T185,*T190,*T34 | Yes | T185,T190,T34 | INPUT |
lc_otp_program_i.count[322] | No | No | No | INPUT | ||
lc_otp_program_i.count[330:323] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[331] | No | No | No | INPUT | ||
lc_otp_program_i.count[337:332] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[338] | No | No | No | INPUT | ||
lc_otp_program_i.count[340:339] | Yes | Yes | T34,T80,T189 | Yes | T34,T80,T189 | INPUT |
lc_otp_program_i.count[341] | No | No | No | INPUT | ||
lc_otp_program_i.count[342] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT |
lc_otp_program_i.count[344:343] | No | No | No | INPUT | ||
lc_otp_program_i.count[347:345] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT |
lc_otp_program_i.count[349:348] | No | No | No | INPUT | ||
lc_otp_program_i.count[353:350] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT |
lc_otp_program_i.count[354] | No | No | No | INPUT | ||
lc_otp_program_i.count[364:355] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT |
lc_otp_program_i.count[366:365] | No | No | No | INPUT | ||
lc_otp_program_i.count[376:367] | Yes | Yes | *T185,*T190,*T1 | Yes | T185,T190,T43 | INPUT |
lc_otp_program_i.count[377] | No | No | No | INPUT | ||
lc_otp_program_i.count[379:378] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT |
lc_otp_program_i.count[380] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:381] | Yes | Yes | T185,T190,T34 | Yes | T185,T190,T34 | INPUT |
lc_otp_program_i.state[4:0] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[5] | No | No | No | INPUT | ||
lc_otp_program_i.state[6] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[7] | No | No | No | INPUT | ||
lc_otp_program_i.state[9:8] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[10] | No | No | No | INPUT | ||
lc_otp_program_i.state[22:11] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[23] | No | No | No | INPUT | ||
lc_otp_program_i.state[28:24] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[30:29] | No | No | No | INPUT | ||
lc_otp_program_i.state[41:31] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[42] | No | No | No | INPUT | ||
lc_otp_program_i.state[43] | Yes | Yes | *T185,*T190 | Yes | T185,T190 | INPUT |
lc_otp_program_i.state[44] | No | No | No | INPUT | ||
lc_otp_program_i.state[57:45] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T192,T189 | INPUT |
lc_otp_program_i.state[58] | No | No | No | INPUT | ||
lc_otp_program_i.state[61:59] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[62] | No | No | No | INPUT | ||
lc_otp_program_i.state[63] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T192,T189 | INPUT |
lc_otp_program_i.state[64] | No | No | No | INPUT | ||
lc_otp_program_i.state[66:65] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[67] | No | No | No | INPUT | ||
lc_otp_program_i.state[75:68] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[76] | No | No | No | INPUT | ||
lc_otp_program_i.state[104:77] | Yes | Yes | *T185,*T190,*T34 | Yes | T185,T190,T34 | INPUT |
lc_otp_program_i.state[105] | No | No | No | INPUT | ||
lc_otp_program_i.state[119:106] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[120] | No | No | No | INPUT | ||
lc_otp_program_i.state[122:121] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[123] | No | No | No | INPUT | ||
lc_otp_program_i.state[136:124] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[137] | No | No | No | INPUT | ||
lc_otp_program_i.state[141:138] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[142] | No | No | No | INPUT | ||
lc_otp_program_i.state[143] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[144] | No | No | No | INPUT | ||
lc_otp_program_i.state[145] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[146] | No | No | No | INPUT | ||
lc_otp_program_i.state[151:147] | Yes | Yes | *T5,*T33,T34 | Yes | T33,T39,T192 | INPUT |
lc_otp_program_i.state[152] | No | No | No | INPUT | ||
lc_otp_program_i.state[163:153] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[164] | No | No | No | INPUT | ||
lc_otp_program_i.state[170:165] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[171] | No | No | No | INPUT | ||
lc_otp_program_i.state[173:172] | Yes | Yes | *T5,*T33,T34 | Yes | T33,T39,T192 | INPUT |
lc_otp_program_i.state[174] | No | No | No | INPUT | ||
lc_otp_program_i.state[175] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | INPUT |
lc_otp_program_i.state[176] | No | No | No | INPUT | ||
lc_otp_program_i.state[190:177] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | INPUT |
lc_otp_program_i.state[191] | No | No | No | INPUT | ||
lc_otp_program_i.state[205:192] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | INPUT |
lc_otp_program_i.state[206] | No | No | No | INPUT | ||
lc_otp_program_i.state[212:207] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[213] | No | No | No | INPUT | ||
lc_otp_program_i.state[214] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[215] | No | No | No | INPUT | ||
lc_otp_program_i.state[220:216] | Yes | Yes | *T5,*T33,T34 | Yes | T33,T39,T192 | INPUT |
lc_otp_program_i.state[221] | No | No | No | INPUT | ||
lc_otp_program_i.state[235:222] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[236] | No | No | No | INPUT | ||
lc_otp_program_i.state[237] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | INPUT |
lc_otp_program_i.state[238] | No | No | No | INPUT | ||
lc_otp_program_i.state[239] | Yes | Yes | *T185,*T190 | Yes | T185,T190 | INPUT |
lc_otp_program_i.state[240] | No | No | No | INPUT | ||
lc_otp_program_i.state[277:241] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[279:278] | No | No | No | INPUT | ||
lc_otp_program_i.state[288:280] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[289] | No | No | No | INPUT | ||
lc_otp_program_i.state[294:290] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[295] | No | No | No | INPUT | ||
lc_otp_program_i.state[298:296] | Yes | Yes | *T2,*T5,*T8 | Yes | T33,T39,T192 | INPUT |
lc_otp_program_i.state[300:299] | No | No | No | INPUT | ||
lc_otp_program_i.state[310:301] | Yes | Yes | *T2,*T5,*T8 | Yes | T33,T39,T192 | INPUT |
lc_otp_program_i.state[311] | No | No | No | INPUT | ||
lc_otp_program_i.state[314:312] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT |
lc_otp_program_i.state[315] | No | No | No | INPUT | ||
lc_otp_program_i.state[318:316] | Yes | Yes | *T2,*T5,*T8 | Yes | T33,T39,T192 | INPUT |
lc_otp_program_i.state[319] | No | No | No | INPUT | ||
lc_otp_program_i.req | Yes | Yes | T33,T34,T80 | Yes | T33,T34,T80 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T33,T34,T80 | Yes | T33,T34,T80 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T193,T194,T195 | Yes | T193,T194,T195 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T43,T38,T44 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T43,T38,T44 | Yes | T1,T3,T4 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T43,T38,T44 | Yes | T1,T3,T4 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T43,T44,T81 | Yes | T43,T33,T38 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T33,T38,T39 | Yes | T33,T34,T80 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T3,T8,T35 | Yes | T39,T44,T81 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T182,T196,T197 | Yes | T182,T198,T199 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T3,T7 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T4,T5 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T182,T196,T197 | Yes | T182,T198,T199 | OUTPUT |
otp_lc_data_o.count[13:0] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[14] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[15] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[16] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[35:17] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[36] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[41:37] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[42] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[51:43] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[53:52] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[55:54] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[56] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[70:57] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[71] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[75:72] | Yes | Yes | *T5,*T34,*T80 | Yes | T189,T154,T191 | OUTPUT |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[91:77] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[96:93] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[97] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[98] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[104:100] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[105] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[107:106] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[108] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[135:109] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[136] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[146:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[147] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[155:148] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[160:157] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[162:161] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[164:163] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[165] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[178:166] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[179] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[195:180] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[196] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[202:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[203] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[213:204] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[214] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[232:215] | Yes | Yes | *T33,*T38,*T39 | Yes | T33,T38,T39 | OUTPUT |
otp_lc_data_o.count[233] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[234] | Yes | Yes | *T33,*T38,*T39 | Yes | T33,T38,T39 | OUTPUT |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[241:236] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[242] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[243] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[244] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[246:245] | Yes | Yes | T33,T38,T39 | Yes | T33,T38,T39 | OUTPUT |
otp_lc_data_o.count[247] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[263:248] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[264] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[269:265] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[270] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[280:271] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[303:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[304] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[310:305] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[311] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[321:312] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[322] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[330:323] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[331] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[337:332] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[338] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[340:339] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT |
otp_lc_data_o.count[341] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[342] | Yes | Yes | *T33,*T38,*T39 | Yes | T33,T38,T39 | OUTPUT |
otp_lc_data_o.count[344:343] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[347:345] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[349:348] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[353:350] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[364:355] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[366:365] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[376:367] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[377] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[379:378] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.count[380] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:381] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.state[4:0] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[5] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[6] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[7] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[9:8] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[10] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[22:11] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[23] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[28:24] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[30:29] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[41:31] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[42] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[43] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.state[44] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[57:45] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T192,T189 | OUTPUT |
otp_lc_data_o.state[58] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[61:59] | Yes | Yes | *T34,*T80,T192 | Yes | T192,T189,T191 | OUTPUT |
otp_lc_data_o.state[62] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[63] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T192,T189 | OUTPUT |
otp_lc_data_o.state[64] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[66:65] | Yes | Yes | *T43,T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[67] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[75:68] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[104:77] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.state[105] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[119:106] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[120] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[122:121] | Yes | Yes | *T43,T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[123] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[136:124] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[141:138] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT |
otp_lc_data_o.state[142] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[143] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[144] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[145] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT |
otp_lc_data_o.state[146] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[151:147] | Yes | Yes | *T5,T33,*T34 | Yes | T33,T39,T192 | OUTPUT |
otp_lc_data_o.state[152] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[163:153] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT |
otp_lc_data_o.state[164] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[170:165] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[171] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[173:172] | Yes | Yes | *T5,T33,*T34 | Yes | T33,T39,T192 | OUTPUT |
otp_lc_data_o.state[174] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[175] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | OUTPUT |
otp_lc_data_o.state[176] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[190:177] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | OUTPUT |
otp_lc_data_o.state[191] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[205:192] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[206] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[212:207] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT |
otp_lc_data_o.state[213] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[214] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[215] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[220:216] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | OUTPUT |
otp_lc_data_o.state[221] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[235:222] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[236] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[237] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | OUTPUT |
otp_lc_data_o.state[238] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[239] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.state[240] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[277:241] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT |
otp_lc_data_o.state[279:278] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[288:280] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[289] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[294:290] | Yes | Yes | *T34,*T80,T192 | Yes | T192,T189,T191 | OUTPUT |
otp_lc_data_o.state[295] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[298:296] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T3,T4 | OUTPUT |
otp_lc_data_o.state[300:299] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[310:301] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T3,T4 | OUTPUT |
otp_lc_data_o.state[311] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[314:312] | Yes | Yes | *T34,*T80,T192 | Yes | T192,T189,T191 | OUTPUT |
otp_lc_data_o.state[315] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[318:316] | Yes | Yes | *T2,*T5,*T8 | Yes | T33,T39,T192 | OUTPUT |
otp_lc_data_o.state[319] | No | No | No | OUTPUT | ||
otp_lc_data_o.error | Yes | Yes | T43,T44,T81 | Yes | T43,T33,T38 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T182,T196,T197 | Yes | T182,T198,T199 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T38,T81,T182 | Yes | T1,T3,T6 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T182,T196,T197 | Yes | T182,T198,T199 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T44,T81,T200 | Yes | T1,T3,T4 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T201,T147,T202 | Yes | T201,T147,T202 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T201,T147,T203 | Yes | T201,T147,T203 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T204,T205,T206 | Yes | T204,T205,T206 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T201,T147,T202 | Yes | T201,T147,T202 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T201,T147,T203 | Yes | T201,T147,T203 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T205,T206,T207 | Yes | T205,T206,T207 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T208,T143,T175 | Yes | T208,T143,T175 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T208,T143,T175 | Yes | T208,T143,T175 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T2,T8 | Yes | T43,T38,T39 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[5:0] | Yes | Yes | *T209,*T210,*T211 | Yes | T209,T210,T211 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[6] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[13:7] | Yes | Yes | *T209,*T211,*T1 | Yes | T209,T211,T43 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[14] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[30:15] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[31] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[36:32] | Yes | Yes | *T210,*T211,*T1 | Yes | T210,T211,T43 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[37] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[60:38] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[61] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[128:62] | Yes | Yes | *T212,*T154,*T204 | Yes | T212,T154,T204 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[129] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[190:130] | Yes | Yes | *T212,*T154,*T204 | Yes | T212,T154,T204 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[191] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[203:192] | Yes | Yes | *T212,*T154,*T204 | Yes | T212,T154,T204 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[204] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[212:205] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[213] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[228:214] | Yes | Yes | *T210,*T1,*T2 | Yes | T210,T43,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[229] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:230] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T38,T39,T192 | Yes | T1,T3,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T8,T28,T22 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T43,T38,T44 | Yes | T1,T3,T4 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9371 | 85.30 |
Total Bits 0->1 | 5493 | 4698 | 85.53 |
Total Bits 1->0 | 5493 | 4673 | 85.07 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9371 | 85.30 |
Port Bits 0->1 | 5493 | 4698 | 85.53 |
Port Bits 1->0 | 5493 | 4673 | 85.07 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
edn_i.edn_fips | No | No | Yes | T143,T175,T176 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T94,*T95,*T96 | Yes | T94,T95,T96 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T87,*T37,*T59 | Yes | T87,T37,T59 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T94,T95,T96 | Yes | T94,T95,T96 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T37,T59,T97 | Yes | T37,T59,T97 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T94,T95,T96 | Yes | T95,T96,T177 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T96,T98,T158 | Yes | T94,T95,T96 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T59,*T178,*T179 | Yes | T59,T178,T179 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T94,T95,T96 | Yes | T94,T95,T96 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T180,*T181,*T58 | Yes | T180,T181,T182 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T59,T94,T95 | Yes | T59,T94,T95 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T59,T94,T95 | Yes | T59,T94,T95 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T94,*T95,*T96 | Yes | T94,T95,T96 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T59,*T94,*T95 | Yes | T59,T94,T95 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T87,*T37,*T59 | Yes | T87,T37,T59 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T94,T95,T96 | Yes | T94,T95,T96 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T37,T59,T97 | Yes | T37,T59,T97 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T59,T94,T95 | Yes | T59,T94,T95 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T3,T4 | Yes | T43,T38,T44 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T94,T95,T96 | Yes | T94,T95,T96 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T59,T94,T95 | Yes | T59,T94,T95 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T3,T4 | Yes | T43,T38,T44 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T95,T96,T98 | Yes | T94,T95,T96 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T59,T95,T96 | Yes | T59,T95,T96 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T94,T95,T96 | Yes | T95,T96,T98 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T3,*T4 | Yes | T43,T38,T44 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T59,T94,T95 | Yes | T59,T94,T95 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T120,T183,T184 | Yes | T120,T183,T184 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T120,T183,T184 | Yes | T120,T183,T184 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T185,T73,T99 | Yes | T185,T73,T99 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T43,T33,T38 | Yes | T43,T33,T38 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T73,T99,T186 | Yes | T73,T99,T186 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T73,T99,T100 | Yes | T73,T99,T100 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T73,T99,T100 | Yes | T73,T99,T100 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T185,T73,T99 | Yes | T185,T73,T99 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T43,T33,T38 | Yes | T43,T33,T38 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T73,T99,T186 | Yes | T73,T99,T186 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T73,T99,T100 | Yes | T73,T99,T100 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T73,T99,T100 | Yes | T73,T99,T100 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T151,T152,T18 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T43,T33,T34 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[0] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[9:1] | No | No | Yes | T187,T58,T188 | INPUT | ||
lc_otp_vendor_test_i.ctrl[10] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[14:11] | No | No | Yes | T188,T58,T187 | INPUT | ||
lc_otp_vendor_test_i.ctrl[17:15] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[22:18] | No | No | Yes | T58,T188,T187 | INPUT | ||
lc_otp_vendor_test_i.ctrl[23] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[25:24] | No | No | Yes | T58 | INPUT | ||
lc_otp_vendor_test_i.ctrl[26] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[28:27] | No | No | Yes | T58,T188,T187 | INPUT | ||
lc_otp_vendor_test_i.ctrl[29] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:30] | No | No | Yes | T58,T187,T188 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[13:0] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT | |
lc_otp_program_i.count[14] | No | No | No | INPUT | |||
lc_otp_program_i.count[15] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[16] | No | No | No | INPUT | |||
lc_otp_program_i.count[35:17] | Yes | Yes | *T185,*T190,*T34 | Yes | T185,T190,T34 | INPUT | |
lc_otp_program_i.count[36] | No | No | No | INPUT | |||
lc_otp_program_i.count[41:37] | Yes | Yes | *T5,T34,T80 | Yes | T185,T189,T154 | INPUT | |
lc_otp_program_i.count[42] | No | No | No | INPUT | |||
lc_otp_program_i.count[51:43] | Yes | Yes | *T5,*T34,*T80 | Yes | T185,T189,T154 | INPUT | |
lc_otp_program_i.count[53:52] | No | No | No | INPUT | |||
lc_otp_program_i.count[55:54] | Yes | Yes | *T34,*T80,T185 | Yes | T34,T80,T185 | INPUT | |
lc_otp_program_i.count[56] | No | No | No | INPUT | |||
lc_otp_program_i.count[70:57] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[71] | No | No | No | INPUT | |||
lc_otp_program_i.count[75:72] | Yes | Yes | *T5,T34,T80 | Yes | T189,T154,T191 | INPUT | |
lc_otp_program_i.count[76] | No | No | No | INPUT | |||
lc_otp_program_i.count[91:77] | Yes | Yes | *T5,*T34,*T80 | Yes | T185,T189,T154 | INPUT | |
lc_otp_program_i.count[92] | No | No | No | INPUT | |||
lc_otp_program_i.count[96:93] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[97] | No | No | No | INPUT | |||
lc_otp_program_i.count[98] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT | |
lc_otp_program_i.count[99] | No | No | No | INPUT | |||
lc_otp_program_i.count[104:100] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[105] | No | No | No | INPUT | |||
lc_otp_program_i.count[107:106] | Yes | Yes | T34,T80,*T185 | Yes | T34,T80,T185 | INPUT | |
lc_otp_program_i.count[108] | No | No | No | INPUT | |||
lc_otp_program_i.count[135:109] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[136] | No | No | No | INPUT | |||
lc_otp_program_i.count[146:137] | Yes | Yes | *T185,*T190,*T1 | Yes | T185,T190,T43 | INPUT | |
lc_otp_program_i.count[147] | No | No | No | INPUT | |||
lc_otp_program_i.count[155:148] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT | |
lc_otp_program_i.count[156] | No | No | No | INPUT | |||
lc_otp_program_i.count[160:157] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT | |
lc_otp_program_i.count[162:161] | No | No | No | INPUT | |||
lc_otp_program_i.count[164:163] | Yes | Yes | T185,*T190,*T34 | Yes | T185,T190,T34 | INPUT | |
lc_otp_program_i.count[165] | No | No | No | INPUT | |||
lc_otp_program_i.count[178:166] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT | |
lc_otp_program_i.count[179] | No | No | No | INPUT | |||
lc_otp_program_i.count[195:180] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT | |
lc_otp_program_i.count[196] | No | No | No | INPUT | |||
lc_otp_program_i.count[202:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT | |
lc_otp_program_i.count[203] | No | No | No | INPUT | |||
lc_otp_program_i.count[213:204] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT | |
lc_otp_program_i.count[214] | No | No | No | INPUT | |||
lc_otp_program_i.count[232:215] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT | |
lc_otp_program_i.count[233] | No | No | No | INPUT | |||
lc_otp_program_i.count[234] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT | |
lc_otp_program_i.count[235] | No | No | No | INPUT | |||
lc_otp_program_i.count[241:236] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT | |
lc_otp_program_i.count[242] | No | No | No | INPUT | |||
lc_otp_program_i.count[243] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[244] | No | No | No | INPUT | |||
lc_otp_program_i.count[246:245] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT | |
lc_otp_program_i.count[247] | No | No | No | INPUT | |||
lc_otp_program_i.count[263:248] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[264] | No | No | No | INPUT | |||
lc_otp_program_i.count[269:265] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[270] | No | No | No | INPUT | |||
lc_otp_program_i.count[280:271] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT | |
lc_otp_program_i.count[281] | No | No | No | INPUT | |||
lc_otp_program_i.count[303:282] | Yes | Yes | *T185,*T190,*T34 | Yes | T185,T190,T34 | INPUT | |
lc_otp_program_i.count[304] | No | No | No | INPUT | |||
lc_otp_program_i.count[310:305] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[311] | No | No | No | INPUT | |||
lc_otp_program_i.count[321:312] | Yes | Yes | *T185,*T190,*T34 | Yes | T185,T190,T34 | INPUT | |
lc_otp_program_i.count[322] | No | No | No | INPUT | |||
lc_otp_program_i.count[330:323] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[331] | No | No | No | INPUT | |||
lc_otp_program_i.count[337:332] | Yes | Yes | *T34,*T80,*T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[338] | No | No | No | INPUT | |||
lc_otp_program_i.count[340:339] | Yes | Yes | T34,T80,T189 | Yes | T34,T80,T189 | INPUT | |
lc_otp_program_i.count[341] | No | No | No | INPUT | |||
lc_otp_program_i.count[342] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT | |
lc_otp_program_i.count[344:343] | No | No | No | INPUT | |||
lc_otp_program_i.count[347:345] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT | |
lc_otp_program_i.count[349:348] | No | No | No | INPUT | |||
lc_otp_program_i.count[353:350] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT | |
lc_otp_program_i.count[354] | No | No | No | INPUT | |||
lc_otp_program_i.count[364:355] | Yes | Yes | *T34,*T80,*T185 | Yes | T34,T80,T185 | INPUT | |
lc_otp_program_i.count[366:365] | No | No | No | INPUT | |||
lc_otp_program_i.count[376:367] | Yes | Yes | *T185,*T190,*T1 | Yes | T185,T190,T43 | INPUT | |
lc_otp_program_i.count[377] | No | No | No | INPUT | |||
lc_otp_program_i.count[379:378] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | INPUT | |
lc_otp_program_i.count[380] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:381] | Yes | Yes | T185,T190,T34 | Yes | T185,T190,T34 | INPUT | |
lc_otp_program_i.state[4:0] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[5] | No | No | No | INPUT | |||
lc_otp_program_i.state[6] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[7] | No | No | No | INPUT | |||
lc_otp_program_i.state[9:8] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[10] | No | No | No | INPUT | |||
lc_otp_program_i.state[22:11] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[23] | No | No | No | INPUT | |||
lc_otp_program_i.state[28:24] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[30:29] | No | No | No | INPUT | |||
lc_otp_program_i.state[41:31] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[42] | No | No | No | INPUT | |||
lc_otp_program_i.state[43] | Yes | Yes | *T185,*T190 | Yes | T185,T190 | INPUT | |
lc_otp_program_i.state[44] | No | No | No | INPUT | |||
lc_otp_program_i.state[57:45] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T192,T189 | INPUT | |
lc_otp_program_i.state[58] | No | No | No | INPUT | |||
lc_otp_program_i.state[61:59] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[62] | No | No | No | INPUT | |||
lc_otp_program_i.state[63] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T192,T189 | INPUT | |
lc_otp_program_i.state[64] | No | No | No | INPUT | |||
lc_otp_program_i.state[66:65] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[67] | No | No | No | INPUT | |||
lc_otp_program_i.state[75:68] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[76] | No | No | No | INPUT | |||
lc_otp_program_i.state[104:77] | Yes | Yes | *T185,*T190,*T34 | Yes | T185,T190,T34 | INPUT | |
lc_otp_program_i.state[105] | No | No | No | INPUT | |||
lc_otp_program_i.state[119:106] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[120] | No | No | No | INPUT | |||
lc_otp_program_i.state[122:121] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[123] | No | No | No | INPUT | |||
lc_otp_program_i.state[136:124] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[137] | No | No | No | INPUT | |||
lc_otp_program_i.state[141:138] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[142] | No | No | No | INPUT | |||
lc_otp_program_i.state[143] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[144] | No | No | No | INPUT | |||
lc_otp_program_i.state[145] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[146] | No | No | No | INPUT | |||
lc_otp_program_i.state[151:147] | Yes | Yes | *T5,*T33,T34 | Yes | T33,T39,T192 | INPUT | |
lc_otp_program_i.state[152] | No | No | No | INPUT | |||
lc_otp_program_i.state[163:153] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[164] | No | No | No | INPUT | |||
lc_otp_program_i.state[170:165] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[171] | No | No | No | INPUT | |||
lc_otp_program_i.state[173:172] | Yes | Yes | *T5,*T33,T34 | Yes | T33,T39,T192 | INPUT | |
lc_otp_program_i.state[174] | No | No | No | INPUT | |||
lc_otp_program_i.state[175] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | INPUT | |
lc_otp_program_i.state[176] | No | No | No | INPUT | |||
lc_otp_program_i.state[190:177] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | INPUT | |
lc_otp_program_i.state[191] | No | No | No | INPUT | |||
lc_otp_program_i.state[205:192] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | INPUT | |
lc_otp_program_i.state[206] | No | No | No | INPUT | |||
lc_otp_program_i.state[212:207] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[213] | No | No | No | INPUT | |||
lc_otp_program_i.state[214] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[215] | No | No | No | INPUT | |||
lc_otp_program_i.state[220:216] | Yes | Yes | *T5,*T33,T34 | Yes | T33,T39,T192 | INPUT | |
lc_otp_program_i.state[221] | No | No | No | INPUT | |||
lc_otp_program_i.state[235:222] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[236] | No | No | No | INPUT | |||
lc_otp_program_i.state[237] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | INPUT | |
lc_otp_program_i.state[238] | No | No | No | INPUT | |||
lc_otp_program_i.state[239] | Yes | Yes | *T185,*T190 | Yes | T185,T190 | INPUT | |
lc_otp_program_i.state[240] | No | No | No | INPUT | |||
lc_otp_program_i.state[277:241] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[279:278] | No | No | No | INPUT | |||
lc_otp_program_i.state[288:280] | Yes | Yes | *T34,*T80,*T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[289] | No | No | No | INPUT | |||
lc_otp_program_i.state[294:290] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[295] | No | No | No | INPUT | |||
lc_otp_program_i.state[298:296] | Yes | Yes | *T2,*T5,*T8 | Yes | T33,T39,T192 | INPUT | |
lc_otp_program_i.state[300:299] | No | No | No | INPUT | |||
lc_otp_program_i.state[310:301] | Yes | Yes | *T2,*T5,*T8 | Yes | T33,T39,T192 | INPUT | |
lc_otp_program_i.state[311] | No | No | No | INPUT | |||
lc_otp_program_i.state[314:312] | Yes | Yes | T34,T80,T192 | Yes | T34,T80,T192 | INPUT | |
lc_otp_program_i.state[315] | No | No | No | INPUT | |||
lc_otp_program_i.state[318:316] | Yes | Yes | *T2,*T5,*T8 | Yes | T33,T39,T192 | INPUT | |
lc_otp_program_i.state[319] | No | No | No | INPUT | |||
lc_otp_program_i.req | Yes | Yes | T33,T34,T80 | Yes | T33,T34,T80 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T33,T34,T80 | Yes | T33,T34,T80 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T193,T194,T195 | Yes | T193,T194,T195 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T43,T38,T44 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T43,T38,T44 | Yes | T1,T3,T4 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T43,T38,T44 | Yes | T1,T3,T4 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T43,T44,T81 | Yes | T43,T33,T38 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T33,T38,T39 | Yes | T33,T34,T80 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T3,T8,T35 | Yes | T39,T44,T81 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T182,T196,T197 | Yes | T182,T198,T199 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T3,T7 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T4,T5 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T182,T196,T197 | Yes | T182,T198,T199 | OUTPUT | |
otp_lc_data_o.count[13:0] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[14] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[15] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[16] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[35:17] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[36] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[41:37] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[42] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[51:43] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[53:52] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[55:54] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[56] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[70:57] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[71] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[75:72] | Yes | Yes | *T5,*T34,*T80 | Yes | T189,T154,T191 | OUTPUT | |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[91:77] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[96:93] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[97] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[98] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[104:100] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[105] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[107:106] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[108] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[135:109] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[136] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[146:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[147] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[155:148] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[160:157] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[162:161] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[164:163] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[165] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[178:166] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[179] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[195:180] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[196] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[202:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[203] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[213:204] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[214] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[232:215] | Yes | Yes | *T33,*T38,*T39 | Yes | T33,T38,T39 | OUTPUT | |
otp_lc_data_o.count[233] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[234] | Yes | Yes | *T33,*T38,*T39 | Yes | T33,T38,T39 | OUTPUT | |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[241:236] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[242] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[243] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[244] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[246:245] | Yes | Yes | T33,T38,T39 | Yes | T33,T38,T39 | OUTPUT | |
otp_lc_data_o.count[247] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[263:248] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[264] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[269:265] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[270] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[280:271] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[303:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[304] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[310:305] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[311] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[321:312] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[322] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[330:323] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[331] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[337:332] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[338] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[340:339] | Yes | Yes | *T34,*T80,*T189 | Yes | T189,T191,T178 | OUTPUT | |
otp_lc_data_o.count[341] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[342] | Yes | Yes | *T33,*T38,*T39 | Yes | T33,T38,T39 | OUTPUT | |
otp_lc_data_o.count[344:343] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[347:345] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[349:348] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[353:350] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[364:355] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[366:365] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[376:367] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[377] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[379:378] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.count[380] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:381] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.state[4:0] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[5] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[6] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[7] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[9:8] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[10] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[22:11] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[23] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[28:24] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[30:29] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[41:31] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[42] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[43] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.state[44] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[57:45] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T192,T189 | OUTPUT | |
otp_lc_data_o.state[58] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[61:59] | Yes | Yes | *T34,*T80,T192 | Yes | T192,T189,T191 | OUTPUT | |
otp_lc_data_o.state[62] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[63] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T192,T189 | OUTPUT | |
otp_lc_data_o.state[64] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[66:65] | Yes | Yes | *T43,T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[67] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[75:68] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[104:77] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.state[105] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[119:106] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[120] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[122:121] | Yes | Yes | *T43,T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[123] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[136:124] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT | |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[141:138] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT | |
otp_lc_data_o.state[142] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[143] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[144] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[145] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT | |
otp_lc_data_o.state[146] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[151:147] | Yes | Yes | *T5,T33,*T34 | Yes | T33,T39,T192 | OUTPUT | |
otp_lc_data_o.state[152] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[163:153] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT | |
otp_lc_data_o.state[164] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[170:165] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[171] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[173:172] | Yes | Yes | *T5,T33,*T34 | Yes | T33,T39,T192 | OUTPUT | |
otp_lc_data_o.state[174] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[175] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | OUTPUT | |
otp_lc_data_o.state[176] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[190:177] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | OUTPUT | |
otp_lc_data_o.state[191] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[205:192] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[206] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[212:207] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT | |
otp_lc_data_o.state[213] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[214] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[215] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[220:216] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | OUTPUT | |
otp_lc_data_o.state[221] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[235:222] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[236] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[237] | Yes | Yes | *T5,*T33,*T34 | Yes | T33,T39,T192 | OUTPUT | |
otp_lc_data_o.state[238] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[239] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.state[240] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[277:241] | Yes | Yes | *T34,*T80,*T192 | Yes | T192,T189,T191 | OUTPUT | |
otp_lc_data_o.state[279:278] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[288:280] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[289] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[294:290] | Yes | Yes | *T34,*T80,T192 | Yes | T192,T189,T191 | OUTPUT | |
otp_lc_data_o.state[295] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[298:296] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T3,T4 | OUTPUT | |
otp_lc_data_o.state[300:299] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[310:301] | Yes | Yes | *T43,*T33,*T38 | Yes | T1,T3,T4 | OUTPUT | |
otp_lc_data_o.state[311] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[314:312] | Yes | Yes | *T34,*T80,T192 | Yes | T192,T189,T191 | OUTPUT | |
otp_lc_data_o.state[315] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[318:316] | Yes | Yes | *T2,*T5,*T8 | Yes | T33,T39,T192 | OUTPUT | |
otp_lc_data_o.state[319] | No | No | No | OUTPUT | |||
otp_lc_data_o.error | Yes | Yes | T43,T44,T81 | Yes | T43,T33,T38 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T182,T196,T197 | Yes | T182,T198,T199 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T38,T81,T182 | Yes | T1,T3,T6 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T182,T196,T197 | Yes | T182,T198,T199 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T44,T81,T200 | Yes | T1,T3,T4 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T201,T147,T202 | Yes | T201,T147,T202 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T201,T147,T203 | Yes | T201,T147,T203 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T204,T205,T206 | Yes | T204,T205,T206 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T201,T147,T202 | Yes | T201,T147,T202 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T201,T147,T203 | Yes | T201,T147,T203 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T205,T206,T207 | Yes | T205,T206,T207 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T208,T143,T175 | Yes | T208,T143,T175 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T43,T38,T44 | Yes | T2,T3,T4 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T35,T10 | Yes | T2,T4,T5 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T3,T4,T5 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T208,T143,T175 | Yes | T208,T143,T175 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T2,T8 | Yes | T43,T38,T39 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[5:0] | Yes | Yes | *T209,*T210,*T211 | Yes | T209,T210,T211 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[6] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[13:7] | Yes | Yes | *T209,*T211,*T1 | Yes | T209,T211,T43 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[14] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[30:15] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[31] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[36:32] | Yes | Yes | *T210,*T211,*T1 | Yes | T210,T211,T43 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[37] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[60:38] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[61] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[128:62] | Yes | Yes | *T212,*T154,*T204 | Yes | T212,T154,T204 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[129] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[190:130] | Yes | Yes | *T212,*T154,*T204 | Yes | T212,T154,T204 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[191] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[203:192] | Yes | Yes | *T212,*T154,*T204 | Yes | T212,T154,T204 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[204] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[212:205] | Yes | Yes | *T1,*T2,*T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[213] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[228:214] | Yes | Yes | *T210,*T1,*T2 | Yes | T210,T43,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[229] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:230] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T38,T39,T192 | Yes | T1,T3,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T43,T33,T38 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T43,T33,T38 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T43,T38,T44 | Yes | T1,T3,T4 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |